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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
commit2ac9d7aaccbd598b5bd19ac40761b723bb675442 (patch)
tree09132a44e33798aaa5e80f10bf025b510015cab3 /drivers/net
parent5ede3ceb7b2c2843e153a1803edbdc8c56655950 (diff)
parentdcf7ec5ee62a78123057a1e286c88ca739717409 (diff)
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Driver specific changes Again, a lot of platforms have changes in here: pxa, samsung, omap, at91, imx, ... * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: sa1100: clean up of the clock support ARM: pxa: add dummy clock for sa1100-rtc RTC: sa1100: support sa1100, pxa and mmp soc families RTC: sa1100: remove redundant code of setting alarm RTC: sa1100: Clean out ost register Input: zylonite-wm97xx - replace IRQ_GPIO() with gpio_to_irq() pcmcia: pxa: replace IRQ_GPIO() with gpio_to_irq() ARM: EXYNOS: Modified files for SPI consolidation work ARM: S5P64X0: Enable SDHCI support ARM: S5P64X0: Add lookup of sdhci-s3c clocks using generic names ARM: S5P64X0: Add HSMMC setup for host Controller ARM: EXYNOS: Add USB OHCI support to ORIGEN board USB: Add Samsung Exynos OHCI diver ARM: EXYNOS: Add USB OHCI support to SMDKV310 board ARM: EXYNOS: Add USB OHCI device net: macb: fix build break with !CONFIG_OF i2c: tegra: Support DVC controller in device tree i2c: tegra: Add __devinit/exit to probe/remove net/at91_ether: use gpio_is_valid for phy IRQ line ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT ...
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/Makefile2
-rw-r--r--drivers/net/ethernet/cadence/Kconfig16
-rw-r--r--drivers/net/ethernet/cadence/at91_ether.c23
-rw-r--r--drivers/net/ethernet/cadence/macb.c269
-rw-r--r--drivers/net/ethernet/cadence/macb.h152
5 files changed, 402 insertions, 60 deletions
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index cd6d69a6a7d2..08d5f0388877 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
10obj-$(CONFIG_NET_VENDOR_AMD) += amd/ 10obj-$(CONFIG_NET_VENDOR_AMD) += amd/
11obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ 11obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
12obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/ 12obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
13obj-$(CONFIG_NET_ATMEL) += cadence/ 13obj-$(CONFIG_NET_CADENCE) += cadence/
14obj-$(CONFIG_NET_BFIN) += adi/ 14obj-$(CONFIG_NET_BFIN) += adi/
15obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/ 15obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/
16obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/ 16obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig
index b48378a41e49..db931916da08 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -5,8 +5,8 @@
5config HAVE_NET_MACB 5config HAVE_NET_MACB
6 bool 6 bool
7 7
8config NET_ATMEL 8config NET_CADENCE
9 bool "Atmel devices" 9 bool "Cadence devices"
10 default y 10 default y
11 depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200) 11 depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200)
12 ---help--- 12 ---help---
@@ -21,7 +21,7 @@ config NET_ATMEL
21 the remaining Atmel network card questions. If you say Y, you will be 21 the remaining Atmel network card questions. If you say Y, you will be
22 asked for your specific card in the following questions. 22 asked for your specific card in the following questions.
23 23
24if NET_ATMEL 24if NET_CADENCE
25 25
26config ARM_AT91_ETHER 26config ARM_AT91_ETHER
27 tristate "AT91RM9200 Ethernet support" 27 tristate "AT91RM9200 Ethernet support"
@@ -33,14 +33,16 @@ config ARM_AT91_ETHER
33 ethernet support, then you should always answer Y to this. 33 ethernet support, then you should always answer Y to this.
34 34
35config MACB 35config MACB
36 tristate "Atmel MACB support" 36 tristate "Cadence MACB/GEM support"
37 depends on HAVE_NET_MACB 37 depends on HAVE_NET_MACB
38 select PHYLIB 38 select PHYLIB
39 ---help--- 39 ---help---
40 The Atmel MACB ethernet interface is found on many AT32 and AT91 40 The Cadence MACB ethernet interface is found on many Atmel AT32 and
41 parts. Say Y to include support for the MACB chip. 41 AT91 parts. This driver also supports the Cadence GEM (Gigabit
42 Ethernet MAC found in some ARM SoC devices). Note: the Gigabit mode
43 is not yet supported. Say Y to include support for the MACB/GEM chip.
42 44
43 To compile this driver as a module, choose M here: the module 45 To compile this driver as a module, choose M here: the module
44 will be called macb. 46 will be called macb.
45 47
46endif # NET_ATMEL 48endif # NET_CADENCE
diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c
index dfeb46cb3f74..1a5b6efa0120 100644
--- a/drivers/net/ethernet/cadence/at91_ether.c
+++ b/drivers/net/ethernet/cadence/at91_ether.c
@@ -256,8 +256,7 @@ static void enable_phyirq(struct net_device *dev)
256 unsigned int dsintr, irq_number; 256 unsigned int dsintr, irq_number;
257 int status; 257 int status;
258 258
259 irq_number = lp->board_data.phy_irq_pin; 259 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
260 if (!irq_number) {
261 /* 260 /*
262 * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), 261 * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L),
263 * or board does not have it connected. 262 * or board does not have it connected.
@@ -266,6 +265,7 @@ static void enable_phyirq(struct net_device *dev)
266 return; 265 return;
267 } 266 }
268 267
268 irq_number = lp->board_data.phy_irq_pin;
269 status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); 269 status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev);
270 if (status) { 270 if (status) {
271 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); 271 printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status);
@@ -320,8 +320,7 @@ static void disable_phyirq(struct net_device *dev)
320 unsigned int dsintr; 320 unsigned int dsintr;
321 unsigned int irq_number; 321 unsigned int irq_number;
322 322
323 irq_number = lp->board_data.phy_irq_pin; 323 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
324 if (!irq_number) {
325 del_timer_sync(&lp->check_timer); 324 del_timer_sync(&lp->check_timer);
326 return; 325 return;
327 } 326 }
@@ -366,6 +365,7 @@ static void disable_phyirq(struct net_device *dev)
366 disable_mdi(); 365 disable_mdi();
367 spin_unlock_irq(&lp->lock); 366 spin_unlock_irq(&lp->lock);
368 367
368 irq_number = lp->board_data.phy_irq_pin;
369 free_irq(irq_number, dev); /* Free interrupt handler */ 369 free_irq(irq_number, dev); /* Free interrupt handler */
370} 370}
371 371
@@ -1078,7 +1078,7 @@ static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_add
1078 netif_carrier_off(dev); /* will be enabled in open() */ 1078 netif_carrier_off(dev); /* will be enabled in open() */
1079 1079
1080 /* If board has no PHY IRQ, use a timer to poll the PHY */ 1080 /* If board has no PHY IRQ, use a timer to poll the PHY */
1081 if (!lp->board_data.phy_irq_pin) { 1081 if (!gpio_is_valid(lp->board_data.phy_irq_pin)) {
1082 init_timer(&lp->check_timer); 1082 init_timer(&lp->check_timer);
1083 lp->check_timer.data = (unsigned long)dev; 1083 lp->check_timer.data = (unsigned long)dev;
1084 lp->check_timer.function = at91ether_check_link; 1084 lp->check_timer.function = at91ether_check_link;
@@ -1170,7 +1170,8 @@ static int __devexit at91ether_remove(struct platform_device *pdev)
1170 struct net_device *dev = platform_get_drvdata(pdev); 1170 struct net_device *dev = platform_get_drvdata(pdev);
1171 struct at91_private *lp = netdev_priv(dev); 1171 struct at91_private *lp = netdev_priv(dev);
1172 1172
1173 if (lp->board_data.phy_irq_pin >= 32) 1173 if (gpio_is_valid(lp->board_data.phy_irq_pin) &&
1174 lp->board_data.phy_irq_pin >= 32)
1174 gpio_free(lp->board_data.phy_irq_pin); 1175 gpio_free(lp->board_data.phy_irq_pin);
1175 1176
1176 unregister_netdev(dev); 1177 unregister_netdev(dev);
@@ -1189,11 +1190,12 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
1189{ 1190{
1190 struct net_device *net_dev = platform_get_drvdata(pdev); 1191 struct net_device *net_dev = platform_get_drvdata(pdev);
1191 struct at91_private *lp = netdev_priv(net_dev); 1192 struct at91_private *lp = netdev_priv(net_dev);
1192 int phy_irq = lp->board_data.phy_irq_pin;
1193 1193
1194 if (netif_running(net_dev)) { 1194 if (netif_running(net_dev)) {
1195 if (phy_irq) 1195 if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
1196 int phy_irq = lp->board_data.phy_irq_pin;
1196 disable_irq(phy_irq); 1197 disable_irq(phy_irq);
1198 }
1197 1199
1198 netif_stop_queue(net_dev); 1200 netif_stop_queue(net_dev);
1199 netif_device_detach(net_dev); 1201 netif_device_detach(net_dev);
@@ -1207,7 +1209,6 @@ static int at91ether_resume(struct platform_device *pdev)
1207{ 1209{
1208 struct net_device *net_dev = platform_get_drvdata(pdev); 1210 struct net_device *net_dev = platform_get_drvdata(pdev);
1209 struct at91_private *lp = netdev_priv(net_dev); 1211 struct at91_private *lp = netdev_priv(net_dev);
1210 int phy_irq = lp->board_data.phy_irq_pin;
1211 1212
1212 if (netif_running(net_dev)) { 1213 if (netif_running(net_dev)) {
1213 clk_enable(lp->ether_clk); 1214 clk_enable(lp->ether_clk);
@@ -1215,8 +1216,10 @@ static int at91ether_resume(struct platform_device *pdev)
1215 netif_device_attach(net_dev); 1216 netif_device_attach(net_dev);
1216 netif_start_queue(net_dev); 1217 netif_start_queue(net_dev);
1217 1218
1218 if (phy_irq) 1219 if (gpio_is_valid(lp->board_data.phy_irq_pin)) {
1220 int phy_irq = lp->board_data.phy_irq_pin;
1219 enable_irq(phy_irq); 1221 enable_irq(phy_irq);
1222 }
1220 } 1223 }
1221 return 0; 1224 return 0;
1222} 1225}
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index aa1d597091a8..f3d5c65d99cf 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Atmel MACB Ethernet Controller driver 2 * Cadence MACB/GEM Ethernet Controller driver
3 * 3 *
4 * Copyright (C) 2004-2006 Atmel Corporation 4 * Copyright (C) 2004-2006 Atmel Corporation
5 * 5 *
@@ -23,6 +23,9 @@
23#include <linux/platform_data/macb.h> 23#include <linux/platform_data/macb.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/phy.h> 25#include <linux/phy.h>
26#include <linux/of.h>
27#include <linux/of_device.h>
28#include <linux/of_net.h>
26 29
27#include "macb.h" 30#include "macb.h"
28 31
@@ -59,9 +62,9 @@ static void __macb_set_hwaddr(struct macb *bp)
59 u16 top; 62 u16 top;
60 63
61 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); 64 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
62 macb_writel(bp, SA1B, bottom); 65 macb_or_gem_writel(bp, SA1B, bottom);
63 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); 66 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
64 macb_writel(bp, SA1T, top); 67 macb_or_gem_writel(bp, SA1T, top);
65} 68}
66 69
67static void __init macb_get_hwaddr(struct macb *bp) 70static void __init macb_get_hwaddr(struct macb *bp)
@@ -70,8 +73,8 @@ static void __init macb_get_hwaddr(struct macb *bp)
70 u16 top; 73 u16 top;
71 u8 addr[6]; 74 u8 addr[6];
72 75
73 bottom = macb_readl(bp, SA1B); 76 bottom = macb_or_gem_readl(bp, SA1B);
74 top = macb_readl(bp, SA1T); 77 top = macb_or_gem_readl(bp, SA1T);
75 78
76 addr[0] = bottom & 0xff; 79 addr[0] = bottom & 0xff;
77 addr[1] = (bottom >> 8) & 0xff; 80 addr[1] = (bottom >> 8) & 0xff;
@@ -191,7 +194,6 @@ static int macb_mii_probe(struct net_device *dev)
191{ 194{
192 struct macb *bp = netdev_priv(dev); 195 struct macb *bp = netdev_priv(dev);
193 struct phy_device *phydev; 196 struct phy_device *phydev;
194 struct macb_platform_data *pdata;
195 int ret; 197 int ret;
196 198
197 phydev = phy_find_first(bp->mii_bus); 199 phydev = phy_find_first(bp->mii_bus);
@@ -200,14 +202,11 @@ static int macb_mii_probe(struct net_device *dev)
200 return -1; 202 return -1;
201 } 203 }
202 204
203 pdata = bp->pdev->dev.platform_data;
204 /* TODO : add pin_irq */ 205 /* TODO : add pin_irq */
205 206
206 /* attach the mac to the phy */ 207 /* attach the mac to the phy */
207 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, 208 ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0,
208 pdata && pdata->is_rmii ? 209 bp->phy_interface);
209 PHY_INTERFACE_MODE_RMII :
210 PHY_INTERFACE_MODE_MII);
211 if (ret) { 210 if (ret) {
212 netdev_err(dev, "Could not attach to PHY\n"); 211 netdev_err(dev, "Could not attach to PHY\n");
213 return ret; 212 return ret;
@@ -285,8 +284,8 @@ err_out:
285static void macb_update_stats(struct macb *bp) 284static void macb_update_stats(struct macb *bp)
286{ 285{
287 u32 __iomem *reg = bp->regs + MACB_PFR; 286 u32 __iomem *reg = bp->regs + MACB_PFR;
288 u32 *p = &bp->hw_stats.rx_pause_frames; 287 u32 *p = &bp->hw_stats.macb.rx_pause_frames;
289 u32 *end = &bp->hw_stats.tx_pause_frames + 1; 288 u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
290 289
291 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); 290 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
292 291
@@ -580,7 +579,10 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
580 579
581 if (status & MACB_BIT(ISR_ROVR)) { 580 if (status & MACB_BIT(ISR_ROVR)) {
582 /* We missed at least one packet */ 581 /* We missed at least one packet */
583 bp->hw_stats.rx_overruns++; 582 if (macb_is_gem(bp))
583 bp->hw_stats.gem.rx_overruns++;
584 else
585 bp->hw_stats.macb.rx_overruns++;
584 } 586 }
585 587
586 if (status & MACB_BIT(HRESP)) { 588 if (status & MACB_BIT(HRESP)) {
@@ -790,6 +792,84 @@ static void macb_reset_hw(struct macb *bp)
790 macb_readl(bp, ISR); 792 macb_readl(bp, ISR);
791} 793}
792 794
795static u32 gem_mdc_clk_div(struct macb *bp)
796{
797 u32 config;
798 unsigned long pclk_hz = clk_get_rate(bp->pclk);
799
800 if (pclk_hz <= 20000000)
801 config = GEM_BF(CLK, GEM_CLK_DIV8);
802 else if (pclk_hz <= 40000000)
803 config = GEM_BF(CLK, GEM_CLK_DIV16);
804 else if (pclk_hz <= 80000000)
805 config = GEM_BF(CLK, GEM_CLK_DIV32);
806 else if (pclk_hz <= 120000000)
807 config = GEM_BF(CLK, GEM_CLK_DIV48);
808 else if (pclk_hz <= 160000000)
809 config = GEM_BF(CLK, GEM_CLK_DIV64);
810 else
811 config = GEM_BF(CLK, GEM_CLK_DIV96);
812
813 return config;
814}
815
816static u32 macb_mdc_clk_div(struct macb *bp)
817{
818 u32 config;
819 unsigned long pclk_hz;
820
821 if (macb_is_gem(bp))
822 return gem_mdc_clk_div(bp);
823
824 pclk_hz = clk_get_rate(bp->pclk);
825 if (pclk_hz <= 20000000)
826 config = MACB_BF(CLK, MACB_CLK_DIV8);
827 else if (pclk_hz <= 40000000)
828 config = MACB_BF(CLK, MACB_CLK_DIV16);
829 else if (pclk_hz <= 80000000)
830 config = MACB_BF(CLK, MACB_CLK_DIV32);
831 else
832 config = MACB_BF(CLK, MACB_CLK_DIV64);
833
834 return config;
835}
836
837/*
838 * Get the DMA bus width field of the network configuration register that we
839 * should program. We find the width from decoding the design configuration
840 * register to find the maximum supported data bus width.
841 */
842static u32 macb_dbw(struct macb *bp)
843{
844 if (!macb_is_gem(bp))
845 return 0;
846
847 switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) {
848 case 4:
849 return GEM_BF(DBW, GEM_DBW128);
850 case 2:
851 return GEM_BF(DBW, GEM_DBW64);
852 case 1:
853 default:
854 return GEM_BF(DBW, GEM_DBW32);
855 }
856}
857
858/*
859 * Configure the receive DMA engine to use the correct receive buffer size.
860 * This is a configurable parameter for GEM.
861 */
862static void macb_configure_dma(struct macb *bp)
863{
864 u32 dmacfg;
865
866 if (macb_is_gem(bp)) {
867 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
868 dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64);
869 gem_writel(bp, DMACFG, dmacfg);
870 }
871}
872
793static void macb_init_hw(struct macb *bp) 873static void macb_init_hw(struct macb *bp)
794{ 874{
795 u32 config; 875 u32 config;
@@ -797,7 +877,7 @@ static void macb_init_hw(struct macb *bp)
797 macb_reset_hw(bp); 877 macb_reset_hw(bp);
798 __macb_set_hwaddr(bp); 878 __macb_set_hwaddr(bp);
799 879
800 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L); 880 config = macb_mdc_clk_div(bp);
801 config |= MACB_BIT(PAE); /* PAuse Enable */ 881 config |= MACB_BIT(PAE); /* PAuse Enable */
802 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ 882 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
803 config |= MACB_BIT(BIG); /* Receive oversized frames */ 883 config |= MACB_BIT(BIG); /* Receive oversized frames */
@@ -805,8 +885,11 @@ static void macb_init_hw(struct macb *bp)
805 config |= MACB_BIT(CAF); /* Copy All Frames */ 885 config |= MACB_BIT(CAF); /* Copy All Frames */
806 if (!(bp->dev->flags & IFF_BROADCAST)) 886 if (!(bp->dev->flags & IFF_BROADCAST))
807 config |= MACB_BIT(NBC); /* No BroadCast */ 887 config |= MACB_BIT(NBC); /* No BroadCast */
888 config |= macb_dbw(bp);
808 macb_writel(bp, NCFGR, config); 889 macb_writel(bp, NCFGR, config);
809 890
891 macb_configure_dma(bp);
892
810 /* Initialize TX and RX buffers */ 893 /* Initialize TX and RX buffers */
811 macb_writel(bp, RBQP, bp->rx_ring_dma); 894 macb_writel(bp, RBQP, bp->rx_ring_dma);
812 macb_writel(bp, TBQP, bp->tx_ring_dma); 895 macb_writel(bp, TBQP, bp->tx_ring_dma);
@@ -902,8 +985,8 @@ static void macb_sethashtable(struct net_device *dev)
902 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); 985 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
903 } 986 }
904 987
905 macb_writel(bp, HRB, mc_filter[0]); 988 macb_or_gem_writel(bp, HRB, mc_filter[0]);
906 macb_writel(bp, HRT, mc_filter[1]); 989 macb_or_gem_writel(bp, HRT, mc_filter[1]);
907} 990}
908 991
909/* 992/*
@@ -925,8 +1008,8 @@ static void macb_set_rx_mode(struct net_device *dev)
925 1008
926 if (dev->flags & IFF_ALLMULTI) { 1009 if (dev->flags & IFF_ALLMULTI) {
927 /* Enable all multicast mode */ 1010 /* Enable all multicast mode */
928 macb_writel(bp, HRB, -1); 1011 macb_or_gem_writel(bp, HRB, -1);
929 macb_writel(bp, HRT, -1); 1012 macb_or_gem_writel(bp, HRT, -1);
930 cfg |= MACB_BIT(NCFGR_MTI); 1013 cfg |= MACB_BIT(NCFGR_MTI);
931 } else if (!netdev_mc_empty(dev)) { 1014 } else if (!netdev_mc_empty(dev)) {
932 /* Enable specific multicasts */ 1015 /* Enable specific multicasts */
@@ -934,8 +1017,8 @@ static void macb_set_rx_mode(struct net_device *dev)
934 cfg |= MACB_BIT(NCFGR_MTI); 1017 cfg |= MACB_BIT(NCFGR_MTI);
935 } else if (dev->flags & (~IFF_ALLMULTI)) { 1018 } else if (dev->flags & (~IFF_ALLMULTI)) {
936 /* Disable all multicast mode */ 1019 /* Disable all multicast mode */
937 macb_writel(bp, HRB, 0); 1020 macb_or_gem_writel(bp, HRB, 0);
938 macb_writel(bp, HRT, 0); 1021 macb_or_gem_writel(bp, HRT, 0);
939 cfg &= ~MACB_BIT(NCFGR_MTI); 1022 cfg &= ~MACB_BIT(NCFGR_MTI);
940 } 1023 }
941 1024
@@ -997,11 +1080,62 @@ static int macb_close(struct net_device *dev)
997 return 0; 1080 return 0;
998} 1081}
999 1082
1083static void gem_update_stats(struct macb *bp)
1084{
1085 u32 __iomem *reg = bp->regs + GEM_OTX;
1086 u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
1087 u32 *end = &bp->hw_stats.gem.rx_udp_checksum_errors + 1;
1088
1089 for (; p < end; p++, reg++)
1090 *p += __raw_readl(reg);
1091}
1092
1093static struct net_device_stats *gem_get_stats(struct macb *bp)
1094{
1095 struct gem_stats *hwstat = &bp->hw_stats.gem;
1096 struct net_device_stats *nstat = &bp->stats;
1097
1098 gem_update_stats(bp);
1099
1100 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors +
1101 hwstat->rx_alignment_errors +
1102 hwstat->rx_resource_errors +
1103 hwstat->rx_overruns +
1104 hwstat->rx_oversize_frames +
1105 hwstat->rx_jabbers +
1106 hwstat->rx_undersized_frames +
1107 hwstat->rx_length_field_frame_errors);
1108 nstat->tx_errors = (hwstat->tx_late_collisions +
1109 hwstat->tx_excessive_collisions +
1110 hwstat->tx_underrun +
1111 hwstat->tx_carrier_sense_errors);
1112 nstat->multicast = hwstat->rx_multicast_frames;
1113 nstat->collisions = (hwstat->tx_single_collision_frames +
1114 hwstat->tx_multiple_collision_frames +
1115 hwstat->tx_excessive_collisions);
1116 nstat->rx_length_errors = (hwstat->rx_oversize_frames +
1117 hwstat->rx_jabbers +
1118 hwstat->rx_undersized_frames +
1119 hwstat->rx_length_field_frame_errors);
1120 nstat->rx_over_errors = hwstat->rx_resource_errors;
1121 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors;
1122 nstat->rx_frame_errors = hwstat->rx_alignment_errors;
1123 nstat->rx_fifo_errors = hwstat->rx_overruns;
1124 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions;
1125 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors;
1126 nstat->tx_fifo_errors = hwstat->tx_underrun;
1127
1128 return nstat;
1129}
1130
1000static struct net_device_stats *macb_get_stats(struct net_device *dev) 1131static struct net_device_stats *macb_get_stats(struct net_device *dev)
1001{ 1132{
1002 struct macb *bp = netdev_priv(dev); 1133 struct macb *bp = netdev_priv(dev);
1003 struct net_device_stats *nstat = &bp->stats; 1134 struct net_device_stats *nstat = &bp->stats;
1004 struct macb_stats *hwstat = &bp->hw_stats; 1135 struct macb_stats *hwstat = &bp->hw_stats.macb;
1136
1137 if (macb_is_gem(bp))
1138 return gem_get_stats(bp);
1005 1139
1006 /* read stats from hardware */ 1140 /* read stats from hardware */
1007 macb_update_stats(bp); 1141 macb_update_stats(bp);
@@ -1109,6 +1243,52 @@ static const struct net_device_ops macb_netdev_ops = {
1109#endif 1243#endif
1110}; 1244};
1111 1245
1246#if defined(CONFIG_OF)
1247static const struct of_device_id macb_dt_ids[] = {
1248 { .compatible = "cdns,at32ap7000-macb" },
1249 { .compatible = "cdns,at91sam9260-macb" },
1250 { .compatible = "cdns,macb" },
1251 { .compatible = "cdns,pc302-gem" },
1252 { .compatible = "cdns,gem" },
1253 { /* sentinel */ }
1254};
1255
1256MODULE_DEVICE_TABLE(of, macb_dt_ids);
1257
1258static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1259{
1260 struct device_node *np = pdev->dev.of_node;
1261
1262 if (np)
1263 return of_get_phy_mode(np);
1264
1265 return -ENODEV;
1266}
1267
1268static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1269{
1270 struct device_node *np = bp->pdev->dev.of_node;
1271 if (np) {
1272 const char *mac = of_get_mac_address(np);
1273 if (mac) {
1274 memcpy(bp->dev->dev_addr, mac, ETH_ALEN);
1275 return 0;
1276 }
1277 }
1278
1279 return -ENODEV;
1280}
1281#else
1282static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev)
1283{
1284 return -ENODEV;
1285}
1286static int __devinit macb_get_hwaddr_dt(struct macb *bp)
1287{
1288 return -ENODEV;
1289}
1290#endif
1291
1112static int __init macb_probe(struct platform_device *pdev) 1292static int __init macb_probe(struct platform_device *pdev)
1113{ 1293{
1114 struct macb_platform_data *pdata; 1294 struct macb_platform_data *pdata;
@@ -1116,7 +1296,6 @@ static int __init macb_probe(struct platform_device *pdev)
1116 struct net_device *dev; 1296 struct net_device *dev;
1117 struct macb *bp; 1297 struct macb *bp;
1118 struct phy_device *phydev; 1298 struct phy_device *phydev;
1119 unsigned long pclk_hz;
1120 u32 config; 1299 u32 config;
1121 int err = -ENXIO; 1300 int err = -ENXIO;
1122 1301
@@ -1180,31 +1359,37 @@ static int __init macb_probe(struct platform_device *pdev)
1180 dev->base_addr = regs->start; 1359 dev->base_addr = regs->start;
1181 1360
1182 /* Set MII management clock divider */ 1361 /* Set MII management clock divider */
1183 pclk_hz = clk_get_rate(bp->pclk); 1362 config = macb_mdc_clk_div(bp);
1184 if (pclk_hz <= 20000000) 1363 config |= macb_dbw(bp);
1185 config = MACB_BF(CLK, MACB_CLK_DIV8);
1186 else if (pclk_hz <= 40000000)
1187 config = MACB_BF(CLK, MACB_CLK_DIV16);
1188 else if (pclk_hz <= 80000000)
1189 config = MACB_BF(CLK, MACB_CLK_DIV32);
1190 else
1191 config = MACB_BF(CLK, MACB_CLK_DIV64);
1192 macb_writel(bp, NCFGR, config); 1364 macb_writel(bp, NCFGR, config);
1193 1365
1194 macb_get_hwaddr(bp); 1366 err = macb_get_hwaddr_dt(bp);
1195 pdata = pdev->dev.platform_data; 1367 if (err < 0)
1368 macb_get_hwaddr(bp);
1369
1370 err = macb_get_phy_mode_dt(pdev);
1371 if (err < 0) {
1372 pdata = pdev->dev.platform_data;
1373 if (pdata && pdata->is_rmii)
1374 bp->phy_interface = PHY_INTERFACE_MODE_RMII;
1375 else
1376 bp->phy_interface = PHY_INTERFACE_MODE_MII;
1377 } else {
1378 bp->phy_interface = err;
1379 }
1196 1380
1197 if (pdata && pdata->is_rmii) 1381 if (bp->phy_interface == PHY_INTERFACE_MODE_RMII)
1198#if defined(CONFIG_ARCH_AT91) 1382#if defined(CONFIG_ARCH_AT91)
1199 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) ); 1383 macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) |
1384 MACB_BIT(CLKEN)));
1200#else 1385#else
1201 macb_writel(bp, USRIO, 0); 1386 macb_or_gem_writel(bp, USRIO, 0);
1202#endif 1387#endif
1203 else 1388 else
1204#if defined(CONFIG_ARCH_AT91) 1389#if defined(CONFIG_ARCH_AT91)
1205 macb_writel(bp, USRIO, MACB_BIT(CLKEN)); 1390 macb_or_gem_writel(bp, USRIO, MACB_BIT(CLKEN));
1206#else 1391#else
1207 macb_writel(bp, USRIO, MACB_BIT(MII)); 1392 macb_or_gem_writel(bp, USRIO, MACB_BIT(MII));
1208#endif 1393#endif
1209 1394
1210 bp->tx_pending = DEF_TX_RING_PENDING; 1395 bp->tx_pending = DEF_TX_RING_PENDING;
@@ -1221,8 +1406,9 @@ static int __init macb_probe(struct platform_device *pdev)
1221 1406
1222 platform_set_drvdata(pdev, dev); 1407 platform_set_drvdata(pdev, dev);
1223 1408
1224 netdev_info(dev, "Atmel MACB at 0x%08lx irq %d (%pM)\n", 1409 netdev_info(dev, "Cadence %s at 0x%08lx irq %d (%pM)\n",
1225 dev->base_addr, dev->irq, dev->dev_addr); 1410 macb_is_gem(bp) ? "GEM" : "MACB", dev->base_addr,
1411 dev->irq, dev->dev_addr);
1226 1412
1227 phydev = bp->phy_dev; 1413 phydev = bp->phy_dev;
1228 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", 1414 netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
@@ -1315,6 +1501,7 @@ static struct platform_driver macb_driver = {
1315 .driver = { 1501 .driver = {
1316 .name = "macb", 1502 .name = "macb",
1317 .owner = THIS_MODULE, 1503 .owner = THIS_MODULE,
1504 .of_match_table = of_match_ptr(macb_dt_ids),
1318 }, 1505 },
1319}; 1506};
1320 1507
@@ -1332,6 +1519,6 @@ module_init(macb_init);
1332module_exit(macb_exit); 1519module_exit(macb_exit);
1333 1520
1334MODULE_LICENSE("GPL"); 1521MODULE_LICENSE("GPL");
1335MODULE_DESCRIPTION("Atmel MACB Ethernet driver"); 1522MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");
1336MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 1523MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1337MODULE_ALIAS("platform:macb"); 1524MODULE_ALIAS("platform:macb");
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index d3212f6db703..335e288f5314 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -59,6 +59,24 @@
59#define MACB_TPQ 0x00bc 59#define MACB_TPQ 0x00bc
60#define MACB_USRIO 0x00c0 60#define MACB_USRIO 0x00c0
61#define MACB_WOL 0x00c4 61#define MACB_WOL 0x00c4
62#define MACB_MID 0x00fc
63
64/* GEM register offsets. */
65#define GEM_NCFGR 0x0004
66#define GEM_USRIO 0x000c
67#define GEM_DMACFG 0x0010
68#define GEM_HRB 0x0080
69#define GEM_HRT 0x0084
70#define GEM_SA1B 0x0088
71#define GEM_SA1T 0x008C
72#define GEM_OTX 0x0100
73#define GEM_DCFG1 0x0280
74#define GEM_DCFG2 0x0284
75#define GEM_DCFG3 0x0288
76#define GEM_DCFG4 0x028c
77#define GEM_DCFG5 0x0290
78#define GEM_DCFG6 0x0294
79#define GEM_DCFG7 0x0298
62 80
63/* Bitfields in NCR */ 81/* Bitfields in NCR */
64#define MACB_LB_OFFSET 0 82#define MACB_LB_OFFSET 0
@@ -126,6 +144,21 @@
126#define MACB_IRXFCS_OFFSET 19 144#define MACB_IRXFCS_OFFSET 19
127#define MACB_IRXFCS_SIZE 1 145#define MACB_IRXFCS_SIZE 1
128 146
147/* GEM specific NCFGR bitfields. */
148#define GEM_CLK_OFFSET 18
149#define GEM_CLK_SIZE 3
150#define GEM_DBW_OFFSET 21
151#define GEM_DBW_SIZE 2
152
153/* Constants for data bus width. */
154#define GEM_DBW32 0
155#define GEM_DBW64 1
156#define GEM_DBW128 2
157
158/* Bitfields in DMACFG. */
159#define GEM_RXBS_OFFSET 16
160#define GEM_RXBS_SIZE 8
161
129/* Bitfields in NSR */ 162/* Bitfields in NSR */
130#define MACB_NSR_LINK_OFFSET 0 163#define MACB_NSR_LINK_OFFSET 0
131#define MACB_NSR_LINK_SIZE 1 164#define MACB_NSR_LINK_SIZE 1
@@ -228,12 +261,30 @@
228#define MACB_WOL_MTI_OFFSET 19 261#define MACB_WOL_MTI_OFFSET 19
229#define MACB_WOL_MTI_SIZE 1 262#define MACB_WOL_MTI_SIZE 1
230 263
264/* Bitfields in MID */
265#define MACB_IDNUM_OFFSET 16
266#define MACB_IDNUM_SIZE 16
267#define MACB_REV_OFFSET 0
268#define MACB_REV_SIZE 16
269
270/* Bitfields in DCFG1. */
271#define GEM_DBWDEF_OFFSET 25
272#define GEM_DBWDEF_SIZE 3
273
231/* Constants for CLK */ 274/* Constants for CLK */
232#define MACB_CLK_DIV8 0 275#define MACB_CLK_DIV8 0
233#define MACB_CLK_DIV16 1 276#define MACB_CLK_DIV16 1
234#define MACB_CLK_DIV32 2 277#define MACB_CLK_DIV32 2
235#define MACB_CLK_DIV64 3 278#define MACB_CLK_DIV64 3
236 279
280/* GEM specific constants for CLK. */
281#define GEM_CLK_DIV8 0
282#define GEM_CLK_DIV16 1
283#define GEM_CLK_DIV32 2
284#define GEM_CLK_DIV48 3
285#define GEM_CLK_DIV64 4
286#define GEM_CLK_DIV96 5
287
237/* Constants for MAN register */ 288/* Constants for MAN register */
238#define MACB_MAN_SOF 1 289#define MACB_MAN_SOF 1
239#define MACB_MAN_WRITE 1 290#define MACB_MAN_WRITE 1
@@ -254,11 +305,52 @@
254 << MACB_##name##_OFFSET)) \ 305 << MACB_##name##_OFFSET)) \
255 | MACB_BF(name,value)) 306 | MACB_BF(name,value))
256 307
308#define GEM_BIT(name) \
309 (1 << GEM_##name##_OFFSET)
310#define GEM_BF(name, value) \
311 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
312 << GEM_##name##_OFFSET)
313#define GEM_BFEXT(name, value)\
314 (((value) >> GEM_##name##_OFFSET) \
315 & ((1 << GEM_##name##_SIZE) - 1))
316#define GEM_BFINS(name, value, old) \
317 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
318 << GEM_##name##_OFFSET)) \
319 | GEM_BF(name, value))
320
257/* Register access macros */ 321/* Register access macros */
258#define macb_readl(port,reg) \ 322#define macb_readl(port,reg) \
259 __raw_readl((port)->regs + MACB_##reg) 323 __raw_readl((port)->regs + MACB_##reg)
260#define macb_writel(port,reg,value) \ 324#define macb_writel(port,reg,value) \
261 __raw_writel((value), (port)->regs + MACB_##reg) 325 __raw_writel((value), (port)->regs + MACB_##reg)
326#define gem_readl(port, reg) \
327 __raw_readl((port)->regs + GEM_##reg)
328#define gem_writel(port, reg, value) \
329 __raw_writel((value), (port)->regs + GEM_##reg)
330
331/*
332 * Conditional GEM/MACB macros. These perform the operation to the correct
333 * register dependent on whether the device is a GEM or a MACB. For registers
334 * and bitfields that are common across both devices, use macb_{read,write}l
335 * to avoid the cost of the conditional.
336 */
337#define macb_or_gem_writel(__bp, __reg, __value) \
338 ({ \
339 if (macb_is_gem((__bp))) \
340 gem_writel((__bp), __reg, __value); \
341 else \
342 macb_writel((__bp), __reg, __value); \
343 })
344
345#define macb_or_gem_readl(__bp, __reg) \
346 ({ \
347 u32 __v; \
348 if (macb_is_gem((__bp))) \
349 __v = gem_readl((__bp), __reg); \
350 else \
351 __v = macb_readl((__bp), __reg); \
352 __v; \
353 })
262 354
263struct dma_desc { 355struct dma_desc {
264 u32 addr; 356 u32 addr;
@@ -358,6 +450,54 @@ struct macb_stats {
358 u32 tx_pause_frames; 450 u32 tx_pause_frames;
359}; 451};
360 452
453struct gem_stats {
454 u32 tx_octets_31_0;
455 u32 tx_octets_47_32;
456 u32 tx_frames;
457 u32 tx_broadcast_frames;
458 u32 tx_multicast_frames;
459 u32 tx_pause_frames;
460 u32 tx_64_byte_frames;
461 u32 tx_65_127_byte_frames;
462 u32 tx_128_255_byte_frames;
463 u32 tx_256_511_byte_frames;
464 u32 tx_512_1023_byte_frames;
465 u32 tx_1024_1518_byte_frames;
466 u32 tx_greater_than_1518_byte_frames;
467 u32 tx_underrun;
468 u32 tx_single_collision_frames;
469 u32 tx_multiple_collision_frames;
470 u32 tx_excessive_collisions;
471 u32 tx_late_collisions;
472 u32 tx_deferred_frames;
473 u32 tx_carrier_sense_errors;
474 u32 rx_octets_31_0;
475 u32 rx_octets_47_32;
476 u32 rx_frames;
477 u32 rx_broadcast_frames;
478 u32 rx_multicast_frames;
479 u32 rx_pause_frames;
480 u32 rx_64_byte_frames;
481 u32 rx_65_127_byte_frames;
482 u32 rx_128_255_byte_frames;
483 u32 rx_256_511_byte_frames;
484 u32 rx_512_1023_byte_frames;
485 u32 rx_1024_1518_byte_frames;
486 u32 rx_greater_than_1518_byte_frames;
487 u32 rx_undersized_frames;
488 u32 rx_oversize_frames;
489 u32 rx_jabbers;
490 u32 rx_frame_check_sequence_errors;
491 u32 rx_length_field_frame_errors;
492 u32 rx_symbol_errors;
493 u32 rx_alignment_errors;
494 u32 rx_resource_errors;
495 u32 rx_overruns;
496 u32 rx_ip_header_checksum_errors;
497 u32 rx_tcp_checksum_errors;
498 u32 rx_udp_checksum_errors;
499};
500
361struct macb { 501struct macb {
362 void __iomem *regs; 502 void __iomem *regs;
363 503
@@ -376,7 +516,10 @@ struct macb {
376 struct net_device *dev; 516 struct net_device *dev;
377 struct napi_struct napi; 517 struct napi_struct napi;
378 struct net_device_stats stats; 518 struct net_device_stats stats;
379 struct macb_stats hw_stats; 519 union {
520 struct macb_stats macb;
521 struct gem_stats gem;
522 } hw_stats;
380 523
381 dma_addr_t rx_ring_dma; 524 dma_addr_t rx_ring_dma;
382 dma_addr_t tx_ring_dma; 525 dma_addr_t tx_ring_dma;
@@ -389,6 +532,13 @@ struct macb {
389 unsigned int link; 532 unsigned int link;
390 unsigned int speed; 533 unsigned int speed;
391 unsigned int duplex; 534 unsigned int duplex;
535
536 phy_interface_t phy_interface;
392}; 537};
393 538
539static inline bool macb_is_gem(struct macb *bp)
540{
541 return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2;
542}
543
394#endif /* _MACB_H */ 544#endif /* _MACB_H */