diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-08-14 23:10:26 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-08-14 23:10:26 -0400 |
commit | 20445cc9159089d9d6b88d7864578efb10eb6590 (patch) | |
tree | fbbb27fd8baa82c77ebc4e020e8ee9ddb57e3ae2 /drivers/net | |
parent | 4339d328631aa815fe2181b9164b3690ca2db4da (diff) | |
parent | 4c0e176dd5e4c44dd60f398518f75eedbe1a65f3 (diff) |
/spare/repo/netdev-2.6 branch 'ieee80211'
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/cs89x0.c | 12 | ||||
-rw-r--r-- | drivers/net/cs89x0.h | 1 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_main.c | 1 | ||||
-rw-r--r-- | drivers/net/hamradio/6pack.c | 20 | ||||
-rw-r--r-- | drivers/net/hamradio/Kconfig | 2 | ||||
-rw-r--r-- | drivers/net/sk98lin/skge.c | 80 | ||||
-rw-r--r-- | drivers/net/sk98lin/skgeinit.c | 2 | ||||
-rw-r--r-- | drivers/net/sk98lin/skxmac2.c | 8 | ||||
-rw-r--r-- | drivers/net/skge.c | 233 | ||||
-rw-r--r-- | drivers/net/skge.h | 41 | ||||
-rw-r--r-- | drivers/net/smc91x.h | 2 | ||||
-rw-r--r-- | drivers/net/tg3.c | 16 |
12 files changed, 232 insertions, 186 deletions
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index 2c6dc24c3728..b780307093eb 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c | |||
@@ -417,6 +417,7 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) | |||
417 | struct net_local *lp = netdev_priv(dev); | 417 | struct net_local *lp = netdev_priv(dev); |
418 | static unsigned version_printed; | 418 | static unsigned version_printed; |
419 | int i; | 419 | int i; |
420 | int tmp; | ||
420 | unsigned rev_type = 0; | 421 | unsigned rev_type = 0; |
421 | int eeprom_buff[CHKSUM_LEN]; | 422 | int eeprom_buff[CHKSUM_LEN]; |
422 | int retval; | 423 | int retval; |
@@ -492,14 +493,17 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) | |||
492 | goto out2; | 493 | goto out2; |
493 | } | 494 | } |
494 | } | 495 | } |
495 | printk("PP_addr=0x%x\n", inw(ioaddr + ADD_PORT)); | 496 | printk(KERN_DEBUG "PP_addr at %x: 0x%x\n", |
497 | ioaddr + ADD_PORT, inw(ioaddr + ADD_PORT)); | ||
496 | 498 | ||
497 | ioaddr &= ~3; | 499 | ioaddr &= ~3; |
498 | outw(PP_ChipID, ioaddr + ADD_PORT); | 500 | outw(PP_ChipID, ioaddr + ADD_PORT); |
499 | 501 | ||
500 | if (inw(ioaddr + DATA_PORT) != CHIP_EISA_ID_SIG) { | 502 | tmp = inw(ioaddr + DATA_PORT); |
501 | printk(KERN_ERR "%s: incorrect signature 0x%x\n", | 503 | if (tmp != CHIP_EISA_ID_SIG) { |
502 | dev->name, inw(ioaddr + DATA_PORT)); | 504 | printk(KERN_DEBUG "%s: incorrect signature at %x: 0x%x!=" |
505 | CHIP_EISA_ID_SIG_STR "\n", | ||
506 | dev->name, ioaddr + DATA_PORT, tmp); | ||
503 | retval = -ENODEV; | 507 | retval = -ENODEV; |
504 | goto out2; | 508 | goto out2; |
505 | } | 509 | } |
diff --git a/drivers/net/cs89x0.h b/drivers/net/cs89x0.h index bd3ad8e6cce9..decea264f121 100644 --- a/drivers/net/cs89x0.h +++ b/drivers/net/cs89x0.h | |||
@@ -93,6 +93,7 @@ | |||
93 | #endif | 93 | #endif |
94 | 94 | ||
95 | #define CHIP_EISA_ID_SIG 0x630E /* Product ID Code for Crystal Chip (CS8900 spec 4.3) */ | 95 | #define CHIP_EISA_ID_SIG 0x630E /* Product ID Code for Crystal Chip (CS8900 spec 4.3) */ |
96 | #define CHIP_EISA_ID_SIG_STR "0x630E" | ||
96 | 97 | ||
97 | #ifdef IBMEIPKT | 98 | #ifdef IBMEIPKT |
98 | #define EISA_ID_SIG 0x4D24 /* IBM */ | 99 | #define EISA_ID_SIG 0x4D24 /* IBM */ |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 5e5d2c3c7ce4..b82fd15d0891 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -3789,6 +3789,7 @@ e1000_netpoll(struct net_device *netdev) | |||
3789 | struct e1000_adapter *adapter = netdev_priv(netdev); | 3789 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3790 | disable_irq(adapter->pdev->irq); | 3790 | disable_irq(adapter->pdev->irq); |
3791 | e1000_intr(adapter->pdev->irq, netdev, NULL); | 3791 | e1000_intr(adapter->pdev->irq, netdev, NULL); |
3792 | e1000_clean_tx_irq(adapter); | ||
3792 | enable_irq(adapter->pdev->irq); | 3793 | enable_irq(adapter->pdev->irq); |
3793 | } | 3794 | } |
3794 | #endif | 3795 | #endif |
diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c index e44f8e9055ef..f9e3be96963c 100644 --- a/drivers/net/hamradio/6pack.c +++ b/drivers/net/hamradio/6pack.c | |||
@@ -130,12 +130,11 @@ struct sixpack { | |||
130 | 130 | ||
131 | #define AX25_6PACK_HEADER_LEN 0 | 131 | #define AX25_6PACK_HEADER_LEN 0 |
132 | 132 | ||
133 | static void sp_start_tx_timer(struct sixpack *); | ||
134 | static void sixpack_decode(struct sixpack *, unsigned char[], int); | 133 | static void sixpack_decode(struct sixpack *, unsigned char[], int); |
135 | static int encode_sixpack(unsigned char *, unsigned char *, int, unsigned char); | 134 | static int encode_sixpack(unsigned char *, unsigned char *, int, unsigned char); |
136 | 135 | ||
137 | /* | 136 | /* |
138 | * perform the persistence/slottime algorithm for CSMA access. If the | 137 | * Perform the persistence/slottime algorithm for CSMA access. If the |
139 | * persistence check was successful, write the data to the serial driver. | 138 | * persistence check was successful, write the data to the serial driver. |
140 | * Note that in case of DAMA operation, the data is not sent here. | 139 | * Note that in case of DAMA operation, the data is not sent here. |
141 | */ | 140 | */ |
@@ -143,7 +142,7 @@ static int encode_sixpack(unsigned char *, unsigned char *, int, unsigned char); | |||
143 | static void sp_xmit_on_air(unsigned long channel) | 142 | static void sp_xmit_on_air(unsigned long channel) |
144 | { | 143 | { |
145 | struct sixpack *sp = (struct sixpack *) channel; | 144 | struct sixpack *sp = (struct sixpack *) channel; |
146 | int actual; | 145 | int actual, when = sp->slottime; |
147 | static unsigned char random; | 146 | static unsigned char random; |
148 | 147 | ||
149 | random = random * 17 + 41; | 148 | random = random * 17 + 41; |
@@ -159,20 +158,10 @@ static void sp_xmit_on_air(unsigned long channel) | |||
159 | sp->tty->driver->write(sp->tty, &sp->led_state, 1); | 158 | sp->tty->driver->write(sp->tty, &sp->led_state, 1); |
160 | sp->status2 = 0; | 159 | sp->status2 = 0; |
161 | } else | 160 | } else |
162 | sp_start_tx_timer(sp); | 161 | mod_timer(&sp->tx_t, jiffies + ((when + 1) * HZ) / 100); |
163 | } | 162 | } |
164 | 163 | ||
165 | /* ----> 6pack timer interrupt handler and friends. <---- */ | 164 | /* ----> 6pack timer interrupt handler and friends. <---- */ |
166 | static void sp_start_tx_timer(struct sixpack *sp) | ||
167 | { | ||
168 | int when = sp->slottime; | ||
169 | |||
170 | del_timer(&sp->tx_t); | ||
171 | sp->tx_t.data = (unsigned long) sp; | ||
172 | sp->tx_t.function = sp_xmit_on_air; | ||
173 | sp->tx_t.expires = jiffies + ((when + 1) * HZ) / 100; | ||
174 | add_timer(&sp->tx_t); | ||
175 | } | ||
176 | 165 | ||
177 | /* Encapsulate one AX.25 frame and stuff into a TTY queue. */ | 166 | /* Encapsulate one AX.25 frame and stuff into a TTY queue. */ |
178 | static void sp_encaps(struct sixpack *sp, unsigned char *icp, int len) | 167 | static void sp_encaps(struct sixpack *sp, unsigned char *icp, int len) |
@@ -243,8 +232,7 @@ static void sp_encaps(struct sixpack *sp, unsigned char *icp, int len) | |||
243 | sp->xleft = count; | 232 | sp->xleft = count; |
244 | sp->xhead = sp->xbuff; | 233 | sp->xhead = sp->xbuff; |
245 | sp->status2 = count; | 234 | sp->status2 = count; |
246 | if (sp->duplex == 0) | 235 | sp_xmit_on_air((unsigned long)sp); |
247 | sp_start_tx_timer(sp); | ||
248 | } | 236 | } |
249 | 237 | ||
250 | return; | 238 | return; |
diff --git a/drivers/net/hamradio/Kconfig b/drivers/net/hamradio/Kconfig index 7cdebe1a0b61..0cd54306e636 100644 --- a/drivers/net/hamradio/Kconfig +++ b/drivers/net/hamradio/Kconfig | |||
@@ -17,7 +17,7 @@ config MKISS | |||
17 | 17 | ||
18 | config 6PACK | 18 | config 6PACK |
19 | tristate "Serial port 6PACK driver" | 19 | tristate "Serial port 6PACK driver" |
20 | depends on AX25 && BROKEN_ON_SMP | 20 | depends on AX25 |
21 | ---help--- | 21 | ---help--- |
22 | 6pack is a transmission protocol for the data exchange between your | 22 | 6pack is a transmission protocol for the data exchange between your |
23 | PC and your TNC (the Terminal Node Controller acts as a kind of | 23 | PC and your TNC (the Terminal Node Controller acts as a kind of |
diff --git a/drivers/net/sk98lin/skge.c b/drivers/net/sk98lin/skge.c index 82570ec44d8e..6ee4771addf1 100644 --- a/drivers/net/sk98lin/skge.c +++ b/drivers/net/sk98lin/skge.c | |||
@@ -5133,6 +5133,84 @@ static void __devexit skge_remove_one(struct pci_dev *pdev) | |||
5133 | kfree(pAC); | 5133 | kfree(pAC); |
5134 | } | 5134 | } |
5135 | 5135 | ||
5136 | #ifdef CONFIG_PM | ||
5137 | static int skge_suspend(struct pci_dev *pdev, pm_message_t state) | ||
5138 | { | ||
5139 | struct net_device *dev = pci_get_drvdata(pdev); | ||
5140 | DEV_NET *pNet = netdev_priv(dev); | ||
5141 | SK_AC *pAC = pNet->pAC; | ||
5142 | struct net_device *otherdev = pAC->dev[1]; | ||
5143 | |||
5144 | if (netif_running(dev)) { | ||
5145 | netif_carrier_off(dev); | ||
5146 | DoPrintInterfaceChange = SK_FALSE; | ||
5147 | SkDrvDeInitAdapter(pAC, 0); /* performs SkGeClose */ | ||
5148 | netif_device_detach(dev); | ||
5149 | } | ||
5150 | if (otherdev != dev) { | ||
5151 | if (netif_running(otherdev)) { | ||
5152 | netif_carrier_off(otherdev); | ||
5153 | DoPrintInterfaceChange = SK_FALSE; | ||
5154 | SkDrvDeInitAdapter(pAC, 1); /* performs SkGeClose */ | ||
5155 | netif_device_detach(otherdev); | ||
5156 | } | ||
5157 | } | ||
5158 | |||
5159 | pci_save_state(pdev); | ||
5160 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | ||
5161 | if (pAC->AllocFlag & SK_ALLOC_IRQ) { | ||
5162 | free_irq(dev->irq, dev); | ||
5163 | } | ||
5164 | pci_disable_device(pdev); | ||
5165 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
5166 | |||
5167 | return 0; | ||
5168 | } | ||
5169 | |||
5170 | static int skge_resume(struct pci_dev *pdev) | ||
5171 | { | ||
5172 | struct net_device *dev = pci_get_drvdata(pdev); | ||
5173 | DEV_NET *pNet = netdev_priv(dev); | ||
5174 | SK_AC *pAC = pNet->pAC; | ||
5175 | struct net_device *otherdev = pAC->dev[1]; | ||
5176 | int ret; | ||
5177 | |||
5178 | pci_set_power_state(pdev, PCI_D0); | ||
5179 | pci_restore_state(pdev); | ||
5180 | pci_enable_device(pdev); | ||
5181 | pci_set_master(pdev); | ||
5182 | if (pAC->GIni.GIMacsFound == 2) | ||
5183 | ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev); | ||
5184 | else | ||
5185 | ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ, pAC->Name, dev); | ||
5186 | if (ret) { | ||
5187 | printk(KERN_WARNING "sk98lin: unable to acquire IRQ %d\n", dev->irq); | ||
5188 | pAC->AllocFlag &= ~SK_ALLOC_IRQ; | ||
5189 | dev->irq = 0; | ||
5190 | pci_disable_device(pdev); | ||
5191 | return -EBUSY; | ||
5192 | } | ||
5193 | |||
5194 | netif_device_attach(dev); | ||
5195 | if (netif_running(dev)) { | ||
5196 | DoPrintInterfaceChange = SK_FALSE; | ||
5197 | SkDrvInitAdapter(pAC, 0); /* first device */ | ||
5198 | } | ||
5199 | if (otherdev != dev) { | ||
5200 | netif_device_attach(otherdev); | ||
5201 | if (netif_running(otherdev)) { | ||
5202 | DoPrintInterfaceChange = SK_FALSE; | ||
5203 | SkDrvInitAdapter(pAC, 1); /* second device */ | ||
5204 | } | ||
5205 | } | ||
5206 | |||
5207 | return 0; | ||
5208 | } | ||
5209 | #else | ||
5210 | #define skge_suspend NULL | ||
5211 | #define skge_resume NULL | ||
5212 | #endif | ||
5213 | |||
5136 | static struct pci_device_id skge_pci_tbl[] = { | 5214 | static struct pci_device_id skge_pci_tbl[] = { |
5137 | { PCI_VENDOR_ID_3COM, 0x1700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 5215 | { PCI_VENDOR_ID_3COM, 0x1700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
5138 | { PCI_VENDOR_ID_3COM, 0x80eb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 5216 | { PCI_VENDOR_ID_3COM, 0x80eb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
@@ -5158,6 +5236,8 @@ static struct pci_driver skge_driver = { | |||
5158 | .id_table = skge_pci_tbl, | 5236 | .id_table = skge_pci_tbl, |
5159 | .probe = skge_probe_one, | 5237 | .probe = skge_probe_one, |
5160 | .remove = __devexit_p(skge_remove_one), | 5238 | .remove = __devexit_p(skge_remove_one), |
5239 | .suspend = skge_suspend, | ||
5240 | .resume = skge_resume, | ||
5161 | }; | 5241 | }; |
5162 | 5242 | ||
5163 | static int __init skge_init(void) | 5243 | static int __init skge_init(void) |
diff --git a/drivers/net/sk98lin/skgeinit.c b/drivers/net/sk98lin/skgeinit.c index df4483429a77..6cb49dd02251 100644 --- a/drivers/net/sk98lin/skgeinit.c +++ b/drivers/net/sk98lin/skgeinit.c | |||
@@ -2016,7 +2016,7 @@ SK_IOC IoC) /* IO context */ | |||
2016 | * we set the PHY to coma mode and switch to D3 power state. | 2016 | * we set the PHY to coma mode and switch to D3 power state. |
2017 | */ | 2017 | */ |
2018 | if (pAC->GIni.GIYukonLite && | 2018 | if (pAC->GIni.GIYukonLite && |
2019 | pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { | 2019 | pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { |
2020 | 2020 | ||
2021 | /* for all ports switch PHY to coma mode */ | 2021 | /* for all ports switch PHY to coma mode */ |
2022 | for (i = 0; i < pAC->GIni.GIMacsFound; i++) { | 2022 | for (i = 0; i < pAC->GIni.GIMacsFound; i++) { |
diff --git a/drivers/net/sk98lin/skxmac2.c b/drivers/net/sk98lin/skxmac2.c index 94a09deecb32..42d2d963150a 100644 --- a/drivers/net/sk98lin/skxmac2.c +++ b/drivers/net/sk98lin/skxmac2.c | |||
@@ -1065,7 +1065,7 @@ int Port) /* Port Index (MAC_1 + n) */ | |||
1065 | 1065 | ||
1066 | /* WA code for COMA mode */ | 1066 | /* WA code for COMA mode */ |
1067 | if (pAC->GIni.GIYukonLite && | 1067 | if (pAC->GIni.GIYukonLite && |
1068 | pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { | 1068 | pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { |
1069 | 1069 | ||
1070 | SK_IN32(IoC, B2_GP_IO, &DWord); | 1070 | SK_IN32(IoC, B2_GP_IO, &DWord); |
1071 | 1071 | ||
@@ -1110,7 +1110,7 @@ int Port) /* Port Index (MAC_1 + n) */ | |||
1110 | 1110 | ||
1111 | /* WA code for COMA mode */ | 1111 | /* WA code for COMA mode */ |
1112 | if (pAC->GIni.GIYukonLite && | 1112 | if (pAC->GIni.GIYukonLite && |
1113 | pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { | 1113 | pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { |
1114 | 1114 | ||
1115 | SK_IN32(IoC, B2_GP_IO, &DWord); | 1115 | SK_IN32(IoC, B2_GP_IO, &DWord); |
1116 | 1116 | ||
@@ -2126,7 +2126,7 @@ SK_U8 Mode) /* low power mode */ | |||
2126 | int Ret = 0; | 2126 | int Ret = 0; |
2127 | 2127 | ||
2128 | if (pAC->GIni.GIYukonLite && | 2128 | if (pAC->GIni.GIYukonLite && |
2129 | pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { | 2129 | pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { |
2130 | 2130 | ||
2131 | /* save current power mode */ | 2131 | /* save current power mode */ |
2132 | LastMode = pAC->GIni.GP[Port].PPhyPowerState; | 2132 | LastMode = pAC->GIni.GP[Port].PPhyPowerState; |
@@ -2253,7 +2253,7 @@ int Port) /* Port Index (e.g. MAC_1) */ | |||
2253 | int Ret = 0; | 2253 | int Ret = 0; |
2254 | 2254 | ||
2255 | if (pAC->GIni.GIYukonLite && | 2255 | if (pAC->GIni.GIYukonLite && |
2256 | pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) { | 2256 | pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { |
2257 | 2257 | ||
2258 | /* save current power mode */ | 2258 | /* save current power mode */ |
2259 | LastMode = pAC->GIni.GP[Port].PPhyPowerState; | 2259 | LastMode = pAC->GIni.GP[Port].PPhyPowerState; |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 5cacc7ad9e79..f15739481d62 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -42,7 +42,7 @@ | |||
42 | #include "skge.h" | 42 | #include "skge.h" |
43 | 43 | ||
44 | #define DRV_NAME "skge" | 44 | #define DRV_NAME "skge" |
45 | #define DRV_VERSION "0.7" | 45 | #define DRV_VERSION "0.8" |
46 | #define PFX DRV_NAME " " | 46 | #define PFX DRV_NAME " " |
47 | 47 | ||
48 | #define DEFAULT_TX_RING_SIZE 128 | 48 | #define DEFAULT_TX_RING_SIZE 128 |
@@ -55,7 +55,7 @@ | |||
55 | #define ETH_JUMBO_MTU 9000 | 55 | #define ETH_JUMBO_MTU 9000 |
56 | #define TX_WATCHDOG (5 * HZ) | 56 | #define TX_WATCHDOG (5 * HZ) |
57 | #define NAPI_WEIGHT 64 | 57 | #define NAPI_WEIGHT 64 |
58 | #define BLINK_HZ (HZ/4) | 58 | #define BLINK_MS 250 |
59 | 59 | ||
60 | MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver"); | 60 | MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver"); |
61 | MODULE_AUTHOR("Stephen Hemminger <shemminger@osdl.org>"); | 61 | MODULE_AUTHOR("Stephen Hemminger <shemminger@osdl.org>"); |
@@ -75,7 +75,6 @@ static const struct pci_device_id skge_id_table[] = { | |||
75 | { PCI_DEVICE(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C940B) }, | 75 | { PCI_DEVICE(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C940B) }, |
76 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE) }, | 76 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE) }, |
77 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU) }, | 77 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU) }, |
78 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ | ||
79 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_DGE510T), }, | 78 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_DGE510T), }, |
80 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4320) }, | 79 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4320) }, |
81 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5005) }, /* Belkin */ | 80 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5005) }, /* Belkin */ |
@@ -249,7 +248,7 @@ static int skge_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |||
249 | } else { | 248 | } else { |
250 | u32 setting; | 249 | u32 setting; |
251 | 250 | ||
252 | switch(ecmd->speed) { | 251 | switch (ecmd->speed) { |
253 | case SPEED_1000: | 252 | case SPEED_1000: |
254 | if (ecmd->duplex == DUPLEX_FULL) | 253 | if (ecmd->duplex == DUPLEX_FULL) |
255 | setting = SUPPORTED_1000baseT_Full; | 254 | setting = SUPPORTED_1000baseT_Full; |
@@ -620,84 +619,98 @@ static int skge_set_coalesce(struct net_device *dev, | |||
620 | return 0; | 619 | return 0; |
621 | } | 620 | } |
622 | 621 | ||
623 | static void skge_led_on(struct skge_hw *hw, int port) | 622 | enum led_mode { LED_MODE_OFF, LED_MODE_ON, LED_MODE_TST }; |
623 | static void skge_led(struct skge_port *skge, enum led_mode mode) | ||
624 | { | 624 | { |
625 | struct skge_hw *hw = skge->hw; | ||
626 | int port = skge->port; | ||
627 | |||
628 | spin_lock_bh(&hw->phy_lock); | ||
625 | if (hw->chip_id == CHIP_ID_GENESIS) { | 629 | if (hw->chip_id == CHIP_ID_GENESIS) { |
626 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); | 630 | switch (mode) { |
627 | skge_write8(hw, B0_LED, LED_STAT_ON); | 631 | case LED_MODE_OFF: |
632 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); | ||
633 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); | ||
634 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); | ||
635 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); | ||
636 | break; | ||
628 | 637 | ||
629 | skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); | 638 | case LED_MODE_ON: |
630 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); | 639 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); |
631 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); | 640 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); |
632 | 641 | ||
633 | /* For Broadcom Phy only */ | 642 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); |
634 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); | 643 | skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); |
635 | } else { | ||
636 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | ||
637 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | ||
638 | PHY_M_LED_MO_DUP(MO_LED_ON) | | ||
639 | PHY_M_LED_MO_10(MO_LED_ON) | | ||
640 | PHY_M_LED_MO_100(MO_LED_ON) | | ||
641 | PHY_M_LED_MO_1000(MO_LED_ON) | | ||
642 | PHY_M_LED_MO_RX(MO_LED_ON)); | ||
643 | } | ||
644 | } | ||
645 | 644 | ||
646 | static void skge_led_off(struct skge_hw *hw, int port) | 645 | break; |
647 | { | ||
648 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
649 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); | ||
650 | skge_write8(hw, B0_LED, LED_STAT_OFF); | ||
651 | 646 | ||
652 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); | 647 | case LED_MODE_TST: |
653 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); | 648 | skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); |
649 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); | ||
650 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); | ||
654 | 651 | ||
655 | /* Broadcom only */ | 652 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); |
656 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); | 653 | break; |
654 | } | ||
657 | } else { | 655 | } else { |
658 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | 656 | switch (mode) { |
659 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | 657 | case LED_MODE_OFF: |
660 | PHY_M_LED_MO_DUP(MO_LED_OFF) | | 658 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); |
661 | PHY_M_LED_MO_10(MO_LED_OFF) | | 659 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, |
662 | PHY_M_LED_MO_100(MO_LED_OFF) | | 660 | PHY_M_LED_MO_DUP(MO_LED_OFF) | |
663 | PHY_M_LED_MO_1000(MO_LED_OFF) | | 661 | PHY_M_LED_MO_10(MO_LED_OFF) | |
664 | PHY_M_LED_MO_RX(MO_LED_OFF)); | 662 | PHY_M_LED_MO_100(MO_LED_OFF) | |
663 | PHY_M_LED_MO_1000(MO_LED_OFF) | | ||
664 | PHY_M_LED_MO_RX(MO_LED_OFF)); | ||
665 | break; | ||
666 | case LED_MODE_ON: | ||
667 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, | ||
668 | PHY_M_LED_PULS_DUR(PULS_170MS) | | ||
669 | PHY_M_LED_BLINK_RT(BLINK_84MS) | | ||
670 | PHY_M_LEDC_TX_CTRL | | ||
671 | PHY_M_LEDC_DP_CTRL); | ||
672 | |||
673 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | ||
674 | PHY_M_LED_MO_RX(MO_LED_OFF) | | ||
675 | (skge->speed == SPEED_100 ? | ||
676 | PHY_M_LED_MO_100(MO_LED_ON) : 0)); | ||
677 | break; | ||
678 | case LED_MODE_TST: | ||
679 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | ||
680 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | ||
681 | PHY_M_LED_MO_DUP(MO_LED_ON) | | ||
682 | PHY_M_LED_MO_10(MO_LED_ON) | | ||
683 | PHY_M_LED_MO_100(MO_LED_ON) | | ||
684 | PHY_M_LED_MO_1000(MO_LED_ON) | | ||
685 | PHY_M_LED_MO_RX(MO_LED_ON)); | ||
686 | } | ||
665 | } | 687 | } |
666 | } | 688 | spin_unlock_bh(&hw->phy_lock); |
667 | |||
668 | static void skge_blink_timer(unsigned long data) | ||
669 | { | ||
670 | struct skge_port *skge = (struct skge_port *) data; | ||
671 | struct skge_hw *hw = skge->hw; | ||
672 | unsigned long flags; | ||
673 | |||
674 | spin_lock_irqsave(&hw->phy_lock, flags); | ||
675 | if (skge->blink_on) | ||
676 | skge_led_on(hw, skge->port); | ||
677 | else | ||
678 | skge_led_off(hw, skge->port); | ||
679 | spin_unlock_irqrestore(&hw->phy_lock, flags); | ||
680 | |||
681 | skge->blink_on = !skge->blink_on; | ||
682 | mod_timer(&skge->led_blink, jiffies + BLINK_HZ); | ||
683 | } | 689 | } |
684 | 690 | ||
685 | /* blink LED's for finding board */ | 691 | /* blink LED's for finding board */ |
686 | static int skge_phys_id(struct net_device *dev, u32 data) | 692 | static int skge_phys_id(struct net_device *dev, u32 data) |
687 | { | 693 | { |
688 | struct skge_port *skge = netdev_priv(dev); | 694 | struct skge_port *skge = netdev_priv(dev); |
695 | unsigned long ms; | ||
696 | enum led_mode mode = LED_MODE_TST; | ||
689 | 697 | ||
690 | if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)) | 698 | if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)) |
691 | data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); | 699 | ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT / HZ) * 1000; |
700 | else | ||
701 | ms = data * 1000; | ||
692 | 702 | ||
693 | /* start blinking */ | 703 | while (ms > 0) { |
694 | skge->blink_on = 1; | 704 | skge_led(skge, mode); |
695 | mod_timer(&skge->led_blink, jiffies+1); | 705 | mode ^= LED_MODE_TST; |
696 | 706 | ||
697 | msleep_interruptible(data * 1000); | 707 | if (msleep_interruptible(BLINK_MS)) |
698 | del_timer_sync(&skge->led_blink); | 708 | break; |
709 | ms -= BLINK_MS; | ||
710 | } | ||
699 | 711 | ||
700 | skge_led_off(skge->hw, skge->port); | 712 | /* back to regular LED state */ |
713 | skge_led(skge, netif_running(dev) ? LED_MODE_ON : LED_MODE_OFF); | ||
701 | 714 | ||
702 | return 0; | 715 | return 0; |
703 | } | 716 | } |
@@ -1028,7 +1041,7 @@ static void bcom_check_link(struct skge_hw *hw, int port) | |||
1028 | } | 1041 | } |
1029 | 1042 | ||
1030 | /* Check Duplex mismatch */ | 1043 | /* Check Duplex mismatch */ |
1031 | switch(aux & PHY_B_AS_AN_RES_MSK) { | 1044 | switch (aux & PHY_B_AS_AN_RES_MSK) { |
1032 | case PHY_B_RES_1000FD: | 1045 | case PHY_B_RES_1000FD: |
1033 | skge->duplex = DUPLEX_FULL; | 1046 | skge->duplex = DUPLEX_FULL; |
1034 | break; | 1047 | break; |
@@ -1099,7 +1112,7 @@ static void bcom_phy_init(struct skge_port *skge, int jumbo) | |||
1099 | r |= XM_MMU_NO_PRE; | 1112 | r |= XM_MMU_NO_PRE; |
1100 | xm_write16(hw, port, XM_MMU_CMD,r); | 1113 | xm_write16(hw, port, XM_MMU_CMD,r); |
1101 | 1114 | ||
1102 | switch(id1) { | 1115 | switch (id1) { |
1103 | case PHY_BCOM_ID1_C0: | 1116 | case PHY_BCOM_ID1_C0: |
1104 | /* | 1117 | /* |
1105 | * Workaround BCOM Errata for the C0 type. | 1118 | * Workaround BCOM Errata for the C0 type. |
@@ -1194,13 +1207,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) | |||
1194 | xm_write16(hw, port, XM_STAT_CMD, | 1207 | xm_write16(hw, port, XM_STAT_CMD, |
1195 | XM_SC_CLR_RXC | XM_SC_CLR_TXC); | 1208 | XM_SC_CLR_RXC | XM_SC_CLR_TXC); |
1196 | 1209 | ||
1197 | /* initialize Rx, Tx and Link LED */ | ||
1198 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); | ||
1199 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); | ||
1200 | |||
1201 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); | ||
1202 | skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); | ||
1203 | |||
1204 | /* Unreset the XMAC. */ | 1210 | /* Unreset the XMAC. */ |
1205 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); | 1211 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); |
1206 | 1212 | ||
@@ -1209,7 +1215,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) | |||
1209 | * namely for the 1000baseTX cards that use the XMAC's | 1215 | * namely for the 1000baseTX cards that use the XMAC's |
1210 | * GMII mode. | 1216 | * GMII mode. |
1211 | */ | 1217 | */ |
1212 | spin_lock_bh(&hw->phy_lock); | ||
1213 | /* Take external Phy out of reset */ | 1218 | /* Take external Phy out of reset */ |
1214 | r = skge_read32(hw, B2_GP_IO); | 1219 | r = skge_read32(hw, B2_GP_IO); |
1215 | if (port == 0) | 1220 | if (port == 0) |
@@ -1219,7 +1224,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) | |||
1219 | 1224 | ||
1220 | skge_write32(hw, B2_GP_IO, r); | 1225 | skge_write32(hw, B2_GP_IO, r); |
1221 | skge_read32(hw, B2_GP_IO); | 1226 | skge_read32(hw, B2_GP_IO); |
1222 | spin_unlock_bh(&hw->phy_lock); | ||
1223 | 1227 | ||
1224 | /* Enable GMII interfac */ | 1228 | /* Enable GMII interfac */ |
1225 | xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); | 1229 | xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); |
@@ -1569,7 +1573,6 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1569 | { | 1573 | { |
1570 | struct skge_port *skge = netdev_priv(hw->dev[port]); | 1574 | struct skge_port *skge = netdev_priv(hw->dev[port]); |
1571 | u16 ctrl, ct1000, adv; | 1575 | u16 ctrl, ct1000, adv; |
1572 | u16 ledctrl, ledover; | ||
1573 | 1576 | ||
1574 | pr_debug("yukon_init\n"); | 1577 | pr_debug("yukon_init\n"); |
1575 | if (skge->autoneg == AUTONEG_ENABLE) { | 1578 | if (skge->autoneg == AUTONEG_ENABLE) { |
@@ -1641,32 +1644,11 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1641 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); | 1644 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); |
1642 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); | 1645 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); |
1643 | 1646 | ||
1644 | /* Setup Phy LED's */ | ||
1645 | ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); | ||
1646 | ledover = 0; | ||
1647 | |||
1648 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; | ||
1649 | |||
1650 | /* turn off the Rx LED (LED_RX) */ | ||
1651 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); | ||
1652 | |||
1653 | /* disable blink mode (LED_DUPLEX) on collisions */ | ||
1654 | ctrl |= PHY_M_LEDC_DP_CTRL; | ||
1655 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); | ||
1656 | |||
1657 | if (skge->autoneg == AUTONEG_DISABLE || skge->speed == SPEED_100) { | ||
1658 | /* turn on 100 Mbps LED (LED_LINK100) */ | ||
1659 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); | ||
1660 | } | ||
1661 | |||
1662 | if (ledover) | ||
1663 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); | ||
1664 | |||
1665 | /* Enable phy interrupt on autonegotiation complete (or link up) */ | 1647 | /* Enable phy interrupt on autonegotiation complete (or link up) */ |
1666 | if (skge->autoneg == AUTONEG_ENABLE) | 1648 | if (skge->autoneg == AUTONEG_ENABLE) |
1667 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); | 1649 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_MSK); |
1668 | else | 1650 | else |
1669 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); | 1651 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); |
1670 | } | 1652 | } |
1671 | 1653 | ||
1672 | static void yukon_reset(struct skge_hw *hw, int port) | 1654 | static void yukon_reset(struct skge_hw *hw, int port) |
@@ -1691,7 +1673,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
1691 | 1673 | ||
1692 | /* WA code for COMA mode -- set PHY reset */ | 1674 | /* WA code for COMA mode -- set PHY reset */ |
1693 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | 1675 | if (hw->chip_id == CHIP_ID_YUKON_LITE && |
1694 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | 1676 | hw->chip_rev >= CHIP_REV_YU_LITE_A3) |
1695 | skge_write32(hw, B2_GP_IO, | 1677 | skge_write32(hw, B2_GP_IO, |
1696 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9)); | 1678 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9)); |
1697 | 1679 | ||
@@ -1701,7 +1683,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
1701 | 1683 | ||
1702 | /* WA code for COMA mode -- clear PHY reset */ | 1684 | /* WA code for COMA mode -- clear PHY reset */ |
1703 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | 1685 | if (hw->chip_id == CHIP_ID_YUKON_LITE && |
1704 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | 1686 | hw->chip_rev >= CHIP_REV_YU_LITE_A3) |
1705 | skge_write32(hw, B2_GP_IO, | 1687 | skge_write32(hw, B2_GP_IO, |
1706 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9) | 1688 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9) |
1707 | & ~GP_IO_9); | 1689 | & ~GP_IO_9); |
@@ -1745,9 +1727,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
1745 | gma_write16(hw, port, GM_GP_CTRL, reg); | 1727 | gma_write16(hw, port, GM_GP_CTRL, reg); |
1746 | skge_read16(hw, GMAC_IRQ_SRC); | 1728 | skge_read16(hw, GMAC_IRQ_SRC); |
1747 | 1729 | ||
1748 | spin_lock_bh(&hw->phy_lock); | ||
1749 | yukon_init(hw, port); | 1730 | yukon_init(hw, port); |
1750 | spin_unlock_bh(&hw->phy_lock); | ||
1751 | 1731 | ||
1752 | /* MIB clear */ | 1732 | /* MIB clear */ |
1753 | reg = gma_read16(hw, port, GM_PHY_ADDR); | 1733 | reg = gma_read16(hw, port, GM_PHY_ADDR); |
@@ -1796,7 +1776,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
1796 | skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); | 1776 | skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); |
1797 | reg = GMF_OPER_ON | GMF_RX_F_FL_ON; | 1777 | reg = GMF_OPER_ON | GMF_RX_F_FL_ON; |
1798 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | 1778 | if (hw->chip_id == CHIP_ID_YUKON_LITE && |
1799 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | 1779 | hw->chip_rev >= CHIP_REV_YU_LITE_A3) |
1800 | reg &= ~GMF_RX_F_FL_ON; | 1780 | reg &= ~GMF_RX_F_FL_ON; |
1801 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); | 1781 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); |
1802 | skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); | 1782 | skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); |
@@ -1813,19 +1793,19 @@ static void yukon_stop(struct skge_port *skge) | |||
1813 | int port = skge->port; | 1793 | int port = skge->port; |
1814 | 1794 | ||
1815 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | 1795 | if (hw->chip_id == CHIP_ID_YUKON_LITE && |
1816 | hw->chip_rev == CHIP_REV_YU_LITE_A3) { | 1796 | hw->chip_rev >= CHIP_REV_YU_LITE_A3) { |
1817 | skge_write32(hw, B2_GP_IO, | 1797 | skge_write32(hw, B2_GP_IO, |
1818 | skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9); | 1798 | skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9); |
1819 | } | 1799 | } |
1820 | 1800 | ||
1821 | gma_write16(hw, port, GM_GP_CTRL, | 1801 | gma_write16(hw, port, GM_GP_CTRL, |
1822 | gma_read16(hw, port, GM_GP_CTRL) | 1802 | gma_read16(hw, port, GM_GP_CTRL) |
1823 | & ~(GM_GPCR_RX_ENA|GM_GPCR_RX_ENA)); | 1803 | & ~(GM_GPCR_TX_ENA|GM_GPCR_RX_ENA)); |
1824 | gma_read16(hw, port, GM_GP_CTRL); | 1804 | gma_read16(hw, port, GM_GP_CTRL); |
1825 | 1805 | ||
1826 | /* set GPHY Control reset */ | 1806 | /* set GPHY Control reset */ |
1827 | gma_write32(hw, port, GPHY_CTRL, GPC_RST_SET); | 1807 | skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); |
1828 | gma_write32(hw, port, GMAC_CTRL, GMC_RST_SET); | 1808 | skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); |
1829 | } | 1809 | } |
1830 | 1810 | ||
1831 | static void yukon_get_stats(struct skge_port *skge, u64 *data) | 1811 | static void yukon_get_stats(struct skge_port *skge, u64 *data) |
@@ -1856,11 +1836,12 @@ static void yukon_mac_intr(struct skge_hw *hw, int port) | |||
1856 | 1836 | ||
1857 | if (status & GM_IS_RX_FF_OR) { | 1837 | if (status & GM_IS_RX_FF_OR) { |
1858 | ++skge->net_stats.rx_fifo_errors; | 1838 | ++skge->net_stats.rx_fifo_errors; |
1859 | gma_write8(hw, port, RX_GMF_CTRL_T, GMF_CLI_RX_FO); | 1839 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); |
1860 | } | 1840 | } |
1841 | |||
1861 | if (status & GM_IS_TX_FF_UR) { | 1842 | if (status & GM_IS_TX_FF_UR) { |
1862 | ++skge->net_stats.tx_fifo_errors; | 1843 | ++skge->net_stats.tx_fifo_errors; |
1863 | gma_write8(hw, port, TX_GMF_CTRL_T, GMF_CLI_TX_FU); | 1844 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); |
1864 | } | 1845 | } |
1865 | 1846 | ||
1866 | } | 1847 | } |
@@ -1896,7 +1877,7 @@ static void yukon_link_up(struct skge_port *skge) | |||
1896 | reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; | 1877 | reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; |
1897 | gma_write16(hw, port, GM_GP_CTRL, reg); | 1878 | gma_write16(hw, port, GM_GP_CTRL, reg); |
1898 | 1879 | ||
1899 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); | 1880 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); |
1900 | skge_link_up(skge); | 1881 | skge_link_up(skge); |
1901 | } | 1882 | } |
1902 | 1883 | ||
@@ -1904,12 +1885,14 @@ static void yukon_link_down(struct skge_port *skge) | |||
1904 | { | 1885 | { |
1905 | struct skge_hw *hw = skge->hw; | 1886 | struct skge_hw *hw = skge->hw; |
1906 | int port = skge->port; | 1887 | int port = skge->port; |
1888 | u16 ctrl; | ||
1907 | 1889 | ||
1908 | pr_debug("yukon_link_down\n"); | 1890 | pr_debug("yukon_link_down\n"); |
1909 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); | 1891 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); |
1910 | gm_phy_write(hw, port, GM_GP_CTRL, | 1892 | |
1911 | gm_phy_read(hw, port, GM_GP_CTRL) | 1893 | ctrl = gma_read16(hw, port, GM_GP_CTRL); |
1912 | & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); | 1894 | ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); |
1895 | gma_write16(hw, port, GM_GP_CTRL, ctrl); | ||
1913 | 1896 | ||
1914 | if (skge->flow_control == FLOW_MODE_REM_SEND) { | 1897 | if (skge->flow_control == FLOW_MODE_REM_SEND) { |
1915 | /* restore Asymmetric Pause bit */ | 1898 | /* restore Asymmetric Pause bit */ |
@@ -2097,10 +2080,12 @@ static int skge_up(struct net_device *dev) | |||
2097 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 2080 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
2098 | 2081 | ||
2099 | /* Initialze MAC */ | 2082 | /* Initialze MAC */ |
2083 | spin_lock_bh(&hw->phy_lock); | ||
2100 | if (hw->chip_id == CHIP_ID_GENESIS) | 2084 | if (hw->chip_id == CHIP_ID_GENESIS) |
2101 | genesis_mac_init(hw, port); | 2085 | genesis_mac_init(hw, port); |
2102 | else | 2086 | else |
2103 | yukon_mac_init(hw, port); | 2087 | yukon_mac_init(hw, port); |
2088 | spin_unlock_bh(&hw->phy_lock); | ||
2104 | 2089 | ||
2105 | /* Configure RAMbuffers */ | 2090 | /* Configure RAMbuffers */ |
2106 | chunk = hw->ram_size / ((hw->ports + 1)*2); | 2091 | chunk = hw->ram_size / ((hw->ports + 1)*2); |
@@ -2116,6 +2101,7 @@ static int skge_up(struct net_device *dev) | |||
2116 | /* Start receiver BMU */ | 2101 | /* Start receiver BMU */ |
2117 | wmb(); | 2102 | wmb(); |
2118 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); | 2103 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); |
2104 | skge_led(skge, LED_MODE_ON); | ||
2119 | 2105 | ||
2120 | pr_debug("skge_up completed\n"); | 2106 | pr_debug("skge_up completed\n"); |
2121 | return 0; | 2107 | return 0; |
@@ -2140,8 +2126,6 @@ static int skge_down(struct net_device *dev) | |||
2140 | 2126 | ||
2141 | netif_stop_queue(dev); | 2127 | netif_stop_queue(dev); |
2142 | 2128 | ||
2143 | del_timer_sync(&skge->led_blink); | ||
2144 | |||
2145 | /* Stop transmitter */ | 2129 | /* Stop transmitter */ |
2146 | skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); | 2130 | skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); |
2147 | skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), | 2131 | skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), |
@@ -2175,15 +2159,12 @@ static int skge_down(struct net_device *dev) | |||
2175 | if (hw->chip_id == CHIP_ID_GENESIS) { | 2159 | if (hw->chip_id == CHIP_ID_GENESIS) { |
2176 | skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET); | 2160 | skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET); |
2177 | skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_SET); | 2161 | skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_SET); |
2178 | skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_STOP); | ||
2179 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_STOP); | ||
2180 | } else { | 2162 | } else { |
2181 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | 2163 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
2182 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); | 2164 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); |
2183 | } | 2165 | } |
2184 | 2166 | ||
2185 | /* turn off led's */ | 2167 | skge_led(skge, LED_MODE_OFF); |
2186 | skge_write16(hw, B0_LED, LED_STAT_OFF); | ||
2187 | 2168 | ||
2188 | skge_tx_clean(skge); | 2169 | skge_tx_clean(skge); |
2189 | skge_rx_clean(skge); | 2170 | skge_rx_clean(skge); |
@@ -2633,11 +2614,17 @@ static inline void skge_tx_intr(struct net_device *dev) | |||
2633 | spin_unlock(&skge->tx_lock); | 2614 | spin_unlock(&skge->tx_lock); |
2634 | } | 2615 | } |
2635 | 2616 | ||
2617 | /* Parity errors seem to happen when Genesis is connected to a switch | ||
2618 | * with no other ports present. Heartbeat error?? | ||
2619 | */ | ||
2636 | static void skge_mac_parity(struct skge_hw *hw, int port) | 2620 | static void skge_mac_parity(struct skge_hw *hw, int port) |
2637 | { | 2621 | { |
2638 | printk(KERN_ERR PFX "%s: mac data parity error\n", | 2622 | struct net_device *dev = hw->dev[port]; |
2639 | hw->dev[port] ? hw->dev[port]->name | 2623 | |
2640 | : (port == 0 ? "(port A)": "(port B")); | 2624 | if (dev) { |
2625 | struct skge_port *skge = netdev_priv(dev); | ||
2626 | ++skge->net_stats.tx_heartbeat_errors; | ||
2627 | } | ||
2641 | 2628 | ||
2642 | if (hw->chip_id == CHIP_ID_GENESIS) | 2629 | if (hw->chip_id == CHIP_ID_GENESIS) |
2643 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), | 2630 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), |
@@ -3083,10 +3070,6 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3083 | 3070 | ||
3084 | spin_lock_init(&skge->tx_lock); | 3071 | spin_lock_init(&skge->tx_lock); |
3085 | 3072 | ||
3086 | init_timer(&skge->led_blink); | ||
3087 | skge->led_blink.function = skge_blink_timer; | ||
3088 | skge->led_blink.data = (unsigned long) skge; | ||
3089 | |||
3090 | if (hw->chip_id != CHIP_ID_GENESIS) { | 3073 | if (hw->chip_id != CHIP_ID_GENESIS) { |
3091 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; | 3074 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
3092 | skge->rx_csum = 1; | 3075 | skge->rx_csum = 1; |
diff --git a/drivers/net/skge.h b/drivers/net/skge.h index fced3d2bc072..b432f1bb8168 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h | |||
@@ -1449,10 +1449,12 @@ enum { | |||
1449 | PHY_M_IS_DTE_CHANGE = 1<<2, /* DTE Power Det. Status Changed */ | 1449 | PHY_M_IS_DTE_CHANGE = 1<<2, /* DTE Power Det. Status Changed */ |
1450 | PHY_M_IS_POL_CHANGE = 1<<1, /* Polarity Changed */ | 1450 | PHY_M_IS_POL_CHANGE = 1<<1, /* Polarity Changed */ |
1451 | PHY_M_IS_JABBER = 1<<0, /* Jabber */ | 1451 | PHY_M_IS_JABBER = 1<<0, /* Jabber */ |
1452 | }; | ||
1453 | 1452 | ||
1454 | #define PHY_M_DEF_MSK ( PHY_M_IS_AN_ERROR | PHY_M_IS_LSP_CHANGE | \ | 1453 | PHY_M_IS_DEF_MSK = PHY_M_IS_AN_ERROR | PHY_M_IS_LSP_CHANGE | |
1455 | PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR) | 1454 | PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR, |
1455 | |||
1456 | PHY_M_IS_AN_MSK = PHY_M_IS_AN_ERROR | PHY_M_IS_AN_COMPL, | ||
1457 | }; | ||
1456 | 1458 | ||
1457 | /***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/ | 1459 | /***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/ |
1458 | enum { | 1460 | enum { |
@@ -1509,7 +1511,7 @@ enum { | |||
1509 | PHY_M_LEDC_TX_C_MSB = 1<<0, /* Tx Control (MSB, 88E1111 only) */ | 1511 | PHY_M_LEDC_TX_C_MSB = 1<<0, /* Tx Control (MSB, 88E1111 only) */ |
1510 | }; | 1512 | }; |
1511 | 1513 | ||
1512 | #define PHY_M_LED_PULS_DUR(x) ( ((x)<<12) & PHY_M_LEDC_PULS_MSK) | 1514 | #define PHY_M_LED_PULS_DUR(x) (((x)<<12) & PHY_M_LEDC_PULS_MSK) |
1513 | 1515 | ||
1514 | enum { | 1516 | enum { |
1515 | PULS_NO_STR = 0,/* no pulse stretching */ | 1517 | PULS_NO_STR = 0,/* no pulse stretching */ |
@@ -1522,7 +1524,7 @@ enum { | |||
1522 | PULS_1300MS = 7,/* 1.3 s to 2.7 s */ | 1524 | PULS_1300MS = 7,/* 1.3 s to 2.7 s */ |
1523 | }; | 1525 | }; |
1524 | 1526 | ||
1525 | #define PHY_M_LED_BLINK_RT(x) ( ((x)<<8) & PHY_M_LEDC_BL_R_MSK) | 1527 | #define PHY_M_LED_BLINK_RT(x) (((x)<<8) & PHY_M_LEDC_BL_R_MSK) |
1526 | 1528 | ||
1527 | enum { | 1529 | enum { |
1528 | BLINK_42MS = 0,/* 42 ms */ | 1530 | BLINK_42MS = 0,/* 42 ms */ |
@@ -1602,9 +1604,9 @@ enum { | |||
1602 | PHY_M_FELP_LED0_MSK = 0xf, /* Bit 3.. 0: LED0 Mask (SPEED) */ | 1604 | PHY_M_FELP_LED0_MSK = 0xf, /* Bit 3.. 0: LED0 Mask (SPEED) */ |
1603 | }; | 1605 | }; |
1604 | 1606 | ||
1605 | #define PHY_M_FELP_LED2_CTRL(x) ( ((x)<<8) & PHY_M_FELP_LED2_MSK) | 1607 | #define PHY_M_FELP_LED2_CTRL(x) (((x)<<8) & PHY_M_FELP_LED2_MSK) |
1606 | #define PHY_M_FELP_LED1_CTRL(x) ( ((x)<<4) & PHY_M_FELP_LED1_MSK) | 1608 | #define PHY_M_FELP_LED1_CTRL(x) (((x)<<4) & PHY_M_FELP_LED1_MSK) |
1607 | #define PHY_M_FELP_LED0_CTRL(x) ( ((x)<<0) & PHY_M_FELP_LED0_MSK) | 1609 | #define PHY_M_FELP_LED0_CTRL(x) (((x)<<0) & PHY_M_FELP_LED0_MSK) |
1608 | 1610 | ||
1609 | enum { | 1611 | enum { |
1610 | LED_PAR_CTRL_COLX = 0x00, | 1612 | LED_PAR_CTRL_COLX = 0x00, |
@@ -1640,7 +1642,7 @@ enum { | |||
1640 | PHY_M_MAC_MD_COPPER = 5,/* Copper only */ | 1642 | PHY_M_MAC_MD_COPPER = 5,/* Copper only */ |
1641 | PHY_M_MAC_MD_1000BX = 7,/* 1000Base-X only */ | 1643 | PHY_M_MAC_MD_1000BX = 7,/* 1000Base-X only */ |
1642 | }; | 1644 | }; |
1643 | #define PHY_M_MAC_MODE_SEL(x) ( ((x)<<7) & PHY_M_MAC_MD_MSK) | 1645 | #define PHY_M_MAC_MODE_SEL(x) (((x)<<7) & PHY_M_MAC_MD_MSK) |
1644 | 1646 | ||
1645 | /***** PHY_MARV_PHY_CTRL (page 3) 16 bit r/w LED Control Reg. *****/ | 1647 | /***** PHY_MARV_PHY_CTRL (page 3) 16 bit r/w LED Control Reg. *****/ |
1646 | enum { | 1648 | enum { |
@@ -1650,10 +1652,10 @@ enum { | |||
1650 | PHY_M_LEDC_STA0_MSK = 0xf, /* Bit 3.. 0: STAT0 LED Ctrl. Mask */ | 1652 | PHY_M_LEDC_STA0_MSK = 0xf, /* Bit 3.. 0: STAT0 LED Ctrl. Mask */ |
1651 | }; | 1653 | }; |
1652 | 1654 | ||
1653 | #define PHY_M_LEDC_LOS_CTRL(x) ( ((x)<<12) & PHY_M_LEDC_LOS_MSK) | 1655 | #define PHY_M_LEDC_LOS_CTRL(x) (((x)<<12) & PHY_M_LEDC_LOS_MSK) |
1654 | #define PHY_M_LEDC_INIT_CTRL(x) ( ((x)<<8) & PHY_M_LEDC_INIT_MSK) | 1656 | #define PHY_M_LEDC_INIT_CTRL(x) (((x)<<8) & PHY_M_LEDC_INIT_MSK) |
1655 | #define PHY_M_LEDC_STA1_CTRL(x) ( ((x)<<4) & PHY_M_LEDC_STA1_MSK) | 1657 | #define PHY_M_LEDC_STA1_CTRL(x) (((x)<<4) & PHY_M_LEDC_STA1_MSK) |
1656 | #define PHY_M_LEDC_STA0_CTRL(x) ( ((x)<<0) & PHY_M_LEDC_STA0_MSK) | 1658 | #define PHY_M_LEDC_STA0_CTRL(x) (((x)<<0) & PHY_M_LEDC_STA0_MSK) |
1657 | 1659 | ||
1658 | /* GMAC registers */ | 1660 | /* GMAC registers */ |
1659 | /* Port Registers */ | 1661 | /* Port Registers */ |
@@ -2505,8 +2507,6 @@ struct skge_port { | |||
2505 | dma_addr_t dma; | 2507 | dma_addr_t dma; |
2506 | unsigned long mem_size; | 2508 | unsigned long mem_size; |
2507 | unsigned int rx_buf_size; | 2509 | unsigned int rx_buf_size; |
2508 | |||
2509 | struct timer_list led_blink; | ||
2510 | }; | 2510 | }; |
2511 | 2511 | ||
2512 | 2512 | ||
@@ -2606,17 +2606,6 @@ static inline void gma_write16(const struct skge_hw *hw, int port, int r, u16 v) | |||
2606 | skge_write16(hw, SK_GMAC_REG(port,r), v); | 2606 | skge_write16(hw, SK_GMAC_REG(port,r), v); |
2607 | } | 2607 | } |
2608 | 2608 | ||
2609 | static inline void gma_write32(const struct skge_hw *hw, int port, int r, u32 v) | ||
2610 | { | ||
2611 | skge_write16(hw, SK_GMAC_REG(port, r), (u16) v); | ||
2612 | skge_write32(hw, SK_GMAC_REG(port, r+4), (u16)(v >> 16)); | ||
2613 | } | ||
2614 | |||
2615 | static inline void gma_write8(const struct skge_hw *hw, int port, int r, u8 v) | ||
2616 | { | ||
2617 | skge_write8(hw, SK_GMAC_REG(port,r), v); | ||
2618 | } | ||
2619 | |||
2620 | static inline void gma_set_addr(struct skge_hw *hw, int port, int reg, | 2609 | static inline void gma_set_addr(struct skge_hw *hw, int port, int reg, |
2621 | const u8 *addr) | 2610 | const u8 *addr) |
2622 | { | 2611 | { |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index 7089d86e857a..a9b06b8d8e3f 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -188,7 +188,7 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg) | |||
188 | #define SMC_IRQ_TRIGGER_TYPE (( \ | 188 | #define SMC_IRQ_TRIGGER_TYPE (( \ |
189 | machine_is_omap_h2() \ | 189 | machine_is_omap_h2() \ |
190 | || machine_is_omap_h3() \ | 190 | || machine_is_omap_h3() \ |
191 | || (machine_is_omap_innovator() && !cpu_is_omap150()) \ | 191 | || (machine_is_omap_innovator() && !cpu_is_omap1510()) \ |
192 | ) ? IRQT_FALLING : IRQT_RISING) | 192 | ) ? IRQT_FALLING : IRQT_RISING) |
193 | 193 | ||
194 | 194 | ||
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 201a550f0bcc..368b8fb14023 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -66,8 +66,8 @@ | |||
66 | 66 | ||
67 | #define DRV_MODULE_NAME "tg3" | 67 | #define DRV_MODULE_NAME "tg3" |
68 | #define PFX DRV_MODULE_NAME ": " | 68 | #define PFX DRV_MODULE_NAME ": " |
69 | #define DRV_MODULE_VERSION "3.34" | 69 | #define DRV_MODULE_VERSION "3.35" |
70 | #define DRV_MODULE_RELDATE "July 25, 2005" | 70 | #define DRV_MODULE_RELDATE "August 6, 2005" |
71 | 71 | ||
72 | #define TG3_DEF_MAC_MODE 0 | 72 | #define TG3_DEF_MAC_MODE 0 |
73 | #define TG3_DEF_RX_MODE 0 | 73 | #define TG3_DEF_RX_MODE 0 |
@@ -10421,6 +10421,12 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
10421 | 10421 | ||
10422 | tg3_init_coal(tp); | 10422 | tg3_init_coal(tp); |
10423 | 10423 | ||
10424 | /* Now that we have fully setup the chip, save away a snapshot | ||
10425 | * of the PCI config space. We need to restore this after | ||
10426 | * GRC_MISC_CFG core clock resets and some resume events. | ||
10427 | */ | ||
10428 | pci_save_state(tp->pdev); | ||
10429 | |||
10424 | err = register_netdev(dev); | 10430 | err = register_netdev(dev); |
10425 | if (err) { | 10431 | if (err) { |
10426 | printk(KERN_ERR PFX "Cannot register net device, " | 10432 | printk(KERN_ERR PFX "Cannot register net device, " |
@@ -10430,12 +10436,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
10430 | 10436 | ||
10431 | pci_set_drvdata(pdev, dev); | 10437 | pci_set_drvdata(pdev, dev); |
10432 | 10438 | ||
10433 | /* Now that we have fully setup the chip, save away a snapshot | ||
10434 | * of the PCI config space. We need to restore this after | ||
10435 | * GRC_MISC_CFG core clock resets and some resume events. | ||
10436 | */ | ||
10437 | pci_save_state(tp->pdev); | ||
10438 | |||
10439 | printk(KERN_INFO "%s: Tigon3 [partno(%s) rev %04x PHY(%s)] (PCI%s:%s:%s) %sBaseT Ethernet ", | 10439 | printk(KERN_INFO "%s: Tigon3 [partno(%s) rev %04x PHY(%s)] (PCI%s:%s:%s) %sBaseT Ethernet ", |
10440 | dev->name, | 10440 | dev->name, |
10441 | tp->board_part_number, | 10441 | tp->board_part_number, |