[BNX2]: Enable DMA on 5709.

Add missing code to enable DMA on 5709 A1.  The bit is a no-op on A0
and therefore can be set on all 5709 chips.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

2 files changed, 6 insertions, 0 deletions

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 9eba7a2635ad..3b7ca2a455b4 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3815,6 +3815,11 @@ bnx2_init_chip(struct bnx2 *bp)
         /* Initialize the receive filter. */
         bnx2_set_rx_mode(bp->dev);
 
+        if (CHIP_NUM(bp) == CHIP_NUM_5709) {
+                val = REG_RD(bp, BNX2_MISC_NEW_CORE_CTL);
+                val |= BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE;
+                REG_WR(bp, BNX2_MISC_NEW_CORE_CTL, val);
+        }
         rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET,
                           0);
 
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index bd6288d6350f..49a5de253b17 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -1373,6 +1373,7 @@ struct l2_fhdr {
 #define BNX2_MISC_NEW_CORE_CTL                          0x000008c8
 #define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_SUCCESS      (1L<<0)
 #define BNX2_MISC_NEW_CORE_CTL_LINK_HOLDOFF_REQ          (1L<<1)
+#define BNX2_MISC_NEW_CORE_CTL_DMA_ENABLE                (1L<<16)
 #define BNX2_MISC_NEW_CORE_CTL_RESERVED_CMN              (0x3fffL<<2)
 #define BNX2_MISC_NEW_CORE_CTL_RESERVED_TC               (0xffffL<<16)