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authorEugene Surovegin <ebs@ebshome.net>2005-10-29 15:45:31 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-29 18:06:54 -0400
commit1b195916dd9111bbaf043d0dcfdc5d6908590c6e (patch)
tree9b9b8dc2d68dfc1e80855d03e7596475b9291cac /drivers/net
parent7ad8a89c2e8a930a902cb0622956b27796c027e5 (diff)
[PATCH] PPC 44x EMAC driver: add 440GR support
Add PowerPC 440GR support Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/ibm_emac/ibm_emac.h3
-rw-r--r--drivers/net/ibm_emac/ibm_emac_core.c7
-rw-r--r--drivers/net/ibm_emac/ibm_emac_mal.h2
4 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6d4f9ceb0a32..97760c1e6b21 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1203,7 +1203,7 @@ config IBM_EMAC_RX_SKB_HEADROOM
1203 1203
1204config IBM_EMAC_PHY_RX_CLK_FIX 1204config IBM_EMAC_PHY_RX_CLK_FIX
1205 bool "PHY Rx clock workaround" 1205 bool "PHY Rx clock workaround"
1206 depends on IBM_EMAC && (405EP || 440GX || 440EP) 1206 depends on IBM_EMAC && (405EP || 440GX || 440EP || 440GR)
1207 help 1207 help
1208 Enable this if EMAC attached to a PHY which doesn't generate 1208 Enable this if EMAC attached to a PHY which doesn't generate
1209 RX clock if there is no link, if this is the case, you will 1209 RX clock if there is no link, if this is the case, you will
diff --git a/drivers/net/ibm_emac/ibm_emac.h b/drivers/net/ibm_emac/ibm_emac.h
index d3166da753ef..644edbff4f94 100644
--- a/drivers/net/ibm_emac/ibm_emac.h
+++ b/drivers/net/ibm_emac/ibm_emac.h
@@ -26,7 +26,8 @@
26/* This is a simple check to prevent use of this driver on non-tested SoCs */ 26/* This is a simple check to prevent use of this driver on non-tested SoCs */
27#if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \ 27#if !defined(CONFIG_405GP) && !defined(CONFIG_405GPR) && !defined(CONFIG_405EP) && \
28 !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \ 28 !defined(CONFIG_440GP) && !defined(CONFIG_440GX) && !defined(CONFIG_440SP) && \
29 !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) 29 !defined(CONFIG_440EP) && !defined(CONFIG_NP405H) && !defined(CONFIG_440SPE) && \
30 !defined(CONFIG_440GR)
30#error "Unknown SoC. Please, check chip user manual and make sure EMAC defines are OK" 31#error "Unknown SoC. Please, check chip user manual and make sure EMAC defines are OK"
31#endif 32#endif
32 33
diff --git a/drivers/net/ibm_emac/ibm_emac_core.c b/drivers/net/ibm_emac/ibm_emac_core.c
index 48239e17d351..eb7d69478715 100644
--- a/drivers/net/ibm_emac/ibm_emac_core.c
+++ b/drivers/net/ibm_emac/ibm_emac_core.c
@@ -87,10 +87,11 @@ MODULE_LICENSE("GPL");
87 */ 87 */
88static u32 busy_phy_map; 88static u32 busy_phy_map;
89 89
90#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && (defined(CONFIG_405EP) || defined(CONFIG_440EP)) 90#if defined(CONFIG_IBM_EMAC_PHY_RX_CLK_FIX) && \
91 (defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR))
91/* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us 92/* 405EP has "EMAC to PHY Control Register" (CPC0_EPCTL) which can help us
92 * with PHY RX clock problem. 93 * with PHY RX clock problem.
93 * 440EP has more sane SDR0_MFR register implementation than 440GX, which 94 * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX, which
94 * also allows controlling each EMAC clock 95 * also allows controlling each EMAC clock
95 */ 96 */
96static inline void EMAC_RX_CLK_TX(int idx) 97static inline void EMAC_RX_CLK_TX(int idx)
@@ -100,7 +101,7 @@ static inline void EMAC_RX_CLK_TX(int idx)
100 101
101#if defined(CONFIG_405EP) 102#if defined(CONFIG_405EP)
102 mtdcr(0xf3, mfdcr(0xf3) | (1 << idx)); 103 mtdcr(0xf3, mfdcr(0xf3) | (1 << idx));
103#else /* CONFIG_440EP */ 104#else /* CONFIG_440EP || CONFIG_440GR */
104 SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) | (0x08000000 >> idx)); 105 SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) | (0x08000000 >> idx));
105#endif 106#endif
106 107
diff --git a/drivers/net/ibm_emac/ibm_emac_mal.h b/drivers/net/ibm_emac/ibm_emac_mal.h
index fb6dfe1197b2..2a2d3b24b037 100644
--- a/drivers/net/ibm_emac/ibm_emac_mal.h
+++ b/drivers/net/ibm_emac/ibm_emac_mal.h
@@ -32,7 +32,7 @@
32 * reflect the fact that 40x and 44x have slightly different MALs. --ebs 32 * reflect the fact that 40x and 44x have slightly different MALs. --ebs
33 */ 33 */
34#if defined(CONFIG_405GP) || defined(CONFIG_405GPR) || defined(CONFIG_405EP) || \ 34#if defined(CONFIG_405GP) || defined(CONFIG_405GPR) || defined(CONFIG_405EP) || \
35 defined(CONFIG_440EP) || defined(CONFIG_NP405H) 35 defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_NP405H)
36#define MAL_VERSION 1 36#define MAL_VERSION 1
37#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \ 37#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
38 defined(CONFIG_440SPE) 38 defined(CONFIG_440SPE)