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authorGary Zambrano <zambrano@broadcom.com>2006-04-29 21:59:13 -0400
committerDavid S. Miller <davem@davemloft.net>2006-04-29 21:59:13 -0400
commit8e7a22e3eb49042c048f24bab40cf5cf8915487d (patch)
tree6f14a777e098096b3482a57f4145269752aba0c4 /drivers/net
parent58712ef9f2cbaaeac5b32ac11810a4bbd0eeacc5 (diff)
[TG3]: Add reset_phy parameter to chip reset functions
Add a reset_phy parameter to tg3_reset_hw() and tg3_init_hw(). With the full chip reset during MAC address change, the automatic PHY reset during chip reset will cause a link down and bonding will not work properly as a result. With this reset_phy parameter, we can do a chip reset without link down when changing MAC address or MTU. Signed-off-by: Gary Zambrano <zambrano@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/tg3.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 0ccfb63d3ac1..97e27d8e5528 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -3544,7 +3544,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id,
3544 return IRQ_RETVAL(0); 3544 return IRQ_RETVAL(0);
3545} 3545}
3546 3546
3547static int tg3_init_hw(struct tg3 *); 3547static int tg3_init_hw(struct tg3 *, int);
3548static int tg3_halt(struct tg3 *, int, int); 3548static int tg3_halt(struct tg3 *, int, int);
3549 3549
3550#ifdef CONFIG_NET_POLL_CONTROLLER 3550#ifdef CONFIG_NET_POLL_CONTROLLER
@@ -3580,7 +3580,7 @@ static void tg3_reset_task(void *_data)
3580 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; 3580 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER;
3581 3581
3582 tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); 3582 tg3_halt(tp, RESET_KIND_SHUTDOWN, 0);
3583 tg3_init_hw(tp); 3583 tg3_init_hw(tp, 1);
3584 3584
3585 tg3_netif_start(tp); 3585 tg3_netif_start(tp);
3586 3586
@@ -4055,7 +4055,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
4055 4055
4056 tg3_set_mtu(dev, tp, new_mtu); 4056 tg3_set_mtu(dev, tp, new_mtu);
4057 4057
4058 tg3_init_hw(tp); 4058 tg3_init_hw(tp, 0);
4059 4059
4060 tg3_netif_start(tp); 4060 tg3_netif_start(tp);
4061 4061
@@ -5740,7 +5740,7 @@ static int tg3_set_mac_addr(struct net_device *dev, void *p)
5740 tg3_full_lock(tp, 1); 5740 tg3_full_lock(tp, 1);
5741 5741
5742 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 5742 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
5743 tg3_init_hw(tp); 5743 tg3_init_hw(tp, 0);
5744 5744
5745 tg3_netif_start(tp); 5745 tg3_netif_start(tp);
5746 tg3_full_unlock(tp); 5746 tg3_full_unlock(tp);
@@ -5798,7 +5798,7 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
5798} 5798}
5799 5799
5800/* tp->lock is held. */ 5800/* tp->lock is held. */
5801static int tg3_reset_hw(struct tg3 *tp) 5801static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
5802{ 5802{
5803 u32 val, rdmac_mode; 5803 u32 val, rdmac_mode;
5804 int i, err, limit; 5804 int i, err, limit;
@@ -5813,7 +5813,7 @@ static int tg3_reset_hw(struct tg3 *tp)
5813 tg3_abort_hw(tp, 1); 5813 tg3_abort_hw(tp, 1);
5814 } 5814 }
5815 5815
5816 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) 5816 if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && reset_phy)
5817 tg3_phy_reset(tp); 5817 tg3_phy_reset(tp);
5818 5818
5819 err = tg3_chip_reset(tp); 5819 err = tg3_chip_reset(tp);
@@ -6354,7 +6354,7 @@ static int tg3_reset_hw(struct tg3 *tp)
6354 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 6354 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
6355 } 6355 }
6356 6356
6357 err = tg3_setup_phy(tp, 1); 6357 err = tg3_setup_phy(tp, reset_phy);
6358 if (err) 6358 if (err)
6359 return err; 6359 return err;
6360 6360
@@ -6427,7 +6427,7 @@ static int tg3_reset_hw(struct tg3 *tp)
6427/* Called at device open time to get the chip ready for 6427/* Called at device open time to get the chip ready for
6428 * packet processing. Invoked with tp->lock held. 6428 * packet processing. Invoked with tp->lock held.
6429 */ 6429 */
6430static int tg3_init_hw(struct tg3 *tp) 6430static int tg3_init_hw(struct tg3 *tp, int reset_phy)
6431{ 6431{
6432 int err; 6432 int err;
6433 6433
@@ -6440,7 +6440,7 @@ static int tg3_init_hw(struct tg3 *tp)
6440 6440
6441 tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0); 6441 tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
6442 6442
6443 err = tg3_reset_hw(tp); 6443 err = tg3_reset_hw(tp, reset_phy);
6444 6444
6445out: 6445out:
6446 return err; 6446 return err;
@@ -6710,7 +6710,7 @@ static int tg3_test_msi(struct tg3 *tp)
6710 tg3_full_lock(tp, 1); 6710 tg3_full_lock(tp, 1);
6711 6711
6712 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 6712 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
6713 err = tg3_init_hw(tp); 6713 err = tg3_init_hw(tp, 1);
6714 6714
6715 tg3_full_unlock(tp); 6715 tg3_full_unlock(tp);
6716 6716
@@ -6775,7 +6775,7 @@ static int tg3_open(struct net_device *dev)
6775 6775
6776 tg3_full_lock(tp, 0); 6776 tg3_full_lock(tp, 0);
6777 6777
6778 err = tg3_init_hw(tp); 6778 err = tg3_init_hw(tp, 1);
6779 if (err) { 6779 if (err) {
6780 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 6780 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
6781 tg3_free_rings(tp); 6781 tg3_free_rings(tp);
@@ -7866,7 +7866,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
7866 7866
7867 if (netif_running(dev)) { 7867 if (netif_running(dev)) {
7868 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 7868 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
7869 tg3_init_hw(tp); 7869 tg3_init_hw(tp, 1);
7870 tg3_netif_start(tp); 7870 tg3_netif_start(tp);
7871 } 7871 }
7872 7872
@@ -7911,7 +7911,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
7911 7911
7912 if (netif_running(dev)) { 7912 if (netif_running(dev)) {
7913 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 7913 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
7914 tg3_init_hw(tp); 7914 tg3_init_hw(tp, 1);
7915 tg3_netif_start(tp); 7915 tg3_netif_start(tp);
7916 } 7916 }
7917 7917
@@ -8549,7 +8549,7 @@ static int tg3_test_loopback(struct tg3 *tp)
8549 if (!netif_running(tp->dev)) 8549 if (!netif_running(tp->dev))
8550 return TG3_LOOPBACK_FAILED; 8550 return TG3_LOOPBACK_FAILED;
8551 8551
8552 tg3_reset_hw(tp); 8552 tg3_reset_hw(tp, 1);
8553 8553
8554 if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK)) 8554 if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK))
8555 err |= TG3_MAC_LOOPBACK_FAILED; 8555 err |= TG3_MAC_LOOPBACK_FAILED;
@@ -8623,7 +8623,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8623 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 8623 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
8624 if (netif_running(dev)) { 8624 if (netif_running(dev)) {
8625 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; 8625 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
8626 tg3_init_hw(tp); 8626 tg3_init_hw(tp, 1);
8627 tg3_netif_start(tp); 8627 tg3_netif_start(tp);
8628 } 8628 }
8629 8629
@@ -11599,7 +11599,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
11599 tg3_full_lock(tp, 0); 11599 tg3_full_lock(tp, 0);
11600 11600
11601 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; 11601 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
11602 tg3_init_hw(tp); 11602 tg3_init_hw(tp, 1);
11603 11603
11604 tp->timer.expires = jiffies + tp->timer_offset; 11604 tp->timer.expires = jiffies + tp->timer_offset;
11605 add_timer(&tp->timer); 11605 add_timer(&tp->timer);
@@ -11633,7 +11633,7 @@ static int tg3_resume(struct pci_dev *pdev)
11633 tg3_full_lock(tp, 0); 11633 tg3_full_lock(tp, 0);
11634 11634
11635 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; 11635 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
11636 tg3_init_hw(tp); 11636 tg3_init_hw(tp, 1);
11637 11637
11638 tp->timer.expires = jiffies + tp->timer_offset; 11638 tp->timer.expires = jiffies + tp->timer_offset;
11639 add_timer(&tp->timer); 11639 add_timer(&tp->timer);