diff options
author | Michael Chan <mchan@broadcom.com> | 2010-10-13 10:06:51 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-10-14 13:45:56 -0400 |
commit | ee87a82a28cddbb9267a294172ecb3d3d3bdaa6c (patch) | |
tree | 8bb591fea143738d9b4c45c73a8fbe6db53ce385 /drivers/net | |
parent | a3ceeeb8f11d74f26e3dfca40ded911a82402db5 (diff) |
cnic: Add support for 57712 device
Add new interrupt ack functions and other hardware interface logic to
support the new device.
Update version to 2.2.6.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/cnic.c | 94 | ||||
-rw-r--r-- | drivers/net/cnic.h | 22 | ||||
-rw-r--r-- | drivers/net/cnic_if.h | 4 |
3 files changed, 103 insertions, 17 deletions
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index 3f923a78e22e..92bac19ad60a 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -1077,7 +1077,7 @@ static int cnic_alloc_bnx2x_context(struct cnic_dev *dev) | |||
1077 | 1077 | ||
1078 | cp->ctx_blks = blks; | 1078 | cp->ctx_blks = blks; |
1079 | cp->ctx_blk_size = ctx_blk_size; | 1079 | cp->ctx_blk_size = ctx_blk_size; |
1080 | if (BNX2X_CHIP_IS_E1H(cp->chip_id)) | 1080 | if (!BNX2X_CHIP_IS_57710(cp->chip_id)) |
1081 | cp->ctx_align = 0; | 1081 | cp->ctx_align = 0; |
1082 | else | 1082 | else |
1083 | cp->ctx_align = ctx_blk_size; | 1083 | cp->ctx_align = ctx_blk_size; |
@@ -2406,6 +2406,22 @@ static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm, | |||
2406 | CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack)); | 2406 | CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack)); |
2407 | } | 2407 | } |
2408 | 2408 | ||
2409 | static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment, | ||
2410 | u16 index, u8 op, u8 update) | ||
2411 | { | ||
2412 | struct igu_regular cmd_data; | ||
2413 | u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8; | ||
2414 | |||
2415 | cmd_data.sb_id_and_flags = | ||
2416 | (index << IGU_REGULAR_SB_INDEX_SHIFT) | | ||
2417 | (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | | ||
2418 | (update << IGU_REGULAR_BUPDATE_SHIFT) | | ||
2419 | (op << IGU_REGULAR_ENABLE_INT_SHIFT); | ||
2420 | |||
2421 | |||
2422 | CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags); | ||
2423 | } | ||
2424 | |||
2409 | static void cnic_ack_bnx2x_msix(struct cnic_dev *dev) | 2425 | static void cnic_ack_bnx2x_msix(struct cnic_dev *dev) |
2410 | { | 2426 | { |
2411 | struct cnic_local *cp = dev->cnic_priv; | 2427 | struct cnic_local *cp = dev->cnic_priv; |
@@ -2414,6 +2430,14 @@ static void cnic_ack_bnx2x_msix(struct cnic_dev *dev) | |||
2414 | IGU_INT_DISABLE, 0); | 2430 | IGU_INT_DISABLE, 0); |
2415 | } | 2431 | } |
2416 | 2432 | ||
2433 | static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev) | ||
2434 | { | ||
2435 | struct cnic_local *cp = dev->cnic_priv; | ||
2436 | |||
2437 | cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0, | ||
2438 | IGU_INT_DISABLE, 0); | ||
2439 | } | ||
2440 | |||
2417 | static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info) | 2441 | static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info) |
2418 | { | 2442 | { |
2419 | u32 last_status = *info->status_idx_ptr; | 2443 | u32 last_status = *info->status_idx_ptr; |
@@ -2445,8 +2469,12 @@ static void cnic_service_bnx2x_bh(unsigned long data) | |||
2445 | status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1); | 2469 | status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1); |
2446 | 2470 | ||
2447 | CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); | 2471 | CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX); |
2448 | cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID, | 2472 | if (BNX2X_CHIP_IS_E2(cp->chip_id)) |
2449 | status_idx, IGU_INT_ENABLE, 1); | 2473 | cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, |
2474 | status_idx, IGU_INT_ENABLE, 1); | ||
2475 | else | ||
2476 | cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID, | ||
2477 | status_idx, IGU_INT_ENABLE, 1); | ||
2450 | } | 2478 | } |
2451 | 2479 | ||
2452 | static int cnic_service_bnx2x(void *data, void *status_blk) | 2480 | static int cnic_service_bnx2x(void *data, void *status_blk) |
@@ -4208,7 +4236,7 @@ static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev, | |||
4208 | static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) | 4236 | static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) |
4209 | { | 4237 | { |
4210 | struct cnic_local *cp = dev->cnic_priv; | 4238 | struct cnic_local *cp = dev->cnic_priv; |
4211 | u32 base, addr, val; | 4239 | u32 base, base2, addr, val; |
4212 | int port = CNIC_PORT(cp); | 4240 | int port = CNIC_PORT(cp); |
4213 | 4241 | ||
4214 | dev->max_iscsi_conn = 0; | 4242 | dev->max_iscsi_conn = 0; |
@@ -4216,6 +4244,8 @@ static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) | |||
4216 | if (base == 0) | 4244 | if (base == 0) |
4217 | return; | 4245 | return; |
4218 | 4246 | ||
4247 | base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 : | ||
4248 | MISC_REG_GENERIC_CR_0)); | ||
4219 | addr = BNX2X_SHMEM_ADDR(base, | 4249 | addr = BNX2X_SHMEM_ADDR(base, |
4220 | dev_info.port_hw_config[port].iscsi_mac_upper); | 4250 | dev_info.port_hw_config[port].iscsi_mac_upper); |
4221 | 4251 | ||
@@ -4248,11 +4278,15 @@ static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev) | |||
4248 | val16 ^= 0x1e1e; | 4278 | val16 ^= 0x1e1e; |
4249 | dev->max_iscsi_conn = val16; | 4279 | dev->max_iscsi_conn = val16; |
4250 | } | 4280 | } |
4251 | if (BNX2X_CHIP_IS_E1H(cp->chip_id)) { | 4281 | if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) { |
4252 | int func = CNIC_FUNC(cp); | 4282 | int func = CNIC_FUNC(cp); |
4253 | u32 mf_cfg_addr; | 4283 | u32 mf_cfg_addr; |
4254 | 4284 | ||
4255 | mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET; | 4285 | if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr)) |
4286 | mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2, | ||
4287 | mf_cfg_addr)); | ||
4288 | else | ||
4289 | mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET; | ||
4256 | 4290 | ||
4257 | addr = mf_cfg_addr + | 4291 | addr = mf_cfg_addr + |
4258 | offsetof(struct mf_cfg, func_mf_config[func].e1hov_tag); | 4292 | offsetof(struct mf_cfg, func_mf_config[func].e1hov_tag); |
@@ -4277,9 +4311,22 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) | |||
4277 | struct cnic_eth_dev *ethdev = cp->ethdev; | 4311 | struct cnic_eth_dev *ethdev = cp->ethdev; |
4278 | int func = CNIC_FUNC(cp), ret, i; | 4312 | int func = CNIC_FUNC(cp), ret, i; |
4279 | u32 pfid; | 4313 | u32 pfid; |
4280 | struct host_hc_status_block_e1x *sb = cp->status_blk.gen; | ||
4281 | 4314 | ||
4282 | cp->pfid = func; | 4315 | if (BNX2X_CHIP_IS_E2(cp->chip_id)) { |
4316 | u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR); | ||
4317 | |||
4318 | if (!(val & 1)) | ||
4319 | val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN); | ||
4320 | else | ||
4321 | val = (val >> 1) & 1; | ||
4322 | |||
4323 | if (val) | ||
4324 | cp->pfid = func >> 1; | ||
4325 | else | ||
4326 | cp->pfid = func & 0x6; | ||
4327 | } else { | ||
4328 | cp->pfid = func; | ||
4329 | } | ||
4283 | pfid = cp->pfid; | 4330 | pfid = cp->pfid; |
4284 | 4331 | ||
4285 | ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ, | 4332 | ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ, |
@@ -4294,10 +4341,21 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev) | |||
4294 | CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0); | 4341 | CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0); |
4295 | cp->kcq1.sw_prod_idx = 0; | 4342 | cp->kcq1.sw_prod_idx = 0; |
4296 | 4343 | ||
4297 | cp->kcq1.hw_prod_idx_ptr = | 4344 | if (BNX2X_CHIP_IS_E2(cp->chip_id)) { |
4298 | &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; | 4345 | struct host_hc_status_block_e2 *sb = cp->status_blk.gen; |
4299 | cp->kcq1.status_idx_ptr = | 4346 | |
4300 | &sb->sb.running_index[SM_RX_ID]; | 4347 | cp->kcq1.hw_prod_idx_ptr = |
4348 | &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; | ||
4349 | cp->kcq1.status_idx_ptr = | ||
4350 | &sb->sb.running_index[SM_RX_ID]; | ||
4351 | } else { | ||
4352 | struct host_hc_status_block_e1x *sb = cp->status_blk.gen; | ||
4353 | |||
4354 | cp->kcq1.hw_prod_idx_ptr = | ||
4355 | &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS]; | ||
4356 | cp->kcq1.status_idx_ptr = | ||
4357 | &sb->sb.running_index[SM_RX_ID]; | ||
4358 | } | ||
4301 | 4359 | ||
4302 | cnic_get_bnx2x_iscsi_info(dev); | 4360 | cnic_get_bnx2x_iscsi_info(dev); |
4303 | 4361 | ||
@@ -4380,7 +4438,9 @@ static void cnic_init_rings(struct cnic_dev *dev) | |||
4380 | cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli); | 4438 | cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli); |
4381 | 4439 | ||
4382 | off = BAR_USTRORM_INTMEM + | 4440 | off = BAR_USTRORM_INTMEM + |
4383 | USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli); | 4441 | (BNX2X_CHIP_IS_E2(cp->chip_id) ? |
4442 | USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) : | ||
4443 | USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli)); | ||
4384 | 4444 | ||
4385 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++) | 4445 | for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++) |
4386 | CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]); | 4446 | CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]); |
@@ -4506,7 +4566,6 @@ static int cnic_start_hw(struct cnic_dev *dev) | |||
4506 | return -EALREADY; | 4566 | return -EALREADY; |
4507 | 4567 | ||
4508 | dev->regview = ethdev->io_base; | 4568 | dev->regview = ethdev->io_base; |
4509 | cp->chip_id = ethdev->chip_id; | ||
4510 | pci_dev_get(dev->pcidev); | 4569 | pci_dev_get(dev->pcidev); |
4511 | cp->func = PCI_FUNC(dev->pcidev->devfn); | 4570 | cp->func = PCI_FUNC(dev->pcidev->devfn); |
4512 | cp->status_blk.gen = ethdev->irq_arr[0].status_blk; | 4571 | cp->status_blk.gen = ethdev->irq_arr[0].status_blk; |
@@ -4683,6 +4742,7 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev) | |||
4683 | cp = cdev->cnic_priv; | 4742 | cp = cdev->cnic_priv; |
4684 | cp->ethdev = ethdev; | 4743 | cp->ethdev = ethdev; |
4685 | cdev->pcidev = pdev; | 4744 | cdev->pcidev = pdev; |
4745 | cp->chip_id = ethdev->chip_id; | ||
4686 | 4746 | ||
4687 | cp->cnic_ops = &cnic_bnx2_ops; | 4747 | cp->cnic_ops = &cnic_bnx2_ops; |
4688 | cp->start_hw = cnic_start_bnx2_hw; | 4748 | cp->start_hw = cnic_start_bnx2_hw; |
@@ -4737,6 +4797,7 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) | |||
4737 | cp = cdev->cnic_priv; | 4797 | cp = cdev->cnic_priv; |
4738 | cp->ethdev = ethdev; | 4798 | cp->ethdev = ethdev; |
4739 | cdev->pcidev = pdev; | 4799 | cdev->pcidev = pdev; |
4800 | cp->chip_id = ethdev->chip_id; | ||
4740 | 4801 | ||
4741 | cp->cnic_ops = &cnic_bnx2x_ops; | 4802 | cp->cnic_ops = &cnic_bnx2x_ops; |
4742 | cp->start_hw = cnic_start_bnx2x_hw; | 4803 | cp->start_hw = cnic_start_bnx2x_hw; |
@@ -4748,7 +4809,10 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev) | |||
4748 | cp->stop_cm = cnic_cm_stop_bnx2x_hw; | 4809 | cp->stop_cm = cnic_cm_stop_bnx2x_hw; |
4749 | cp->enable_int = cnic_enable_bnx2x_int; | 4810 | cp->enable_int = cnic_enable_bnx2x_int; |
4750 | cp->disable_int_sync = cnic_disable_bnx2x_int_sync; | 4811 | cp->disable_int_sync = cnic_disable_bnx2x_int_sync; |
4751 | cp->ack_int = cnic_ack_bnx2x_msix; | 4812 | if (BNX2X_CHIP_IS_E2(cp->chip_id)) |
4813 | cp->ack_int = cnic_ack_bnx2x_e2_msix; | ||
4814 | else | ||
4815 | cp->ack_int = cnic_ack_bnx2x_msix; | ||
4752 | cp->close_conn = cnic_close_bnx2x_conn; | 4816 | cp->close_conn = cnic_close_bnx2x_conn; |
4753 | cp->next_idx = cnic_bnx2x_next_idx; | 4817 | cp->next_idx = cnic_bnx2x_next_idx; |
4754 | cp->hw_idx = cnic_bnx2x_hw_idx; | 4818 | cp->hw_idx = cnic_bnx2x_hw_idx; |
diff --git a/drivers/net/cnic.h b/drivers/net/cnic.h index 928af9e64824..6a4a0ae5cfe3 100644 --- a/drivers/net/cnic.h +++ b/drivers/net/cnic.h | |||
@@ -372,15 +372,35 @@ struct bnx2x_bd_chain_next { | |||
372 | #define BNX2X_ISCSI_PBL_NOT_CACHED 0xff | 372 | #define BNX2X_ISCSI_PBL_NOT_CACHED 0xff |
373 | #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff | 373 | #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff |
374 | 374 | ||
375 | #define BNX2X_CHIP_NUM_57710 0x164e | ||
375 | #define BNX2X_CHIP_NUM_57711 0x164f | 376 | #define BNX2X_CHIP_NUM_57711 0x164f |
376 | #define BNX2X_CHIP_NUM_57711E 0x1650 | 377 | #define BNX2X_CHIP_NUM_57711E 0x1650 |
378 | #define BNX2X_CHIP_NUM_57712 0x1662 | ||
379 | #define BNX2X_CHIP_NUM_57712E 0x1663 | ||
380 | #define BNX2X_CHIP_NUM_57713 0x1651 | ||
381 | #define BNX2X_CHIP_NUM_57713E 0x1652 | ||
382 | |||
377 | #define BNX2X_CHIP_NUM(x) (x >> 16) | 383 | #define BNX2X_CHIP_NUM(x) (x >> 16) |
384 | #define BNX2X_CHIP_IS_57710(x) \ | ||
385 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710) | ||
378 | #define BNX2X_CHIP_IS_57711(x) \ | 386 | #define BNX2X_CHIP_IS_57711(x) \ |
379 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711) | 387 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711) |
380 | #define BNX2X_CHIP_IS_57711E(x) \ | 388 | #define BNX2X_CHIP_IS_57711E(x) \ |
381 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E) | 389 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E) |
382 | #define BNX2X_CHIP_IS_E1H(x) \ | 390 | #define BNX2X_CHIP_IS_E1H(x) \ |
383 | (BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x)) | 391 | (BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x)) |
392 | #define BNX2X_CHIP_IS_57712(x) \ | ||
393 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712) | ||
394 | #define BNX2X_CHIP_IS_57712E(x) \ | ||
395 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E) | ||
396 | #define BNX2X_CHIP_IS_57713(x) \ | ||
397 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713) | ||
398 | #define BNX2X_CHIP_IS_57713E(x) \ | ||
399 | (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E) | ||
400 | #define BNX2X_CHIP_IS_E2(x) \ | ||
401 | (BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \ | ||
402 | BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x)) | ||
403 | |||
384 | #define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id) | 404 | #define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id) |
385 | 405 | ||
386 | #define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) | 406 | #define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) |
@@ -409,6 +429,8 @@ struct bnx2x_bd_chain_next { | |||
409 | 429 | ||
410 | #define CNIC_PORT(cp) ((cp)->pfid & 1) | 430 | #define CNIC_PORT(cp) ((cp)->pfid & 1) |
411 | #define CNIC_FUNC(cp) ((cp)->func) | 431 | #define CNIC_FUNC(cp) ((cp)->func) |
432 | #define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2(cp->chip_id) ? 0 :\ | ||
433 | (CNIC_FUNC(cp) & 1)) | ||
412 | #define CNIC_E1HVN(cp) ((cp)->pfid >> 1) | 434 | #define CNIC_E1HVN(cp) ((cp)->pfid >> 1) |
413 | 435 | ||
414 | #define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \ | 436 | #define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \ |
diff --git a/drivers/net/cnic_if.h b/drivers/net/cnic_if.h index 98ebac52013e..0dbeaec4f03a 100644 --- a/drivers/net/cnic_if.h +++ b/drivers/net/cnic_if.h | |||
@@ -12,8 +12,8 @@ | |||
12 | #ifndef CNIC_IF_H | 12 | #ifndef CNIC_IF_H |
13 | #define CNIC_IF_H | 13 | #define CNIC_IF_H |
14 | 14 | ||
15 | #define CNIC_MODULE_VERSION "2.2.5" | 15 | #define CNIC_MODULE_VERSION "2.2.6" |
16 | #define CNIC_MODULE_RELDATE "September 29, 2010" | 16 | #define CNIC_MODULE_RELDATE "Oct 12, 2010" |
17 | 17 | ||
18 | #define CNIC_ULP_RDMA 0 | 18 | #define CNIC_ULP_RDMA 0 |
19 | #define CNIC_ULP_ISCSI 1 | 19 | #define CNIC_ULP_ISCSI 1 |