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authorChun-Hao Lin <hau@realtek.com>2014-12-10 08:28:38 -0500
committerDavid S. Miller <davem@davemloft.net>2014-12-11 21:38:52 -0500
commit5fbea33740aeb948422d7b7e8aafbeac362264b2 (patch)
treefa7c700c3171cd19c8f391b142b92ca3c2c77cab /drivers/net
parent7855f675e6cbccb565c41dfeef708b8d7e6444ff (diff)
r8169:update rtl8168g pcie ephy parameter
Add ephy parameter to rtl8168g. Also change the common function of rtl8168g from "rtl_hw_start_8168g_1" to "rtl_hw_start_8168g". And function "rtl_hw_start_8168g_1" is used for setting rtl8168g hardware parameters. Following is the explanation of what hardware parameter change for. rtl8168g may erroneous judge the PCIe signal quality and show the error bit on PCI configuration space when in PCIe low power mode. The following ephy parameters are for above issue. { 0x00, 0x0000, 0x0008 } { 0x0c, 0x37d0, 0x0820 } { 0x1e, 0x0000, 0x0001 } rtl8168g may return to PCIe L0 from PCIe L0s low power mode too slow. The following ephy parameter is for above issue. { 0x19, 0x8000, 0x0000 } Signed-off-by: Chunhao Lin <hau@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c24
1 files changed, 21 insertions, 3 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 088136b37ebe..14a1c5cec3a5 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -5919,7 +5919,7 @@ static void rtl_hw_start_8411(struct rtl8169_private *tp)
5919 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000, ERIAR_EXGMAC); 5919 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000, ERIAR_EXGMAC);
5920} 5920}
5921 5921
5922static void rtl_hw_start_8168g_1(struct rtl8169_private *tp) 5922static void rtl_hw_start_8168g(struct rtl8169_private *tp)
5923{ 5923{
5924 void __iomem *ioaddr = tp->mmio_addr; 5924 void __iomem *ioaddr = tp->mmio_addr;
5925 struct pci_dev *pdev = tp->pci_dev; 5925 struct pci_dev *pdev = tp->pci_dev;
@@ -5954,6 +5954,24 @@ static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
5954 rtl_pcie_state_l2l3_enable(tp, false); 5954 rtl_pcie_state_l2l3_enable(tp, false);
5955} 5955}
5956 5956
5957static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
5958{
5959 void __iomem *ioaddr = tp->mmio_addr;
5960 static const struct ephy_info e_info_8168g_1[] = {
5961 { 0x00, 0x0000, 0x0008 },
5962 { 0x0c, 0x37d0, 0x0820 },
5963 { 0x1e, 0x0000, 0x0001 },
5964 { 0x19, 0x8000, 0x0000 }
5965 };
5966
5967 rtl_hw_start_8168g(tp);
5968
5969 /* disable aspm and clock request before access ephy */
5970 RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);
5971 RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);
5972 rtl_ephy_init(tp, e_info_8168g_1, ARRAY_SIZE(e_info_8168g_1));
5973}
5974
5957static void rtl_hw_start_8168g_2(struct rtl8169_private *tp) 5975static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
5958{ 5976{
5959 void __iomem *ioaddr = tp->mmio_addr; 5977 void __iomem *ioaddr = tp->mmio_addr;
@@ -5964,7 +5982,7 @@ static void rtl_hw_start_8168g_2(struct rtl8169_private *tp)
5964 { 0x1e, 0xffff, 0x20eb } 5982 { 0x1e, 0xffff, 0x20eb }
5965 }; 5983 };
5966 5984
5967 rtl_hw_start_8168g_1(tp); 5985 rtl_hw_start_8168g(tp);
5968 5986
5969 /* disable aspm and clock request before access ephy */ 5987 /* disable aspm and clock request before access ephy */
5970 RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn); 5988 RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);
@@ -5983,7 +6001,7 @@ static void rtl_hw_start_8411_2(struct rtl8169_private *tp)
5983 { 0x1e, 0x0000, 0x2000 } 6001 { 0x1e, 0x0000, 0x2000 }
5984 }; 6002 };
5985 6003
5986 rtl_hw_start_8168g_1(tp); 6004 rtl_hw_start_8168g(tp);
5987 6005
5988 /* disable aspm and clock request before access ephy */ 6006 /* disable aspm and clock request before access ephy */
5989 RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn); 6007 RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);