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authorEilon Greenstein <eilong@broadcom.com>2009-02-12 03:36:58 -0500
committerDavid S. Miller <davem@davemloft.net>2009-02-16 02:31:26 -0500
commit46c6a67495b3ec76204db800fc8d60a260f91cfe (patch)
tree23685cb8cb7351c1f452b61d5afcffb40b0ffb6d /drivers/net
parent589abe3a0f594a7707a15674ca9e80370c972832 (diff)
bnx2x: PHY lock list
Some dual port PHY require HW lock since they are used by both interfaces (different driver instances). Since this list is getting longer, update a parameter at load time instead of calculating it on runtime Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/bnx2x.h1
-rw-r--r--drivers/net/bnx2x_main.c20
-rw-r--r--drivers/net/bnx2x_reg.h2
3 files changed, 12 insertions, 11 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index d66be72d8321..12d2d0bd9a42 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -570,6 +570,7 @@ struct bnx2x_port {
570 570
571 /* used to synchronize phy accesses */ 571 /* used to synchronize phy accesses */
572 struct mutex phy_mutex; 572 struct mutex phy_mutex;
573 int need_hw_lock;
573 574
574 u32 port_stx; 575 u32 port_stx;
575 576
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 5acbd98778b8..2ee480b4b77c 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -1816,22 +1816,16 @@ static int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource)
1816/* HW Lock for shared dual port PHYs */ 1816/* HW Lock for shared dual port PHYs */
1817static void bnx2x_acquire_phy_lock(struct bnx2x *bp) 1817static void bnx2x_acquire_phy_lock(struct bnx2x *bp)
1818{ 1818{
1819 u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config);
1820
1821 mutex_lock(&bp->port.phy_mutex); 1819 mutex_lock(&bp->port.phy_mutex);
1822 1820
1823 if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) || 1821 if (bp->port.need_hw_lock)
1824 (ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073)) 1822 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
1825 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
1826} 1823}
1827 1824
1828static void bnx2x_release_phy_lock(struct bnx2x *bp) 1825static void bnx2x_release_phy_lock(struct bnx2x *bp)
1829{ 1826{
1830 u32 ext_phy_type = XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config); 1827 if (bp->port.need_hw_lock)
1831 1828 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
1832 if ((ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072) ||
1833 (ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073))
1834 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_8072_MDIO);
1835 1829
1836 mutex_unlock(&bp->port.phy_mutex); 1830 mutex_unlock(&bp->port.phy_mutex);
1837} 1831}
@@ -5705,6 +5699,12 @@ static int bnx2x_init_common(struct bnx2x *bp)
5705 } 5699 }
5706 5700
5707 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) { 5701 switch (XGXS_EXT_PHY_TYPE(bp->link_params.ext_phy_config)) {
5702 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
5703 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
5704 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
5705 bp->port.need_hw_lock = 1;
5706 break;
5707
5708 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: 5708 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
5709 /* Fan failure is indicated by SPIO 5 */ 5709 /* Fan failure is indicated by SPIO 5 */
5710 bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5, 5710 bnx2x_set_spio(bp, MISC_REGISTERS_SPIO_5,
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index 520bf695864e..5cfeac96ea69 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -5228,8 +5228,8 @@
5228#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0 5228#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0
5229#define MISC_REGISTERS_SPIO_SET_POS 8 5229#define MISC_REGISTERS_SPIO_SET_POS 8
5230#define HW_LOCK_MAX_RESOURCE_VALUE 31 5230#define HW_LOCK_MAX_RESOURCE_VALUE 31
5231#define HW_LOCK_RESOURCE_8072_MDIO 0
5232#define HW_LOCK_RESOURCE_GPIO 1 5231#define HW_LOCK_RESOURCE_GPIO 1
5232#define HW_LOCK_RESOURCE_MDIO 0
5233#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3 5233#define HW_LOCK_RESOURCE_PORT0_ATT_MASK 3
5234#define HW_LOCK_RESOURCE_SPIO 2 5234#define HW_LOCK_RESOURCE_SPIO 2
5235#define HW_LOCK_RESOURCE_UNDI 5 5235#define HW_LOCK_RESOURCE_UNDI 5