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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-09-01 16:27:18 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-10-15 13:53:37 -0400
commit073ac8fd4a3e9a9265e8a59e0a79bc4b0b3822c3 (patch)
tree2abd149145f8dc579ccd354b95394050d590cdc2 /drivers/net
parent97d97224ff361e08777fb33e0fd193ca877dac28 (diff)
[NET] smc91x: fix PXA DMA support code
The PXA DMA support code for smc91x doesn't pass a struct device to the dma_*map_single() functions, which leads to an oops in the dma bounce code. We have a struct device which was used to probe the SMC chip. Use it. (This patch is slightly larger because it requires struct smc_local to move into the header file.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/smc91x.c55
-rw-r--r--drivers/net/smc91x.h64
2 files changed, 63 insertions, 56 deletions
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c
index 24e610e711e8..7da7589d45dd 100644
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -173,49 +173,6 @@ MODULE_LICENSE("GPL");
173 */ 173 */
174#define MII_DELAY 1 174#define MII_DELAY 1
175 175
176/* store this information for the driver.. */
177struct smc_local {
178 /*
179 * If I have to wait until memory is available to send a
180 * packet, I will store the skbuff here, until I get the
181 * desired memory. Then, I'll send it out and free it.
182 */
183 struct sk_buff *pending_tx_skb;
184 struct tasklet_struct tx_task;
185
186 /* version/revision of the SMC91x chip */
187 int version;
188
189 /* Contains the current active transmission mode */
190 int tcr_cur_mode;
191
192 /* Contains the current active receive mode */
193 int rcr_cur_mode;
194
195 /* Contains the current active receive/phy mode */
196 int rpc_cur_mode;
197 int ctl_rfduplx;
198 int ctl_rspeed;
199
200 u32 msg_enable;
201 u32 phy_type;
202 struct mii_if_info mii;
203
204 /* work queue */
205 struct work_struct phy_configure;
206 struct net_device *dev;
207 int work_pending;
208
209 spinlock_t lock;
210
211#ifdef SMC_USE_PXA_DMA
212 /* DMA needs the physical address of the chip */
213 u_long physaddr;
214#endif
215 void __iomem *base;
216 void __iomem *datacs;
217};
218
219#if SMC_DEBUG > 0 176#if SMC_DEBUG > 0
220#define DBG(n, args...) \ 177#define DBG(n, args...) \
221 do { \ 178 do { \
@@ -2215,17 +2172,19 @@ static int smc_drv_probe(struct platform_device *pdev)
2215 goto out_release_attrib; 2172 goto out_release_attrib;
2216 } 2173 }
2217 2174
2218 platform_set_drvdata(pdev, ndev);
2219 ret = smc_probe(ndev, addr);
2220 if (ret != 0)
2221 goto out_iounmap;
2222#ifdef SMC_USE_PXA_DMA 2175#ifdef SMC_USE_PXA_DMA
2223 else { 2176 {
2224 struct smc_local *lp = netdev_priv(ndev); 2177 struct smc_local *lp = netdev_priv(ndev);
2178 lp->device = &pdev->dev;
2225 lp->physaddr = res->start; 2179 lp->physaddr = res->start;
2226 } 2180 }
2227#endif 2181#endif
2228 2182
2183 platform_set_drvdata(pdev, ndev);
2184 ret = smc_probe(ndev, addr);
2185 if (ret != 0)
2186 goto out_iounmap;
2187
2229 smc_request_datacs(pdev, ndev); 2188 smc_request_datacs(pdev, ndev);
2230 2189
2231 return 0; 2190 return 0;
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index af9e6bf59552..729fd28c08b5 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -462,6 +462,52 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
462 462
463#endif 463#endif
464 464
465
466/* store this information for the driver.. */
467struct smc_local {
468 /*
469 * If I have to wait until memory is available to send a
470 * packet, I will store the skbuff here, until I get the
471 * desired memory. Then, I'll send it out and free it.
472 */
473 struct sk_buff *pending_tx_skb;
474 struct tasklet_struct tx_task;
475
476 /* version/revision of the SMC91x chip */
477 int version;
478
479 /* Contains the current active transmission mode */
480 int tcr_cur_mode;
481
482 /* Contains the current active receive mode */
483 int rcr_cur_mode;
484
485 /* Contains the current active receive/phy mode */
486 int rpc_cur_mode;
487 int ctl_rfduplx;
488 int ctl_rspeed;
489
490 u32 msg_enable;
491 u32 phy_type;
492 struct mii_if_info mii;
493
494 /* work queue */
495 struct work_struct phy_configure;
496 struct net_device *dev;
497 int work_pending;
498
499 spinlock_t lock;
500
501#ifdef SMC_USE_PXA_DMA
502 /* DMA needs the physical address of the chip */
503 u_long physaddr;
504 struct device *device;
505#endif
506 void __iomem *base;
507 void __iomem *datacs;
508};
509
510
465#ifdef SMC_USE_PXA_DMA 511#ifdef SMC_USE_PXA_DMA
466/* 512/*
467 * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is 513 * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is
@@ -476,11 +522,12 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
476#ifdef SMC_insl 522#ifdef SMC_insl
477#undef SMC_insl 523#undef SMC_insl
478#define SMC_insl(a, r, p, l) \ 524#define SMC_insl(a, r, p, l) \
479 smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l) 525 smc_pxa_dma_insl(a, lp, r, dev->dma, p, l)
480static inline void 526static inline void
481smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, 527smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
482 u_char *buf, int len) 528 u_char *buf, int len)
483{ 529{
530 u_long physaddr = lp->physaddr;
484 dma_addr_t dmabuf; 531 dma_addr_t dmabuf;
485 532
486 /* fallback if no DMA available */ 533 /* fallback if no DMA available */
@@ -497,7 +544,7 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
497 } 544 }
498 545
499 len *= 4; 546 len *= 4;
500 dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); 547 dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
501 DCSR(dma) = DCSR_NODESC; 548 DCSR(dma) = DCSR_NODESC;
502 DTADR(dma) = dmabuf; 549 DTADR(dma) = dmabuf;
503 DSADR(dma) = physaddr + reg; 550 DSADR(dma) = physaddr + reg;
@@ -507,18 +554,19 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
507 while (!(DCSR(dma) & DCSR_STOPSTATE)) 554 while (!(DCSR(dma) & DCSR_STOPSTATE))
508 cpu_relax(); 555 cpu_relax();
509 DCSR(dma) = 0; 556 DCSR(dma) = 0;
510 dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); 557 dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
511} 558}
512#endif 559#endif
513 560
514#ifdef SMC_insw 561#ifdef SMC_insw
515#undef SMC_insw 562#undef SMC_insw
516#define SMC_insw(a, r, p, l) \ 563#define SMC_insw(a, r, p, l) \
517 smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l) 564 smc_pxa_dma_insw(a, lp, r, dev->dma, p, l)
518static inline void 565static inline void
519smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, 566smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
520 u_char *buf, int len) 567 u_char *buf, int len)
521{ 568{
569 u_long physaddr = lp->physaddr;
522 dma_addr_t dmabuf; 570 dma_addr_t dmabuf;
523 571
524 /* fallback if no DMA available */ 572 /* fallback if no DMA available */
@@ -535,7 +583,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
535 } 583 }
536 584
537 len *= 2; 585 len *= 2;
538 dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE); 586 dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
539 DCSR(dma) = DCSR_NODESC; 587 DCSR(dma) = DCSR_NODESC;
540 DTADR(dma) = dmabuf; 588 DTADR(dma) = dmabuf;
541 DSADR(dma) = physaddr + reg; 589 DSADR(dma) = physaddr + reg;
@@ -545,7 +593,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
545 while (!(DCSR(dma) & DCSR_STOPSTATE)) 593 while (!(DCSR(dma) & DCSR_STOPSTATE))
546 cpu_relax(); 594 cpu_relax();
547 DCSR(dma) = 0; 595 DCSR(dma) = 0;
548 dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE); 596 dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
549} 597}
550#endif 598#endif
551 599