diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-09-27 18:01:53 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-09-27 18:01:53 -0400 |
commit | 022e7a12b6aa11a11de4d708fe8606c9a6734b37 (patch) | |
tree | f4b94bbbe7f585eddcbf06c4bb92903b71a1840f /drivers/net | |
parent | d4b0a4c19ace3021235a33658c520ab0da80dfb1 (diff) | |
parent | 76ddb3fd96a8dada2d09bc3f02b3a5efbc8390c5 (diff) |
Merge branch 'upstream' of git://lost.foo-projects.org/~ahkok/git/netdev-2.6 into tmp
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/e100.c | 82 | ||||
-rw-r--r-- | drivers/net/e1000/LICENSE | 339 | ||||
-rw-r--r-- | drivers/net/e1000/Makefile | 35 | ||||
-rw-r--r-- | drivers/net/e1000/e1000.h | 59 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_ethtool.c | 150 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_hw.c | 1074 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_hw.h | 86 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_main.c | 271 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_osdep.h | 35 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_param.c | 47 | ||||
-rw-r--r-- | drivers/net/ixgb/Makefile | 38 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb.h | 38 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_ee.c | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_ee.h | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_ethtool.c | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_hw.c | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_hw.h | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_ids.h | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_main.c | 46 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_osdep.h | 36 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_param.c | 36 |
21 files changed, 1104 insertions, 1484 deletions
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index dc5e38aefca6..26073c345213 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/100 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | ||
10 | 9 | ||
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 10 | This program is distributed in the hope it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
@@ -159,7 +159,7 @@ | |||
159 | 159 | ||
160 | #define DRV_NAME "e100" | 160 | #define DRV_NAME "e100" |
161 | #define DRV_EXT "-NAPI" | 161 | #define DRV_EXT "-NAPI" |
162 | #define DRV_VERSION "3.5.16-k2"DRV_EXT | 162 | #define DRV_VERSION "3.5.17-k2"DRV_EXT |
163 | #define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver" | 163 | #define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver" |
164 | #define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation" | 164 | #define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation" |
165 | #define PFX DRV_NAME ": " | 165 | #define PFX DRV_NAME ": " |
@@ -1657,13 +1657,14 @@ static int e100_tx_clean(struct nic *nic) | |||
1657 | 1657 | ||
1658 | spin_lock(&nic->cb_lock); | 1658 | spin_lock(&nic->cb_lock); |
1659 | 1659 | ||
1660 | DPRINTK(TX_DONE, DEBUG, "cb->status = 0x%04X\n", | ||
1661 | nic->cb_to_clean->status); | ||
1662 | |||
1663 | /* Clean CBs marked complete */ | 1660 | /* Clean CBs marked complete */ |
1664 | for(cb = nic->cb_to_clean; | 1661 | for(cb = nic->cb_to_clean; |
1665 | cb->status & cpu_to_le16(cb_complete); | 1662 | cb->status & cpu_to_le16(cb_complete); |
1666 | cb = nic->cb_to_clean = cb->next) { | 1663 | cb = nic->cb_to_clean = cb->next) { |
1664 | DPRINTK(TX_DONE, DEBUG, "cb[%d]->status = 0x%04X\n", | ||
1665 | (int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)), | ||
1666 | cb->status); | ||
1667 | |||
1667 | if(likely(cb->skb != NULL)) { | 1668 | if(likely(cb->skb != NULL)) { |
1668 | nic->net_stats.tx_packets++; | 1669 | nic->net_stats.tx_packets++; |
1669 | nic->net_stats.tx_bytes += cb->skb->len; | 1670 | nic->net_stats.tx_bytes += cb->skb->len; |
@@ -2572,7 +2573,7 @@ static int __devinit e100_probe(struct pci_dev *pdev, | |||
2572 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2573 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2573 | netdev->poll_controller = e100_netpoll; | 2574 | netdev->poll_controller = e100_netpoll; |
2574 | #endif | 2575 | #endif |
2575 | strcpy(netdev->name, pci_name(pdev)); | 2576 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
2576 | 2577 | ||
2577 | nic = netdev_priv(netdev); | 2578 | nic = netdev_priv(netdev); |
2578 | nic->netdev = netdev; | 2579 | nic->netdev = netdev; |
@@ -2714,68 +2715,56 @@ static void __devexit e100_remove(struct pci_dev *pdev) | |||
2714 | } | 2715 | } |
2715 | } | 2716 | } |
2716 | 2717 | ||
2717 | #ifdef CONFIG_PM | ||
2718 | static int e100_suspend(struct pci_dev *pdev, pm_message_t state) | 2718 | static int e100_suspend(struct pci_dev *pdev, pm_message_t state) |
2719 | { | 2719 | { |
2720 | struct net_device *netdev = pci_get_drvdata(pdev); | 2720 | struct net_device *netdev = pci_get_drvdata(pdev); |
2721 | struct nic *nic = netdev_priv(netdev); | 2721 | struct nic *nic = netdev_priv(netdev); |
2722 | int retval; | ||
2723 | 2722 | ||
2724 | if(netif_running(netdev)) | 2723 | if (netif_running(netdev)) |
2725 | e100_down(nic); | 2724 | e100_down(nic); |
2726 | e100_hw_reset(nic); | 2725 | e100_hw_reset(nic); |
2727 | netif_device_detach(netdev); | 2726 | netif_device_detach(netdev); |
2728 | 2727 | ||
2728 | #ifdef CONFIG_PM | ||
2729 | pci_save_state(pdev); | 2729 | pci_save_state(pdev); |
2730 | retval = pci_enable_wake(pdev, pci_choose_state(pdev, state), | 2730 | if (nic->flags & (wol_magic | e100_asf(nic))) |
2731 | nic->flags & (wol_magic | e100_asf(nic))); | 2731 | #else |
2732 | if (retval) | 2732 | if (nic->flags & (wol_magic)) |
2733 | DPRINTK(PROBE,ERR, "Error enabling wake\n"); | 2733 | #endif |
2734 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | ||
2735 | else | ||
2736 | /* disable PME */ | ||
2737 | pci_enable_wake(pdev, 0, 0); | ||
2738 | |||
2734 | pci_disable_device(pdev); | 2739 | pci_disable_device(pdev); |
2735 | retval = pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 2740 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
2736 | if (retval) | ||
2737 | DPRINTK(PROBE,ERR, "Error %d setting power state\n", retval); | ||
2738 | 2741 | ||
2739 | return 0; | 2742 | return 0; |
2740 | } | 2743 | } |
2741 | 2744 | ||
2745 | #ifdef CONFIG_PM | ||
2742 | static int e100_resume(struct pci_dev *pdev) | 2746 | static int e100_resume(struct pci_dev *pdev) |
2743 | { | 2747 | { |
2744 | struct net_device *netdev = pci_get_drvdata(pdev); | 2748 | struct net_device *netdev = pci_get_drvdata(pdev); |
2745 | struct nic *nic = netdev_priv(netdev); | 2749 | struct nic *nic = netdev_priv(netdev); |
2746 | int retval; | ||
2747 | 2750 | ||
2748 | retval = pci_set_power_state(pdev, PCI_D0); | 2751 | pci_set_power_state(pdev, PCI_D0); |
2749 | if (retval) | ||
2750 | DPRINTK(PROBE,ERR, "Error waking adapter\n"); | ||
2751 | pci_restore_state(pdev); | 2752 | pci_restore_state(pdev); |
2752 | /* ack any pending wake events, disable PME */ | 2753 | /* ack any pending wake events, disable PME */ |
2753 | retval = pci_enable_wake(pdev, 0, 0); | 2754 | pci_enable_wake(pdev, 0, 0); |
2754 | if (retval) | ||
2755 | DPRINTK(PROBE,ERR, "Error clearing wake events\n"); | ||
2756 | 2755 | ||
2757 | netif_device_attach(netdev); | 2756 | netif_device_attach(netdev); |
2758 | if(netif_running(netdev)) | 2757 | if (netif_running(netdev)) |
2759 | e100_up(nic); | 2758 | e100_up(nic); |
2760 | 2759 | ||
2761 | return 0; | 2760 | return 0; |
2762 | } | 2761 | } |
2763 | #endif | 2762 | #endif /* CONFIG_PM */ |
2764 | 2763 | ||
2765 | 2764 | ||
2766 | static void e100_shutdown(struct pci_dev *pdev) | 2765 | static void e100_shutdown(struct pci_dev *pdev) |
2767 | { | 2766 | { |
2768 | struct net_device *netdev = pci_get_drvdata(pdev); | 2767 | e100_suspend(pdev, PMSG_SUSPEND); |
2769 | struct nic *nic = netdev_priv(netdev); | ||
2770 | int retval; | ||
2771 | |||
2772 | #ifdef CONFIG_PM | ||
2773 | retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic | e100_asf(nic))); | ||
2774 | #else | ||
2775 | retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic)); | ||
2776 | #endif | ||
2777 | if (retval) | ||
2778 | DPRINTK(PROBE,ERR, "Error enabling wake\n"); | ||
2779 | } | 2768 | } |
2780 | 2769 | ||
2781 | /* ------------------ PCI Error Recovery infrastructure -------------- */ | 2770 | /* ------------------ PCI Error Recovery infrastructure -------------- */ |
@@ -2859,8 +2848,9 @@ static struct pci_driver e100_driver = { | |||
2859 | .id_table = e100_id_table, | 2848 | .id_table = e100_id_table, |
2860 | .probe = e100_probe, | 2849 | .probe = e100_probe, |
2861 | .remove = __devexit_p(e100_remove), | 2850 | .remove = __devexit_p(e100_remove), |
2862 | #ifdef CONFIG_PM | 2851 | /* Power Management hooks */ |
2863 | .suspend = e100_suspend, | 2852 | .suspend = e100_suspend, |
2853 | #ifdef CONFIG_PM | ||
2864 | .resume = e100_resume, | 2854 | .resume = e100_resume, |
2865 | #endif | 2855 | #endif |
2866 | .shutdown = e100_shutdown, | 2856 | .shutdown = e100_shutdown, |
diff --git a/drivers/net/e1000/LICENSE b/drivers/net/e1000/LICENSE deleted file mode 100644 index 5f297e5bb465..000000000000 --- a/drivers/net/e1000/LICENSE +++ /dev/null | |||
@@ -1,339 +0,0 @@ | |||
1 | |||
2 | "This software program is licensed subject to the GNU General Public License | ||
3 | (GPL). Version 2, June 1991, available at | ||
4 | <http://www.fsf.org/copyleft/gpl.html>" | ||
5 | |||
6 | GNU General Public License | ||
7 | |||
8 | Version 2, June 1991 | ||
9 | |||
10 | Copyright (C) 1989, 1991 Free Software Foundation, Inc. | ||
11 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA | ||
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223 | author/donor to decide if he or she is willing to distribute software | ||
224 | through any other system and a licensee cannot impose that choice. | ||
225 | |||
226 | This section is intended to make thoroughly clear what is believed to be | ||
227 | a consequence of the rest of this License. | ||
228 | |||
229 | 8. If the distribution and/or use of the Program is restricted in certain | ||
230 | countries either by patents or by copyrighted interfaces, the original | ||
231 | copyright holder who places the Program under this License may add an | ||
232 | explicit geographical distribution limitation excluding those countries, | ||
233 | so that distribution is permitted only in or among countries not thus | ||
234 | excluded. In such case, this License incorporates the limitation as if | ||
235 | written in the body of this License. | ||
236 | |||
237 | 9. The Free Software Foundation may publish revised and/or new versions of | ||
238 | the General Public License from time to time. Such new versions will be | ||
239 | similar in spirit to the present version, but may differ in detail to | ||
240 | address new problems or concerns. | ||
241 | |||
242 | Each version is given a distinguishing version number. If the Program | ||
243 | specifies a version number of this License which applies to it and "any | ||
244 | later version", you have the option of following the terms and | ||
245 | conditions either of that version or of any later version published by | ||
246 | the Free Software Foundation. If the Program does not specify a version | ||
247 | number of this License, you may choose any version ever published by the | ||
248 | Free Software Foundation. | ||
249 | |||
250 | 10. If you wish to incorporate parts of the Program into other free programs | ||
251 | whose distribution conditions are different, write to the author to ask | ||
252 | for permission. For software which is copyrighted by the Free Software | ||
253 | Foundation, write to the Free Software Foundation; we sometimes make | ||
254 | exceptions for this. Our decision will be guided by the two goals of | ||
255 | preserving the free status of all derivatives of our free software and | ||
256 | of promoting the sharing and reuse of software generally. | ||
257 | |||
258 | NO WARRANTY | ||
259 | |||
260 | 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY | ||
261 | FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN | ||
262 | OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES | ||
263 | PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER | ||
264 | EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
265 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE | ||
266 | ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH | ||
267 | YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL | ||
268 | NECESSARY SERVICING, REPAIR OR CORRECTION. | ||
269 | |||
270 | 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING | ||
271 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR | ||
272 | REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR | ||
273 | DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL | ||
274 | DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM | ||
275 | (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED | ||
276 | INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF | ||
277 | THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR | ||
278 | OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | ||
279 | |||
280 | END OF TERMS AND CONDITIONS | ||
281 | |||
282 | How to Apply These Terms to Your New Programs | ||
283 | |||
284 | If you develop a new program, and you want it to be of the greatest | ||
285 | possible use to the public, the best way to achieve this is to make it free | ||
286 | software which everyone can redistribute and change under these terms. | ||
287 | |||
288 | To do so, attach the following notices to the program. It is safest to | ||
289 | attach them to the start of each source file to most effectively convey the | ||
290 | exclusion of warranty; and each file should have at least the "copyright" | ||
291 | line and a pointer to where the full notice is found. | ||
292 | |||
293 | one line to give the program's name and an idea of what it does. | ||
294 | Copyright (C) yyyy name of author | ||
295 | |||
296 | This program is free software; you can redistribute it and/or modify it | ||
297 | under the terms of the GNU General Public License as published by the Free | ||
298 | Software Foundation; either version 2 of the License, or (at your option) | ||
299 | any later version. | ||
300 | |||
301 | This program is distributed in the hope that it will be useful, but WITHOUT | ||
302 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
303 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
304 | more details. | ||
305 | |||
306 | You should have received a copy of the GNU General Public License along with | ||
307 | this program; if not, write to the Free Software Foundation, Inc., 59 | ||
308 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
309 | |||
310 | Also add information on how to contact you by electronic and paper mail. | ||
311 | |||
312 | If the program is interactive, make it output a short notice like this when | ||
313 | it starts in an interactive mode: | ||
314 | |||
315 | Gnomovision version 69, Copyright (C) year name of author Gnomovision comes | ||
316 | with ABSOLUTELY NO WARRANTY; for details type 'show w'. This is free | ||
317 | software, and you are welcome to redistribute it under certain conditions; | ||
318 | type 'show c' for details. | ||
319 | |||
320 | The hypothetical commands 'show w' and 'show c' should show the appropriate | ||
321 | parts of the General Public License. Of course, the commands you use may be | ||
322 | called something other than 'show w' and 'show c'; they could even be | ||
323 | mouse-clicks or menu items--whatever suits your program. | ||
324 | |||
325 | You should also get your employer (if you work as a programmer) or your | ||
326 | school, if any, to sign a "copyright disclaimer" for the program, if | ||
327 | necessary. Here is a sample; alter the names: | ||
328 | |||
329 | Yoyodyne, Inc., hereby disclaims all copyright interest in the program | ||
330 | 'Gnomovision' (which makes passes at compilers) written by James Hacker. | ||
331 | |||
332 | signature of Ty Coon, 1 April 1989 | ||
333 | Ty Coon, President of Vice | ||
334 | |||
335 | This General Public License does not permit incorporating your program into | ||
336 | proprietary programs. If your program is a subroutine library, you may | ||
337 | consider it more useful to permit linking proprietary applications with the | ||
338 | library. If this is what you want to do, use the GNU Library General Public | ||
339 | License instead of this License. | ||
diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile index 5dea2b7dea4d..4a6ab1522451 100644 --- a/drivers/net/e1000/Makefile +++ b/drivers/net/e1000/Makefile | |||
@@ -1,25 +1,24 @@ | |||
1 | ################################################################################ | 1 | ################################################################################ |
2 | # | 2 | # |
3 | # | 3 | # Intel PRO/1000 Linux driver |
4 | # Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | # Copyright(c) 1999 - 2006 Intel Corporation. |
5 | # | 5 | # |
6 | # This program is free software; you can redistribute it and/or modify it | 6 | # This program is free software; you can redistribute it and/or modify it |
7 | # under the terms of the GNU General Public License as published by the Free | 7 | # under the terms and conditions of the GNU General Public License, |
8 | # Software Foundation; either version 2 of the License, or (at your option) | 8 | # version 2, as published by the Free Software Foundation. |
9 | # any later version. | 9 | # |
10 | # | 10 | # This program is distributed in the hope it will be useful, but WITHOUT |
11 | # This program is distributed in the hope that it will be useful, but WITHOUT | 11 | # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | # more details. | 13 | # more details. |
15 | # | 14 | # |
16 | # You should have received a copy of the GNU General Public License along with | 15 | # You should have received a copy of the GNU General Public License along with |
17 | # this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | # this program; if not, write to the Free Software Foundation, Inc., |
18 | # Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | # 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | # | 18 | # |
20 | # The full GNU General Public License is included in this distribution in the | 19 | # The full GNU General Public License is included in this distribution in |
21 | # file called LICENSE. | 20 | # the file called "COPYING". |
22 | # | 21 | # |
23 | # Contact Information: | 22 | # Contact Information: |
24 | # Linux NICS <linux.nics@intel.com> | 23 | # Linux NICS <linux.nics@intel.com> |
25 | # e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | # e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h index 98afa9c2057e..7ecce438d258 100644 --- a/drivers/net/e1000/e1000.h +++ b/drivers/net/e1000/e1000.h | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -346,29 +345,9 @@ struct e1000_adapter { | |||
346 | }; | 345 | }; |
347 | 346 | ||
348 | enum e1000_state_t { | 347 | enum e1000_state_t { |
349 | __E1000_DRIVER_TESTING, | 348 | __E1000_TESTING, |
350 | __E1000_RESETTING, | 349 | __E1000_RESETTING, |
350 | __E1000_DOWN | ||
351 | }; | 351 | }; |
352 | 352 | ||
353 | /* e1000_main.c */ | ||
354 | extern char e1000_driver_name[]; | ||
355 | extern char e1000_driver_version[]; | ||
356 | int e1000_up(struct e1000_adapter *adapter); | ||
357 | void e1000_down(struct e1000_adapter *adapter); | ||
358 | void e1000_reset(struct e1000_adapter *adapter); | ||
359 | void e1000_reinit_locked(struct e1000_adapter *adapter); | ||
360 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | ||
361 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | ||
362 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | ||
363 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | ||
364 | void e1000_update_stats(struct e1000_adapter *adapter); | ||
365 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | ||
366 | |||
367 | /* e1000_ethtool.c */ | ||
368 | void e1000_set_ethtool_ops(struct net_device *netdev); | ||
369 | |||
370 | /* e1000_param.c */ | ||
371 | void e1000_check_options(struct e1000_adapter *adapter); | ||
372 | |||
373 | |||
374 | #endif /* _E1000_H_ */ | 353 | #endif /* _E1000_H_ */ |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index e39aa1fc4d1e..778ede3c0216 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -33,6 +32,21 @@ | |||
33 | 32 | ||
34 | #include <asm/uaccess.h> | 33 | #include <asm/uaccess.h> |
35 | 34 | ||
35 | extern char e1000_driver_name[]; | ||
36 | extern char e1000_driver_version[]; | ||
37 | |||
38 | extern int e1000_up(struct e1000_adapter *adapter); | ||
39 | extern void e1000_down(struct e1000_adapter *adapter); | ||
40 | extern void e1000_reinit_locked(struct e1000_adapter *adapter); | ||
41 | extern void e1000_reset(struct e1000_adapter *adapter); | ||
42 | extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | ||
43 | extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | ||
44 | extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | ||
45 | extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | ||
46 | extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | ||
47 | extern void e1000_update_stats(struct e1000_adapter *adapter); | ||
48 | |||
49 | |||
36 | struct e1000_stats { | 50 | struct e1000_stats { |
37 | char stat_string[ETH_GSTRING_LEN]; | 51 | char stat_string[ETH_GSTRING_LEN]; |
38 | int sizeof_stat; | 52 | int sizeof_stat; |
@@ -42,26 +56,30 @@ struct e1000_stats { | |||
42 | #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \ | 56 | #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \ |
43 | offsetof(struct e1000_adapter, m) | 57 | offsetof(struct e1000_adapter, m) |
44 | static const struct e1000_stats e1000_gstrings_stats[] = { | 58 | static const struct e1000_stats e1000_gstrings_stats[] = { |
45 | { "rx_packets", E1000_STAT(net_stats.rx_packets) }, | 59 | { "rx_packets", E1000_STAT(stats.gprc) }, |
46 | { "tx_packets", E1000_STAT(net_stats.tx_packets) }, | 60 | { "tx_packets", E1000_STAT(stats.gptc) }, |
47 | { "rx_bytes", E1000_STAT(net_stats.rx_bytes) }, | 61 | { "rx_bytes", E1000_STAT(stats.gorcl) }, |
48 | { "tx_bytes", E1000_STAT(net_stats.tx_bytes) }, | 62 | { "tx_bytes", E1000_STAT(stats.gotcl) }, |
49 | { "rx_errors", E1000_STAT(net_stats.rx_errors) }, | 63 | { "rx_broadcast", E1000_STAT(stats.bprc) }, |
50 | { "tx_errors", E1000_STAT(net_stats.tx_errors) }, | 64 | { "tx_broadcast", E1000_STAT(stats.bptc) }, |
65 | { "rx_multicast", E1000_STAT(stats.mprc) }, | ||
66 | { "tx_multicast", E1000_STAT(stats.mptc) }, | ||
67 | { "rx_errors", E1000_STAT(stats.rxerrc) }, | ||
68 | { "tx_errors", E1000_STAT(stats.txerrc) }, | ||
51 | { "tx_dropped", E1000_STAT(net_stats.tx_dropped) }, | 69 | { "tx_dropped", E1000_STAT(net_stats.tx_dropped) }, |
52 | { "multicast", E1000_STAT(net_stats.multicast) }, | 70 | { "multicast", E1000_STAT(stats.mprc) }, |
53 | { "collisions", E1000_STAT(net_stats.collisions) }, | 71 | { "collisions", E1000_STAT(stats.colc) }, |
54 | { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) }, | 72 | { "rx_length_errors", E1000_STAT(stats.rlerrc) }, |
55 | { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) }, | 73 | { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) }, |
56 | { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) }, | 74 | { "rx_crc_errors", E1000_STAT(stats.crcerrs) }, |
57 | { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) }, | 75 | { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) }, |
58 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, | 76 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, |
59 | { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) }, | 77 | { "rx_missed_errors", E1000_STAT(stats.mpc) }, |
60 | { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) }, | 78 | { "tx_aborted_errors", E1000_STAT(stats.ecol) }, |
61 | { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) }, | 79 | { "tx_carrier_errors", E1000_STAT(stats.tncrs) }, |
62 | { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) }, | 80 | { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) }, |
63 | { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) }, | 81 | { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) }, |
64 | { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) }, | 82 | { "tx_window_errors", E1000_STAT(stats.latecol) }, |
65 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, | 83 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, |
66 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, | 84 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, |
67 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, | 85 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, |
@@ -193,13 +211,9 @@ e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
193 | ADVERTISED_FIBRE | | 211 | ADVERTISED_FIBRE | |
194 | ADVERTISED_Autoneg; | 212 | ADVERTISED_Autoneg; |
195 | else | 213 | else |
196 | hw->autoneg_advertised = ADVERTISED_10baseT_Half | | 214 | hw->autoneg_advertised = ecmd->advertising | |
197 | ADVERTISED_10baseT_Full | | 215 | ADVERTISED_TP | |
198 | ADVERTISED_100baseT_Half | | 216 | ADVERTISED_Autoneg; |
199 | ADVERTISED_100baseT_Full | | ||
200 | ADVERTISED_1000baseT_Full| | ||
201 | ADVERTISED_Autoneg | | ||
202 | ADVERTISED_TP; | ||
203 | ecmd->advertising = hw->autoneg_advertised; | 217 | ecmd->advertising = hw->autoneg_advertised; |
204 | } else | 218 | } else |
205 | if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { | 219 | if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) { |
@@ -229,11 +243,11 @@ e1000_get_pauseparam(struct net_device *netdev, | |||
229 | pause->autoneg = | 243 | pause->autoneg = |
230 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); | 244 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); |
231 | 245 | ||
232 | if (hw->fc == e1000_fc_rx_pause) | 246 | if (hw->fc == E1000_FC_RX_PAUSE) |
233 | pause->rx_pause = 1; | 247 | pause->rx_pause = 1; |
234 | else if (hw->fc == e1000_fc_tx_pause) | 248 | else if (hw->fc == E1000_FC_TX_PAUSE) |
235 | pause->tx_pause = 1; | 249 | pause->tx_pause = 1; |
236 | else if (hw->fc == e1000_fc_full) { | 250 | else if (hw->fc == E1000_FC_FULL) { |
237 | pause->rx_pause = 1; | 251 | pause->rx_pause = 1; |
238 | pause->tx_pause = 1; | 252 | pause->tx_pause = 1; |
239 | } | 253 | } |
@@ -253,13 +267,13 @@ e1000_set_pauseparam(struct net_device *netdev, | |||
253 | msleep(1); | 267 | msleep(1); |
254 | 268 | ||
255 | if (pause->rx_pause && pause->tx_pause) | 269 | if (pause->rx_pause && pause->tx_pause) |
256 | hw->fc = e1000_fc_full; | 270 | hw->fc = E1000_FC_FULL; |
257 | else if (pause->rx_pause && !pause->tx_pause) | 271 | else if (pause->rx_pause && !pause->tx_pause) |
258 | hw->fc = e1000_fc_rx_pause; | 272 | hw->fc = E1000_FC_RX_PAUSE; |
259 | else if (!pause->rx_pause && pause->tx_pause) | 273 | else if (!pause->rx_pause && pause->tx_pause) |
260 | hw->fc = e1000_fc_tx_pause; | 274 | hw->fc = E1000_FC_TX_PAUSE; |
261 | else if (!pause->rx_pause && !pause->tx_pause) | 275 | else if (!pause->rx_pause && !pause->tx_pause) |
262 | hw->fc = e1000_fc_none; | 276 | hw->fc = E1000_FC_NONE; |
263 | 277 | ||
264 | hw->original_fc = hw->fc; | 278 | hw->original_fc = hw->fc; |
265 | 279 | ||
@@ -632,8 +646,8 @@ e1000_set_ringparam(struct net_device *netdev, | |||
632 | { | 646 | { |
633 | struct e1000_adapter *adapter = netdev_priv(netdev); | 647 | struct e1000_adapter *adapter = netdev_priv(netdev); |
634 | e1000_mac_type mac_type = adapter->hw.mac_type; | 648 | e1000_mac_type mac_type = adapter->hw.mac_type; |
635 | struct e1000_tx_ring *txdr, *tx_old, *tx_new; | 649 | struct e1000_tx_ring *txdr, *tx_old; |
636 | struct e1000_rx_ring *rxdr, *rx_old, *rx_new; | 650 | struct e1000_rx_ring *rxdr, *rx_old; |
637 | int i, err, tx_ring_size, rx_ring_size; | 651 | int i, err, tx_ring_size, rx_ring_size; |
638 | 652 | ||
639 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | 653 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
@@ -651,23 +665,17 @@ e1000_set_ringparam(struct net_device *netdev, | |||
651 | tx_old = adapter->tx_ring; | 665 | tx_old = adapter->tx_ring; |
652 | rx_old = adapter->rx_ring; | 666 | rx_old = adapter->rx_ring; |
653 | 667 | ||
654 | adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL); | 668 | err = -ENOMEM; |
655 | if (!adapter->tx_ring) { | 669 | txdr = kzalloc(tx_ring_size, GFP_KERNEL); |
656 | err = -ENOMEM; | 670 | if (!txdr) |
657 | goto err_setup_rx; | 671 | goto err_alloc_tx; |
658 | } | ||
659 | memset(adapter->tx_ring, 0, tx_ring_size); | ||
660 | 672 | ||
661 | adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL); | 673 | rxdr = kzalloc(rx_ring_size, GFP_KERNEL); |
662 | if (!adapter->rx_ring) { | 674 | if (!rxdr) |
663 | kfree(adapter->tx_ring); | 675 | goto err_alloc_rx; |
664 | err = -ENOMEM; | ||
665 | goto err_setup_rx; | ||
666 | } | ||
667 | memset(adapter->rx_ring, 0, rx_ring_size); | ||
668 | 676 | ||
669 | txdr = adapter->tx_ring; | 677 | adapter->tx_ring = txdr; |
670 | rxdr = adapter->rx_ring; | 678 | adapter->rx_ring = rxdr; |
671 | 679 | ||
672 | rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD); | 680 | rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD); |
673 | rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ? | 681 | rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ? |
@@ -694,16 +702,14 @@ e1000_set_ringparam(struct net_device *netdev, | |||
694 | /* save the new, restore the old in order to free it, | 702 | /* save the new, restore the old in order to free it, |
695 | * then restore the new back again */ | 703 | * then restore the new back again */ |
696 | 704 | ||
697 | rx_new = adapter->rx_ring; | ||
698 | tx_new = adapter->tx_ring; | ||
699 | adapter->rx_ring = rx_old; | 705 | adapter->rx_ring = rx_old; |
700 | adapter->tx_ring = tx_old; | 706 | adapter->tx_ring = tx_old; |
701 | e1000_free_all_rx_resources(adapter); | 707 | e1000_free_all_rx_resources(adapter); |
702 | e1000_free_all_tx_resources(adapter); | 708 | e1000_free_all_tx_resources(adapter); |
703 | kfree(tx_old); | 709 | kfree(tx_old); |
704 | kfree(rx_old); | 710 | kfree(rx_old); |
705 | adapter->rx_ring = rx_new; | 711 | adapter->rx_ring = rxdr; |
706 | adapter->tx_ring = tx_new; | 712 | adapter->tx_ring = txdr; |
707 | if ((err = e1000_up(adapter))) | 713 | if ((err = e1000_up(adapter))) |
708 | goto err_setup; | 714 | goto err_setup; |
709 | } | 715 | } |
@@ -715,6 +721,10 @@ err_setup_tx: | |||
715 | err_setup_rx: | 721 | err_setup_rx: |
716 | adapter->rx_ring = rx_old; | 722 | adapter->rx_ring = rx_old; |
717 | adapter->tx_ring = tx_old; | 723 | adapter->tx_ring = tx_old; |
724 | kfree(rxdr); | ||
725 | err_alloc_rx: | ||
726 | kfree(txdr); | ||
727 | err_alloc_tx: | ||
718 | e1000_up(adapter); | 728 | e1000_up(adapter); |
719 | err_setup: | 729 | err_setup: |
720 | clear_bit(__E1000_RESETTING, &adapter->flags); | 730 | clear_bit(__E1000_RESETTING, &adapter->flags); |
@@ -1610,7 +1620,7 @@ e1000_diag_test(struct net_device *netdev, | |||
1610 | struct e1000_adapter *adapter = netdev_priv(netdev); | 1620 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1611 | boolean_t if_running = netif_running(netdev); | 1621 | boolean_t if_running = netif_running(netdev); |
1612 | 1622 | ||
1613 | set_bit(__E1000_DRIVER_TESTING, &adapter->flags); | 1623 | set_bit(__E1000_TESTING, &adapter->flags); |
1614 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { | 1624 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1615 | /* Offline tests */ | 1625 | /* Offline tests */ |
1616 | 1626 | ||
@@ -1655,7 +1665,7 @@ e1000_diag_test(struct net_device *netdev, | |||
1655 | adapter->hw.autoneg = autoneg; | 1665 | adapter->hw.autoneg = autoneg; |
1656 | 1666 | ||
1657 | e1000_reset(adapter); | 1667 | e1000_reset(adapter); |
1658 | clear_bit(__E1000_DRIVER_TESTING, &adapter->flags); | 1668 | clear_bit(__E1000_TESTING, &adapter->flags); |
1659 | if (if_running) | 1669 | if (if_running) |
1660 | dev_open(netdev); | 1670 | dev_open(netdev); |
1661 | } else { | 1671 | } else { |
@@ -1670,7 +1680,7 @@ e1000_diag_test(struct net_device *netdev, | |||
1670 | data[2] = 0; | 1680 | data[2] = 0; |
1671 | data[3] = 0; | 1681 | data[3] = 0; |
1672 | 1682 | ||
1673 | clear_bit(__E1000_DRIVER_TESTING, &adapter->flags); | 1683 | clear_bit(__E1000_TESTING, &adapter->flags); |
1674 | } | 1684 | } |
1675 | msleep_interruptible(4 * 1000); | 1685 | msleep_interruptible(4 * 1000); |
1676 | } | 1686 | } |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 10b8c8c25325..65077f39da69 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -34,6 +33,63 @@ | |||
34 | 33 | ||
35 | #include "e1000_hw.h" | 34 | #include "e1000_hw.h" |
36 | 35 | ||
36 | static int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask); | ||
37 | static void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask); | ||
38 | static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data); | ||
39 | static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data); | ||
40 | static int32_t e1000_get_software_semaphore(struct e1000_hw *hw); | ||
41 | static void e1000_release_software_semaphore(struct e1000_hw *hw); | ||
42 | |||
43 | static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw); | ||
44 | static int32_t e1000_check_downshift(struct e1000_hw *hw); | ||
45 | static int32_t e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity *polarity); | ||
46 | static void e1000_clear_hw_cntrs(struct e1000_hw *hw); | ||
47 | static void e1000_clear_vfta(struct e1000_hw *hw); | ||
48 | static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw); | ||
49 | static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, boolean_t link_up); | ||
50 | static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw); | ||
51 | static int32_t e1000_detect_gig_phy(struct e1000_hw *hw); | ||
52 | static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank); | ||
53 | static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw); | ||
54 | static int32_t e1000_get_cable_length(struct e1000_hw *hw, uint16_t *min_length, uint16_t *max_length); | ||
55 | static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw); | ||
56 | static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw); | ||
57 | static int32_t e1000_get_software_flag(struct e1000_hw *hw); | ||
58 | static int32_t e1000_ich8_cycle_init(struct e1000_hw *hw); | ||
59 | static int32_t e1000_ich8_flash_cycle(struct e1000_hw *hw, uint32_t timeout); | ||
60 | static int32_t e1000_id_led_init(struct e1000_hw *hw); | ||
61 | static int32_t e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, uint32_t cnf_base_addr, uint32_t cnf_size); | ||
62 | static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw); | ||
63 | static void e1000_init_rx_addrs(struct e1000_hw *hw); | ||
64 | static void e1000_initialize_hardware_bits(struct e1000_hw *hw); | ||
65 | static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw); | ||
66 | static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw); | ||
67 | static int32_t e1000_mng_enable_host_if(struct e1000_hw *hw); | ||
68 | static int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum); | ||
69 | static int32_t e1000_mng_write_cmd_header(struct e1000_hw* hw, struct e1000_host_mng_command_header* hdr); | ||
70 | static int32_t e1000_mng_write_commit(struct e1000_hw *hw); | ||
71 | static int32_t e1000_phy_ife_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); | ||
72 | static int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); | ||
73 | static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | ||
74 | static int32_t e1000_write_eeprom_eewr(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | ||
75 | static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd); | ||
76 | static int32_t e1000_phy_m88_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); | ||
77 | static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw); | ||
78 | static int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t *data); | ||
79 | static int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte); | ||
80 | static int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte); | ||
81 | static int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data); | ||
82 | static int32_t e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t *data); | ||
83 | static int32_t e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t data); | ||
84 | static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | ||
85 | static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | ||
86 | static void e1000_release_software_flag(struct e1000_hw *hw); | ||
87 | static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active); | ||
88 | static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active); | ||
89 | static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop); | ||
90 | static void e1000_set_pci_express_master_disable(struct e1000_hw *hw); | ||
91 | static int32_t e1000_wait_autoneg(struct e1000_hw *hw); | ||
92 | static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, uint32_t value); | ||
37 | static int32_t e1000_set_phy_type(struct e1000_hw *hw); | 93 | static int32_t e1000_set_phy_type(struct e1000_hw *hw); |
38 | static void e1000_phy_init_script(struct e1000_hw *hw); | 94 | static void e1000_phy_init_script(struct e1000_hw *hw); |
39 | static int32_t e1000_setup_copper_link(struct e1000_hw *hw); | 95 | static int32_t e1000_setup_copper_link(struct e1000_hw *hw); |
@@ -70,69 +126,10 @@ static int32_t e1000_polarity_reversal_workaround(struct e1000_hw *hw); | |||
70 | static int32_t e1000_set_phy_mode(struct e1000_hw *hw); | 126 | static int32_t e1000_set_phy_mode(struct e1000_hw *hw); |
71 | static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer); | 127 | static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer); |
72 | static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length); | 128 | static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length); |
73 | static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw); | ||
74 | static int32_t e1000_check_downshift(struct e1000_hw *hw); | ||
75 | static int32_t e1000_check_polarity(struct e1000_hw *hw, uint16_t *polarity); | ||
76 | static void e1000_clear_hw_cntrs(struct e1000_hw *hw); | ||
77 | static void e1000_clear_vfta(struct e1000_hw *hw); | ||
78 | static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw); | ||
79 | static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, | ||
80 | boolean_t link_up); | ||
81 | static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw); | ||
82 | static int32_t e1000_detect_gig_phy(struct e1000_hw *hw); | ||
83 | static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw); | ||
84 | static int32_t e1000_get_cable_length(struct e1000_hw *hw, | ||
85 | uint16_t *min_length, | ||
86 | uint16_t *max_length); | ||
87 | static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw); | ||
88 | static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw); | ||
89 | static int32_t e1000_id_led_init(struct e1000_hw * hw); | ||
90 | static void e1000_init_rx_addrs(struct e1000_hw *hw); | ||
91 | static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw); | ||
92 | static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd); | ||
93 | static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw); | ||
94 | static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset, | ||
95 | uint16_t words, uint16_t *data); | ||
96 | static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active); | ||
97 | static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active); | ||
98 | static int32_t e1000_wait_autoneg(struct e1000_hw *hw); | ||
99 | |||
100 | static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, | ||
101 | uint32_t value); | ||
102 | |||
103 | #define E1000_WRITE_REG_IO(a, reg, val) \ | ||
104 | e1000_write_reg_io((a), E1000_##reg, val) | ||
105 | static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, | 129 | static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, |
106 | uint16_t duplex); | 130 | uint16_t duplex); |
107 | static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw); | 131 | static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw); |
108 | 132 | ||
109 | static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, | ||
110 | uint32_t segment); | ||
111 | static int32_t e1000_get_software_flag(struct e1000_hw *hw); | ||
112 | static int32_t e1000_get_software_semaphore(struct e1000_hw *hw); | ||
113 | static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw); | ||
114 | static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw); | ||
115 | static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, | ||
116 | uint16_t words, uint16_t *data); | ||
117 | static int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, | ||
118 | uint8_t* data); | ||
119 | static int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, | ||
120 | uint16_t *data); | ||
121 | static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, | ||
122 | uint16_t *data); | ||
123 | static void e1000_release_software_flag(struct e1000_hw *hw); | ||
124 | static void e1000_release_software_semaphore(struct e1000_hw *hw); | ||
125 | static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, | ||
126 | uint32_t no_snoop); | ||
127 | static int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw, | ||
128 | uint32_t index, uint8_t byte); | ||
129 | static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, | ||
130 | uint16_t words, uint16_t *data); | ||
131 | static int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, | ||
132 | uint8_t data); | ||
133 | static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, | ||
134 | uint16_t data); | ||
135 | |||
136 | /* IGP cable length table */ | 133 | /* IGP cable length table */ |
137 | static const | 134 | static const |
138 | uint16_t e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] = | 135 | uint16_t e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] = |
@@ -156,13 +153,12 @@ uint16_t e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] = | |||
156 | 83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124, | 153 | 83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124, |
157 | 104, 109, 114, 118, 121, 124}; | 154 | 104, 109, 114, 118, 121, 124}; |
158 | 155 | ||
159 | |||
160 | /****************************************************************************** | 156 | /****************************************************************************** |
161 | * Set the phy type member in the hw struct. | 157 | * Set the phy type member in the hw struct. |
162 | * | 158 | * |
163 | * hw - Struct containing variables accessed by shared code | 159 | * hw - Struct containing variables accessed by shared code |
164 | *****************************************************************************/ | 160 | *****************************************************************************/ |
165 | int32_t | 161 | static int32_t |
166 | e1000_set_phy_type(struct e1000_hw *hw) | 162 | e1000_set_phy_type(struct e1000_hw *hw) |
167 | { | 163 | { |
168 | DEBUGFUNC("e1000_set_phy_type"); | 164 | DEBUGFUNC("e1000_set_phy_type"); |
@@ -208,7 +204,6 @@ e1000_set_phy_type(struct e1000_hw *hw) | |||
208 | return E1000_SUCCESS; | 204 | return E1000_SUCCESS; |
209 | } | 205 | } |
210 | 206 | ||
211 | |||
212 | /****************************************************************************** | 207 | /****************************************************************************** |
213 | * IGP phy init script - initializes the GbE PHY | 208 | * IGP phy init script - initializes the GbE PHY |
214 | * | 209 | * |
@@ -667,19 +662,12 @@ e1000_reset_hw(struct e1000_hw *hw) | |||
667 | E1000_WRITE_FLUSH(hw); | 662 | E1000_WRITE_FLUSH(hw); |
668 | } | 663 | } |
669 | /* fall through */ | 664 | /* fall through */ |
670 | case e1000_82571: | 665 | default: |
671 | case e1000_82572: | 666 | /* Auto read done will delay 5ms or poll based on mac type */ |
672 | case e1000_ich8lan: | ||
673 | case e1000_80003es2lan: | ||
674 | ret_val = e1000_get_auto_rd_done(hw); | 667 | ret_val = e1000_get_auto_rd_done(hw); |
675 | if (ret_val) | 668 | if (ret_val) |
676 | /* We don't want to continue accessing MAC registers. */ | ||
677 | return ret_val; | 669 | return ret_val; |
678 | break; | 670 | break; |
679 | default: | ||
680 | /* Wait for EEPROM reload (it happens automatically) */ | ||
681 | msleep(5); | ||
682 | break; | ||
683 | } | 671 | } |
684 | 672 | ||
685 | /* Disable HW ARPs on ASF enabled adapters */ | 673 | /* Disable HW ARPs on ASF enabled adapters */ |
@@ -722,6 +710,123 @@ e1000_reset_hw(struct e1000_hw *hw) | |||
722 | } | 710 | } |
723 | 711 | ||
724 | /****************************************************************************** | 712 | /****************************************************************************** |
713 | * | ||
714 | * Initialize a number of hardware-dependent bits | ||
715 | * | ||
716 | * hw: Struct containing variables accessed by shared code | ||
717 | * | ||
718 | * This function contains hardware limitation workarounds for PCI-E adapters | ||
719 | * | ||
720 | *****************************************************************************/ | ||
721 | static void | ||
722 | e1000_initialize_hardware_bits(struct e1000_hw *hw) | ||
723 | { | ||
724 | if ((hw->mac_type >= e1000_82571) && (!hw->initialize_hw_bits_disable)) { | ||
725 | /* Settings common to all PCI-express silicon */ | ||
726 | uint32_t reg_ctrl, reg_ctrl_ext; | ||
727 | uint32_t reg_tarc0, reg_tarc1; | ||
728 | uint32_t reg_tctl; | ||
729 | uint32_t reg_txdctl, reg_txdctl1; | ||
730 | |||
731 | /* link autonegotiation/sync workarounds */ | ||
732 | reg_tarc0 = E1000_READ_REG(hw, TARC0); | ||
733 | reg_tarc0 &= ~((1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)); | ||
734 | |||
735 | /* Enable not-done TX descriptor counting */ | ||
736 | reg_txdctl = E1000_READ_REG(hw, TXDCTL); | ||
737 | reg_txdctl |= E1000_TXDCTL_COUNT_DESC; | ||
738 | E1000_WRITE_REG(hw, TXDCTL, reg_txdctl); | ||
739 | reg_txdctl1 = E1000_READ_REG(hw, TXDCTL1); | ||
740 | reg_txdctl1 |= E1000_TXDCTL_COUNT_DESC; | ||
741 | E1000_WRITE_REG(hw, TXDCTL1, reg_txdctl1); | ||
742 | |||
743 | switch (hw->mac_type) { | ||
744 | case e1000_82571: | ||
745 | case e1000_82572: | ||
746 | /* Clear PHY TX compatible mode bits */ | ||
747 | reg_tarc1 = E1000_READ_REG(hw, TARC1); | ||
748 | reg_tarc1 &= ~((1 << 30)|(1 << 29)); | ||
749 | |||
750 | /* link autonegotiation/sync workarounds */ | ||
751 | reg_tarc0 |= ((1 << 26)|(1 << 25)|(1 << 24)|(1 << 23)); | ||
752 | |||
753 | /* TX ring control fixes */ | ||
754 | reg_tarc1 |= ((1 << 26)|(1 << 25)|(1 << 24)); | ||
755 | |||
756 | /* Multiple read bit is reversed polarity */ | ||
757 | reg_tctl = E1000_READ_REG(hw, TCTL); | ||
758 | if (reg_tctl & E1000_TCTL_MULR) | ||
759 | reg_tarc1 &= ~(1 << 28); | ||
760 | else | ||
761 | reg_tarc1 |= (1 << 28); | ||
762 | |||
763 | E1000_WRITE_REG(hw, TARC1, reg_tarc1); | ||
764 | break; | ||
765 | case e1000_82573: | ||
766 | reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); | ||
767 | reg_ctrl_ext &= ~(1 << 23); | ||
768 | reg_ctrl_ext |= (1 << 22); | ||
769 | |||
770 | /* TX byte count fix */ | ||
771 | reg_ctrl = E1000_READ_REG(hw, CTRL); | ||
772 | reg_ctrl &= ~(1 << 29); | ||
773 | |||
774 | E1000_WRITE_REG(hw, CTRL_EXT, reg_ctrl_ext); | ||
775 | E1000_WRITE_REG(hw, CTRL, reg_ctrl); | ||
776 | break; | ||
777 | case e1000_80003es2lan: | ||
778 | /* improve small packet performace for fiber/serdes */ | ||
779 | if ((hw->media_type == e1000_media_type_fiber) || | ||
780 | (hw->media_type == e1000_media_type_internal_serdes)) { | ||
781 | reg_tarc0 &= ~(1 << 20); | ||
782 | } | ||
783 | |||
784 | /* Multiple read bit is reversed polarity */ | ||
785 | reg_tctl = E1000_READ_REG(hw, TCTL); | ||
786 | reg_tarc1 = E1000_READ_REG(hw, TARC1); | ||
787 | if (reg_tctl & E1000_TCTL_MULR) | ||
788 | reg_tarc1 &= ~(1 << 28); | ||
789 | else | ||
790 | reg_tarc1 |= (1 << 28); | ||
791 | |||
792 | E1000_WRITE_REG(hw, TARC1, reg_tarc1); | ||
793 | break; | ||
794 | case e1000_ich8lan: | ||
795 | /* Reduce concurrent DMA requests to 3 from 4 */ | ||
796 | if ((hw->revision_id < 3) || | ||
797 | ((hw->device_id != E1000_DEV_ID_ICH8_IGP_M_AMT) && | ||
798 | (hw->device_id != E1000_DEV_ID_ICH8_IGP_M))) | ||
799 | reg_tarc0 |= ((1 << 29)|(1 << 28)); | ||
800 | |||
801 | reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); | ||
802 | reg_ctrl_ext |= (1 << 22); | ||
803 | E1000_WRITE_REG(hw, CTRL_EXT, reg_ctrl_ext); | ||
804 | |||
805 | /* workaround TX hang with TSO=on */ | ||
806 | reg_tarc0 |= ((1 << 27)|(1 << 26)|(1 << 24)|(1 << 23)); | ||
807 | |||
808 | /* Multiple read bit is reversed polarity */ | ||
809 | reg_tctl = E1000_READ_REG(hw, TCTL); | ||
810 | reg_tarc1 = E1000_READ_REG(hw, TARC1); | ||
811 | if (reg_tctl & E1000_TCTL_MULR) | ||
812 | reg_tarc1 &= ~(1 << 28); | ||
813 | else | ||
814 | reg_tarc1 |= (1 << 28); | ||
815 | |||
816 | /* workaround TX hang with TSO=on */ | ||
817 | reg_tarc1 |= ((1 << 30)|(1 << 26)|(1 << 24)); | ||
818 | |||
819 | E1000_WRITE_REG(hw, TARC1, reg_tarc1); | ||
820 | break; | ||
821 | default: | ||
822 | break; | ||
823 | } | ||
824 | |||
825 | E1000_WRITE_REG(hw, TARC0, reg_tarc0); | ||
826 | } | ||
827 | } | ||
828 | |||
829 | /****************************************************************************** | ||
725 | * Performs basic configuration of the adapter. | 830 | * Performs basic configuration of the adapter. |
726 | * | 831 | * |
727 | * hw - Struct containing variables accessed by shared code | 832 | * hw - Struct containing variables accessed by shared code |
@@ -749,14 +854,13 @@ e1000_init_hw(struct e1000_hw *hw) | |||
749 | DEBUGFUNC("e1000_init_hw"); | 854 | DEBUGFUNC("e1000_init_hw"); |
750 | 855 | ||
751 | /* force full DMA clock frequency for 10/100 on ICH8 A0-B0 */ | 856 | /* force full DMA clock frequency for 10/100 on ICH8 A0-B0 */ |
752 | if (hw->mac_type == e1000_ich8lan) { | 857 | if ((hw->mac_type == e1000_ich8lan) && |
753 | reg_data = E1000_READ_REG(hw, TARC0); | 858 | ((hw->revision_id < 3) || |
754 | reg_data |= 0x30000000; | 859 | ((hw->device_id != E1000_DEV_ID_ICH8_IGP_M_AMT) && |
755 | E1000_WRITE_REG(hw, TARC0, reg_data); | 860 | (hw->device_id != E1000_DEV_ID_ICH8_IGP_M)))) { |
756 | 861 | reg_data = E1000_READ_REG(hw, STATUS); | |
757 | reg_data = E1000_READ_REG(hw, STATUS); | 862 | reg_data &= ~0x80000000; |
758 | reg_data &= ~0x80000000; | 863 | E1000_WRITE_REG(hw, STATUS, reg_data); |
759 | E1000_WRITE_REG(hw, STATUS, reg_data); | ||
760 | } | 864 | } |
761 | 865 | ||
762 | /* Initialize Identification LED */ | 866 | /* Initialize Identification LED */ |
@@ -769,6 +873,9 @@ e1000_init_hw(struct e1000_hw *hw) | |||
769 | /* Set the media type and TBI compatibility */ | 873 | /* Set the media type and TBI compatibility */ |
770 | e1000_set_media_type(hw); | 874 | e1000_set_media_type(hw); |
771 | 875 | ||
876 | /* Must be called after e1000_set_media_type because media_type is used */ | ||
877 | e1000_initialize_hardware_bits(hw); | ||
878 | |||
772 | /* Disabling VLAN filtering. */ | 879 | /* Disabling VLAN filtering. */ |
773 | DEBUGOUT("Initializing the IEEE VLAN\n"); | 880 | DEBUGOUT("Initializing the IEEE VLAN\n"); |
774 | /* VET hardcoded to standard value and VFTA removed in ICH8 LAN */ | 881 | /* VET hardcoded to standard value and VFTA removed in ICH8 LAN */ |
@@ -860,17 +967,6 @@ e1000_init_hw(struct e1000_hw *hw) | |||
860 | if (hw->mac_type > e1000_82544) { | 967 | if (hw->mac_type > e1000_82544) { |
861 | ctrl = E1000_READ_REG(hw, TXDCTL); | 968 | ctrl = E1000_READ_REG(hw, TXDCTL); |
862 | ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB; | 969 | ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB; |
863 | switch (hw->mac_type) { | ||
864 | default: | ||
865 | break; | ||
866 | case e1000_82571: | ||
867 | case e1000_82572: | ||
868 | case e1000_82573: | ||
869 | case e1000_ich8lan: | ||
870 | case e1000_80003es2lan: | ||
871 | ctrl |= E1000_TXDCTL_COUNT_DESC; | ||
872 | break; | ||
873 | } | ||
874 | E1000_WRITE_REG(hw, TXDCTL, ctrl); | 970 | E1000_WRITE_REG(hw, TXDCTL, ctrl); |
875 | } | 971 | } |
876 | 972 | ||
@@ -908,8 +1004,6 @@ e1000_init_hw(struct e1000_hw *hw) | |||
908 | case e1000_ich8lan: | 1004 | case e1000_ich8lan: |
909 | ctrl = E1000_READ_REG(hw, TXDCTL1); | 1005 | ctrl = E1000_READ_REG(hw, TXDCTL1); |
910 | ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB; | 1006 | ctrl = (ctrl & ~E1000_TXDCTL_WTHRESH) | E1000_TXDCTL_FULL_TX_DESC_WB; |
911 | if (hw->mac_type >= e1000_82571) | ||
912 | ctrl |= E1000_TXDCTL_COUNT_DESC; | ||
913 | E1000_WRITE_REG(hw, TXDCTL1, ctrl); | 1007 | E1000_WRITE_REG(hw, TXDCTL1, ctrl); |
914 | break; | 1008 | break; |
915 | } | 1009 | } |
@@ -1018,11 +1112,11 @@ e1000_setup_link(struct e1000_hw *hw) | |||
1018 | * control setting, then the variable hw->fc will | 1112 | * control setting, then the variable hw->fc will |
1019 | * be initialized based on a value in the EEPROM. | 1113 | * be initialized based on a value in the EEPROM. |
1020 | */ | 1114 | */ |
1021 | if (hw->fc == e1000_fc_default) { | 1115 | if (hw->fc == E1000_FC_DEFAULT) { |
1022 | switch (hw->mac_type) { | 1116 | switch (hw->mac_type) { |
1023 | case e1000_ich8lan: | 1117 | case e1000_ich8lan: |
1024 | case e1000_82573: | 1118 | case e1000_82573: |
1025 | hw->fc = e1000_fc_full; | 1119 | hw->fc = E1000_FC_FULL; |
1026 | break; | 1120 | break; |
1027 | default: | 1121 | default: |
1028 | ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG, | 1122 | ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG, |
@@ -1032,12 +1126,12 @@ e1000_setup_link(struct e1000_hw *hw) | |||
1032 | return -E1000_ERR_EEPROM; | 1126 | return -E1000_ERR_EEPROM; |
1033 | } | 1127 | } |
1034 | if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 0) | 1128 | if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 0) |
1035 | hw->fc = e1000_fc_none; | 1129 | hw->fc = E1000_FC_NONE; |
1036 | else if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == | 1130 | else if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == |
1037 | EEPROM_WORD0F_ASM_DIR) | 1131 | EEPROM_WORD0F_ASM_DIR) |
1038 | hw->fc = e1000_fc_tx_pause; | 1132 | hw->fc = E1000_FC_TX_PAUSE; |
1039 | else | 1133 | else |
1040 | hw->fc = e1000_fc_full; | 1134 | hw->fc = E1000_FC_FULL; |
1041 | break; | 1135 | break; |
1042 | } | 1136 | } |
1043 | } | 1137 | } |
@@ -1047,10 +1141,10 @@ e1000_setup_link(struct e1000_hw *hw) | |||
1047 | * hub or switch with different Flow Control capabilities. | 1141 | * hub or switch with different Flow Control capabilities. |
1048 | */ | 1142 | */ |
1049 | if (hw->mac_type == e1000_82542_rev2_0) | 1143 | if (hw->mac_type == e1000_82542_rev2_0) |
1050 | hw->fc &= (~e1000_fc_tx_pause); | 1144 | hw->fc &= (~E1000_FC_TX_PAUSE); |
1051 | 1145 | ||
1052 | if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) | 1146 | if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) |
1053 | hw->fc &= (~e1000_fc_rx_pause); | 1147 | hw->fc &= (~E1000_FC_RX_PAUSE); |
1054 | 1148 | ||
1055 | hw->original_fc = hw->fc; | 1149 | hw->original_fc = hw->fc; |
1056 | 1150 | ||
@@ -1102,7 +1196,7 @@ e1000_setup_link(struct e1000_hw *hw) | |||
1102 | * ability to transmit pause frames in not enabled, then these | 1196 | * ability to transmit pause frames in not enabled, then these |
1103 | * registers will be set to 0. | 1197 | * registers will be set to 0. |
1104 | */ | 1198 | */ |
1105 | if (!(hw->fc & e1000_fc_tx_pause)) { | 1199 | if (!(hw->fc & E1000_FC_TX_PAUSE)) { |
1106 | E1000_WRITE_REG(hw, FCRTL, 0); | 1200 | E1000_WRITE_REG(hw, FCRTL, 0); |
1107 | E1000_WRITE_REG(hw, FCRTH, 0); | 1201 | E1000_WRITE_REG(hw, FCRTH, 0); |
1108 | } else { | 1202 | } else { |
@@ -1149,11 +1243,11 @@ e1000_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
1149 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) | 1243 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) |
1150 | E1000_WRITE_REG(hw, SCTL, E1000_DISABLE_SERDES_LOOPBACK); | 1244 | E1000_WRITE_REG(hw, SCTL, E1000_DISABLE_SERDES_LOOPBACK); |
1151 | 1245 | ||
1152 | /* On adapters with a MAC newer than 82544, SW Defineable pin 1 will be | 1246 | /* On adapters with a MAC newer than 82544, SWDP 1 will be |
1153 | * set when the optics detect a signal. On older adapters, it will be | 1247 | * set when the optics detect a signal. On older adapters, it will be |
1154 | * cleared when there is a signal. This applies to fiber media only. | 1248 | * cleared when there is a signal. This applies to fiber media only. |
1155 | * If we're on serdes media, adjust the output amplitude to value set in | 1249 | * If we're on serdes media, adjust the output amplitude to value |
1156 | * the EEPROM. | 1250 | * set in the EEPROM. |
1157 | */ | 1251 | */ |
1158 | ctrl = E1000_READ_REG(hw, CTRL); | 1252 | ctrl = E1000_READ_REG(hw, CTRL); |
1159 | if (hw->media_type == e1000_media_type_fiber) | 1253 | if (hw->media_type == e1000_media_type_fiber) |
@@ -1189,11 +1283,11 @@ e1000_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
1189 | * 3: Both Rx and TX flow control (symmetric) are enabled. | 1283 | * 3: Both Rx and TX flow control (symmetric) are enabled. |
1190 | */ | 1284 | */ |
1191 | switch (hw->fc) { | 1285 | switch (hw->fc) { |
1192 | case e1000_fc_none: | 1286 | case E1000_FC_NONE: |
1193 | /* Flow control is completely disabled by a software over-ride. */ | 1287 | /* Flow control is completely disabled by a software over-ride. */ |
1194 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); | 1288 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); |
1195 | break; | 1289 | break; |
1196 | case e1000_fc_rx_pause: | 1290 | case E1000_FC_RX_PAUSE: |
1197 | /* RX Flow control is enabled and TX Flow control is disabled by a | 1291 | /* RX Flow control is enabled and TX Flow control is disabled by a |
1198 | * software over-ride. Since there really isn't a way to advertise | 1292 | * software over-ride. Since there really isn't a way to advertise |
1199 | * that we are capable of RX Pause ONLY, we will advertise that we | 1293 | * that we are capable of RX Pause ONLY, we will advertise that we |
@@ -1202,13 +1296,13 @@ e1000_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
1202 | */ | 1296 | */ |
1203 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); | 1297 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); |
1204 | break; | 1298 | break; |
1205 | case e1000_fc_tx_pause: | 1299 | case E1000_FC_TX_PAUSE: |
1206 | /* TX Flow control is enabled, and RX Flow control is disabled, by a | 1300 | /* TX Flow control is enabled, and RX Flow control is disabled, by a |
1207 | * software over-ride. | 1301 | * software over-ride. |
1208 | */ | 1302 | */ |
1209 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); | 1303 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); |
1210 | break; | 1304 | break; |
1211 | case e1000_fc_full: | 1305 | case E1000_FC_FULL: |
1212 | /* Flow control (both RX and TX) is enabled by a software over-ride. */ | 1306 | /* Flow control (both RX and TX) is enabled by a software over-ride. */ |
1213 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); | 1307 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); |
1214 | break; | 1308 | break; |
@@ -2124,13 +2218,13 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
2124 | * in the EEPROM is used. | 2218 | * in the EEPROM is used. |
2125 | */ | 2219 | */ |
2126 | switch (hw->fc) { | 2220 | switch (hw->fc) { |
2127 | case e1000_fc_none: /* 0 */ | 2221 | case E1000_FC_NONE: /* 0 */ |
2128 | /* Flow control (RX & TX) is completely disabled by a | 2222 | /* Flow control (RX & TX) is completely disabled by a |
2129 | * software over-ride. | 2223 | * software over-ride. |
2130 | */ | 2224 | */ |
2131 | mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); | 2225 | mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); |
2132 | break; | 2226 | break; |
2133 | case e1000_fc_rx_pause: /* 1 */ | 2227 | case E1000_FC_RX_PAUSE: /* 1 */ |
2134 | /* RX Flow control is enabled, and TX Flow control is | 2228 | /* RX Flow control is enabled, and TX Flow control is |
2135 | * disabled, by a software over-ride. | 2229 | * disabled, by a software over-ride. |
2136 | */ | 2230 | */ |
@@ -2142,14 +2236,14 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw) | |||
2142 | */ | 2236 | */ |
2143 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); | 2237 | mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); |
2144 | break; | 2238 | break; |
2145 | case e1000_fc_tx_pause: /* 2 */ | 2239 | case E1000_FC_TX_PAUSE: /* 2 */ |
2146 | /* TX Flow control is enabled, and RX Flow control is | 2240 | /* TX Flow control is enabled, and RX Flow control is |
2147 | * disabled, by a software over-ride. | 2241 | * disabled, by a software over-ride. |
2148 | */ | 2242 | */ |
2149 | mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR; | 2243 | mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR; |
2150 | mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE; | 2244 | mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE; |
2151 | break; | 2245 | break; |
2152 | case e1000_fc_full: /* 3 */ | 2246 | case E1000_FC_FULL: /* 3 */ |
2153 | /* Flow control (both RX and TX) is enabled by a software | 2247 | /* Flow control (both RX and TX) is enabled by a software |
2154 | * over-ride. | 2248 | * over-ride. |
2155 | */ | 2249 | */ |
@@ -2193,7 +2287,7 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw) | |||
2193 | DEBUGFUNC("e1000_phy_force_speed_duplex"); | 2287 | DEBUGFUNC("e1000_phy_force_speed_duplex"); |
2194 | 2288 | ||
2195 | /* Turn off Flow control if we are forcing speed and duplex. */ | 2289 | /* Turn off Flow control if we are forcing speed and duplex. */ |
2196 | hw->fc = e1000_fc_none; | 2290 | hw->fc = E1000_FC_NONE; |
2197 | 2291 | ||
2198 | DEBUGOUT1("hw->fc = %d\n", hw->fc); | 2292 | DEBUGOUT1("hw->fc = %d\n", hw->fc); |
2199 | 2293 | ||
@@ -2547,18 +2641,18 @@ e1000_force_mac_fc(struct e1000_hw *hw) | |||
2547 | */ | 2641 | */ |
2548 | 2642 | ||
2549 | switch (hw->fc) { | 2643 | switch (hw->fc) { |
2550 | case e1000_fc_none: | 2644 | case E1000_FC_NONE: |
2551 | ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); | 2645 | ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); |
2552 | break; | 2646 | break; |
2553 | case e1000_fc_rx_pause: | 2647 | case E1000_FC_RX_PAUSE: |
2554 | ctrl &= (~E1000_CTRL_TFCE); | 2648 | ctrl &= (~E1000_CTRL_TFCE); |
2555 | ctrl |= E1000_CTRL_RFCE; | 2649 | ctrl |= E1000_CTRL_RFCE; |
2556 | break; | 2650 | break; |
2557 | case e1000_fc_tx_pause: | 2651 | case E1000_FC_TX_PAUSE: |
2558 | ctrl &= (~E1000_CTRL_RFCE); | 2652 | ctrl &= (~E1000_CTRL_RFCE); |
2559 | ctrl |= E1000_CTRL_TFCE; | 2653 | ctrl |= E1000_CTRL_TFCE; |
2560 | break; | 2654 | break; |
2561 | case e1000_fc_full: | 2655 | case E1000_FC_FULL: |
2562 | ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); | 2656 | ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); |
2563 | break; | 2657 | break; |
2564 | default: | 2658 | default: |
@@ -2657,14 +2751,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2657 | * LOCAL DEVICE | LINK PARTNER | 2751 | * LOCAL DEVICE | LINK PARTNER |
2658 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution | 2752 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution |
2659 | *-------|---------|-------|---------|-------------------- | 2753 | *-------|---------|-------|---------|-------------------- |
2660 | * 0 | 0 | DC | DC | e1000_fc_none | 2754 | * 0 | 0 | DC | DC | E1000_FC_NONE |
2661 | * 0 | 1 | 0 | DC | e1000_fc_none | 2755 | * 0 | 1 | 0 | DC | E1000_FC_NONE |
2662 | * 0 | 1 | 1 | 0 | e1000_fc_none | 2756 | * 0 | 1 | 1 | 0 | E1000_FC_NONE |
2663 | * 0 | 1 | 1 | 1 | e1000_fc_tx_pause | 2757 | * 0 | 1 | 1 | 1 | E1000_FC_TX_PAUSE |
2664 | * 1 | 0 | 0 | DC | e1000_fc_none | 2758 | * 1 | 0 | 0 | DC | E1000_FC_NONE |
2665 | * 1 | DC | 1 | DC | e1000_fc_full | 2759 | * 1 | DC | 1 | DC | E1000_FC_FULL |
2666 | * 1 | 1 | 0 | 0 | e1000_fc_none | 2760 | * 1 | 1 | 0 | 0 | E1000_FC_NONE |
2667 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause | 2761 | * 1 | 1 | 0 | 1 | E1000_FC_RX_PAUSE |
2668 | * | 2762 | * |
2669 | */ | 2763 | */ |
2670 | /* Are both PAUSE bits set to 1? If so, this implies | 2764 | /* Are both PAUSE bits set to 1? If so, this implies |
@@ -2676,7 +2770,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2676 | * LOCAL DEVICE | LINK PARTNER | 2770 | * LOCAL DEVICE | LINK PARTNER |
2677 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | 2771 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result |
2678 | *-------|---------|-------|---------|-------------------- | 2772 | *-------|---------|-------|---------|-------------------- |
2679 | * 1 | DC | 1 | DC | e1000_fc_full | 2773 | * 1 | DC | 1 | DC | E1000_FC_FULL |
2680 | * | 2774 | * |
2681 | */ | 2775 | */ |
2682 | if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && | 2776 | if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && |
@@ -2687,11 +2781,11 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2687 | * ONLY. Hence, we must now check to see if we need to | 2781 | * ONLY. Hence, we must now check to see if we need to |
2688 | * turn OFF the TRANSMISSION of PAUSE frames. | 2782 | * turn OFF the TRANSMISSION of PAUSE frames. |
2689 | */ | 2783 | */ |
2690 | if (hw->original_fc == e1000_fc_full) { | 2784 | if (hw->original_fc == E1000_FC_FULL) { |
2691 | hw->fc = e1000_fc_full; | 2785 | hw->fc = E1000_FC_FULL; |
2692 | DEBUGOUT("Flow Control = FULL.\n"); | 2786 | DEBUGOUT("Flow Control = FULL.\n"); |
2693 | } else { | 2787 | } else { |
2694 | hw->fc = e1000_fc_rx_pause; | 2788 | hw->fc = E1000_FC_RX_PAUSE; |
2695 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); | 2789 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2696 | } | 2790 | } |
2697 | } | 2791 | } |
@@ -2700,14 +2794,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2700 | * LOCAL DEVICE | LINK PARTNER | 2794 | * LOCAL DEVICE | LINK PARTNER |
2701 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | 2795 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result |
2702 | *-------|---------|-------|---------|-------------------- | 2796 | *-------|---------|-------|---------|-------------------- |
2703 | * 0 | 1 | 1 | 1 | e1000_fc_tx_pause | 2797 | * 0 | 1 | 1 | 1 | E1000_FC_TX_PAUSE |
2704 | * | 2798 | * |
2705 | */ | 2799 | */ |
2706 | else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) && | 2800 | else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) && |
2707 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && | 2801 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && |
2708 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 2802 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
2709 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 2803 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
2710 | hw->fc = e1000_fc_tx_pause; | 2804 | hw->fc = E1000_FC_TX_PAUSE; |
2711 | DEBUGOUT("Flow Control = TX PAUSE frames only.\n"); | 2805 | DEBUGOUT("Flow Control = TX PAUSE frames only.\n"); |
2712 | } | 2806 | } |
2713 | /* For transmitting PAUSE frames ONLY. | 2807 | /* For transmitting PAUSE frames ONLY. |
@@ -2715,14 +2809,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2715 | * LOCAL DEVICE | LINK PARTNER | 2809 | * LOCAL DEVICE | LINK PARTNER |
2716 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | 2810 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result |
2717 | *-------|---------|-------|---------|-------------------- | 2811 | *-------|---------|-------|---------|-------------------- |
2718 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause | 2812 | * 1 | 1 | 0 | 1 | E1000_FC_RX_PAUSE |
2719 | * | 2813 | * |
2720 | */ | 2814 | */ |
2721 | else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && | 2815 | else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && |
2722 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && | 2816 | (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && |
2723 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && | 2817 | !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && |
2724 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { | 2818 | (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { |
2725 | hw->fc = e1000_fc_rx_pause; | 2819 | hw->fc = E1000_FC_RX_PAUSE; |
2726 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); | 2820 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2727 | } | 2821 | } |
2728 | /* Per the IEEE spec, at this point flow control should be | 2822 | /* Per the IEEE spec, at this point flow control should be |
@@ -2745,13 +2839,13 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2745 | * be asked to delay transmission of packets than asking | 2839 | * be asked to delay transmission of packets than asking |
2746 | * our link partner to pause transmission of frames. | 2840 | * our link partner to pause transmission of frames. |
2747 | */ | 2841 | */ |
2748 | else if ((hw->original_fc == e1000_fc_none || | 2842 | else if ((hw->original_fc == E1000_FC_NONE || |
2749 | hw->original_fc == e1000_fc_tx_pause) || | 2843 | hw->original_fc == E1000_FC_TX_PAUSE) || |
2750 | hw->fc_strict_ieee) { | 2844 | hw->fc_strict_ieee) { |
2751 | hw->fc = e1000_fc_none; | 2845 | hw->fc = E1000_FC_NONE; |
2752 | DEBUGOUT("Flow Control = NONE.\n"); | 2846 | DEBUGOUT("Flow Control = NONE.\n"); |
2753 | } else { | 2847 | } else { |
2754 | hw->fc = e1000_fc_rx_pause; | 2848 | hw->fc = E1000_FC_RX_PAUSE; |
2755 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); | 2849 | DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); |
2756 | } | 2850 | } |
2757 | 2851 | ||
@@ -2766,7 +2860,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) | |||
2766 | } | 2860 | } |
2767 | 2861 | ||
2768 | if (duplex == HALF_DUPLEX) | 2862 | if (duplex == HALF_DUPLEX) |
2769 | hw->fc = e1000_fc_none; | 2863 | hw->fc = E1000_FC_NONE; |
2770 | 2864 | ||
2771 | /* Now we call a subroutine to actually force the MAC | 2865 | /* Now we call a subroutine to actually force the MAC |
2772 | * controller to use the correct flow control settings. | 2866 | * controller to use the correct flow control settings. |
@@ -3417,9 +3511,8 @@ e1000_read_phy_reg(struct e1000_hw *hw, | |||
3417 | return ret_val; | 3511 | return ret_val; |
3418 | } | 3512 | } |
3419 | 3513 | ||
3420 | int32_t | 3514 | static int32_t |
3421 | e1000_read_phy_reg_ex(struct e1000_hw *hw, | 3515 | e1000_read_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, |
3422 | uint32_t reg_addr, | ||
3423 | uint16_t *phy_data) | 3516 | uint16_t *phy_data) |
3424 | { | 3517 | { |
3425 | uint32_t i; | 3518 | uint32_t i; |
@@ -3499,8 +3592,7 @@ e1000_read_phy_reg_ex(struct e1000_hw *hw, | |||
3499 | * data - data to write to the PHY | 3592 | * data - data to write to the PHY |
3500 | ******************************************************************************/ | 3593 | ******************************************************************************/ |
3501 | int32_t | 3594 | int32_t |
3502 | e1000_write_phy_reg(struct e1000_hw *hw, | 3595 | e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, |
3503 | uint32_t reg_addr, | ||
3504 | uint16_t phy_data) | 3596 | uint16_t phy_data) |
3505 | { | 3597 | { |
3506 | uint32_t ret_val; | 3598 | uint32_t ret_val; |
@@ -3557,10 +3649,9 @@ e1000_write_phy_reg(struct e1000_hw *hw, | |||
3557 | return ret_val; | 3649 | return ret_val; |
3558 | } | 3650 | } |
3559 | 3651 | ||
3560 | int32_t | 3652 | static int32_t |
3561 | e1000_write_phy_reg_ex(struct e1000_hw *hw, | 3653 | e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr, |
3562 | uint32_t reg_addr, | 3654 | uint16_t phy_data) |
3563 | uint16_t phy_data) | ||
3564 | { | 3655 | { |
3565 | uint32_t i; | 3656 | uint32_t i; |
3566 | uint32_t mdic = 0; | 3657 | uint32_t mdic = 0; |
@@ -3711,7 +3802,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw) | |||
3711 | swfw = E1000_SWFW_PHY0_SM; | 3802 | swfw = E1000_SWFW_PHY0_SM; |
3712 | } | 3803 | } |
3713 | if (e1000_swfw_sync_acquire(hw, swfw)) { | 3804 | if (e1000_swfw_sync_acquire(hw, swfw)) { |
3714 | e1000_release_software_semaphore(hw); | 3805 | DEBUGOUT("Unable to acquire swfw sync\n"); |
3715 | return -E1000_ERR_SWFW_SYNC; | 3806 | return -E1000_ERR_SWFW_SYNC; |
3716 | } | 3807 | } |
3717 | /* Read the device control register and assert the E1000_CTRL_PHY_RST | 3808 | /* Read the device control register and assert the E1000_CTRL_PHY_RST |
@@ -3734,6 +3825,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw) | |||
3734 | 3825 | ||
3735 | if (hw->mac_type >= e1000_82571) | 3826 | if (hw->mac_type >= e1000_82571) |
3736 | mdelay(10); | 3827 | mdelay(10); |
3828 | |||
3737 | e1000_swfw_sync_release(hw, swfw); | 3829 | e1000_swfw_sync_release(hw, swfw); |
3738 | } else { | 3830 | } else { |
3739 | /* Read the Extended Device Control Register, assert the PHY_RESET_DIR | 3831 | /* Read the Extended Device Control Register, assert the PHY_RESET_DIR |
@@ -3792,15 +3884,14 @@ e1000_phy_reset(struct e1000_hw *hw) | |||
3792 | if (ret_val) | 3884 | if (ret_val) |
3793 | return E1000_SUCCESS; | 3885 | return E1000_SUCCESS; |
3794 | 3886 | ||
3795 | switch (hw->mac_type) { | 3887 | switch (hw->phy_type) { |
3796 | case e1000_82541_rev_2: | 3888 | case e1000_phy_igp: |
3797 | case e1000_82571: | 3889 | case e1000_phy_igp_2: |
3798 | case e1000_82572: | 3890 | case e1000_phy_igp_3: |
3799 | case e1000_ich8lan: | 3891 | case e1000_phy_ife: |
3800 | ret_val = e1000_phy_hw_reset(hw); | 3892 | ret_val = e1000_phy_hw_reset(hw); |
3801 | if (ret_val) | 3893 | if (ret_val) |
3802 | return ret_val; | 3894 | return ret_val; |
3803 | |||
3804 | break; | 3895 | break; |
3805 | default: | 3896 | default: |
3806 | ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); | 3897 | ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); |
@@ -3936,7 +4027,7 @@ e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw) | |||
3936 | * | 4027 | * |
3937 | * hw - Struct containing variables accessed by shared code | 4028 | * hw - Struct containing variables accessed by shared code |
3938 | ******************************************************************************/ | 4029 | ******************************************************************************/ |
3939 | int32_t | 4030 | static int32_t |
3940 | e1000_detect_gig_phy(struct e1000_hw *hw) | 4031 | e1000_detect_gig_phy(struct e1000_hw *hw) |
3941 | { | 4032 | { |
3942 | int32_t phy_init_status, ret_val; | 4033 | int32_t phy_init_status, ret_val; |
@@ -3945,6 +4036,9 @@ e1000_detect_gig_phy(struct e1000_hw *hw) | |||
3945 | 4036 | ||
3946 | DEBUGFUNC("e1000_detect_gig_phy"); | 4037 | DEBUGFUNC("e1000_detect_gig_phy"); |
3947 | 4038 | ||
4039 | if (hw->phy_id != 0) | ||
4040 | return E1000_SUCCESS; | ||
4041 | |||
3948 | /* The 82571 firmware may still be configuring the PHY. In this | 4042 | /* The 82571 firmware may still be configuring the PHY. In this |
3949 | * case, we cannot access the PHY until the configuration is done. So | 4043 | * case, we cannot access the PHY until the configuration is done. So |
3950 | * we explicitly set the PHY values. */ | 4044 | * we explicitly set the PHY values. */ |
@@ -4061,7 +4155,8 @@ e1000_phy_igp_get_info(struct e1000_hw *hw, | |||
4061 | struct e1000_phy_info *phy_info) | 4155 | struct e1000_phy_info *phy_info) |
4062 | { | 4156 | { |
4063 | int32_t ret_val; | 4157 | int32_t ret_val; |
4064 | uint16_t phy_data, polarity, min_length, max_length, average; | 4158 | uint16_t phy_data, min_length, max_length, average; |
4159 | e1000_rev_polarity polarity; | ||
4065 | 4160 | ||
4066 | DEBUGFUNC("e1000_phy_igp_get_info"); | 4161 | DEBUGFUNC("e1000_phy_igp_get_info"); |
4067 | 4162 | ||
@@ -4086,8 +4181,8 @@ e1000_phy_igp_get_info(struct e1000_hw *hw, | |||
4086 | if (ret_val) | 4181 | if (ret_val) |
4087 | return ret_val; | 4182 | return ret_val; |
4088 | 4183 | ||
4089 | phy_info->mdix_mode = (phy_data & IGP01E1000_PSSR_MDIX) >> | 4184 | phy_info->mdix_mode = (e1000_auto_x_mode)((phy_data & IGP01E1000_PSSR_MDIX) >> |
4090 | IGP01E1000_PSSR_MDIX_SHIFT; | 4185 | IGP01E1000_PSSR_MDIX_SHIFT); |
4091 | 4186 | ||
4092 | if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) == | 4187 | if ((phy_data & IGP01E1000_PSSR_SPEED_MASK) == |
4093 | IGP01E1000_PSSR_SPEED_1000MBPS) { | 4188 | IGP01E1000_PSSR_SPEED_1000MBPS) { |
@@ -4096,10 +4191,12 @@ e1000_phy_igp_get_info(struct e1000_hw *hw, | |||
4096 | if (ret_val) | 4191 | if (ret_val) |
4097 | return ret_val; | 4192 | return ret_val; |
4098 | 4193 | ||
4099 | phy_info->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS) >> | 4194 | phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> |
4100 | SR_1000T_LOCAL_RX_STATUS_SHIFT; | 4195 | SR_1000T_LOCAL_RX_STATUS_SHIFT) ? |
4101 | phy_info->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS) >> | 4196 | e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok; |
4102 | SR_1000T_REMOTE_RX_STATUS_SHIFT; | 4197 | phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> |
4198 | SR_1000T_REMOTE_RX_STATUS_SHIFT) ? | ||
4199 | e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok; | ||
4103 | 4200 | ||
4104 | /* Get cable length */ | 4201 | /* Get cable length */ |
4105 | ret_val = e1000_get_cable_length(hw, &min_length, &max_length); | 4202 | ret_val = e1000_get_cable_length(hw, &min_length, &max_length); |
@@ -4135,7 +4232,8 @@ e1000_phy_ife_get_info(struct e1000_hw *hw, | |||
4135 | struct e1000_phy_info *phy_info) | 4232 | struct e1000_phy_info *phy_info) |
4136 | { | 4233 | { |
4137 | int32_t ret_val; | 4234 | int32_t ret_val; |
4138 | uint16_t phy_data, polarity; | 4235 | uint16_t phy_data; |
4236 | e1000_rev_polarity polarity; | ||
4139 | 4237 | ||
4140 | DEBUGFUNC("e1000_phy_ife_get_info"); | 4238 | DEBUGFUNC("e1000_phy_ife_get_info"); |
4141 | 4239 | ||
@@ -4146,8 +4244,9 @@ e1000_phy_ife_get_info(struct e1000_hw *hw, | |||
4146 | if (ret_val) | 4244 | if (ret_val) |
4147 | return ret_val; | 4245 | return ret_val; |
4148 | phy_info->polarity_correction = | 4246 | phy_info->polarity_correction = |
4149 | (phy_data & IFE_PSC_AUTO_POLARITY_DISABLE) >> | 4247 | ((phy_data & IFE_PSC_AUTO_POLARITY_DISABLE) >> |
4150 | IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT; | 4248 | IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT) ? |
4249 | e1000_polarity_reversal_disabled : e1000_polarity_reversal_enabled; | ||
4151 | 4250 | ||
4152 | if (phy_info->polarity_correction == e1000_polarity_reversal_enabled) { | 4251 | if (phy_info->polarity_correction == e1000_polarity_reversal_enabled) { |
4153 | ret_val = e1000_check_polarity(hw, &polarity); | 4252 | ret_val = e1000_check_polarity(hw, &polarity); |
@@ -4155,8 +4254,9 @@ e1000_phy_ife_get_info(struct e1000_hw *hw, | |||
4155 | return ret_val; | 4254 | return ret_val; |
4156 | } else { | 4255 | } else { |
4157 | /* Polarity is forced. */ | 4256 | /* Polarity is forced. */ |
4158 | polarity = (phy_data & IFE_PSC_FORCE_POLARITY) >> | 4257 | polarity = ((phy_data & IFE_PSC_FORCE_POLARITY) >> |
4159 | IFE_PSC_FORCE_POLARITY_SHIFT; | 4258 | IFE_PSC_FORCE_POLARITY_SHIFT) ? |
4259 | e1000_rev_polarity_reversed : e1000_rev_polarity_normal; | ||
4160 | } | 4260 | } |
4161 | phy_info->cable_polarity = polarity; | 4261 | phy_info->cable_polarity = polarity; |
4162 | 4262 | ||
@@ -4164,9 +4264,9 @@ e1000_phy_ife_get_info(struct e1000_hw *hw, | |||
4164 | if (ret_val) | 4264 | if (ret_val) |
4165 | return ret_val; | 4265 | return ret_val; |
4166 | 4266 | ||
4167 | phy_info->mdix_mode = | 4267 | phy_info->mdix_mode = (e1000_auto_x_mode) |
4168 | (phy_data & (IFE_PMC_AUTO_MDIX | IFE_PMC_FORCE_MDIX)) >> | 4268 | ((phy_data & (IFE_PMC_AUTO_MDIX | IFE_PMC_FORCE_MDIX)) >> |
4169 | IFE_PMC_MDIX_MODE_SHIFT; | 4269 | IFE_PMC_MDIX_MODE_SHIFT); |
4170 | 4270 | ||
4171 | return E1000_SUCCESS; | 4271 | return E1000_SUCCESS; |
4172 | } | 4272 | } |
@@ -4182,7 +4282,8 @@ e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
4182 | struct e1000_phy_info *phy_info) | 4282 | struct e1000_phy_info *phy_info) |
4183 | { | 4283 | { |
4184 | int32_t ret_val; | 4284 | int32_t ret_val; |
4185 | uint16_t phy_data, polarity; | 4285 | uint16_t phy_data; |
4286 | e1000_rev_polarity polarity; | ||
4186 | 4287 | ||
4187 | DEBUGFUNC("e1000_phy_m88_get_info"); | 4288 | DEBUGFUNC("e1000_phy_m88_get_info"); |
4188 | 4289 | ||
@@ -4195,11 +4296,14 @@ e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
4195 | return ret_val; | 4296 | return ret_val; |
4196 | 4297 | ||
4197 | phy_info->extended_10bt_distance = | 4298 | phy_info->extended_10bt_distance = |
4198 | (phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) >> | 4299 | ((phy_data & M88E1000_PSCR_10BT_EXT_DIST_ENABLE) >> |
4199 | M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT; | 4300 | M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT) ? |
4301 | e1000_10bt_ext_dist_enable_lower : e1000_10bt_ext_dist_enable_normal; | ||
4302 | |||
4200 | phy_info->polarity_correction = | 4303 | phy_info->polarity_correction = |
4201 | (phy_data & M88E1000_PSCR_POLARITY_REVERSAL) >> | 4304 | ((phy_data & M88E1000_PSCR_POLARITY_REVERSAL) >> |
4202 | M88E1000_PSCR_POLARITY_REVERSAL_SHIFT; | 4305 | M88E1000_PSCR_POLARITY_REVERSAL_SHIFT) ? |
4306 | e1000_polarity_reversal_disabled : e1000_polarity_reversal_enabled; | ||
4203 | 4307 | ||
4204 | /* Check polarity status */ | 4308 | /* Check polarity status */ |
4205 | ret_val = e1000_check_polarity(hw, &polarity); | 4309 | ret_val = e1000_check_polarity(hw, &polarity); |
@@ -4211,15 +4315,15 @@ e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
4211 | if (ret_val) | 4315 | if (ret_val) |
4212 | return ret_val; | 4316 | return ret_val; |
4213 | 4317 | ||
4214 | phy_info->mdix_mode = (phy_data & M88E1000_PSSR_MDIX) >> | 4318 | phy_info->mdix_mode = (e1000_auto_x_mode)((phy_data & M88E1000_PSSR_MDIX) >> |
4215 | M88E1000_PSSR_MDIX_SHIFT; | 4319 | M88E1000_PSSR_MDIX_SHIFT); |
4216 | 4320 | ||
4217 | if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { | 4321 | if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) { |
4218 | /* Cable Length Estimation and Local/Remote Receiver Information | 4322 | /* Cable Length Estimation and Local/Remote Receiver Information |
4219 | * are only valid at 1000 Mbps. | 4323 | * are only valid at 1000 Mbps. |
4220 | */ | 4324 | */ |
4221 | if (hw->phy_type != e1000_phy_gg82563) { | 4325 | if (hw->phy_type != e1000_phy_gg82563) { |
4222 | phy_info->cable_length = ((phy_data & M88E1000_PSSR_CABLE_LENGTH) >> | 4326 | phy_info->cable_length = (e1000_cable_length)((phy_data & M88E1000_PSSR_CABLE_LENGTH) >> |
4223 | M88E1000_PSSR_CABLE_LENGTH_SHIFT); | 4327 | M88E1000_PSSR_CABLE_LENGTH_SHIFT); |
4224 | } else { | 4328 | } else { |
4225 | ret_val = e1000_read_phy_reg(hw, GG82563_PHY_DSP_DISTANCE, | 4329 | ret_val = e1000_read_phy_reg(hw, GG82563_PHY_DSP_DISTANCE, |
@@ -4227,18 +4331,20 @@ e1000_phy_m88_get_info(struct e1000_hw *hw, | |||
4227 | if (ret_val) | 4331 | if (ret_val) |
4228 | return ret_val; | 4332 | return ret_val; |
4229 | 4333 | ||
4230 | phy_info->cable_length = phy_data & GG82563_DSPD_CABLE_LENGTH; | 4334 | phy_info->cable_length = (e1000_cable_length)(phy_data & GG82563_DSPD_CABLE_LENGTH); |
4231 | } | 4335 | } |
4232 | 4336 | ||
4233 | ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); | 4337 | ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); |
4234 | if (ret_val) | 4338 | if (ret_val) |
4235 | return ret_val; | 4339 | return ret_val; |
4236 | 4340 | ||
4237 | phy_info->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS) >> | 4341 | phy_info->local_rx = ((phy_data & SR_1000T_LOCAL_RX_STATUS) >> |
4238 | SR_1000T_LOCAL_RX_STATUS_SHIFT; | 4342 | SR_1000T_LOCAL_RX_STATUS_SHIFT) ? |
4343 | e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok; | ||
4344 | phy_info->remote_rx = ((phy_data & SR_1000T_REMOTE_RX_STATUS) >> | ||
4345 | SR_1000T_REMOTE_RX_STATUS_SHIFT) ? | ||
4346 | e1000_1000t_rx_status_ok : e1000_1000t_rx_status_not_ok; | ||
4239 | 4347 | ||
4240 | phy_info->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS) >> | ||
4241 | SR_1000T_REMOTE_RX_STATUS_SHIFT; | ||
4242 | } | 4348 | } |
4243 | 4349 | ||
4244 | return E1000_SUCCESS; | 4350 | return E1000_SUCCESS; |
@@ -4441,7 +4547,7 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4441 | eeprom->use_eewr = FALSE; | 4547 | eeprom->use_eewr = FALSE; |
4442 | break; | 4548 | break; |
4443 | case e1000_ich8lan: | 4549 | case e1000_ich8lan: |
4444 | { | 4550 | { |
4445 | int32_t i = 0; | 4551 | int32_t i = 0; |
4446 | uint32_t flash_size = E1000_READ_ICH8_REG(hw, ICH8_FLASH_GFPREG); | 4552 | uint32_t flash_size = E1000_READ_ICH8_REG(hw, ICH8_FLASH_GFPREG); |
4447 | 4553 | ||
@@ -4468,7 +4574,7 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4468 | hw->flash_bank_size /= 2 * sizeof(uint16_t); | 4574 | hw->flash_bank_size /= 2 * sizeof(uint16_t); |
4469 | 4575 | ||
4470 | break; | 4576 | break; |
4471 | } | 4577 | } |
4472 | default: | 4578 | default: |
4473 | break; | 4579 | break; |
4474 | } | 4580 | } |
@@ -4800,7 +4906,7 @@ e1000_release_eeprom(struct e1000_hw *hw) | |||
4800 | * | 4906 | * |
4801 | * hw - Struct containing variables accessed by shared code | 4907 | * hw - Struct containing variables accessed by shared code |
4802 | *****************************************************************************/ | 4908 | *****************************************************************************/ |
4803 | int32_t | 4909 | static int32_t |
4804 | e1000_spi_eeprom_ready(struct e1000_hw *hw) | 4910 | e1000_spi_eeprom_ready(struct e1000_hw *hw) |
4805 | { | 4911 | { |
4806 | uint16_t retry_count = 0; | 4912 | uint16_t retry_count = 0; |
@@ -4854,44 +4960,43 @@ e1000_read_eeprom(struct e1000_hw *hw, | |||
4854 | { | 4960 | { |
4855 | struct e1000_eeprom_info *eeprom = &hw->eeprom; | 4961 | struct e1000_eeprom_info *eeprom = &hw->eeprom; |
4856 | uint32_t i = 0; | 4962 | uint32_t i = 0; |
4857 | int32_t ret_val; | ||
4858 | 4963 | ||
4859 | DEBUGFUNC("e1000_read_eeprom"); | 4964 | DEBUGFUNC("e1000_read_eeprom"); |
4860 | 4965 | ||
4966 | /* If eeprom is not yet detected, do so now */ | ||
4967 | if (eeprom->word_size == 0) | ||
4968 | e1000_init_eeprom_params(hw); | ||
4969 | |||
4861 | /* A check for invalid values: offset too large, too many words, and not | 4970 | /* A check for invalid values: offset too large, too many words, and not |
4862 | * enough words. | 4971 | * enough words. |
4863 | */ | 4972 | */ |
4864 | if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) || | 4973 | if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) || |
4865 | (words == 0)) { | 4974 | (words == 0)) { |
4866 | DEBUGOUT("\"words\" parameter out of bounds\n"); | 4975 | DEBUGOUT2("\"words\" parameter out of bounds. Words = %d, size = %d\n", offset, eeprom->word_size); |
4867 | return -E1000_ERR_EEPROM; | 4976 | return -E1000_ERR_EEPROM; |
4868 | } | 4977 | } |
4869 | 4978 | ||
4870 | /* FLASH reads without acquiring the semaphore are safe */ | 4979 | /* EEPROM's that don't use EERD to read require us to bit-bang the SPI |
4980 | * directly. In this case, we need to acquire the EEPROM so that | ||
4981 | * FW or other port software does not interrupt. | ||
4982 | */ | ||
4871 | if (e1000_is_onboard_nvm_eeprom(hw) == TRUE && | 4983 | if (e1000_is_onboard_nvm_eeprom(hw) == TRUE && |
4872 | hw->eeprom.use_eerd == FALSE) { | 4984 | hw->eeprom.use_eerd == FALSE) { |
4873 | switch (hw->mac_type) { | 4985 | /* Prepare the EEPROM for bit-bang reading */ |
4874 | case e1000_80003es2lan: | 4986 | if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) |
4875 | break; | 4987 | return -E1000_ERR_EEPROM; |
4876 | default: | ||
4877 | /* Prepare the EEPROM for reading */ | ||
4878 | if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) | ||
4879 | return -E1000_ERR_EEPROM; | ||
4880 | break; | ||
4881 | } | ||
4882 | } | 4988 | } |
4883 | 4989 | ||
4884 | if (eeprom->use_eerd == TRUE) { | 4990 | /* Eerd register EEPROM access requires no eeprom aquire/release */ |
4885 | ret_val = e1000_read_eeprom_eerd(hw, offset, words, data); | 4991 | if (eeprom->use_eerd == TRUE) |
4886 | if ((e1000_is_onboard_nvm_eeprom(hw) == TRUE) || | 4992 | return e1000_read_eeprom_eerd(hw, offset, words, data); |
4887 | (hw->mac_type != e1000_82573)) | ||
4888 | e1000_release_eeprom(hw); | ||
4889 | return ret_val; | ||
4890 | } | ||
4891 | 4993 | ||
4994 | /* ICH EEPROM access is done via the ICH flash controller */ | ||
4892 | if (eeprom->type == e1000_eeprom_ich8) | 4995 | if (eeprom->type == e1000_eeprom_ich8) |
4893 | return e1000_read_eeprom_ich8(hw, offset, words, data); | 4996 | return e1000_read_eeprom_ich8(hw, offset, words, data); |
4894 | 4997 | ||
4998 | /* Set up the SPI or Microwire EEPROM for bit-bang reading. We have | ||
4999 | * acquired the EEPROM at this point, so any returns should relase it */ | ||
4895 | if (eeprom->type == e1000_eeprom_spi) { | 5000 | if (eeprom->type == e1000_eeprom_spi) { |
4896 | uint16_t word_in; | 5001 | uint16_t word_in; |
4897 | uint8_t read_opcode = EEPROM_READ_OPCODE_SPI; | 5002 | uint8_t read_opcode = EEPROM_READ_OPCODE_SPI; |
@@ -5206,6 +5311,10 @@ e1000_write_eeprom(struct e1000_hw *hw, | |||
5206 | 5311 | ||
5207 | DEBUGFUNC("e1000_write_eeprom"); | 5312 | DEBUGFUNC("e1000_write_eeprom"); |
5208 | 5313 | ||
5314 | /* If eeprom is not yet detected, do so now */ | ||
5315 | if (eeprom->word_size == 0) | ||
5316 | e1000_init_eeprom_params(hw); | ||
5317 | |||
5209 | /* A check for invalid values: offset too large, too many words, and not | 5318 | /* A check for invalid values: offset too large, too many words, and not |
5210 | * enough words. | 5319 | * enough words. |
5211 | */ | 5320 | */ |
@@ -5248,7 +5357,7 @@ e1000_write_eeprom(struct e1000_hw *hw, | |||
5248 | * data - pointer to array of 8 bit words to be written to the EEPROM | 5357 | * data - pointer to array of 8 bit words to be written to the EEPROM |
5249 | * | 5358 | * |
5250 | *****************************************************************************/ | 5359 | *****************************************************************************/ |
5251 | int32_t | 5360 | static int32_t |
5252 | e1000_write_eeprom_spi(struct e1000_hw *hw, | 5361 | e1000_write_eeprom_spi(struct e1000_hw *hw, |
5253 | uint16_t offset, | 5362 | uint16_t offset, |
5254 | uint16_t words, | 5363 | uint16_t words, |
@@ -5314,7 +5423,7 @@ e1000_write_eeprom_spi(struct e1000_hw *hw, | |||
5314 | * data - pointer to array of 16 bit words to be written to the EEPROM | 5423 | * data - pointer to array of 16 bit words to be written to the EEPROM |
5315 | * | 5424 | * |
5316 | *****************************************************************************/ | 5425 | *****************************************************************************/ |
5317 | int32_t | 5426 | static int32_t |
5318 | e1000_write_eeprom_microwire(struct e1000_hw *hw, | 5427 | e1000_write_eeprom_microwire(struct e1000_hw *hw, |
5319 | uint16_t offset, | 5428 | uint16_t offset, |
5320 | uint16_t words, | 5429 | uint16_t words, |
@@ -5411,10 +5520,8 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5411 | int32_t error = E1000_SUCCESS; | 5520 | int32_t error = E1000_SUCCESS; |
5412 | uint32_t old_bank_offset = 0; | 5521 | uint32_t old_bank_offset = 0; |
5413 | uint32_t new_bank_offset = 0; | 5522 | uint32_t new_bank_offset = 0; |
5414 | uint32_t sector_retries = 0; | ||
5415 | uint8_t low_byte = 0; | 5523 | uint8_t low_byte = 0; |
5416 | uint8_t high_byte = 0; | 5524 | uint8_t high_byte = 0; |
5417 | uint8_t temp_byte = 0; | ||
5418 | boolean_t sector_write_failed = FALSE; | 5525 | boolean_t sector_write_failed = FALSE; |
5419 | 5526 | ||
5420 | if (hw->mac_type == e1000_82573) { | 5527 | if (hw->mac_type == e1000_82573) { |
@@ -5467,41 +5574,46 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5467 | e1000_erase_ich8_4k_segment(hw, 0); | 5574 | e1000_erase_ich8_4k_segment(hw, 0); |
5468 | } | 5575 | } |
5469 | 5576 | ||
5470 | do { | 5577 | sector_write_failed = FALSE; |
5471 | sector_write_failed = FALSE; | 5578 | /* Loop for every byte in the shadow RAM, |
5472 | /* Loop for every byte in the shadow RAM, | 5579 | * which is in units of words. */ |
5473 | * which is in units of words. */ | 5580 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { |
5474 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { | 5581 | /* Determine whether to write the value stored |
5475 | /* Determine whether to write the value stored | 5582 | * in the other NVM bank or a modified value stored |
5476 | * in the other NVM bank or a modified value stored | 5583 | * in the shadow RAM */ |
5477 | * in the shadow RAM */ | 5584 | if (hw->eeprom_shadow_ram[i].modified == TRUE) { |
5478 | if (hw->eeprom_shadow_ram[i].modified == TRUE) { | 5585 | low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word; |
5479 | low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word; | 5586 | udelay(100); |
5480 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset, | 5587 | error = e1000_verify_write_ich8_byte(hw, |
5481 | &temp_byte); | 5588 | (i << 1) + new_bank_offset, low_byte); |
5482 | udelay(100); | 5589 | |
5483 | error = e1000_verify_write_ich8_byte(hw, | 5590 | if (error != E1000_SUCCESS) |
5484 | (i << 1) + new_bank_offset, | 5591 | sector_write_failed = TRUE; |
5485 | low_byte); | 5592 | else { |
5486 | if (error != E1000_SUCCESS) | ||
5487 | sector_write_failed = TRUE; | ||
5488 | high_byte = | 5593 | high_byte = |
5489 | (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); | 5594 | (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); |
5490 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1, | ||
5491 | &temp_byte); | ||
5492 | udelay(100); | ||
5493 | } else { | ||
5494 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset, | ||
5495 | &low_byte); | ||
5496 | udelay(100); | 5595 | udelay(100); |
5497 | error = e1000_verify_write_ich8_byte(hw, | 5596 | } |
5498 | (i << 1) + new_bank_offset, low_byte); | 5597 | } else { |
5499 | if (error != E1000_SUCCESS) | 5598 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset, |
5500 | sector_write_failed = TRUE; | 5599 | &low_byte); |
5600 | udelay(100); | ||
5601 | error = e1000_verify_write_ich8_byte(hw, | ||
5602 | (i << 1) + new_bank_offset, low_byte); | ||
5603 | |||
5604 | if (error != E1000_SUCCESS) | ||
5605 | sector_write_failed = TRUE; | ||
5606 | else { | ||
5501 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1, | 5607 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1, |
5502 | &high_byte); | 5608 | &high_byte); |
5609 | udelay(100); | ||
5503 | } | 5610 | } |
5611 | } | ||
5504 | 5612 | ||
5613 | /* If the write of the low byte was successful, go ahread and | ||
5614 | * write the high byte while checking to make sure that if it | ||
5615 | * is the signature byte, then it is handled properly */ | ||
5616 | if (sector_write_failed == FALSE) { | ||
5505 | /* If the word is 0x13, then make sure the signature bits | 5617 | /* If the word is 0x13, then make sure the signature bits |
5506 | * (15:14) are 11b until the commit has completed. | 5618 | * (15:14) are 11b until the commit has completed. |
5507 | * This will allow us to write 10b which indicates the | 5619 | * This will allow us to write 10b which indicates the |
@@ -5512,45 +5624,45 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5512 | high_byte = E1000_ICH8_NVM_SIG_MASK | high_byte; | 5624 | high_byte = E1000_ICH8_NVM_SIG_MASK | high_byte; |
5513 | 5625 | ||
5514 | error = e1000_verify_write_ich8_byte(hw, | 5626 | error = e1000_verify_write_ich8_byte(hw, |
5515 | (i << 1) + new_bank_offset + 1, high_byte); | 5627 | (i << 1) + new_bank_offset + 1, high_byte); |
5516 | if (error != E1000_SUCCESS) | 5628 | if (error != E1000_SUCCESS) |
5517 | sector_write_failed = TRUE; | 5629 | sector_write_failed = TRUE; |
5518 | 5630 | ||
5519 | if (sector_write_failed == FALSE) { | 5631 | } else { |
5520 | /* Clear the now not used entry in the cache */ | 5632 | /* If the write failed then break from the loop and |
5521 | hw->eeprom_shadow_ram[i].modified = FALSE; | 5633 | * return an error */ |
5522 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; | 5634 | break; |
5523 | } | ||
5524 | } | 5635 | } |
5636 | } | ||
5525 | 5637 | ||
5526 | /* Don't bother writing the segment valid bits if sector | 5638 | /* Don't bother writing the segment valid bits if sector |
5527 | * programming failed. */ | 5639 | * programming failed. */ |
5528 | if (sector_write_failed == FALSE) { | 5640 | if (sector_write_failed == FALSE) { |
5529 | /* Finally validate the new segment by setting bit 15:14 | 5641 | /* Finally validate the new segment by setting bit 15:14 |
5530 | * to 10b in word 0x13 , this can be done without an | 5642 | * to 10b in word 0x13 , this can be done without an |
5531 | * erase as well since these bits are 11 to start with | 5643 | * erase as well since these bits are 11 to start with |
5532 | * and we need to change bit 14 to 0b */ | 5644 | * and we need to change bit 14 to 0b */ |
5533 | e1000_read_ich8_byte(hw, | 5645 | e1000_read_ich8_byte(hw, |
5534 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset, | 5646 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset, |
5535 | &high_byte); | 5647 | &high_byte); |
5536 | high_byte &= 0xBF; | 5648 | high_byte &= 0xBF; |
5649 | error = e1000_verify_write_ich8_byte(hw, | ||
5650 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset, high_byte); | ||
5651 | /* And invalidate the previously valid segment by setting | ||
5652 | * its signature word (0x13) high_byte to 0b. This can be | ||
5653 | * done without an erase because flash erase sets all bits | ||
5654 | * to 1's. We can write 1's to 0's without an erase */ | ||
5655 | if (error == E1000_SUCCESS) { | ||
5537 | error = e1000_verify_write_ich8_byte(hw, | 5656 | error = e1000_verify_write_ich8_byte(hw, |
5538 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + new_bank_offset, | 5657 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + old_bank_offset, 0); |
5539 | high_byte); | 5658 | } |
5540 | if (error != E1000_SUCCESS) | ||
5541 | sector_write_failed = TRUE; | ||
5542 | 5659 | ||
5543 | /* And invalidate the previously valid segment by setting | 5660 | /* Clear the now not used entry in the cache */ |
5544 | * its signature word (0x13) high_byte to 0b. This can be | 5661 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { |
5545 | * done without an erase because flash erase sets all bits | 5662 | hw->eeprom_shadow_ram[i].modified = FALSE; |
5546 | * to 1's. We can write 1's to 0's without an erase */ | 5663 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; |
5547 | error = e1000_verify_write_ich8_byte(hw, | ||
5548 | E1000_ICH8_NVM_SIG_WORD * 2 + 1 + old_bank_offset, | ||
5549 | 0); | ||
5550 | if (error != E1000_SUCCESS) | ||
5551 | sector_write_failed = TRUE; | ||
5552 | } | 5664 | } |
5553 | } while (++sector_retries < 10 && sector_write_failed == TRUE); | 5665 | } |
5554 | } | 5666 | } |
5555 | 5667 | ||
5556 | return error; | 5668 | return error; |
@@ -5640,99 +5752,6 @@ e1000_init_rx_addrs(struct e1000_hw *hw) | |||
5640 | } | 5752 | } |
5641 | 5753 | ||
5642 | /****************************************************************************** | 5754 | /****************************************************************************** |
5643 | * Updates the MAC's list of multicast addresses. | ||
5644 | * | ||
5645 | * hw - Struct containing variables accessed by shared code | ||
5646 | * mc_addr_list - the list of new multicast addresses | ||
5647 | * mc_addr_count - number of addresses | ||
5648 | * pad - number of bytes between addresses in the list | ||
5649 | * rar_used_count - offset where to start adding mc addresses into the RAR's | ||
5650 | * | ||
5651 | * The given list replaces any existing list. Clears the last 15 receive | ||
5652 | * address registers and the multicast table. Uses receive address registers | ||
5653 | * for the first 15 multicast addresses, and hashes the rest into the | ||
5654 | * multicast table. | ||
5655 | *****************************************************************************/ | ||
5656 | #if 0 | ||
5657 | void | ||
5658 | e1000_mc_addr_list_update(struct e1000_hw *hw, | ||
5659 | uint8_t *mc_addr_list, | ||
5660 | uint32_t mc_addr_count, | ||
5661 | uint32_t pad, | ||
5662 | uint32_t rar_used_count) | ||
5663 | { | ||
5664 | uint32_t hash_value; | ||
5665 | uint32_t i; | ||
5666 | uint32_t num_rar_entry; | ||
5667 | uint32_t num_mta_entry; | ||
5668 | |||
5669 | DEBUGFUNC("e1000_mc_addr_list_update"); | ||
5670 | |||
5671 | /* Set the new number of MC addresses that we are being requested to use. */ | ||
5672 | hw->num_mc_addrs = mc_addr_count; | ||
5673 | |||
5674 | /* Clear RAR[1-15] */ | ||
5675 | DEBUGOUT(" Clearing RAR[1-15]\n"); | ||
5676 | num_rar_entry = E1000_RAR_ENTRIES; | ||
5677 | if (hw->mac_type == e1000_ich8lan) | ||
5678 | num_rar_entry = E1000_RAR_ENTRIES_ICH8LAN; | ||
5679 | /* Reserve a spot for the Locally Administered Address to work around | ||
5680 | * an 82571 issue in which a reset on one port will reload the MAC on | ||
5681 | * the other port. */ | ||
5682 | if ((hw->mac_type == e1000_82571) && (hw->laa_is_present == TRUE)) | ||
5683 | num_rar_entry -= 1; | ||
5684 | |||
5685 | for (i = rar_used_count; i < num_rar_entry; i++) { | ||
5686 | E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); | ||
5687 | E1000_WRITE_FLUSH(hw); | ||
5688 | E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); | ||
5689 | E1000_WRITE_FLUSH(hw); | ||
5690 | } | ||
5691 | |||
5692 | /* Clear the MTA */ | ||
5693 | DEBUGOUT(" Clearing MTA\n"); | ||
5694 | num_mta_entry = E1000_NUM_MTA_REGISTERS; | ||
5695 | if (hw->mac_type == e1000_ich8lan) | ||
5696 | num_mta_entry = E1000_NUM_MTA_REGISTERS_ICH8LAN; | ||
5697 | for (i = 0; i < num_mta_entry; i++) { | ||
5698 | E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); | ||
5699 | E1000_WRITE_FLUSH(hw); | ||
5700 | } | ||
5701 | |||
5702 | /* Add the new addresses */ | ||
5703 | for (i = 0; i < mc_addr_count; i++) { | ||
5704 | DEBUGOUT(" Adding the multicast addresses:\n"); | ||
5705 | DEBUGOUT7(" MC Addr #%d =%.2X %.2X %.2X %.2X %.2X %.2X\n", i, | ||
5706 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad)], | ||
5707 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad) + 1], | ||
5708 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad) + 2], | ||
5709 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad) + 3], | ||
5710 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad) + 4], | ||
5711 | mc_addr_list[i * (ETH_LENGTH_OF_ADDRESS + pad) + 5]); | ||
5712 | |||
5713 | hash_value = e1000_hash_mc_addr(hw, | ||
5714 | mc_addr_list + | ||
5715 | (i * (ETH_LENGTH_OF_ADDRESS + pad))); | ||
5716 | |||
5717 | DEBUGOUT1(" Hash value = 0x%03X\n", hash_value); | ||
5718 | |||
5719 | /* Place this multicast address in the RAR if there is room, * | ||
5720 | * else put it in the MTA | ||
5721 | */ | ||
5722 | if (rar_used_count < num_rar_entry) { | ||
5723 | e1000_rar_set(hw, | ||
5724 | mc_addr_list + (i * (ETH_LENGTH_OF_ADDRESS + pad)), | ||
5725 | rar_used_count); | ||
5726 | rar_used_count++; | ||
5727 | } else { | ||
5728 | e1000_mta_set(hw, hash_value); | ||
5729 | } | ||
5730 | } | ||
5731 | DEBUGOUT("MC Update Complete\n"); | ||
5732 | } | ||
5733 | #endif /* 0 */ | ||
5734 | |||
5735 | /****************************************************************************** | ||
5736 | * Hashes an address to determine its location in the multicast table | 5755 | * Hashes an address to determine its location in the multicast table |
5737 | * | 5756 | * |
5738 | * hw - Struct containing variables accessed by shared code | 5757 | * hw - Struct containing variables accessed by shared code |
@@ -6290,7 +6309,7 @@ e1000_led_off(struct e1000_hw *hw) | |||
6290 | * | 6309 | * |
6291 | * hw - Struct containing variables accessed by shared code | 6310 | * hw - Struct containing variables accessed by shared code |
6292 | *****************************************************************************/ | 6311 | *****************************************************************************/ |
6293 | void | 6312 | static void |
6294 | e1000_clear_hw_cntrs(struct e1000_hw *hw) | 6313 | e1000_clear_hw_cntrs(struct e1000_hw *hw) |
6295 | { | 6314 | { |
6296 | volatile uint32_t temp; | 6315 | volatile uint32_t temp; |
@@ -6539,6 +6558,8 @@ e1000_tbi_adjust_stats(struct e1000_hw *hw, | |||
6539 | void | 6558 | void |
6540 | e1000_get_bus_info(struct e1000_hw *hw) | 6559 | e1000_get_bus_info(struct e1000_hw *hw) |
6541 | { | 6560 | { |
6561 | int32_t ret_val; | ||
6562 | uint16_t pci_ex_link_status; | ||
6542 | uint32_t status; | 6563 | uint32_t status; |
6543 | 6564 | ||
6544 | switch (hw->mac_type) { | 6565 | switch (hw->mac_type) { |
@@ -6548,18 +6569,25 @@ e1000_get_bus_info(struct e1000_hw *hw) | |||
6548 | hw->bus_speed = e1000_bus_speed_unknown; | 6569 | hw->bus_speed = e1000_bus_speed_unknown; |
6549 | hw->bus_width = e1000_bus_width_unknown; | 6570 | hw->bus_width = e1000_bus_width_unknown; |
6550 | break; | 6571 | break; |
6572 | case e1000_82571: | ||
6551 | case e1000_82572: | 6573 | case e1000_82572: |
6552 | case e1000_82573: | 6574 | case e1000_82573: |
6575 | case e1000_80003es2lan: | ||
6553 | hw->bus_type = e1000_bus_type_pci_express; | 6576 | hw->bus_type = e1000_bus_type_pci_express; |
6554 | hw->bus_speed = e1000_bus_speed_2500; | 6577 | hw->bus_speed = e1000_bus_speed_2500; |
6555 | hw->bus_width = e1000_bus_width_pciex_1; | 6578 | ret_val = e1000_read_pcie_cap_reg(hw, |
6579 | PCI_EX_LINK_STATUS, | ||
6580 | &pci_ex_link_status); | ||
6581 | if (ret_val) | ||
6582 | hw->bus_width = e1000_bus_width_unknown; | ||
6583 | else | ||
6584 | hw->bus_width = (pci_ex_link_status & PCI_EX_LINK_WIDTH_MASK) >> | ||
6585 | PCI_EX_LINK_WIDTH_SHIFT; | ||
6556 | break; | 6586 | break; |
6557 | case e1000_82571: | ||
6558 | case e1000_ich8lan: | 6587 | case e1000_ich8lan: |
6559 | case e1000_80003es2lan: | ||
6560 | hw->bus_type = e1000_bus_type_pci_express; | 6588 | hw->bus_type = e1000_bus_type_pci_express; |
6561 | hw->bus_speed = e1000_bus_speed_2500; | 6589 | hw->bus_speed = e1000_bus_speed_2500; |
6562 | hw->bus_width = e1000_bus_width_pciex_4; | 6590 | hw->bus_width = e1000_bus_width_pciex_1; |
6563 | break; | 6591 | break; |
6564 | default: | 6592 | default: |
6565 | status = E1000_READ_REG(hw, STATUS); | 6593 | status = E1000_READ_REG(hw, STATUS); |
@@ -6593,25 +6621,6 @@ e1000_get_bus_info(struct e1000_hw *hw) | |||
6593 | break; | 6621 | break; |
6594 | } | 6622 | } |
6595 | } | 6623 | } |
6596 | /****************************************************************************** | ||
6597 | * Reads a value from one of the devices registers using port I/O (as opposed | ||
6598 | * memory mapped I/O). Only 82544 and newer devices support port I/O. | ||
6599 | * | ||
6600 | * hw - Struct containing variables accessed by shared code | ||
6601 | * offset - offset to read from | ||
6602 | *****************************************************************************/ | ||
6603 | #if 0 | ||
6604 | uint32_t | ||
6605 | e1000_read_reg_io(struct e1000_hw *hw, | ||
6606 | uint32_t offset) | ||
6607 | { | ||
6608 | unsigned long io_addr = hw->io_base; | ||
6609 | unsigned long io_data = hw->io_base + 4; | ||
6610 | |||
6611 | e1000_io_write(hw, io_addr, offset); | ||
6612 | return e1000_io_read(hw, io_data); | ||
6613 | } | ||
6614 | #endif /* 0 */ | ||
6615 | 6624 | ||
6616 | /****************************************************************************** | 6625 | /****************************************************************************** |
6617 | * Writes a value to one of the devices registers using port I/O (as opposed to | 6626 | * Writes a value to one of the devices registers using port I/O (as opposed to |
@@ -6633,7 +6642,6 @@ e1000_write_reg_io(struct e1000_hw *hw, | |||
6633 | e1000_io_write(hw, io_data, value); | 6642 | e1000_io_write(hw, io_data, value); |
6634 | } | 6643 | } |
6635 | 6644 | ||
6636 | |||
6637 | /****************************************************************************** | 6645 | /****************************************************************************** |
6638 | * Estimates the cable length. | 6646 | * Estimates the cable length. |
6639 | * | 6647 | * |
@@ -6842,7 +6850,7 @@ e1000_get_cable_length(struct e1000_hw *hw, | |||
6842 | *****************************************************************************/ | 6850 | *****************************************************************************/ |
6843 | static int32_t | 6851 | static int32_t |
6844 | e1000_check_polarity(struct e1000_hw *hw, | 6852 | e1000_check_polarity(struct e1000_hw *hw, |
6845 | uint16_t *polarity) | 6853 | e1000_rev_polarity *polarity) |
6846 | { | 6854 | { |
6847 | int32_t ret_val; | 6855 | int32_t ret_val; |
6848 | uint16_t phy_data; | 6856 | uint16_t phy_data; |
@@ -6856,8 +6864,10 @@ e1000_check_polarity(struct e1000_hw *hw, | |||
6856 | &phy_data); | 6864 | &phy_data); |
6857 | if (ret_val) | 6865 | if (ret_val) |
6858 | return ret_val; | 6866 | return ret_val; |
6859 | *polarity = (phy_data & M88E1000_PSSR_REV_POLARITY) >> | 6867 | *polarity = ((phy_data & M88E1000_PSSR_REV_POLARITY) >> |
6860 | M88E1000_PSSR_REV_POLARITY_SHIFT; | 6868 | M88E1000_PSSR_REV_POLARITY_SHIFT) ? |
6869 | e1000_rev_polarity_reversed : e1000_rev_polarity_normal; | ||
6870 | |||
6861 | } else if (hw->phy_type == e1000_phy_igp || | 6871 | } else if (hw->phy_type == e1000_phy_igp || |
6862 | hw->phy_type == e1000_phy_igp_3 || | 6872 | hw->phy_type == e1000_phy_igp_3 || |
6863 | hw->phy_type == e1000_phy_igp_2) { | 6873 | hw->phy_type == e1000_phy_igp_2) { |
@@ -6879,19 +6889,22 @@ e1000_check_polarity(struct e1000_hw *hw, | |||
6879 | return ret_val; | 6889 | return ret_val; |
6880 | 6890 | ||
6881 | /* Check the polarity bits */ | 6891 | /* Check the polarity bits */ |
6882 | *polarity = (phy_data & IGP01E1000_PHY_POLARITY_MASK) ? 1 : 0; | 6892 | *polarity = (phy_data & IGP01E1000_PHY_POLARITY_MASK) ? |
6893 | e1000_rev_polarity_reversed : e1000_rev_polarity_normal; | ||
6883 | } else { | 6894 | } else { |
6884 | /* For 10 Mbps, read the polarity bit in the status register. (for | 6895 | /* For 10 Mbps, read the polarity bit in the status register. (for |
6885 | * 100 Mbps this bit is always 0) */ | 6896 | * 100 Mbps this bit is always 0) */ |
6886 | *polarity = phy_data & IGP01E1000_PSSR_POLARITY_REVERSED; | 6897 | *polarity = (phy_data & IGP01E1000_PSSR_POLARITY_REVERSED) ? |
6898 | e1000_rev_polarity_reversed : e1000_rev_polarity_normal; | ||
6887 | } | 6899 | } |
6888 | } else if (hw->phy_type == e1000_phy_ife) { | 6900 | } else if (hw->phy_type == e1000_phy_ife) { |
6889 | ret_val = e1000_read_phy_reg(hw, IFE_PHY_EXTENDED_STATUS_CONTROL, | 6901 | ret_val = e1000_read_phy_reg(hw, IFE_PHY_EXTENDED_STATUS_CONTROL, |
6890 | &phy_data); | 6902 | &phy_data); |
6891 | if (ret_val) | 6903 | if (ret_val) |
6892 | return ret_val; | 6904 | return ret_val; |
6893 | *polarity = (phy_data & IFE_PESC_POLARITY_REVERSED) >> | 6905 | *polarity = ((phy_data & IFE_PESC_POLARITY_REVERSED) >> |
6894 | IFE_PESC_POLARITY_REVERSED_SHIFT; | 6906 | IFE_PESC_POLARITY_REVERSED_SHIFT) ? |
6907 | e1000_rev_polarity_reversed : e1000_rev_polarity_normal; | ||
6895 | } | 6908 | } |
6896 | return E1000_SUCCESS; | 6909 | return E1000_SUCCESS; |
6897 | } | 6910 | } |
@@ -7259,7 +7272,7 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw, | |||
7259 | } else if (hw->smart_speed == e1000_smart_speed_off) { | 7272 | } else if (hw->smart_speed == e1000_smart_speed_off) { |
7260 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, | 7273 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, |
7261 | &phy_data); | 7274 | &phy_data); |
7262 | if (ret_val) | 7275 | if (ret_val) |
7263 | return ret_val; | 7276 | return ret_val; |
7264 | 7277 | ||
7265 | phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; | 7278 | phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; |
@@ -7369,7 +7382,7 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw, | |||
7369 | } else if (hw->smart_speed == e1000_smart_speed_off) { | 7382 | } else if (hw->smart_speed == e1000_smart_speed_off) { |
7370 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, | 7383 | ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, |
7371 | &phy_data); | 7384 | &phy_data); |
7372 | if (ret_val) | 7385 | if (ret_val) |
7373 | return ret_val; | 7386 | return ret_val; |
7374 | 7387 | ||
7375 | phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; | 7388 | phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; |
@@ -7475,7 +7488,7 @@ e1000_set_vco_speed(struct e1000_hw *hw) | |||
7475 | * | 7488 | * |
7476 | * returns: - E1000_SUCCESS . | 7489 | * returns: - E1000_SUCCESS . |
7477 | ****************************************************************************/ | 7490 | ****************************************************************************/ |
7478 | int32_t | 7491 | static int32_t |
7479 | e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) | 7492 | e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer) |
7480 | { | 7493 | { |
7481 | uint8_t i; | 7494 | uint8_t i; |
@@ -7686,7 +7699,7 @@ e1000_check_mng_mode(struct e1000_hw *hw) | |||
7686 | ****************************************************************************/ | 7699 | ****************************************************************************/ |
7687 | int32_t | 7700 | int32_t |
7688 | e1000_mng_write_dhcp_info(struct e1000_hw * hw, uint8_t *buffer, | 7701 | e1000_mng_write_dhcp_info(struct e1000_hw * hw, uint8_t *buffer, |
7689 | uint16_t length) | 7702 | uint16_t length) |
7690 | { | 7703 | { |
7691 | int32_t ret_val; | 7704 | int32_t ret_val; |
7692 | struct e1000_host_mng_command_header hdr; | 7705 | struct e1000_host_mng_command_header hdr; |
@@ -7716,7 +7729,7 @@ e1000_mng_write_dhcp_info(struct e1000_hw * hw, uint8_t *buffer, | |||
7716 | * | 7729 | * |
7717 | * returns - checksum of buffer contents. | 7730 | * returns - checksum of buffer contents. |
7718 | ****************************************************************************/ | 7731 | ****************************************************************************/ |
7719 | uint8_t | 7732 | static uint8_t |
7720 | e1000_calculate_mng_checksum(char *buffer, uint32_t length) | 7733 | e1000_calculate_mng_checksum(char *buffer, uint32_t length) |
7721 | { | 7734 | { |
7722 | uint8_t sum = 0; | 7735 | uint8_t sum = 0; |
@@ -7914,32 +7927,6 @@ e1000_set_pci_express_master_disable(struct e1000_hw *hw) | |||
7914 | E1000_WRITE_REG(hw, CTRL, ctrl); | 7927 | E1000_WRITE_REG(hw, CTRL, ctrl); |
7915 | } | 7928 | } |
7916 | 7929 | ||
7917 | /*************************************************************************** | ||
7918 | * | ||
7919 | * Enables PCI-Express master access. | ||
7920 | * | ||
7921 | * hw: Struct containing variables accessed by shared code | ||
7922 | * | ||
7923 | * returns: - none. | ||
7924 | * | ||
7925 | ***************************************************************************/ | ||
7926 | #if 0 | ||
7927 | void | ||
7928 | e1000_enable_pciex_master(struct e1000_hw *hw) | ||
7929 | { | ||
7930 | uint32_t ctrl; | ||
7931 | |||
7932 | DEBUGFUNC("e1000_enable_pciex_master"); | ||
7933 | |||
7934 | if (hw->bus_type != e1000_bus_type_pci_express) | ||
7935 | return; | ||
7936 | |||
7937 | ctrl = E1000_READ_REG(hw, CTRL); | ||
7938 | ctrl &= ~E1000_CTRL_GIO_MASTER_DISABLE; | ||
7939 | E1000_WRITE_REG(hw, CTRL, ctrl); | ||
7940 | } | ||
7941 | #endif /* 0 */ | ||
7942 | |||
7943 | /******************************************************************************* | 7930 | /******************************************************************************* |
7944 | * | 7931 | * |
7945 | * Disables PCI-Express master access and verifies there are no pending requests | 7932 | * Disables PCI-Express master access and verifies there are no pending requests |
@@ -8063,7 +8050,6 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw) | |||
8063 | msleep(1); | 8050 | msleep(1); |
8064 | timeout--; | 8051 | timeout--; |
8065 | } | 8052 | } |
8066 | |||
8067 | if (!timeout) { | 8053 | if (!timeout) { |
8068 | DEBUGOUT("MNG configuration cycle has not completed.\n"); | 8054 | DEBUGOUT("MNG configuration cycle has not completed.\n"); |
8069 | return -E1000_ERR_RESET; | 8055 | return -E1000_ERR_RESET; |
@@ -8172,8 +8158,9 @@ e1000_get_software_semaphore(struct e1000_hw *hw) | |||
8172 | 8158 | ||
8173 | DEBUGFUNC("e1000_get_software_semaphore"); | 8159 | DEBUGFUNC("e1000_get_software_semaphore"); |
8174 | 8160 | ||
8175 | if (hw->mac_type != e1000_80003es2lan) | 8161 | if (hw->mac_type != e1000_80003es2lan) { |
8176 | return E1000_SUCCESS; | 8162 | return E1000_SUCCESS; |
8163 | } | ||
8177 | 8164 | ||
8178 | while (timeout) { | 8165 | while (timeout) { |
8179 | swsm = E1000_READ_REG(hw, SWSM); | 8166 | swsm = E1000_READ_REG(hw, SWSM); |
@@ -8206,8 +8193,9 @@ e1000_release_software_semaphore(struct e1000_hw *hw) | |||
8206 | 8193 | ||
8207 | DEBUGFUNC("e1000_release_software_semaphore"); | 8194 | DEBUGFUNC("e1000_release_software_semaphore"); |
8208 | 8195 | ||
8209 | if (hw->mac_type != e1000_80003es2lan) | 8196 | if (hw->mac_type != e1000_80003es2lan) { |
8210 | return; | 8197 | return; |
8198 | } | ||
8211 | 8199 | ||
8212 | swsm = E1000_READ_REG(hw, SWSM); | 8200 | swsm = E1000_READ_REG(hw, SWSM); |
8213 | /* Release the SW semaphores.*/ | 8201 | /* Release the SW semaphores.*/ |
@@ -8241,7 +8229,7 @@ e1000_check_phy_reset_block(struct e1000_hw *hw) | |||
8241 | if (hw->mac_type > e1000_82547_rev_2) | 8229 | if (hw->mac_type > e1000_82547_rev_2) |
8242 | manc = E1000_READ_REG(hw, MANC); | 8230 | manc = E1000_READ_REG(hw, MANC); |
8243 | return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ? | 8231 | return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ? |
8244 | E1000_BLK_PHY_RESET : E1000_SUCCESS; | 8232 | E1000_BLK_PHY_RESET : E1000_SUCCESS; |
8245 | } | 8233 | } |
8246 | 8234 | ||
8247 | static uint8_t | 8235 | static uint8_t |
@@ -8377,66 +8365,6 @@ e1000_release_software_flag(struct e1000_hw *hw) | |||
8377 | return; | 8365 | return; |
8378 | } | 8366 | } |
8379 | 8367 | ||
8380 | /*************************************************************************** | ||
8381 | * | ||
8382 | * Disable dynamic power down mode in ife PHY. | ||
8383 | * It can be used to workaround band-gap problem. | ||
8384 | * | ||
8385 | * hw: Struct containing variables accessed by shared code | ||
8386 | * | ||
8387 | ***************************************************************************/ | ||
8388 | #if 0 | ||
8389 | int32_t | ||
8390 | e1000_ife_disable_dynamic_power_down(struct e1000_hw *hw) | ||
8391 | { | ||
8392 | uint16_t phy_data; | ||
8393 | int32_t ret_val = E1000_SUCCESS; | ||
8394 | |||
8395 | DEBUGFUNC("e1000_ife_disable_dynamic_power_down"); | ||
8396 | |||
8397 | if (hw->phy_type == e1000_phy_ife) { | ||
8398 | ret_val = e1000_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data); | ||
8399 | if (ret_val) | ||
8400 | return ret_val; | ||
8401 | |||
8402 | phy_data |= IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN; | ||
8403 | ret_val = e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, phy_data); | ||
8404 | } | ||
8405 | |||
8406 | return ret_val; | ||
8407 | } | ||
8408 | #endif /* 0 */ | ||
8409 | |||
8410 | /*************************************************************************** | ||
8411 | * | ||
8412 | * Enable dynamic power down mode in ife PHY. | ||
8413 | * It can be used to workaround band-gap problem. | ||
8414 | * | ||
8415 | * hw: Struct containing variables accessed by shared code | ||
8416 | * | ||
8417 | ***************************************************************************/ | ||
8418 | #if 0 | ||
8419 | int32_t | ||
8420 | e1000_ife_enable_dynamic_power_down(struct e1000_hw *hw) | ||
8421 | { | ||
8422 | uint16_t phy_data; | ||
8423 | int32_t ret_val = E1000_SUCCESS; | ||
8424 | |||
8425 | DEBUGFUNC("e1000_ife_enable_dynamic_power_down"); | ||
8426 | |||
8427 | if (hw->phy_type == e1000_phy_ife) { | ||
8428 | ret_val = e1000_read_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, &phy_data); | ||
8429 | if (ret_val) | ||
8430 | return ret_val; | ||
8431 | |||
8432 | phy_data &= ~IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN; | ||
8433 | ret_val = e1000_write_phy_reg(hw, IFE_PHY_SPECIAL_CONTROL, phy_data); | ||
8434 | } | ||
8435 | |||
8436 | return ret_val; | ||
8437 | } | ||
8438 | #endif /* 0 */ | ||
8439 | |||
8440 | /****************************************************************************** | 8368 | /****************************************************************************** |
8441 | * Reads a 16 bit word or words from the EEPROM using the ICH8's flash access | 8369 | * Reads a 16 bit word or words from the EEPROM using the ICH8's flash access |
8442 | * register. | 8370 | * register. |
@@ -8832,20 +8760,22 @@ static int32_t | |||
8832 | e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte) | 8760 | e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte) |
8833 | { | 8761 | { |
8834 | int32_t error = E1000_SUCCESS; | 8762 | int32_t error = E1000_SUCCESS; |
8835 | int32_t program_retries; | 8763 | int32_t program_retries = 0; |
8836 | uint8_t temp_byte; | ||
8837 | 8764 | ||
8838 | e1000_write_ich8_byte(hw, index, byte); | 8765 | DEBUGOUT2("Byte := %2.2X Offset := %d\n", byte, index); |
8839 | udelay(100); | ||
8840 | 8766 | ||
8841 | for (program_retries = 0; program_retries < 100; program_retries++) { | 8767 | error = e1000_write_ich8_byte(hw, index, byte); |
8842 | e1000_read_ich8_byte(hw, index, &temp_byte); | 8768 | |
8843 | if (temp_byte == byte) | 8769 | if (error != E1000_SUCCESS) { |
8844 | break; | 8770 | for (program_retries = 0; program_retries < 100; program_retries++) { |
8845 | udelay(10); | 8771 | DEBUGOUT2("Retrying \t Byte := %2.2X Offset := %d\n", byte, index); |
8846 | e1000_write_ich8_byte(hw, index, byte); | 8772 | error = e1000_write_ich8_byte(hw, index, byte); |
8847 | udelay(100); | 8773 | udelay(100); |
8774 | if (error == E1000_SUCCESS) | ||
8775 | break; | ||
8776 | } | ||
8848 | } | 8777 | } |
8778 | |||
8849 | if (program_retries == 100) | 8779 | if (program_retries == 100) |
8850 | error = E1000_ERR_EEPROM; | 8780 | error = E1000_ERR_EEPROM; |
8851 | 8781 | ||
@@ -8886,39 +8816,27 @@ e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data) | |||
8886 | } | 8816 | } |
8887 | 8817 | ||
8888 | /****************************************************************************** | 8818 | /****************************************************************************** |
8889 | * Writes a word to the NVM using the ICH8 flash access registers. | 8819 | * Erases the bank specified. Each bank may be a 4, 8 or 64k block. Banks are 0 |
8820 | * based. | ||
8890 | * | 8821 | * |
8891 | * hw - pointer to e1000_hw structure | 8822 | * hw - pointer to e1000_hw structure |
8892 | * index - The starting byte index of the word to read. | 8823 | * bank - 0 for first bank, 1 for second bank |
8893 | * data - The word to write to the NVM. | ||
8894 | *****************************************************************************/ | ||
8895 | #if 0 | ||
8896 | int32_t | ||
8897 | e1000_write_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t data) | ||
8898 | { | ||
8899 | int32_t status = E1000_SUCCESS; | ||
8900 | status = e1000_write_ich8_data(hw, index, 2, data); | ||
8901 | return status; | ||
8902 | } | ||
8903 | #endif /* 0 */ | ||
8904 | |||
8905 | /****************************************************************************** | ||
8906 | * Erases the bank specified. Each bank is a 4k block. Segments are 0 based. | ||
8907 | * segment N is 4096 * N + flash_reg_addr. | ||
8908 | * | 8824 | * |
8909 | * hw - pointer to e1000_hw structure | 8825 | * Note that this function may actually erase as much as 8 or 64 KBytes. The |
8910 | * segment - 0 for first segment, 1 for second segment, etc. | 8826 | * amount of NVM used in each bank is a *minimum* of 4 KBytes, but in fact the |
8827 | * bank size may be 4, 8 or 64 KBytes | ||
8911 | *****************************************************************************/ | 8828 | *****************************************************************************/ |
8912 | static int32_t | 8829 | int32_t |
8913 | e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment) | 8830 | e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank) |
8914 | { | 8831 | { |
8915 | union ich8_hws_flash_status hsfsts; | 8832 | union ich8_hws_flash_status hsfsts; |
8916 | union ich8_hws_flash_ctrl hsflctl; | 8833 | union ich8_hws_flash_ctrl hsflctl; |
8917 | uint32_t flash_linear_address; | 8834 | uint32_t flash_linear_address; |
8918 | int32_t count = 0; | 8835 | int32_t count = 0; |
8919 | int32_t error = E1000_ERR_EEPROM; | 8836 | int32_t error = E1000_ERR_EEPROM; |
8920 | int32_t iteration, seg_size; | 8837 | int32_t iteration; |
8921 | int32_t sector_size; | 8838 | int32_t sub_sector_size = 0; |
8839 | int32_t bank_size; | ||
8922 | int32_t j = 0; | 8840 | int32_t j = 0; |
8923 | int32_t error_flag = 0; | 8841 | int32_t error_flag = 0; |
8924 | 8842 | ||
@@ -8927,22 +8845,27 @@ e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment) | |||
8927 | /* Determine HW Sector size: Read BERASE bits of Hw flash Status register */ | 8845 | /* Determine HW Sector size: Read BERASE bits of Hw flash Status register */ |
8928 | /* 00: The Hw sector is 256 bytes, hence we need to erase 16 | 8846 | /* 00: The Hw sector is 256 bytes, hence we need to erase 16 |
8929 | * consecutive sectors. The start index for the nth Hw sector can be | 8847 | * consecutive sectors. The start index for the nth Hw sector can be |
8930 | * calculated as = segment * 4096 + n * 256 | 8848 | * calculated as bank * 4096 + n * 256 |
8931 | * 01: The Hw sector is 4K bytes, hence we need to erase 1 sector. | 8849 | * 01: The Hw sector is 4K bytes, hence we need to erase 1 sector. |
8932 | * The start index for the nth Hw sector can be calculated | 8850 | * The start index for the nth Hw sector can be calculated |
8933 | * as = segment * 4096 | 8851 | * as bank * 4096 |
8934 | * 10: Error condition | 8852 | * 10: The HW sector is 8K bytes |
8935 | * 11: The Hw sector size is much bigger than the size asked to | 8853 | * 11: The Hw sector size is 64K bytes */ |
8936 | * erase...error condition */ | ||
8937 | if (hsfsts.hsf_status.berasesz == 0x0) { | 8854 | if (hsfsts.hsf_status.berasesz == 0x0) { |
8938 | /* Hw sector size 256 */ | 8855 | /* Hw sector size 256 */ |
8939 | sector_size = seg_size = ICH8_FLASH_SEG_SIZE_256; | 8856 | sub_sector_size = ICH8_FLASH_SEG_SIZE_256; |
8857 | bank_size = ICH8_FLASH_SECTOR_SIZE; | ||
8940 | iteration = ICH8_FLASH_SECTOR_SIZE / ICH8_FLASH_SEG_SIZE_256; | 8858 | iteration = ICH8_FLASH_SECTOR_SIZE / ICH8_FLASH_SEG_SIZE_256; |
8941 | } else if (hsfsts.hsf_status.berasesz == 0x1) { | 8859 | } else if (hsfsts.hsf_status.berasesz == 0x1) { |
8942 | sector_size = seg_size = ICH8_FLASH_SEG_SIZE_4K; | 8860 | bank_size = ICH8_FLASH_SEG_SIZE_4K; |
8861 | iteration = 1; | ||
8862 | } else if (hw->mac_type != e1000_ich8lan && | ||
8863 | hsfsts.hsf_status.berasesz == 0x2) { | ||
8864 | /* 8K erase size invalid for ICH8 - added in for ICH9 */ | ||
8865 | bank_size = ICH9_FLASH_SEG_SIZE_8K; | ||
8943 | iteration = 1; | 8866 | iteration = 1; |
8944 | } else if (hsfsts.hsf_status.berasesz == 0x3) { | 8867 | } else if (hsfsts.hsf_status.berasesz == 0x3) { |
8945 | sector_size = seg_size = ICH8_FLASH_SEG_SIZE_64K; | 8868 | bank_size = ICH8_FLASH_SEG_SIZE_64K; |
8946 | iteration = 1; | 8869 | iteration = 1; |
8947 | } else { | 8870 | } else { |
8948 | return error; | 8871 | return error; |
@@ -8966,16 +8889,15 @@ e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment) | |||
8966 | 8889 | ||
8967 | /* Write the last 24 bits of an index within the block into Flash | 8890 | /* Write the last 24 bits of an index within the block into Flash |
8968 | * Linear address field in Flash Address. This probably needs to | 8891 | * Linear address field in Flash Address. This probably needs to |
8969 | * be calculated here based off the on-chip segment size and the | 8892 | * be calculated here based off the on-chip erase sector size and |
8970 | * software segment size assumed (4K) */ | 8893 | * the software bank size (4, 8 or 64 KBytes) */ |
8971 | /* TBD */ | 8894 | flash_linear_address = bank * bank_size + j * sub_sector_size; |
8972 | flash_linear_address = segment * sector_size + j * seg_size; | ||
8973 | flash_linear_address &= ICH8_FLASH_LINEAR_ADDR_MASK; | ||
8974 | flash_linear_address += hw->flash_base_addr; | 8895 | flash_linear_address += hw->flash_base_addr; |
8896 | flash_linear_address &= ICH8_FLASH_LINEAR_ADDR_MASK; | ||
8975 | 8897 | ||
8976 | E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FADDR, flash_linear_address); | 8898 | E1000_WRITE_ICH8_REG(hw, ICH8_FLASH_FADDR, flash_linear_address); |
8977 | 8899 | ||
8978 | error = e1000_ich8_flash_cycle(hw, 1000000); | 8900 | error = e1000_ich8_flash_cycle(hw, ICH8_FLASH_ERASE_TIMEOUT); |
8979 | /* Check if FCERR is set to 1. If 1, clear it and try the whole | 8901 | /* Check if FCERR is set to 1. If 1, clear it and try the whole |
8980 | * sequence a few more times else Done */ | 8902 | * sequence a few more times else Done */ |
8981 | if (error == E1000_SUCCESS) { | 8903 | if (error == E1000_SUCCESS) { |
@@ -8999,44 +8921,6 @@ e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t segment) | |||
8999 | return error; | 8921 | return error; |
9000 | } | 8922 | } |
9001 | 8923 | ||
9002 | /****************************************************************************** | ||
9003 | * | ||
9004 | * Reverse duplex setting without breaking the link. | ||
9005 | * | ||
9006 | * hw: Struct containing variables accessed by shared code | ||
9007 | * | ||
9008 | *****************************************************************************/ | ||
9009 | #if 0 | ||
9010 | int32_t | ||
9011 | e1000_duplex_reversal(struct e1000_hw *hw) | ||
9012 | { | ||
9013 | int32_t ret_val; | ||
9014 | uint16_t phy_data; | ||
9015 | |||
9016 | if (hw->phy_type != e1000_phy_igp_3) | ||
9017 | return E1000_SUCCESS; | ||
9018 | |||
9019 | ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); | ||
9020 | if (ret_val) | ||
9021 | return ret_val; | ||
9022 | |||
9023 | phy_data ^= MII_CR_FULL_DUPLEX; | ||
9024 | |||
9025 | ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data); | ||
9026 | if (ret_val) | ||
9027 | return ret_val; | ||
9028 | |||
9029 | ret_val = e1000_read_phy_reg(hw, IGP3E1000_PHY_MISC_CTRL, &phy_data); | ||
9030 | if (ret_val) | ||
9031 | return ret_val; | ||
9032 | |||
9033 | phy_data |= IGP3_PHY_MISC_DUPLEX_MANUAL_SET; | ||
9034 | ret_val = e1000_write_phy_reg(hw, IGP3E1000_PHY_MISC_CTRL, phy_data); | ||
9035 | |||
9036 | return ret_val; | ||
9037 | } | ||
9038 | #endif /* 0 */ | ||
9039 | |||
9040 | static int32_t | 8924 | static int32_t |
9041 | e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, | 8925 | e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, |
9042 | uint32_t cnf_base_addr, uint32_t cnf_size) | 8926 | uint32_t cnf_base_addr, uint32_t cnf_size) |
@@ -9071,6 +8955,14 @@ e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, | |||
9071 | } | 8955 | } |
9072 | 8956 | ||
9073 | 8957 | ||
8958 | /****************************************************************************** | ||
8959 | * This function initializes the PHY from the NVM on ICH8 platforms. This | ||
8960 | * is needed due to an issue where the NVM configuration is not properly | ||
8961 | * autoloaded after power transitions. Therefore, after each PHY reset, we | ||
8962 | * will load the configuration data out of the NVM manually. | ||
8963 | * | ||
8964 | * hw: Struct containing variables accessed by shared code | ||
8965 | *****************************************************************************/ | ||
9074 | static int32_t | 8966 | static int32_t |
9075 | e1000_init_lcd_from_nvm(struct e1000_hw *hw) | 8967 | e1000_init_lcd_from_nvm(struct e1000_hw *hw) |
9076 | { | 8968 | { |
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index 4020acb55005..112447fd8bf2 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -93,11 +92,11 @@ typedef enum { | |||
93 | 92 | ||
94 | /* Flow Control Settings */ | 93 | /* Flow Control Settings */ |
95 | typedef enum { | 94 | typedef enum { |
96 | e1000_fc_none = 0, | 95 | E1000_FC_NONE = 0, |
97 | e1000_fc_rx_pause = 1, | 96 | E1000_FC_RX_PAUSE = 1, |
98 | e1000_fc_tx_pause = 2, | 97 | E1000_FC_TX_PAUSE = 2, |
99 | e1000_fc_full = 3, | 98 | E1000_FC_FULL = 3, |
100 | e1000_fc_default = 0xFF | 99 | E1000_FC_DEFAULT = 0xFF |
101 | } e1000_fc_type; | 100 | } e1000_fc_type; |
102 | 101 | ||
103 | struct e1000_shadow_ram { | 102 | struct e1000_shadow_ram { |
@@ -302,6 +301,9 @@ typedef enum { | |||
302 | #define E1000_BLK_PHY_RESET 12 | 301 | #define E1000_BLK_PHY_RESET 12 |
303 | #define E1000_ERR_SWFW_SYNC 13 | 302 | #define E1000_ERR_SWFW_SYNC 13 |
304 | 303 | ||
304 | #define E1000_BYTE_SWAP_WORD(_value) ((((_value) & 0x00ff) << 8) | \ | ||
305 | (((_value) & 0xff00) >> 8)) | ||
306 | |||
305 | /* Function prototypes */ | 307 | /* Function prototypes */ |
306 | /* Initialization */ | 308 | /* Initialization */ |
307 | int32_t e1000_reset_hw(struct e1000_hw *hw); | 309 | int32_t e1000_reset_hw(struct e1000_hw *hw); |
@@ -314,7 +316,7 @@ int32_t e1000_setup_link(struct e1000_hw *hw); | |||
314 | int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw); | 316 | int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw); |
315 | void e1000_config_collision_dist(struct e1000_hw *hw); | 317 | void e1000_config_collision_dist(struct e1000_hw *hw); |
316 | int32_t e1000_check_for_link(struct e1000_hw *hw); | 318 | int32_t e1000_check_for_link(struct e1000_hw *hw); |
317 | int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t * speed, uint16_t * duplex); | 319 | int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed, uint16_t *duplex); |
318 | int32_t e1000_force_mac_fc(struct e1000_hw *hw); | 320 | int32_t e1000_force_mac_fc(struct e1000_hw *hw); |
319 | 321 | ||
320 | /* PHY */ | 322 | /* PHY */ |
@@ -322,9 +324,9 @@ int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy | |||
322 | int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data); | 324 | int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data); |
323 | int32_t e1000_phy_hw_reset(struct e1000_hw *hw); | 325 | int32_t e1000_phy_hw_reset(struct e1000_hw *hw); |
324 | int32_t e1000_phy_reset(struct e1000_hw *hw); | 326 | int32_t e1000_phy_reset(struct e1000_hw *hw); |
325 | void e1000_phy_powerdown_workaround(struct e1000_hw *hw); | ||
326 | int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); | 327 | int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info); |
327 | int32_t e1000_validate_mdi_setting(struct e1000_hw *hw); | 328 | int32_t e1000_validate_mdi_setting(struct e1000_hw *hw); |
329 | void e1000_phy_powerdown_workaround(struct e1000_hw *hw); | ||
328 | 330 | ||
329 | /* EEPROM Functions */ | 331 | /* EEPROM Functions */ |
330 | int32_t e1000_init_eeprom_params(struct e1000_hw *hw); | 332 | int32_t e1000_init_eeprom_params(struct e1000_hw *hw); |
@@ -393,7 +395,6 @@ int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uin | |||
393 | int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw); | 395 | int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw); |
394 | int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw); | 396 | int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw); |
395 | int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data); | 397 | int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data); |
396 | int32_t e1000_read_part_num(struct e1000_hw *hw, uint32_t * part_num); | ||
397 | int32_t e1000_read_mac_addr(struct e1000_hw * hw); | 398 | int32_t e1000_read_mac_addr(struct e1000_hw * hw); |
398 | 399 | ||
399 | /* Filters (multicast, vlan, receive) */ | 400 | /* Filters (multicast, vlan, receive) */ |
@@ -420,6 +421,7 @@ void e1000_pci_set_mwi(struct e1000_hw *hw); | |||
420 | void e1000_pci_clear_mwi(struct e1000_hw *hw); | 421 | void e1000_pci_clear_mwi(struct e1000_hw *hw); |
421 | void e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value); | 422 | void e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value); |
422 | void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value); | 423 | void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value); |
424 | int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value); | ||
423 | /* Port I/O is only supported on 82544 and newer */ | 425 | /* Port I/O is only supported on 82544 and newer */ |
424 | void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value); | 426 | void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value); |
425 | int32_t e1000_disable_pciex_master(struct e1000_hw *hw); | 427 | int32_t e1000_disable_pciex_master(struct e1000_hw *hw); |
@@ -574,10 +576,10 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw); | |||
574 | * E1000_RAR_ENTRIES - 1 multicast addresses. | 576 | * E1000_RAR_ENTRIES - 1 multicast addresses. |
575 | */ | 577 | */ |
576 | #define E1000_RAR_ENTRIES 15 | 578 | #define E1000_RAR_ENTRIES 15 |
577 | #define E1000_RAR_ENTRIES_ICH8LAN 7 | 579 | #define E1000_RAR_ENTRIES_ICH8LAN 6 |
578 | 580 | ||
579 | #define MIN_NUMBER_OF_DESCRIPTORS 8 | 581 | #define MIN_NUMBER_OF_DESCRIPTORS 8 |
580 | #define MAX_NUMBER_OF_DESCRIPTORS 0xFFF8 | 582 | #define MAX_NUMBER_OF_DESCRIPTORS 0xFFF8 |
581 | 583 | ||
582 | /* Receive Descriptor */ | 584 | /* Receive Descriptor */ |
583 | struct e1000_rx_desc { | 585 | struct e1000_rx_desc { |
@@ -1300,6 +1302,7 @@ struct e1000_hw_stats { | |||
1300 | uint64_t algnerrc; | 1302 | uint64_t algnerrc; |
1301 | uint64_t symerrs; | 1303 | uint64_t symerrs; |
1302 | uint64_t rxerrc; | 1304 | uint64_t rxerrc; |
1305 | uint64_t txerrc; | ||
1303 | uint64_t mpc; | 1306 | uint64_t mpc; |
1304 | uint64_t scc; | 1307 | uint64_t scc; |
1305 | uint64_t ecol; | 1308 | uint64_t ecol; |
@@ -1332,8 +1335,9 @@ struct e1000_hw_stats { | |||
1332 | uint64_t gotch; | 1335 | uint64_t gotch; |
1333 | uint64_t rnbc; | 1336 | uint64_t rnbc; |
1334 | uint64_t ruc; | 1337 | uint64_t ruc; |
1335 | uint64_t rfc; | ||
1336 | uint64_t roc; | 1338 | uint64_t roc; |
1339 | uint64_t rlerrc; | ||
1340 | uint64_t rfc; | ||
1337 | uint64_t rjc; | 1341 | uint64_t rjc; |
1338 | uint64_t mgprc; | 1342 | uint64_t mgprc; |
1339 | uint64_t mgpdc; | 1343 | uint64_t mgpdc; |
@@ -1440,6 +1444,7 @@ struct e1000_hw { | |||
1440 | boolean_t tbi_compatibility_on; | 1444 | boolean_t tbi_compatibility_on; |
1441 | boolean_t laa_is_present; | 1445 | boolean_t laa_is_present; |
1442 | boolean_t phy_reset_disable; | 1446 | boolean_t phy_reset_disable; |
1447 | boolean_t initialize_hw_bits_disable; | ||
1443 | boolean_t fc_send_xon; | 1448 | boolean_t fc_send_xon; |
1444 | boolean_t fc_strict_ieee; | 1449 | boolean_t fc_strict_ieee; |
1445 | boolean_t report_tx_early; | 1450 | boolean_t report_tx_early; |
@@ -1613,16 +1618,17 @@ struct e1000_hw { | |||
1613 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 1618 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
1614 | #define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 | 1619 | #define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000 |
1615 | #define E1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000 | 1620 | #define E1000_CTRL_EXT_LINK_MODE_TBI 0x00C00000 |
1616 | #define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000 | 1621 | #define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000 |
1617 | #define E1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000 | 1622 | #define E1000_CTRL_EXT_LINK_MODE_SERDES 0x00C00000 |
1623 | #define E1000_CTRL_EXT_LINK_MODE_SGMII 0x00800000 | ||
1618 | #define E1000_CTRL_EXT_WR_WMARK_MASK 0x03000000 | 1624 | #define E1000_CTRL_EXT_WR_WMARK_MASK 0x03000000 |
1619 | #define E1000_CTRL_EXT_WR_WMARK_256 0x00000000 | 1625 | #define E1000_CTRL_EXT_WR_WMARK_256 0x00000000 |
1620 | #define E1000_CTRL_EXT_WR_WMARK_320 0x01000000 | 1626 | #define E1000_CTRL_EXT_WR_WMARK_320 0x01000000 |
1621 | #define E1000_CTRL_EXT_WR_WMARK_384 0x02000000 | 1627 | #define E1000_CTRL_EXT_WR_WMARK_384 0x02000000 |
1622 | #define E1000_CTRL_EXT_WR_WMARK_448 0x03000000 | 1628 | #define E1000_CTRL_EXT_WR_WMARK_448 0x03000000 |
1623 | #define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ | 1629 | #define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ |
1624 | #define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ | 1630 | #define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */ |
1625 | #define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ | 1631 | #define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */ |
1626 | #define E1000_CRTL_EXT_PB_PAREN 0x01000000 /* packet buffer parity error detection enabled */ | 1632 | #define E1000_CRTL_EXT_PB_PAREN 0x01000000 /* packet buffer parity error detection enabled */ |
1627 | #define E1000_CTRL_EXT_DF_PAREN 0x02000000 /* descriptor FIFO parity error detection enable */ | 1633 | #define E1000_CTRL_EXT_DF_PAREN 0x02000000 /* descriptor FIFO parity error detection enable */ |
1628 | #define E1000_CTRL_EXT_GHOST_PAREN 0x40000000 | 1634 | #define E1000_CTRL_EXT_GHOST_PAREN 0x40000000 |
@@ -2218,6 +2224,11 @@ struct e1000_host_command_info { | |||
2218 | #define E1000_FACTPS_LAN_FUNC_SEL 0x40000000 | 2224 | #define E1000_FACTPS_LAN_FUNC_SEL 0x40000000 |
2219 | #define E1000_FACTPS_PM_STATE_CHANGED 0x80000000 | 2225 | #define E1000_FACTPS_PM_STATE_CHANGED 0x80000000 |
2220 | 2226 | ||
2227 | /* PCI-Ex Config Space */ | ||
2228 | #define PCI_EX_LINK_STATUS 0x12 | ||
2229 | #define PCI_EX_LINK_WIDTH_MASK 0x3F0 | ||
2230 | #define PCI_EX_LINK_WIDTH_SHIFT 4 | ||
2231 | |||
2221 | /* EEPROM Commands - Microwire */ | 2232 | /* EEPROM Commands - Microwire */ |
2222 | #define EEPROM_READ_OPCODE_MICROWIRE 0x6 /* EEPROM read opcode */ | 2233 | #define EEPROM_READ_OPCODE_MICROWIRE 0x6 /* EEPROM read opcode */ |
2223 | #define EEPROM_WRITE_OPCODE_MICROWIRE 0x5 /* EEPROM write opcode */ | 2234 | #define EEPROM_WRITE_OPCODE_MICROWIRE 0x5 /* EEPROM write opcode */ |
@@ -3120,6 +3131,7 @@ struct e1000_host_command_info { | |||
3120 | /* I = Integrated | 3131 | /* I = Integrated |
3121 | * E = External | 3132 | * E = External |
3122 | */ | 3133 | */ |
3134 | #define M88_VENDOR 0x0141 | ||
3123 | #define M88E1000_E_PHY_ID 0x01410C50 | 3135 | #define M88E1000_E_PHY_ID 0x01410C50 |
3124 | #define M88E1000_I_PHY_ID 0x01410C30 | 3136 | #define M88E1000_I_PHY_ID 0x01410C30 |
3125 | #define M88E1011_I_PHY_ID 0x01410C20 | 3137 | #define M88E1011_I_PHY_ID 0x01410C20 |
@@ -3244,10 +3256,12 @@ struct e1000_host_command_info { | |||
3244 | #define IFE_PSCL_PROBE_LEDS_OFF 0x0006 /* Force LEDs 0 and 2 off */ | 3256 | #define IFE_PSCL_PROBE_LEDS_OFF 0x0006 /* Force LEDs 0 and 2 off */ |
3245 | #define IFE_PSCL_PROBE_LEDS_ON 0x0007 /* Force LEDs 0 and 2 on */ | 3257 | #define IFE_PSCL_PROBE_LEDS_ON 0x0007 /* Force LEDs 0 and 2 on */ |
3246 | 3258 | ||
3247 | #define ICH8_FLASH_COMMAND_TIMEOUT 500 /* 500 ms , should be adjusted */ | 3259 | #define ICH8_FLASH_COMMAND_TIMEOUT 5000 /* 5000 uSecs - adjusted */ |
3248 | #define ICH8_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles , should be adjusted */ | 3260 | #define ICH8_FLASH_ERASE_TIMEOUT 3000000 /* Up to 3 seconds - worst case */ |
3261 | #define ICH8_FLASH_CYCLE_REPEAT_COUNT 10 /* 10 cycles */ | ||
3249 | #define ICH8_FLASH_SEG_SIZE_256 256 | 3262 | #define ICH8_FLASH_SEG_SIZE_256 256 |
3250 | #define ICH8_FLASH_SEG_SIZE_4K 4096 | 3263 | #define ICH8_FLASH_SEG_SIZE_4K 4096 |
3264 | #define ICH9_FLASH_SEG_SIZE_8K 8192 | ||
3251 | #define ICH8_FLASH_SEG_SIZE_64K 65536 | 3265 | #define ICH8_FLASH_SEG_SIZE_64K 65536 |
3252 | 3266 | ||
3253 | #define ICH8_CYCLE_READ 0x0 | 3267 | #define ICH8_CYCLE_READ 0x0 |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 3f6a752700a1..7dca38fba6a1 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -36,7 +35,7 @@ static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | |||
36 | #else | 35 | #else |
37 | #define DRIVERNAPI "-NAPI" | 36 | #define DRIVERNAPI "-NAPI" |
38 | #endif | 37 | #endif |
39 | #define DRV_VERSION "7.2.7-k2"DRIVERNAPI | 38 | #define DRV_VERSION "7.2.9-k2"DRIVERNAPI |
40 | char e1000_driver_version[] = DRV_VERSION; | 39 | char e1000_driver_version[] = DRV_VERSION; |
41 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | 40 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
42 | 41 | ||
@@ -110,16 +109,24 @@ static struct pci_device_id e1000_pci_tbl[] = { | |||
110 | 109 | ||
111 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | 110 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); |
112 | 111 | ||
112 | int e1000_up(struct e1000_adapter *adapter); | ||
113 | void e1000_down(struct e1000_adapter *adapter); | ||
114 | void e1000_reinit_locked(struct e1000_adapter *adapter); | ||
115 | void e1000_reset(struct e1000_adapter *adapter); | ||
116 | int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); | ||
117 | int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); | ||
118 | int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); | ||
119 | void e1000_free_all_tx_resources(struct e1000_adapter *adapter); | ||
120 | void e1000_free_all_rx_resources(struct e1000_adapter *adapter); | ||
113 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, | 121 | static int e1000_setup_tx_resources(struct e1000_adapter *adapter, |
114 | struct e1000_tx_ring *txdr); | 122 | struct e1000_tx_ring *txdr); |
115 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, | 123 | static int e1000_setup_rx_resources(struct e1000_adapter *adapter, |
116 | struct e1000_rx_ring *rxdr); | 124 | struct e1000_rx_ring *rxdr); |
117 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, | 125 | static void e1000_free_tx_resources(struct e1000_adapter *adapter, |
118 | struct e1000_tx_ring *tx_ring); | 126 | struct e1000_tx_ring *tx_ring); |
119 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, | 127 | static void e1000_free_rx_resources(struct e1000_adapter *adapter, |
120 | struct e1000_rx_ring *rx_ring); | 128 | struct e1000_rx_ring *rx_ring); |
121 | 129 | void e1000_update_stats(struct e1000_adapter *adapter); | |
122 | /* Local Function Prototypes */ | ||
123 | 130 | ||
124 | static int e1000_init_module(void); | 131 | static int e1000_init_module(void); |
125 | static void e1000_exit_module(void); | 132 | static void e1000_exit_module(void); |
@@ -172,6 +179,7 @@ static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, | |||
172 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); | 179 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
173 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | 180 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, |
174 | int cmd); | 181 | int cmd); |
182 | void e1000_set_ethtool_ops(struct net_device *netdev); | ||
175 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); | 183 | static void e1000_enter_82542_rst(struct e1000_adapter *adapter); |
176 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); | 184 | static void e1000_leave_82542_rst(struct e1000_adapter *adapter); |
177 | static void e1000_tx_timeout(struct net_device *dev); | 185 | static void e1000_tx_timeout(struct net_device *dev); |
@@ -196,6 +204,8 @@ static void e1000_shutdown(struct pci_dev *pdev); | |||
196 | static void e1000_netpoll (struct net_device *netdev); | 204 | static void e1000_netpoll (struct net_device *netdev); |
197 | #endif | 205 | #endif |
198 | 206 | ||
207 | extern void e1000_check_options(struct e1000_adapter *adapter); | ||
208 | |||
199 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, | 209 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, |
200 | pci_channel_state_t state); | 210 | pci_channel_state_t state); |
201 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); | 211 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); |
@@ -212,9 +222,9 @@ static struct pci_driver e1000_driver = { | |||
212 | .id_table = e1000_pci_tbl, | 222 | .id_table = e1000_pci_tbl, |
213 | .probe = e1000_probe, | 223 | .probe = e1000_probe, |
214 | .remove = __devexit_p(e1000_remove), | 224 | .remove = __devexit_p(e1000_remove), |
225 | #ifdef CONFIG_PM | ||
215 | /* Power Managment Hooks */ | 226 | /* Power Managment Hooks */ |
216 | .suspend = e1000_suspend, | 227 | .suspend = e1000_suspend, |
217 | #ifdef CONFIG_PM | ||
218 | .resume = e1000_resume, | 228 | .resume = e1000_resume, |
219 | #endif | 229 | #endif |
220 | .shutdown = e1000_shutdown, | 230 | .shutdown = e1000_shutdown, |
@@ -466,13 +476,14 @@ e1000_up(struct e1000_adapter *adapter) | |||
466 | 476 | ||
467 | adapter->tx_queue_len = netdev->tx_queue_len; | 477 | adapter->tx_queue_len = netdev->tx_queue_len; |
468 | 478 | ||
469 | mod_timer(&adapter->watchdog_timer, jiffies); | ||
470 | |||
471 | #ifdef CONFIG_E1000_NAPI | 479 | #ifdef CONFIG_E1000_NAPI |
472 | netif_poll_enable(netdev); | 480 | netif_poll_enable(netdev); |
473 | #endif | 481 | #endif |
474 | e1000_irq_enable(adapter); | 482 | e1000_irq_enable(adapter); |
475 | 483 | ||
484 | clear_bit(__E1000_DOWN, &adapter->flags); | ||
485 | |||
486 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | ||
476 | return 0; | 487 | return 0; |
477 | } | 488 | } |
478 | 489 | ||
@@ -502,25 +513,48 @@ void e1000_power_up_phy(struct e1000_adapter *adapter) | |||
502 | 513 | ||
503 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | 514 | static void e1000_power_down_phy(struct e1000_adapter *adapter) |
504 | { | 515 | { |
505 | boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) && | 516 | /* Power down the PHY so no link is implied when interface is down * |
506 | e1000_check_mng_mode(&adapter->hw); | 517 | * The PHY cannot be powered down if any of the following is TRUE * |
507 | /* Power down the PHY so no link is implied when interface is down | ||
508 | * The PHY cannot be powered down if any of the following is TRUE | ||
509 | * (a) WoL is enabled | 518 | * (a) WoL is enabled |
510 | * (b) AMT is active | 519 | * (b) AMT is active |
511 | * (c) SoL/IDER session is active */ | 520 | * (c) SoL/IDER session is active */ |
512 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && | 521 | if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && |
513 | adapter->hw.mac_type != e1000_ich8lan && | 522 | adapter->hw.media_type == e1000_media_type_copper) { |
514 | adapter->hw.media_type == e1000_media_type_copper && | ||
515 | !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) && | ||
516 | !mng_mode_enabled && | ||
517 | !e1000_check_phy_reset_block(&adapter->hw)) { | ||
518 | uint16_t mii_reg = 0; | 523 | uint16_t mii_reg = 0; |
524 | |||
525 | switch (adapter->hw.mac_type) { | ||
526 | case e1000_82540: | ||
527 | case e1000_82545: | ||
528 | case e1000_82545_rev_3: | ||
529 | case e1000_82546: | ||
530 | case e1000_82546_rev_3: | ||
531 | case e1000_82541: | ||
532 | case e1000_82541_rev_2: | ||
533 | case e1000_82547: | ||
534 | case e1000_82547_rev_2: | ||
535 | if (E1000_READ_REG(&adapter->hw, MANC) & | ||
536 | E1000_MANC_SMBUS_EN) | ||
537 | goto out; | ||
538 | break; | ||
539 | case e1000_82571: | ||
540 | case e1000_82572: | ||
541 | case e1000_82573: | ||
542 | case e1000_80003es2lan: | ||
543 | case e1000_ich8lan: | ||
544 | if (e1000_check_mng_mode(&adapter->hw) || | ||
545 | e1000_check_phy_reset_block(&adapter->hw)) | ||
546 | goto out; | ||
547 | break; | ||
548 | default: | ||
549 | goto out; | ||
550 | } | ||
519 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); | 551 | e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); |
520 | mii_reg |= MII_CR_POWER_DOWN; | 552 | mii_reg |= MII_CR_POWER_DOWN; |
521 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); | 553 | e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); |
522 | mdelay(1); | 554 | mdelay(1); |
523 | } | 555 | } |
556 | out: | ||
557 | return; | ||
524 | } | 558 | } |
525 | 559 | ||
526 | void | 560 | void |
@@ -528,6 +562,10 @@ e1000_down(struct e1000_adapter *adapter) | |||
528 | { | 562 | { |
529 | struct net_device *netdev = adapter->netdev; | 563 | struct net_device *netdev = adapter->netdev; |
530 | 564 | ||
565 | /* signal that we're down so the interrupt handler does not | ||
566 | * reschedule our watchdog timer */ | ||
567 | set_bit(__E1000_DOWN, &adapter->flags); | ||
568 | |||
531 | e1000_irq_disable(adapter); | 569 | e1000_irq_disable(adapter); |
532 | 570 | ||
533 | del_timer_sync(&adapter->tx_fifo_stall_timer); | 571 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
@@ -563,6 +601,9 @@ void | |||
563 | e1000_reset(struct e1000_adapter *adapter) | 601 | e1000_reset(struct e1000_adapter *adapter) |
564 | { | 602 | { |
565 | uint32_t pba, manc; | 603 | uint32_t pba, manc; |
604 | #ifdef DISABLE_MULR | ||
605 | uint32_t tctl; | ||
606 | #endif | ||
566 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; | 607 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
567 | 608 | ||
568 | /* Repartition Pba for greater than 9k mtu | 609 | /* Repartition Pba for greater than 9k mtu |
@@ -629,6 +670,12 @@ e1000_reset(struct e1000_adapter *adapter) | |||
629 | e1000_reset_hw(&adapter->hw); | 670 | e1000_reset_hw(&adapter->hw); |
630 | if (adapter->hw.mac_type >= e1000_82544) | 671 | if (adapter->hw.mac_type >= e1000_82544) |
631 | E1000_WRITE_REG(&adapter->hw, WUC, 0); | 672 | E1000_WRITE_REG(&adapter->hw, WUC, 0); |
673 | #ifdef DISABLE_MULR | ||
674 | /* disable Multiple Reads in Transmit Control Register for debugging */ | ||
675 | tctl = E1000_READ_REG(hw, TCTL); | ||
676 | E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR); | ||
677 | |||
678 | #endif | ||
632 | if (e1000_init_hw(&adapter->hw)) | 679 | if (e1000_init_hw(&adapter->hw)) |
633 | DPRINTK(PROBE, ERR, "Hardware Error\n"); | 680 | DPRINTK(PROBE, ERR, "Hardware Error\n"); |
634 | e1000_update_mng_vlan(adapter); | 681 | e1000_update_mng_vlan(adapter); |
@@ -652,9 +699,7 @@ e1000_reset(struct e1000_adapter *adapter) | |||
652 | phy_data); | 699 | phy_data); |
653 | } | 700 | } |
654 | 701 | ||
655 | if (adapter->hw.mac_type < e1000_ich8lan) | 702 | if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) { |
656 | /* FIXME: this code is duplicate and wrong for PCI Express */ | ||
657 | if (adapter->en_mng_pt) { | ||
658 | manc = E1000_READ_REG(&adapter->hw, MANC); | 703 | manc = E1000_READ_REG(&adapter->hw, MANC); |
659 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | 704 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); |
660 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | 705 | E1000_WRITE_REG(&adapter->hw, MANC, manc); |
@@ -760,7 +805,7 @@ e1000_probe(struct pci_dev *pdev, | |||
760 | #ifdef CONFIG_NET_POLL_CONTROLLER | 805 | #ifdef CONFIG_NET_POLL_CONTROLLER |
761 | netdev->poll_controller = e1000_netpoll; | 806 | netdev->poll_controller = e1000_netpoll; |
762 | #endif | 807 | #endif |
763 | strcpy(netdev->name, pci_name(pdev)); | 808 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
764 | 809 | ||
765 | netdev->mem_start = mmio_start; | 810 | netdev->mem_start = mmio_start; |
766 | netdev->mem_end = mmio_start + mmio_len; | 811 | netdev->mem_end = mmio_start + mmio_len; |
@@ -863,11 +908,6 @@ e1000_probe(struct pci_dev *pdev, | |||
863 | INIT_WORK(&adapter->reset_task, | 908 | INIT_WORK(&adapter->reset_task, |
864 | (void (*)(void *))e1000_reset_task, netdev); | 909 | (void (*)(void *))e1000_reset_task, netdev); |
865 | 910 | ||
866 | /* we're going to reset, so assume we have no link for now */ | ||
867 | |||
868 | netif_carrier_off(netdev); | ||
869 | netif_stop_queue(netdev); | ||
870 | |||
871 | e1000_check_options(adapter); | 911 | e1000_check_options(adapter); |
872 | 912 | ||
873 | /* Initial Wake on LAN setting | 913 | /* Initial Wake on LAN setting |
@@ -974,6 +1014,10 @@ e1000_probe(struct pci_dev *pdev, | |||
974 | if ((err = register_netdev(netdev))) | 1014 | if ((err = register_netdev(netdev))) |
975 | goto err_register; | 1015 | goto err_register; |
976 | 1016 | ||
1017 | /* tell the stack to leave us alone until e1000_open() is called */ | ||
1018 | netif_carrier_off(netdev); | ||
1019 | netif_stop_queue(netdev); | ||
1020 | |||
977 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); | 1021 | DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); |
978 | 1022 | ||
979 | cards_found++; | 1023 | cards_found++; |
@@ -1032,8 +1076,7 @@ e1000_remove(struct pci_dev *pdev) | |||
1032 | 1076 | ||
1033 | flush_scheduled_work(); | 1077 | flush_scheduled_work(); |
1034 | 1078 | ||
1035 | if (adapter->hw.mac_type >= e1000_82540 && | 1079 | if (adapter->hw.mac_type < e1000_82571 && |
1036 | adapter->hw.mac_type != e1000_ich8lan && | ||
1037 | adapter->hw.media_type == e1000_media_type_copper) { | 1080 | adapter->hw.media_type == e1000_media_type_copper) { |
1038 | manc = E1000_READ_REG(&adapter->hw, MANC); | 1081 | manc = E1000_READ_REG(&adapter->hw, MANC); |
1039 | if (manc & E1000_MANC_SMBUS_EN) { | 1082 | if (manc & E1000_MANC_SMBUS_EN) { |
@@ -1161,6 +1204,8 @@ e1000_sw_init(struct e1000_adapter *adapter) | |||
1161 | atomic_set(&adapter->irq_sem, 1); | 1204 | atomic_set(&adapter->irq_sem, 1); |
1162 | spin_lock_init(&adapter->stats_lock); | 1205 | spin_lock_init(&adapter->stats_lock); |
1163 | 1206 | ||
1207 | set_bit(__E1000_DOWN, &adapter->flags); | ||
1208 | |||
1164 | return 0; | 1209 | return 0; |
1165 | } | 1210 | } |
1166 | 1211 | ||
@@ -1226,7 +1271,7 @@ e1000_open(struct net_device *netdev) | |||
1226 | int err; | 1271 | int err; |
1227 | 1272 | ||
1228 | /* disallow open during test */ | 1273 | /* disallow open during test */ |
1229 | if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags)) | 1274 | if (test_bit(__E1000_TESTING, &adapter->flags)) |
1230 | return -EBUSY; | 1275 | return -EBUSY; |
1231 | 1276 | ||
1232 | /* allocate transmit descriptors */ | 1277 | /* allocate transmit descriptors */ |
@@ -1299,8 +1344,12 @@ e1000_close(struct net_device *netdev) | |||
1299 | e1000_free_all_tx_resources(adapter); | 1344 | e1000_free_all_tx_resources(adapter); |
1300 | e1000_free_all_rx_resources(adapter); | 1345 | e1000_free_all_rx_resources(adapter); |
1301 | 1346 | ||
1347 | /* kill manageability vlan ID if supported, but not if a vlan with | ||
1348 | * the same ID is registered on the host OS (let 8021q kill it) */ | ||
1302 | if ((adapter->hw.mng_cookie.status & | 1349 | if ((adapter->hw.mng_cookie.status & |
1303 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { | 1350 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
1351 | !(adapter->vlgrp && | ||
1352 | adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) { | ||
1304 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | 1353 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
1305 | } | 1354 | } |
1306 | 1355 | ||
@@ -1510,27 +1559,14 @@ e1000_configure_tx(struct e1000_adapter *adapter) | |||
1510 | /* Program the Transmit Control Register */ | 1559 | /* Program the Transmit Control Register */ |
1511 | 1560 | ||
1512 | tctl = E1000_READ_REG(hw, TCTL); | 1561 | tctl = E1000_READ_REG(hw, TCTL); |
1513 | |||
1514 | tctl &= ~E1000_TCTL_CT; | 1562 | tctl &= ~E1000_TCTL_CT; |
1515 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | | 1563 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
1516 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); | 1564 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1517 | 1565 | ||
1518 | #ifdef DISABLE_MULR | ||
1519 | /* disable Multiple Reads for debugging */ | ||
1520 | tctl &= ~E1000_TCTL_MULR; | ||
1521 | #endif | ||
1522 | |||
1523 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { | 1566 | if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { |
1524 | tarc = E1000_READ_REG(hw, TARC0); | 1567 | tarc = E1000_READ_REG(hw, TARC0); |
1525 | tarc |= ((1 << 25) | (1 << 21)); | 1568 | tarc |= (1 << 21); |
1526 | E1000_WRITE_REG(hw, TARC0, tarc); | 1569 | E1000_WRITE_REG(hw, TARC0, tarc); |
1527 | tarc = E1000_READ_REG(hw, TARC1); | ||
1528 | tarc |= (1 << 25); | ||
1529 | if (tctl & E1000_TCTL_MULR) | ||
1530 | tarc &= ~(1 << 28); | ||
1531 | else | ||
1532 | tarc |= (1 << 28); | ||
1533 | E1000_WRITE_REG(hw, TARC1, tarc); | ||
1534 | } else if (hw->mac_type == e1000_80003es2lan) { | 1570 | } else if (hw->mac_type == e1000_80003es2lan) { |
1535 | tarc = E1000_READ_REG(hw, TARC0); | 1571 | tarc = E1000_READ_REG(hw, TARC0); |
1536 | tarc |= 1; | 1572 | tarc |= 1; |
@@ -2892,6 +2928,35 @@ e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) | |||
2892 | return 0; | 2928 | return 0; |
2893 | } | 2929 | } |
2894 | 2930 | ||
2931 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) | ||
2932 | { | ||
2933 | struct e1000_adapter *adapter = netdev_priv(netdev); | ||
2934 | struct e1000_tx_ring *tx_ring = adapter->tx_ring; | ||
2935 | |||
2936 | netif_stop_queue(netdev); | ||
2937 | /* Herbert's original patch had: | ||
2938 | * smp_mb__after_netif_stop_queue(); | ||
2939 | * but since that doesn't exist yet, just open code it. */ | ||
2940 | smp_mb(); | ||
2941 | |||
2942 | /* We need to check again in a case another CPU has just | ||
2943 | * made room available. */ | ||
2944 | if (likely(E1000_DESC_UNUSED(tx_ring) < size)) | ||
2945 | return -EBUSY; | ||
2946 | |||
2947 | /* A reprieve! */ | ||
2948 | netif_start_queue(netdev); | ||
2949 | return 0; | ||
2950 | } | ||
2951 | |||
2952 | static int e1000_maybe_stop_tx(struct net_device *netdev, | ||
2953 | struct e1000_tx_ring *tx_ring, int size) | ||
2954 | { | ||
2955 | if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) | ||
2956 | return 0; | ||
2957 | return __e1000_maybe_stop_tx(netdev, size); | ||
2958 | } | ||
2959 | |||
2895 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) | 2960 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) |
2896 | static int | 2961 | static int |
2897 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | 2962 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) |
@@ -2910,6 +2975,10 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2910 | unsigned int f; | 2975 | unsigned int f; |
2911 | len -= skb->data_len; | 2976 | len -= skb->data_len; |
2912 | 2977 | ||
2978 | /* This goes back to the question of how to logically map a tx queue | ||
2979 | * to a flow. Right now, performance is impacted slightly negatively | ||
2980 | * if using multiple tx queues. If the stack breaks away from a | ||
2981 | * single qdisc implementation, we can look at this again. */ | ||
2913 | tx_ring = adapter->tx_ring; | 2982 | tx_ring = adapter->tx_ring; |
2914 | 2983 | ||
2915 | if (unlikely(skb->len <= 0)) { | 2984 | if (unlikely(skb->len <= 0)) { |
@@ -3005,8 +3074,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
3005 | 3074 | ||
3006 | /* need: count + 2 desc gap to keep tail from touching | 3075 | /* need: count + 2 desc gap to keep tail from touching |
3007 | * head, otherwise try next time */ | 3076 | * head, otherwise try next time */ |
3008 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) { | 3077 | if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) { |
3009 | netif_stop_queue(netdev); | ||
3010 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); | 3078 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
3011 | return NETDEV_TX_BUSY; | 3079 | return NETDEV_TX_BUSY; |
3012 | } | 3080 | } |
@@ -3014,7 +3082,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
3014 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { | 3082 | if (unlikely(adapter->hw.mac_type == e1000_82547)) { |
3015 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { | 3083 | if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { |
3016 | netif_stop_queue(netdev); | 3084 | netif_stop_queue(netdev); |
3017 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies); | 3085 | mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); |
3018 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); | 3086 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
3019 | return NETDEV_TX_BUSY; | 3087 | return NETDEV_TX_BUSY; |
3020 | } | 3088 | } |
@@ -3053,8 +3121,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
3053 | netdev->trans_start = jiffies; | 3121 | netdev->trans_start = jiffies; |
3054 | 3122 | ||
3055 | /* Make sure there is space in the ring for the next send. */ | 3123 | /* Make sure there is space in the ring for the next send. */ |
3056 | if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2)) | 3124 | e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); |
3057 | netif_stop_queue(netdev); | ||
3058 | 3125 | ||
3059 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); | 3126 | spin_unlock_irqrestore(&tx_ring->tx_lock, flags); |
3060 | return NETDEV_TX_OK; | 3127 | return NETDEV_TX_OK; |
@@ -3131,11 +3198,13 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu) | |||
3131 | } | 3198 | } |
3132 | break; | 3199 | break; |
3133 | case e1000_82573: | 3200 | case e1000_82573: |
3134 | /* only enable jumbo frames if ASPM is disabled completely | 3201 | /* Jumbo Frames not supported if: |
3135 | * this means both bits must be zero in 0x1A bits 3:2 */ | 3202 | * - this is not an 82573L device |
3203 | * - ASPM is enabled in any way (0x1A bits 3:2) */ | ||
3136 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, | 3204 | e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, |
3137 | &eeprom_data); | 3205 | &eeprom_data); |
3138 | if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) { | 3206 | if ((adapter->hw.device_id != E1000_DEV_ID_82573L) || |
3207 | (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) { | ||
3139 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { | 3208 | if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { |
3140 | DPRINTK(PROBE, ERR, | 3209 | DPRINTK(PROBE, ERR, |
3141 | "Jumbo Frames not supported.\n"); | 3210 | "Jumbo Frames not supported.\n"); |
@@ -3143,6 +3212,8 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu) | |||
3143 | } | 3212 | } |
3144 | break; | 3213 | break; |
3145 | } | 3214 | } |
3215 | /* ERT will be enabled later to enable wire speed receives */ | ||
3216 | |||
3146 | /* fall through to get support */ | 3217 | /* fall through to get support */ |
3147 | case e1000_82571: | 3218 | case e1000_82571: |
3148 | case e1000_82572: | 3219 | case e1000_82572: |
@@ -3328,16 +3399,15 @@ e1000_update_stats(struct e1000_adapter *adapter) | |||
3328 | adapter->stats.crcerrs + adapter->stats.algnerrc + | 3399 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
3329 | adapter->stats.ruc + adapter->stats.roc + | 3400 | adapter->stats.ruc + adapter->stats.roc + |
3330 | adapter->stats.cexterr; | 3401 | adapter->stats.cexterr; |
3331 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + | 3402 | adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; |
3332 | adapter->stats.roc; | 3403 | adapter->net_stats.rx_length_errors = adapter->stats.rlerrc; |
3333 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | 3404 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
3334 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | 3405 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; |
3335 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; | 3406 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
3336 | 3407 | ||
3337 | /* Tx Errors */ | 3408 | /* Tx Errors */ |
3338 | 3409 | adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; | |
3339 | adapter->net_stats.tx_errors = adapter->stats.ecol + | 3410 | adapter->net_stats.tx_errors = adapter->stats.txerrc; |
3340 | adapter->stats.latecol; | ||
3341 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | 3411 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; |
3342 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | 3412 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; |
3343 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | 3413 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; |
@@ -3408,7 +3478,9 @@ e1000_intr(int irq, void *data, struct pt_regs *regs) | |||
3408 | rctl = E1000_READ_REG(hw, RCTL); | 3478 | rctl = E1000_READ_REG(hw, RCTL); |
3409 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); | 3479 | E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); |
3410 | } | 3480 | } |
3411 | mod_timer(&adapter->watchdog_timer, jiffies); | 3481 | /* guard against interrupt when we're going down */ |
3482 | if (!test_bit(__E1000_DOWN, &adapter->flags)) | ||
3483 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | ||
3412 | } | 3484 | } |
3413 | 3485 | ||
3414 | #ifdef CONFIG_E1000_NAPI | 3486 | #ifdef CONFIG_E1000_NAPI |
@@ -3546,13 +3618,14 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
3546 | tx_ring->next_to_clean = i; | 3618 | tx_ring->next_to_clean = i; |
3547 | 3619 | ||
3548 | #define TX_WAKE_THRESHOLD 32 | 3620 | #define TX_WAKE_THRESHOLD 32 |
3549 | if (unlikely(cleaned && netif_queue_stopped(netdev) && | 3621 | if (unlikely(cleaned && netif_carrier_ok(netdev) && |
3550 | netif_carrier_ok(netdev))) { | 3622 | E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { |
3551 | spin_lock(&tx_ring->tx_lock); | 3623 | /* Make sure that anybody stopping the queue after this |
3552 | if (netif_queue_stopped(netdev) && | 3624 | * sees the new next_to_clean. |
3553 | (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) | 3625 | */ |
3626 | smp_mb(); | ||
3627 | if (netif_queue_stopped(netdev)) | ||
3554 | netif_wake_queue(netdev); | 3628 | netif_wake_queue(netdev); |
3555 | spin_unlock(&tx_ring->tx_lock); | ||
3556 | } | 3629 | } |
3557 | 3630 | ||
3558 | if (adapter->detect_tx_hung) { | 3631 | if (adapter->detect_tx_hung) { |
@@ -4412,13 +4485,21 @@ e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) | |||
4412 | pci_write_config_word(adapter->pdev, reg, *value); | 4485 | pci_write_config_word(adapter->pdev, reg, *value); |
4413 | } | 4486 | } |
4414 | 4487 | ||
4415 | #if 0 | 4488 | int32_t |
4416 | uint32_t | 4489 | e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) |
4417 | e1000_io_read(struct e1000_hw *hw, unsigned long port) | ||
4418 | { | 4490 | { |
4419 | return inl(port); | 4491 | struct e1000_adapter *adapter = hw->back; |
4492 | uint16_t cap_offset; | ||
4493 | |||
4494 | cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); | ||
4495 | if (!cap_offset) | ||
4496 | return -E1000_ERR_CONFIG; | ||
4497 | |||
4498 | pci_read_config_word(adapter->pdev, cap_offset + reg, value); | ||
4499 | |||
4500 | return E1000_SUCCESS; | ||
4420 | } | 4501 | } |
4421 | #endif /* 0 */ | 4502 | |
4422 | 4503 | ||
4423 | void | 4504 | void |
4424 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | 4505 | e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) |
@@ -4693,9 +4774,7 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4693 | pci_enable_wake(pdev, PCI_D3cold, 0); | 4774 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4694 | } | 4775 | } |
4695 | 4776 | ||
4696 | /* FIXME: this code is incorrect for PCI Express */ | 4777 | if (adapter->hw.mac_type < e1000_82571 && |
4697 | if (adapter->hw.mac_type >= e1000_82540 && | ||
4698 | adapter->hw.mac_type != e1000_ich8lan && | ||
4699 | adapter->hw.media_type == e1000_media_type_copper) { | 4778 | adapter->hw.media_type == e1000_media_type_copper) { |
4700 | manc = E1000_READ_REG(&adapter->hw, MANC); | 4779 | manc = E1000_READ_REG(&adapter->hw, MANC); |
4701 | if (manc & E1000_MANC_SMBUS_EN) { | 4780 | if (manc & E1000_MANC_SMBUS_EN) { |
@@ -4747,9 +4826,7 @@ e1000_resume(struct pci_dev *pdev) | |||
4747 | 4826 | ||
4748 | netif_device_attach(netdev); | 4827 | netif_device_attach(netdev); |
4749 | 4828 | ||
4750 | /* FIXME: this code is incorrect for PCI Express */ | 4829 | if (adapter->hw.mac_type < e1000_82571 && |
4751 | if (adapter->hw.mac_type >= e1000_82540 && | ||
4752 | adapter->hw.mac_type != e1000_ich8lan && | ||
4753 | adapter->hw.media_type == e1000_media_type_copper) { | 4830 | adapter->hw.media_type == e1000_media_type_copper) { |
4754 | manc = E1000_READ_REG(&adapter->hw, MANC); | 4831 | manc = E1000_READ_REG(&adapter->hw, MANC); |
4755 | manc &= ~(E1000_MANC_ARP_EN); | 4832 | manc &= ~(E1000_MANC_ARP_EN); |
@@ -4835,8 +4912,8 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |||
4835 | } | 4912 | } |
4836 | pci_set_master(pdev); | 4913 | pci_set_master(pdev); |
4837 | 4914 | ||
4838 | pci_enable_wake(pdev, 3, 0); | 4915 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4839 | pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */ | 4916 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4840 | 4917 | ||
4841 | /* Perform card reset only on one instance of the card */ | 4918 | /* Perform card reset only on one instance of the card */ |
4842 | if (PCI_FUNC (pdev->devfn) != 0) | 4919 | if (PCI_FUNC (pdev->devfn) != 0) |
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h index 46bc49df15e7..a464cb290621 100644 --- a/drivers/net/e1000/e1000_osdep.h +++ b/drivers/net/e1000/e1000_osdep.h | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
diff --git a/drivers/net/e1000/e1000_param.c b/drivers/net/e1000/e1000_param.c index 212842738972..9c3c1acefccc 100644 --- a/drivers/net/e1000/e1000_param.c +++ b/drivers/net/e1000/e1000_param.c | |||
@@ -1,25 +1,24 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/1000 Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
25 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
@@ -397,17 +396,17 @@ e1000_check_options(struct e1000_adapter *adapter) | |||
397 | { /* Flow Control */ | 396 | { /* Flow Control */ |
398 | 397 | ||
399 | struct e1000_opt_list fc_list[] = | 398 | struct e1000_opt_list fc_list[] = |
400 | {{ e1000_fc_none, "Flow Control Disabled" }, | 399 | {{ E1000_FC_NONE, "Flow Control Disabled" }, |
401 | { e1000_fc_rx_pause,"Flow Control Receive Only" }, | 400 | { E1000_FC_RX_PAUSE,"Flow Control Receive Only" }, |
402 | { e1000_fc_tx_pause,"Flow Control Transmit Only" }, | 401 | { E1000_FC_TX_PAUSE,"Flow Control Transmit Only" }, |
403 | { e1000_fc_full, "Flow Control Enabled" }, | 402 | { E1000_FC_FULL, "Flow Control Enabled" }, |
404 | { e1000_fc_default, "Flow Control Hardware Default" }}; | 403 | { E1000_FC_DEFAULT, "Flow Control Hardware Default" }}; |
405 | 404 | ||
406 | struct e1000_option opt = { | 405 | struct e1000_option opt = { |
407 | .type = list_option, | 406 | .type = list_option, |
408 | .name = "Flow Control", | 407 | .name = "Flow Control", |
409 | .err = "reading default settings from EEPROM", | 408 | .err = "reading default settings from EEPROM", |
410 | .def = e1000_fc_default, | 409 | .def = E1000_FC_DEFAULT, |
411 | .arg = { .l = { .nr = ARRAY_SIZE(fc_list), | 410 | .arg = { .l = { .nr = ARRAY_SIZE(fc_list), |
412 | .p = fc_list }} | 411 | .p = fc_list }} |
413 | }; | 412 | }; |
diff --git a/drivers/net/ixgb/Makefile b/drivers/net/ixgb/Makefile index a8a2d3d03567..838a5084fa00 100644 --- a/drivers/net/ixgb/Makefile +++ b/drivers/net/ixgb/Makefile | |||
@@ -1,33 +1,33 @@ | |||
1 | ################################################################################ | 1 | ################################################################################ |
2 | # | 2 | # |
3 | # | 3 | # Intel PRO/10GbE Linux driver |
4 | # Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | # Copyright(c) 1999 - 2006 Intel Corporation. |
5 | # | 5 | # |
6 | # This program is free software; you can redistribute it and/or modify it | 6 | # This program is free software; you can redistribute it and/or modify it |
7 | # under the terms of the GNU General Public License as published by the Free | 7 | # under the terms and conditions of the GNU General Public License, |
8 | # Software Foundation; either version 2 of the License, or (at your option) | 8 | # version 2, as published by the Free Software Foundation. |
9 | # any later version. | 9 | # |
10 | # | 10 | # This program is distributed in the hope it will be useful, but WITHOUT |
11 | # This program is distributed in the hope that it will be useful, but WITHOUT | 11 | # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | # more details. | 13 | # more details. |
15 | # | 14 | # |
16 | # You should have received a copy of the GNU General Public License along with | 15 | # You should have received a copy of the GNU General Public License along with |
17 | # this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | # this program; if not, write to the Free Software Foundation, Inc., |
18 | # Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | # 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | # | 18 | # |
20 | # The full GNU General Public License is included in this distribution in the | 19 | # The full GNU General Public License is included in this distribution in |
21 | # file called LICENSE. | 20 | # the file called "COPYING". |
22 | # | 21 | # |
23 | # Contact Information: | 22 | # Contact Information: |
24 | # Linux NICS <linux.nics@intel.com> | 23 | # Linux NICS <linux.nics@intel.com> |
24 | # e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | # Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | # Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | # | 26 | # |
27 | ################################################################################ | 27 | ################################################################################ |
28 | 28 | ||
29 | # | 29 | # |
30 | # Makefile for the Intel(R) PRO/10GbE driver | 30 | # Makefile for the Intel(R) PRO/10GbE ethernet driver |
31 | # | 31 | # |
32 | 32 | ||
33 | obj-$(CONFIG_IXGB) += ixgb.o | 33 | obj-$(CONFIG_IXGB) += ixgb.o |
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h index a51604b3651f..50ffe90488ff 100644 --- a/drivers/net/ixgb/ixgb.h +++ b/drivers/net/ixgb/ixgb.h | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
@@ -111,7 +111,7 @@ struct ixgb_adapter; | |||
111 | #define IXGB_RXBUFFER_16384 16384 | 111 | #define IXGB_RXBUFFER_16384 16384 |
112 | 112 | ||
113 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ | 113 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ |
114 | #define IXGB_RX_BUFFER_WRITE 4 /* Must be power of 2 */ | 114 | #define IXGB_RX_BUFFER_WRITE 8 /* Must be power of 2 */ |
115 | 115 | ||
116 | /* only works for sizes that are powers of 2 */ | 116 | /* only works for sizes that are powers of 2 */ |
117 | #define IXGB_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1))) | 117 | #define IXGB_ROUNDUP(i, size) ((i) = (((i) + (size) - 1) & ~((size) - 1))) |
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c index 8357c5590bfb..f15aebde7b90 100644 --- a/drivers/net/ixgb/ixgb_ee.c +++ b/drivers/net/ixgb/ixgb_ee.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_ee.h b/drivers/net/ixgb/ixgb_ee.h index bf6fa220f38e..ef236b935c15 100644 --- a/drivers/net/ixgb/ixgb_ee.h +++ b/drivers/net/ixgb/ixgb_ee.h | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c index 64a383e4e892..cd22523fb035 100644 --- a/drivers/net/ixgb/ixgb_ethtool.c +++ b/drivers/net/ixgb/ixgb_ethtool.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c index acc6df7a6b38..02089b64e42c 100644 --- a/drivers/net/ixgb/ixgb_hw.c +++ b/drivers/net/ixgb/ixgb_hw.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_hw.h b/drivers/net/ixgb/ixgb_hw.h index cb4568915ada..40ef5ca88717 100644 --- a/drivers/net/ixgb/ixgb_hw.h +++ b/drivers/net/ixgb/ixgb_hw.h | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_ids.h b/drivers/net/ixgb/ixgb_ids.h index 9fd61189b4b2..4376e7e8fbef 100644 --- a/drivers/net/ixgb/ixgb_ids.h +++ b/drivers/net/ixgb/ixgb_ids.h | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c index 2e0f4b950a90..cfde7c2569bb 100644 --- a/drivers/net/ixgb/ixgb_main.c +++ b/drivers/net/ixgb/ixgb_main.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
@@ -36,7 +36,7 @@ static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; | |||
36 | #else | 36 | #else |
37 | #define DRIVERNAPI "-NAPI" | 37 | #define DRIVERNAPI "-NAPI" |
38 | #endif | 38 | #endif |
39 | #define DRV_VERSION "1.0.112-k2"DRIVERNAPI | 39 | #define DRV_VERSION "1.0.117-k2"DRIVERNAPI |
40 | char ixgb_driver_version[] = DRV_VERSION; | 40 | char ixgb_driver_version[] = DRV_VERSION; |
41 | static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | 41 | static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
42 | 42 | ||
@@ -437,7 +437,7 @@ ixgb_probe(struct pci_dev *pdev, | |||
437 | netdev->poll_controller = ixgb_netpoll; | 437 | netdev->poll_controller = ixgb_netpoll; |
438 | #endif | 438 | #endif |
439 | 439 | ||
440 | strcpy(netdev->name, pci_name(pdev)); | 440 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
441 | netdev->mem_start = mmio_start; | 441 | netdev->mem_start = mmio_start; |
442 | netdev->mem_end = mmio_start + mmio_len; | 442 | netdev->mem_end = mmio_start + mmio_len; |
443 | netdev->base_addr = adapter->hw.io_base; | 443 | netdev->base_addr = adapter->hw.io_base; |
@@ -2230,7 +2230,7 @@ static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev, | |||
2230 | enum pci_channel_state state) | 2230 | enum pci_channel_state state) |
2231 | { | 2231 | { |
2232 | struct net_device *netdev = pci_get_drvdata(pdev); | 2232 | struct net_device *netdev = pci_get_drvdata(pdev); |
2233 | struct ixgb_adapter *adapter = netdev->priv; | 2233 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
2234 | 2234 | ||
2235 | if(netif_running(netdev)) | 2235 | if(netif_running(netdev)) |
2236 | ixgb_down(adapter, TRUE); | 2236 | ixgb_down(adapter, TRUE); |
@@ -2253,7 +2253,7 @@ static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev, | |||
2253 | static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev) | 2253 | static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev) |
2254 | { | 2254 | { |
2255 | struct net_device *netdev = pci_get_drvdata(pdev); | 2255 | struct net_device *netdev = pci_get_drvdata(pdev); |
2256 | struct ixgb_adapter *adapter = netdev->priv; | 2256 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
2257 | 2257 | ||
2258 | if(pci_enable_device(pdev)) { | 2258 | if(pci_enable_device(pdev)) { |
2259 | DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n"); | 2259 | DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n"); |
@@ -2297,7 +2297,7 @@ static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev) | |||
2297 | static void ixgb_io_resume (struct pci_dev *pdev) | 2297 | static void ixgb_io_resume (struct pci_dev *pdev) |
2298 | { | 2298 | { |
2299 | struct net_device *netdev = pci_get_drvdata(pdev); | 2299 | struct net_device *netdev = pci_get_drvdata(pdev); |
2300 | struct ixgb_adapter *adapter = netdev->priv; | 2300 | struct ixgb_adapter *adapter = netdev_priv(netdev); |
2301 | 2301 | ||
2302 | pci_set_master(pdev); | 2302 | pci_set_master(pdev); |
2303 | 2303 | ||
diff --git a/drivers/net/ixgb/ixgb_osdep.h b/drivers/net/ixgb/ixgb_osdep.h index 19cb1d586dec..8434d752fd81 100644 --- a/drivers/net/ixgb/ixgb_osdep.h +++ b/drivers/net/ixgb/ixgb_osdep.h | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |
diff --git a/drivers/net/ixgb/ixgb_param.c b/drivers/net/ixgb/ixgb_param.c index 39fbed29a3df..b27442a121f2 100644 --- a/drivers/net/ixgb/ixgb_param.c +++ b/drivers/net/ixgb/ixgb_param.c | |||
@@ -1,27 +1,27 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | 3 | Intel PRO/10GbE Linux driver | |
4 | Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. | 4 | Copyright(c) 1999 - 2006 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by the Free | 7 | under the terms and conditions of the GNU General Public License, |
8 | Software Foundation; either version 2 of the License, or (at your option) | 8 | version 2, as published by the Free Software Foundation. |
9 | any later version. | 9 | |
10 | 10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | This program is distributed in the hope that it will be useful, but WITHOUT | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | more details. | 13 | more details. |
15 | 14 | ||
16 | You should have received a copy of the GNU General Public License along with | 15 | You should have received a copy of the GNU General Public License along with |
17 | this program; if not, write to the Free Software Foundation, Inc., 59 | 16 | this program; if not, write to the Free Software Foundation, Inc., |
18 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
19 | 18 | ||
20 | The full GNU General Public License is included in this distribution in the | 19 | The full GNU General Public License is included in this distribution in |
21 | file called LICENSE. | 20 | the file called "COPYING". |
22 | 21 | ||
23 | Contact Information: | 22 | Contact Information: |
24 | Linux NICS <linux.nics@intel.com> | 23 | Linux NICS <linux.nics@intel.com> |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | 26 | ||
27 | *******************************************************************************/ | 27 | *******************************************************************************/ |