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authorEli Cohen <eli@mellanox.co.il>2009-09-24 14:03:03 -0400
committerRoland Dreier <rolandd@cisco.com>2009-09-24 14:03:03 -0400
commitc57e20dcff981c39e43c857f3997095bacb2223f (patch)
tree4b9f50a76fd06002290f89444a4ad6740b397191 /drivers/net
parent86d710146fb9975f04c505ec78caa43d227c1018 (diff)
mlx4_core: Pass cache line size to device FW
ConnectX can work more efficiently if the CPU cache line size is passed to it with the INIT_HCA firmware command. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/mlx4/fw.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index cee199ceba2f..3c16602172fc 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -33,6 +33,7 @@
33 */ 33 */
34 34
35#include <linux/mlx4/cmd.h> 35#include <linux/mlx4/cmd.h>
36#include <linux/cache.h>
36 37
37#include "fw.h" 38#include "fw.h"
38#include "icm.h" 39#include "icm.h"
@@ -698,6 +699,7 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
698#define INIT_HCA_IN_SIZE 0x200 699#define INIT_HCA_IN_SIZE 0x200
699#define INIT_HCA_VERSION_OFFSET 0x000 700#define INIT_HCA_VERSION_OFFSET 0x000
700#define INIT_HCA_VERSION 2 701#define INIT_HCA_VERSION 2
702#define INIT_HCA_CACHELINE_SZ_OFFSET 0x0e
701#define INIT_HCA_FLAGS_OFFSET 0x014 703#define INIT_HCA_FLAGS_OFFSET 0x014
702#define INIT_HCA_QPC_OFFSET 0x020 704#define INIT_HCA_QPC_OFFSET 0x020
703#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10) 705#define INIT_HCA_QPC_BASE_OFFSET (INIT_HCA_QPC_OFFSET + 0x10)
@@ -735,6 +737,9 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param)
735 737
736 *((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION; 738 *((u8 *) mailbox->buf + INIT_HCA_VERSION_OFFSET) = INIT_HCA_VERSION;
737 739
740 *((u8 *) mailbox->buf + INIT_HCA_CACHELINE_SZ_OFFSET) =
741 (ilog2(cache_line_size()) - 4) << 5;
742
738#if defined(__LITTLE_ENDIAN) 743#if defined(__LITTLE_ENDIAN)
739 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1); 744 *(inbox + INIT_HCA_FLAGS_OFFSET / 4) &= ~cpu_to_be32(1 << 1);
740#elif defined(__BIG_ENDIAN) 745#elif defined(__BIG_ENDIAN)