diff options
author | Dhananjay Phadke <dhananjay.phadke@qlogic.com> | 2010-04-01 15:01:31 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-04-03 17:19:14 -0400 |
commit | 0c39aa4819fab75dcce0b1a9d99dcac0d85274f6 (patch) | |
tree | 4c821047521aa1c53a9a9a873562ce357810a1e1 /drivers/net | |
parent | b47acacd7c888ef550fb786dd02db69d9eb2faee (diff) |
qlcnic: fix onchip memory access
Fix incorrect offset calculation and remove unnecessary remap
of the region in bar 0 to access onchip memory.
This was leading to read incorrect values by debug tools.
Signed-off-by: Dhananjay Phadke <dhananjay.phadke@qlogic.com>
Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/qlcnic/qlcnic_hw.c | 39 |
1 files changed, 2 insertions, 37 deletions
diff --git a/drivers/net/qlcnic/qlcnic_hw.c b/drivers/net/qlcnic/qlcnic_hw.c index 419f46efa5df..0933c2da39eb 100644 --- a/drivers/net/qlcnic/qlcnic_hw.c +++ b/drivers/net/qlcnic/qlcnic_hw.c | |||
@@ -53,18 +53,6 @@ static inline void writeq(u64 val, void __iomem *addr) | |||
53 | } | 53 | } |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #define PCI_OFFSET_FIRST_RANGE(adapter, off) \ | ||
57 | ((adapter)->ahw.pci_base0 + (off)) | ||
58 | |||
59 | static void __iomem *pci_base_offset(struct qlcnic_adapter *adapter, | ||
60 | unsigned long off) | ||
61 | { | ||
62 | if (ADDR_IN_RANGE(off, FIRST_PAGE_GROUP_START, FIRST_PAGE_GROUP_END)) | ||
63 | return PCI_OFFSET_FIRST_RANGE(adapter, off); | ||
64 | |||
65 | return NULL; | ||
66 | } | ||
67 | |||
68 | static const struct crb_128M_2M_block_map | 56 | static const struct crb_128M_2M_block_map |
69 | crb_128M_2M_map[64] __cacheline_aligned_in_smp = { | 57 | crb_128M_2M_map[64] __cacheline_aligned_in_smp = { |
70 | {{{0, 0, 0, 0} } }, /* 0: PCI */ | 58 | {{{0, 0, 0, 0} } }, /* 0: PCI */ |
@@ -871,13 +859,6 @@ qlcnic_pci_set_window_2M(struct qlcnic_adapter *adapter, | |||
871 | u64 addr, u32 *start) | 859 | u64 addr, u32 *start) |
872 | { | 860 | { |
873 | u32 window; | 861 | u32 window; |
874 | struct pci_dev *pdev = adapter->pdev; | ||
875 | |||
876 | if ((addr & 0x00ff800) == 0xff800) { | ||
877 | if (printk_ratelimit()) | ||
878 | dev_warn(&pdev->dev, "QM access not handled\n"); | ||
879 | return -EIO; | ||
880 | } | ||
881 | 862 | ||
882 | window = OCM_WIN_P3P(addr); | 863 | window = OCM_WIN_P3P(addr); |
883 | 864 | ||
@@ -894,8 +875,7 @@ static int | |||
894 | qlcnic_pci_mem_access_direct(struct qlcnic_adapter *adapter, u64 off, | 875 | qlcnic_pci_mem_access_direct(struct qlcnic_adapter *adapter, u64 off, |
895 | u64 *data, int op) | 876 | u64 *data, int op) |
896 | { | 877 | { |
897 | void __iomem *addr, *mem_ptr = NULL; | 878 | void __iomem *addr; |
898 | resource_size_t mem_base; | ||
899 | int ret; | 879 | int ret; |
900 | u32 start; | 880 | u32 start; |
901 | 881 | ||
@@ -905,21 +885,8 @@ qlcnic_pci_mem_access_direct(struct qlcnic_adapter *adapter, u64 off, | |||
905 | if (ret != 0) | 885 | if (ret != 0) |
906 | goto unlock; | 886 | goto unlock; |
907 | 887 | ||
908 | addr = pci_base_offset(adapter, start); | 888 | addr = adapter->ahw.pci_base0 + start; |
909 | if (addr) | ||
910 | goto noremap; | ||
911 | |||
912 | mem_base = pci_resource_start(adapter->pdev, 0) + (start & PAGE_MASK); | ||
913 | |||
914 | mem_ptr = ioremap(mem_base, PAGE_SIZE); | ||
915 | if (mem_ptr == NULL) { | ||
916 | ret = -EIO; | ||
917 | goto unlock; | ||
918 | } | ||
919 | |||
920 | addr = mem_ptr + (start & (PAGE_SIZE - 1)); | ||
921 | 889 | ||
922 | noremap: | ||
923 | if (op == 0) /* read */ | 890 | if (op == 0) /* read */ |
924 | *data = readq(addr); | 891 | *data = readq(addr); |
925 | else /* write */ | 892 | else /* write */ |
@@ -928,8 +895,6 @@ noremap: | |||
928 | unlock: | 895 | unlock: |
929 | mutex_unlock(&adapter->ahw.mem_lock); | 896 | mutex_unlock(&adapter->ahw.mem_lock); |
930 | 897 | ||
931 | if (mem_ptr) | ||
932 | iounmap(mem_ptr); | ||
933 | return ret; | 898 | return ret; |
934 | } | 899 | } |
935 | 900 | ||