diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-07 04:55:03 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 04:55:03 -0400 |
commit | 4fb8af10d0fd09372d52966b76922b9e82bbc950 (patch) | |
tree | d240e4d40357583e3f3eb228dccf20122a5b31ed /drivers/net | |
parent | f44f82e8a20b98558486eb14497b2f71c78fa325 (diff) | |
parent | 64a99d2a8c3ed5c4e39f3ae1cc682aa8fd3977fc (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes
Diffstat (limited to 'drivers/net')
113 files changed, 3673 insertions, 2216 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index fa533c27052a..8a03875ec877 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -510,14 +510,14 @@ config STNIC | |||
510 | config SH_ETH | 510 | config SH_ETH |
511 | tristate "Renesas SuperH Ethernet support" | 511 | tristate "Renesas SuperH Ethernet support" |
512 | depends on SUPERH && \ | 512 | depends on SUPERH && \ |
513 | (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712) | 513 | (CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7763) |
514 | select CRC32 | 514 | select CRC32 |
515 | select MII | 515 | select MII |
516 | select MDIO_BITBANG | 516 | select MDIO_BITBANG |
517 | select PHYLIB | 517 | select PHYLIB |
518 | help | 518 | help |
519 | Renesas SuperH Ethernet device driver. | 519 | Renesas SuperH Ethernet device driver. |
520 | This driver support SH7710 and SH7712. | 520 | This driver support SH7710, SH7712 and SH7763. |
521 | 521 | ||
522 | config SUNLANCE | 522 | config SUNLANCE |
523 | tristate "Sun LANCE support" | 523 | tristate "Sun LANCE support" |
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index a8ec60e1ed75..3db7db1828e7 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c | |||
@@ -605,36 +605,87 @@ adjust_head: | |||
605 | static int bfin_mac_hard_start_xmit(struct sk_buff *skb, | 605 | static int bfin_mac_hard_start_xmit(struct sk_buff *skb, |
606 | struct net_device *dev) | 606 | struct net_device *dev) |
607 | { | 607 | { |
608 | unsigned int data; | 608 | u16 *data; |
609 | 609 | ||
610 | current_tx_ptr->skb = skb; | 610 | current_tx_ptr->skb = skb; |
611 | 611 | ||
612 | /* | 612 | if (ANOMALY_05000285) { |
613 | * Is skb->data always 16-bit aligned? | 613 | /* |
614 | * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)? | 614 | * TXDWA feature is not avaible to older revision < 0.3 silicon |
615 | */ | 615 | * of BF537 |
616 | if ((((unsigned int)(skb->data)) & 0x02) == 2) { | 616 | * |
617 | /* move skb->data to current_tx_ptr payload */ | 617 | * Only if data buffer is ODD WORD alignment, we do not |
618 | data = (unsigned int)(skb->data) - 2; | 618 | * need to memcpy |
619 | *((unsigned short *)data) = (unsigned short)(skb->len); | 619 | */ |
620 | current_tx_ptr->desc_a.start_addr = (unsigned long)data; | 620 | u32 data_align = (u32)(skb->data) & 0x3; |
621 | /* this is important! */ | 621 | if (data_align == 0x2) { |
622 | blackfin_dcache_flush_range(data, (data + (skb->len)) + 2); | 622 | /* move skb->data to current_tx_ptr payload */ |
623 | 623 | data = (u16 *)(skb->data) - 1; | |
624 | *data = (u16)(skb->len); | ||
625 | current_tx_ptr->desc_a.start_addr = (u32)data; | ||
626 | /* this is important! */ | ||
627 | blackfin_dcache_flush_range((u32)data, | ||
628 | (u32)((u8 *)data + skb->len + 4)); | ||
629 | } else { | ||
630 | *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len); | ||
631 | memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data, | ||
632 | skb->len); | ||
633 | current_tx_ptr->desc_a.start_addr = | ||
634 | (u32)current_tx_ptr->packet; | ||
635 | if (current_tx_ptr->status.status_word != 0) | ||
636 | current_tx_ptr->status.status_word = 0; | ||
637 | blackfin_dcache_flush_range( | ||
638 | (u32)current_tx_ptr->packet, | ||
639 | (u32)(current_tx_ptr->packet + skb->len + 2)); | ||
640 | } | ||
624 | } else { | 641 | } else { |
625 | *((unsigned short *)(current_tx_ptr->packet)) = | 642 | /* |
626 | (unsigned short)(skb->len); | 643 | * TXDWA feature is avaible to revision < 0.3 silicon of |
627 | memcpy((char *)(current_tx_ptr->packet + 2), skb->data, | 644 | * BF537 and always avaible to BF52x |
628 | (skb->len)); | 645 | */ |
629 | current_tx_ptr->desc_a.start_addr = | 646 | u32 data_align = (u32)(skb->data) & 0x3; |
630 | (unsigned long)current_tx_ptr->packet; | 647 | if (data_align == 0x0) { |
631 | if (current_tx_ptr->status.status_word != 0) | 648 | u16 sysctl = bfin_read_EMAC_SYSCTL(); |
632 | current_tx_ptr->status.status_word = 0; | 649 | sysctl |= TXDWA; |
633 | blackfin_dcache_flush_range((unsigned int)current_tx_ptr-> | 650 | bfin_write_EMAC_SYSCTL(sysctl); |
634 | packet, | 651 | |
635 | (unsigned int)(current_tx_ptr-> | 652 | /* move skb->data to current_tx_ptr payload */ |
636 | packet + skb->len) + | 653 | data = (u16 *)(skb->data) - 2; |
637 | 2); | 654 | *data = (u16)(skb->len); |
655 | current_tx_ptr->desc_a.start_addr = (u32)data; | ||
656 | /* this is important! */ | ||
657 | blackfin_dcache_flush_range( | ||
658 | (u32)data, | ||
659 | (u32)((u8 *)data + skb->len + 4)); | ||
660 | } else if (data_align == 0x2) { | ||
661 | u16 sysctl = bfin_read_EMAC_SYSCTL(); | ||
662 | sysctl &= ~TXDWA; | ||
663 | bfin_write_EMAC_SYSCTL(sysctl); | ||
664 | |||
665 | /* move skb->data to current_tx_ptr payload */ | ||
666 | data = (u16 *)(skb->data) - 1; | ||
667 | *data = (u16)(skb->len); | ||
668 | current_tx_ptr->desc_a.start_addr = (u32)data; | ||
669 | /* this is important! */ | ||
670 | blackfin_dcache_flush_range( | ||
671 | (u32)data, | ||
672 | (u32)((u8 *)data + skb->len + 4)); | ||
673 | } else { | ||
674 | u16 sysctl = bfin_read_EMAC_SYSCTL(); | ||
675 | sysctl &= ~TXDWA; | ||
676 | bfin_write_EMAC_SYSCTL(sysctl); | ||
677 | |||
678 | *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len); | ||
679 | memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data, | ||
680 | skb->len); | ||
681 | current_tx_ptr->desc_a.start_addr = | ||
682 | (u32)current_tx_ptr->packet; | ||
683 | if (current_tx_ptr->status.status_word != 0) | ||
684 | current_tx_ptr->status.status_word = 0; | ||
685 | blackfin_dcache_flush_range( | ||
686 | (u32)current_tx_ptr->packet, | ||
687 | (u32)(current_tx_ptr->packet + skb->len + 2)); | ||
688 | } | ||
638 | } | 689 | } |
639 | 690 | ||
640 | /* enable this packet's dma */ | 691 | /* enable this packet's dma */ |
@@ -691,7 +742,6 @@ static void bfin_mac_rx(struct net_device *dev) | |||
691 | (unsigned long)skb->tail); | 742 | (unsigned long)skb->tail); |
692 | 743 | ||
693 | dev->last_rx = jiffies; | 744 | dev->last_rx = jiffies; |
694 | skb->dev = dev; | ||
695 | skb->protocol = eth_type_trans(skb, dev); | 745 | skb->protocol = eth_type_trans(skb, dev); |
696 | #if defined(BFIN_MAC_CSUM_OFFLOAD) | 746 | #if defined(BFIN_MAC_CSUM_OFFLOAD) |
697 | skb->csum = current_rx_ptr->status.ip_payload_csum; | 747 | skb->csum = current_rx_ptr->status.ip_payload_csum; |
@@ -920,6 +970,7 @@ static int bfin_mac_open(struct net_device *dev) | |||
920 | phy_start(lp->phydev); | 970 | phy_start(lp->phydev); |
921 | phy_write(lp->phydev, MII_BMCR, BMCR_RESET); | 971 | phy_write(lp->phydev, MII_BMCR, BMCR_RESET); |
922 | setup_system_regs(dev); | 972 | setup_system_regs(dev); |
973 | setup_mac_addr(dev->dev_addr); | ||
923 | bfin_mac_disable(); | 974 | bfin_mac_disable(); |
924 | bfin_mac_enable(); | 975 | bfin_mac_enable(); |
925 | pr_debug("hardware init finished\n"); | 976 | pr_debug("hardware init finished\n"); |
@@ -955,7 +1006,7 @@ static int bfin_mac_close(struct net_device *dev) | |||
955 | return 0; | 1006 | return 0; |
956 | } | 1007 | } |
957 | 1008 | ||
958 | static int __init bfin_mac_probe(struct platform_device *pdev) | 1009 | static int __devinit bfin_mac_probe(struct platform_device *pdev) |
959 | { | 1010 | { |
960 | struct net_device *ndev; | 1011 | struct net_device *ndev; |
961 | struct bfin_mac_local *lp; | 1012 | struct bfin_mac_local *lp; |
@@ -1081,7 +1132,7 @@ out_err_probe_mac: | |||
1081 | return rc; | 1132 | return rc; |
1082 | } | 1133 | } |
1083 | 1134 | ||
1084 | static int bfin_mac_remove(struct platform_device *pdev) | 1135 | static int __devexit bfin_mac_remove(struct platform_device *pdev) |
1085 | { | 1136 | { |
1086 | struct net_device *ndev = platform_get_drvdata(pdev); | 1137 | struct net_device *ndev = platform_get_drvdata(pdev); |
1087 | struct bfin_mac_local *lp = netdev_priv(ndev); | 1138 | struct bfin_mac_local *lp = netdev_priv(ndev); |
@@ -1128,7 +1179,7 @@ static int bfin_mac_resume(struct platform_device *pdev) | |||
1128 | 1179 | ||
1129 | static struct platform_driver bfin_mac_driver = { | 1180 | static struct platform_driver bfin_mac_driver = { |
1130 | .probe = bfin_mac_probe, | 1181 | .probe = bfin_mac_probe, |
1131 | .remove = bfin_mac_remove, | 1182 | .remove = __devexit_p(bfin_mac_remove), |
1132 | .resume = bfin_mac_resume, | 1183 | .resume = bfin_mac_resume, |
1133 | .suspend = bfin_mac_suspend, | 1184 | .suspend = bfin_mac_suspend, |
1134 | .driver = { | 1185 | .driver = { |
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index 47d51788a462..04c0e90119af 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c | |||
@@ -683,7 +683,7 @@ enum { | |||
683 | SF_ERASE_SECTOR = 0xd8, /* erase sector */ | 683 | SF_ERASE_SECTOR = 0xd8, /* erase sector */ |
684 | 684 | ||
685 | FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */ | 685 | FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */ |
686 | FW_VERS_ADDR = 0x77ffc, /* flash address holding FW version */ | 686 | FW_VERS_ADDR = 0x7fffc, /* flash address holding FW version */ |
687 | FW_MIN_SIZE = 8 /* at least version and csum */ | 687 | FW_MIN_SIZE = 8 /* at least version and csum */ |
688 | }; | 688 | }; |
689 | 689 | ||
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index 0920b796bd78..b70c5314f537 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -2937,9 +2937,9 @@ static void ehea_rereg_mrs(struct work_struct *work) | |||
2937 | } | 2937 | } |
2938 | } | 2938 | } |
2939 | } | 2939 | } |
2940 | mutex_unlock(&dlpar_mem_lock); | 2940 | ehea_info("re-initializing driver complete"); |
2941 | ehea_info("re-initializing driver complete"); | ||
2942 | out: | 2941 | out: |
2942 | mutex_unlock(&dlpar_mem_lock); | ||
2943 | return; | 2943 | return; |
2944 | } | 2944 | } |
2945 | 2945 | ||
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index c05cb159c772..aa0bf6e1c694 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c | |||
@@ -1547,8 +1547,10 @@ static int __devinit enc28j60_probe(struct spi_device *spi) | |||
1547 | random_ether_addr(dev->dev_addr); | 1547 | random_ether_addr(dev->dev_addr); |
1548 | enc28j60_set_hw_macaddr(dev); | 1548 | enc28j60_set_hw_macaddr(dev); |
1549 | 1549 | ||
1550 | ret = request_irq(spi->irq, enc28j60_irq, IRQF_TRIGGER_FALLING, | 1550 | /* Board setup must set the relevant edge trigger type; |
1551 | DRV_NAME, priv); | 1551 | * level triggers won't currently work. |
1552 | */ | ||
1553 | ret = request_irq(spi->irq, enc28j60_irq, 0, DRV_NAME, priv); | ||
1552 | if (ret < 0) { | 1554 | if (ret < 0) { |
1553 | if (netif_msg_probe(priv)) | 1555 | if (netif_msg_probe(priv)) |
1554 | dev_err(&spi->dev, DRV_NAME ": request irq %d failed " | 1556 | dev_err(&spi->dev, DRV_NAME ": request irq %d failed " |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 4ed89fa9ae46..01b38b092c76 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -333,6 +333,7 @@ enum { | |||
333 | NvRegPowerState2 = 0x600, | 333 | NvRegPowerState2 = 0x600, |
334 | #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F11 | 334 | #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F11 |
335 | #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 | 335 | #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 |
336 | #define NVREG_POWERSTATE2_PHY_RESET 0x0004 | ||
336 | }; | 337 | }; |
337 | 338 | ||
338 | /* Big endian: should work, but is untested */ | 339 | /* Big endian: should work, but is untested */ |
@@ -529,6 +530,7 @@ union ring_type { | |||
529 | #define PHY_REALTEK_INIT_REG4 0x14 | 530 | #define PHY_REALTEK_INIT_REG4 0x14 |
530 | #define PHY_REALTEK_INIT_REG5 0x18 | 531 | #define PHY_REALTEK_INIT_REG5 0x18 |
531 | #define PHY_REALTEK_INIT_REG6 0x11 | 532 | #define PHY_REALTEK_INIT_REG6 0x11 |
533 | #define PHY_REALTEK_INIT_REG7 0x01 | ||
532 | #define PHY_REALTEK_INIT1 0x0000 | 534 | #define PHY_REALTEK_INIT1 0x0000 |
533 | #define PHY_REALTEK_INIT2 0x8e00 | 535 | #define PHY_REALTEK_INIT2 0x8e00 |
534 | #define PHY_REALTEK_INIT3 0x0001 | 536 | #define PHY_REALTEK_INIT3 0x0001 |
@@ -537,6 +539,9 @@ union ring_type { | |||
537 | #define PHY_REALTEK_INIT6 0xf5c7 | 539 | #define PHY_REALTEK_INIT6 0xf5c7 |
538 | #define PHY_REALTEK_INIT7 0x1000 | 540 | #define PHY_REALTEK_INIT7 0x1000 |
539 | #define PHY_REALTEK_INIT8 0x0003 | 541 | #define PHY_REALTEK_INIT8 0x0003 |
542 | #define PHY_REALTEK_INIT9 0x0008 | ||
543 | #define PHY_REALTEK_INIT10 0x0005 | ||
544 | #define PHY_REALTEK_INIT11 0x0200 | ||
540 | #define PHY_REALTEK_INIT_MSK1 0x0003 | 545 | #define PHY_REALTEK_INIT_MSK1 0x0003 |
541 | 546 | ||
542 | #define PHY_GIGABIT 0x0100 | 547 | #define PHY_GIGABIT 0x0100 |
@@ -1149,6 +1154,42 @@ static int phy_init(struct net_device *dev) | |||
1149 | return PHY_ERROR; | 1154 | return PHY_ERROR; |
1150 | } | 1155 | } |
1151 | } | 1156 | } |
1157 | if (np->phy_model == PHY_MODEL_REALTEK_8211 && | ||
1158 | np->phy_rev == PHY_REV_REALTEK_8211C) { | ||
1159 | u32 powerstate = readl(base + NvRegPowerState2); | ||
1160 | |||
1161 | /* need to perform hw phy reset */ | ||
1162 | powerstate |= NVREG_POWERSTATE2_PHY_RESET; | ||
1163 | writel(powerstate, base + NvRegPowerState2); | ||
1164 | msleep(25); | ||
1165 | |||
1166 | powerstate &= ~NVREG_POWERSTATE2_PHY_RESET; | ||
1167 | writel(powerstate, base + NvRegPowerState2); | ||
1168 | msleep(25); | ||
1169 | |||
1170 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ); | ||
1171 | reg |= PHY_REALTEK_INIT9; | ||
1172 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg)) { | ||
1173 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); | ||
1174 | return PHY_ERROR; | ||
1175 | } | ||
1176 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT10)) { | ||
1177 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); | ||
1178 | return PHY_ERROR; | ||
1179 | } | ||
1180 | reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ); | ||
1181 | if (!(reg & PHY_REALTEK_INIT11)) { | ||
1182 | reg |= PHY_REALTEK_INIT11; | ||
1183 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg)) { | ||
1184 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); | ||
1185 | return PHY_ERROR; | ||
1186 | } | ||
1187 | } | ||
1188 | if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { | ||
1189 | printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); | ||
1190 | return PHY_ERROR; | ||
1191 | } | ||
1192 | } | ||
1152 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { | 1193 | if (np->phy_model == PHY_MODEL_REALTEK_8201) { |
1153 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || | 1194 | if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 || |
1154 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || | 1195 | np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 || |
@@ -1201,12 +1242,23 @@ static int phy_init(struct net_device *dev) | |||
1201 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); | 1242 | mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); |
1202 | mii_control |= BMCR_ANENABLE; | 1243 | mii_control |= BMCR_ANENABLE; |
1203 | 1244 | ||
1204 | /* reset the phy | 1245 | if (np->phy_oui == PHY_OUI_REALTEK && |
1205 | * (certain phys need bmcr to be setup with reset) | 1246 | np->phy_model == PHY_MODEL_REALTEK_8211 && |
1206 | */ | 1247 | np->phy_rev == PHY_REV_REALTEK_8211C) { |
1207 | if (phy_reset(dev, mii_control)) { | 1248 | /* start autoneg since we already performed hw reset above */ |
1208 | printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev)); | 1249 | mii_control |= BMCR_ANRESTART; |
1209 | return PHY_ERROR; | 1250 | if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { |
1251 | printk(KERN_INFO "%s: phy init failed\n", pci_name(np->pci_dev)); | ||
1252 | return PHY_ERROR; | ||
1253 | } | ||
1254 | } else { | ||
1255 | /* reset the phy | ||
1256 | * (certain phys need bmcr to be setup with reset) | ||
1257 | */ | ||
1258 | if (phy_reset(dev, mii_control)) { | ||
1259 | printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev)); | ||
1260 | return PHY_ERROR; | ||
1261 | } | ||
1210 | } | 1262 | } |
1211 | 1263 | ||
1212 | /* phy vendor specific configuration */ | 1264 | /* phy vendor specific configuration */ |
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 91ec9fdc7184..a03fe1fb61ca 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
@@ -260,7 +260,7 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
260 | dma_addr = dma_map_single(&adapter->vdev->dev, skb->data, | 260 | dma_addr = dma_map_single(&adapter->vdev->dev, skb->data, |
261 | pool->buff_size, DMA_FROM_DEVICE); | 261 | pool->buff_size, DMA_FROM_DEVICE); |
262 | 262 | ||
263 | if (dma_mapping_error((&adapter->vdev->dev, dma_addr)) | 263 | if (dma_mapping_error(&adapter->vdev->dev, dma_addr)) |
264 | goto failure; | 264 | goto failure; |
265 | 265 | ||
266 | pool->free_map[free_index] = IBM_VETH_INVALID_MAP; | 266 | pool->free_map[free_index] = IBM_VETH_INVALID_MAP; |
@@ -294,7 +294,7 @@ failure: | |||
294 | pool->consumer_index = pool->size - 1; | 294 | pool->consumer_index = pool->size - 1; |
295 | else | 295 | else |
296 | pool->consumer_index--; | 296 | pool->consumer_index--; |
297 | if (!dma_mapping_error((&adapter->vdev->dev, dma_addr)) | 297 | if (!dma_mapping_error(&adapter->vdev->dev, dma_addr)) |
298 | dma_unmap_single(&adapter->vdev->dev, | 298 | dma_unmap_single(&adapter->vdev->dev, |
299 | pool->dma_addr[index], pool->buff_size, | 299 | pool->dma_addr[index], pool->buff_size, |
300 | DMA_FROM_DEVICE); | 300 | DMA_FROM_DEVICE); |
@@ -488,7 +488,7 @@ static void ibmveth_cleanup(struct ibmveth_adapter *adapter) | |||
488 | &adapter->rx_buff_pool[i]); | 488 | &adapter->rx_buff_pool[i]); |
489 | 489 | ||
490 | if (adapter->bounce_buffer != NULL) { | 490 | if (adapter->bounce_buffer != NULL) { |
491 | if (!dma_mapping_error(adapter->bounce_buffer_dma)) { | 491 | if (!dma_mapping_error(dev, adapter->bounce_buffer_dma)) { |
492 | dma_unmap_single(&adapter->vdev->dev, | 492 | dma_unmap_single(&adapter->vdev->dev, |
493 | adapter->bounce_buffer_dma, | 493 | adapter->bounce_buffer_dma, |
494 | adapter->netdev->mtu + IBMVETH_BUFF_OH, | 494 | adapter->netdev->mtu + IBMVETH_BUFF_OH, |
@@ -924,7 +924,7 @@ static int ibmveth_start_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
924 | buf[1] = 0; | 924 | buf[1] = 0; |
925 | } | 925 | } |
926 | 926 | ||
927 | if (dma_mapping_error((&adapter->vdev->dev, data_dma_addr)) { | 927 | if (dma_mapping_error(&adapter->vdev->dev, data_dma_addr)) { |
928 | if (!firmware_has_feature(FW_FEATURE_CMO)) | 928 | if (!firmware_has_feature(FW_FEATURE_CMO)) |
929 | ibmveth_error_printk("tx: unable to map xmit buffer\n"); | 929 | ibmveth_error_printk("tx: unable to map xmit buffer\n"); |
930 | skb_copy_from_linear_data(skb, adapter->bounce_buffer, | 930 | skb_copy_from_linear_data(skb, adapter->bounce_buffer, |
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c index 0960e69b2da4..e4fbefc8c82f 100644 --- a/drivers/net/ifb.c +++ b/drivers/net/ifb.c | |||
@@ -69,18 +69,20 @@ static void ri_tasklet(unsigned long dev) | |||
69 | struct net_device *_dev = (struct net_device *)dev; | 69 | struct net_device *_dev = (struct net_device *)dev; |
70 | struct ifb_private *dp = netdev_priv(_dev); | 70 | struct ifb_private *dp = netdev_priv(_dev); |
71 | struct net_device_stats *stats = &_dev->stats; | 71 | struct net_device_stats *stats = &_dev->stats; |
72 | struct netdev_queue *txq; | ||
72 | struct sk_buff *skb; | 73 | struct sk_buff *skb; |
73 | 74 | ||
75 | txq = netdev_get_tx_queue(_dev, 0); | ||
74 | dp->st_task_enter++; | 76 | dp->st_task_enter++; |
75 | if ((skb = skb_peek(&dp->tq)) == NULL) { | 77 | if ((skb = skb_peek(&dp->tq)) == NULL) { |
76 | dp->st_txq_refl_try++; | 78 | dp->st_txq_refl_try++; |
77 | if (netif_tx_trylock(_dev)) { | 79 | if (__netif_tx_trylock(txq)) { |
78 | dp->st_rxq_enter++; | 80 | dp->st_rxq_enter++; |
79 | while ((skb = skb_dequeue(&dp->rq)) != NULL) { | 81 | while ((skb = skb_dequeue(&dp->rq)) != NULL) { |
80 | skb_queue_tail(&dp->tq, skb); | 82 | skb_queue_tail(&dp->tq, skb); |
81 | dp->st_rx2tx_tran++; | 83 | dp->st_rx2tx_tran++; |
82 | } | 84 | } |
83 | netif_tx_unlock(_dev); | 85 | __netif_tx_unlock(txq); |
84 | } else { | 86 | } else { |
85 | /* reschedule */ | 87 | /* reschedule */ |
86 | dp->st_rxq_notenter++; | 88 | dp->st_rxq_notenter++; |
@@ -115,7 +117,7 @@ static void ri_tasklet(unsigned long dev) | |||
115 | BUG(); | 117 | BUG(); |
116 | } | 118 | } |
117 | 119 | ||
118 | if (netif_tx_trylock(_dev)) { | 120 | if (__netif_tx_trylock(txq)) { |
119 | dp->st_rxq_check++; | 121 | dp->st_rxq_check++; |
120 | if ((skb = skb_peek(&dp->rq)) == NULL) { | 122 | if ((skb = skb_peek(&dp->rq)) == NULL) { |
121 | dp->tasklet_pending = 0; | 123 | dp->tasklet_pending = 0; |
@@ -123,10 +125,10 @@ static void ri_tasklet(unsigned long dev) | |||
123 | netif_wake_queue(_dev); | 125 | netif_wake_queue(_dev); |
124 | } else { | 126 | } else { |
125 | dp->st_rxq_rsch++; | 127 | dp->st_rxq_rsch++; |
126 | netif_tx_unlock(_dev); | 128 | __netif_tx_unlock(txq); |
127 | goto resched; | 129 | goto resched; |
128 | } | 130 | } |
129 | netif_tx_unlock(_dev); | 131 | __netif_tx_unlock(txq); |
130 | } else { | 132 | } else { |
131 | resched: | 133 | resched: |
132 | dp->tasklet_pending = 1; | 134 | dp->tasklet_pending = 1; |
diff --git a/drivers/net/irda/act200l-sir.c b/drivers/net/irda/act200l-sir.c index d8b89c74aabd..37ab8c855719 100644 --- a/drivers/net/irda/act200l-sir.c +++ b/drivers/net/irda/act200l-sir.c | |||
@@ -107,7 +107,7 @@ static int act200l_open(struct sir_dev *dev) | |||
107 | { | 107 | { |
108 | struct qos_info *qos = &dev->qos; | 108 | struct qos_info *qos = &dev->qos; |
109 | 109 | ||
110 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__ ); | 110 | IRDA_DEBUG(2, "%s()\n", __func__ ); |
111 | 111 | ||
112 | /* Power on the dongle */ | 112 | /* Power on the dongle */ |
113 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 113 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
@@ -124,7 +124,7 @@ static int act200l_open(struct sir_dev *dev) | |||
124 | 124 | ||
125 | static int act200l_close(struct sir_dev *dev) | 125 | static int act200l_close(struct sir_dev *dev) |
126 | { | 126 | { |
127 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__ ); | 127 | IRDA_DEBUG(2, "%s()\n", __func__ ); |
128 | 128 | ||
129 | /* Power off the dongle */ | 129 | /* Power off the dongle */ |
130 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 130 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -143,7 +143,7 @@ static int act200l_change_speed(struct sir_dev *dev, unsigned speed) | |||
143 | u8 control[3]; | 143 | u8 control[3]; |
144 | int ret = 0; | 144 | int ret = 0; |
145 | 145 | ||
146 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__ ); | 146 | IRDA_DEBUG(2, "%s()\n", __func__ ); |
147 | 147 | ||
148 | /* Clear DTR and set RTS to enter command mode */ | 148 | /* Clear DTR and set RTS to enter command mode */ |
149 | sirdev_set_dtr_rts(dev, FALSE, TRUE); | 149 | sirdev_set_dtr_rts(dev, FALSE, TRUE); |
@@ -212,7 +212,7 @@ static int act200l_reset(struct sir_dev *dev) | |||
212 | }; | 212 | }; |
213 | int ret = 0; | 213 | int ret = 0; |
214 | 214 | ||
215 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__ ); | 215 | IRDA_DEBUG(2, "%s()\n", __func__ ); |
216 | 216 | ||
217 | switch (state) { | 217 | switch (state) { |
218 | case SIRDEV_STATE_DONGLE_RESET: | 218 | case SIRDEV_STATE_DONGLE_RESET: |
@@ -240,7 +240,7 @@ static int act200l_reset(struct sir_dev *dev) | |||
240 | dev->speed = 9600; | 240 | dev->speed = 9600; |
241 | break; | 241 | break; |
242 | default: | 242 | default: |
243 | IRDA_ERROR("%s(), unknown state %d\n", __FUNCTION__, state); | 243 | IRDA_ERROR("%s(), unknown state %d\n", __func__, state); |
244 | ret = -1; | 244 | ret = -1; |
245 | break; | 245 | break; |
246 | } | 246 | } |
diff --git a/drivers/net/irda/actisys-sir.c b/drivers/net/irda/actisys-sir.c index 736d2473b7e1..50b2141a6103 100644 --- a/drivers/net/irda/actisys-sir.c +++ b/drivers/net/irda/actisys-sir.c | |||
@@ -165,7 +165,7 @@ static int actisys_change_speed(struct sir_dev *dev, unsigned speed) | |||
165 | int ret = 0; | 165 | int ret = 0; |
166 | int i = 0; | 166 | int i = 0; |
167 | 167 | ||
168 | IRDA_DEBUG(4, "%s(), speed=%d (was %d)\n", __FUNCTION__, | 168 | IRDA_DEBUG(4, "%s(), speed=%d (was %d)\n", __func__, |
169 | speed, dev->speed); | 169 | speed, dev->speed); |
170 | 170 | ||
171 | /* dongle was already resetted from irda_request state machine, | 171 | /* dongle was already resetted from irda_request state machine, |
diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c index 083b0dd70fef..2ff181861d2d 100644 --- a/drivers/net/irda/ali-ircc.c +++ b/drivers/net/irda/ali-ircc.c | |||
@@ -152,7 +152,7 @@ static int __init ali_ircc_init(void) | |||
152 | int reg, revision; | 152 | int reg, revision; |
153 | int i = 0; | 153 | int i = 0; |
154 | 154 | ||
155 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 155 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
156 | 156 | ||
157 | ret = platform_driver_register(&ali_ircc_driver); | 157 | ret = platform_driver_register(&ali_ircc_driver); |
158 | if (ret) { | 158 | if (ret) { |
@@ -166,7 +166,7 @@ static int __init ali_ircc_init(void) | |||
166 | /* Probe for all the ALi chipsets we know about */ | 166 | /* Probe for all the ALi chipsets we know about */ |
167 | for (chip= chips; chip->name; chip++, i++) | 167 | for (chip= chips; chip->name; chip++, i++) |
168 | { | 168 | { |
169 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__, chip->name); | 169 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, chip->name); |
170 | 170 | ||
171 | /* Try all config registers for this chip */ | 171 | /* Try all config registers for this chip */ |
172 | for (cfg=0; cfg<2; cfg++) | 172 | for (cfg=0; cfg<2; cfg++) |
@@ -196,11 +196,11 @@ static int __init ali_ircc_init(void) | |||
196 | 196 | ||
197 | if (reg == chip->cid_value) | 197 | if (reg == chip->cid_value) |
198 | { | 198 | { |
199 | IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __FUNCTION__, cfg_base); | 199 | IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __func__, cfg_base); |
200 | 200 | ||
201 | outb(0x1F, cfg_base); | 201 | outb(0x1F, cfg_base); |
202 | revision = inb(cfg_base+1); | 202 | revision = inb(cfg_base+1); |
203 | IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __FUNCTION__, | 203 | IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __func__, |
204 | chip->name, revision); | 204 | chip->name, revision); |
205 | 205 | ||
206 | /* | 206 | /* |
@@ -223,14 +223,14 @@ static int __init ali_ircc_init(void) | |||
223 | } | 223 | } |
224 | else | 224 | else |
225 | { | 225 | { |
226 | IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __FUNCTION__, chip->name, cfg_base); | 226 | IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __func__, chip->name, cfg_base); |
227 | } | 227 | } |
228 | /* Exit configuration */ | 228 | /* Exit configuration */ |
229 | outb(0xbb, cfg_base); | 229 | outb(0xbb, cfg_base); |
230 | } | 230 | } |
231 | } | 231 | } |
232 | 232 | ||
233 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 233 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
234 | 234 | ||
235 | if (ret) | 235 | if (ret) |
236 | platform_driver_unregister(&ali_ircc_driver); | 236 | platform_driver_unregister(&ali_ircc_driver); |
@@ -248,7 +248,7 @@ static void __exit ali_ircc_cleanup(void) | |||
248 | { | 248 | { |
249 | int i; | 249 | int i; |
250 | 250 | ||
251 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 251 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
252 | 252 | ||
253 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { | 253 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
254 | if (dev_self[i]) | 254 | if (dev_self[i]) |
@@ -257,7 +257,7 @@ static void __exit ali_ircc_cleanup(void) | |||
257 | 257 | ||
258 | platform_driver_unregister(&ali_ircc_driver); | 258 | platform_driver_unregister(&ali_ircc_driver); |
259 | 259 | ||
260 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 260 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
261 | } | 261 | } |
262 | 262 | ||
263 | /* | 263 | /* |
@@ -273,11 +273,11 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
273 | int dongle_id; | 273 | int dongle_id; |
274 | int err; | 274 | int err; |
275 | 275 | ||
276 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 276 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
277 | 277 | ||
278 | if (i >= ARRAY_SIZE(dev_self)) { | 278 | if (i >= ARRAY_SIZE(dev_self)) { |
279 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", | 279 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", |
280 | __FUNCTION__); | 280 | __func__); |
281 | return -ENOMEM; | 281 | return -ENOMEM; |
282 | } | 282 | } |
283 | 283 | ||
@@ -288,7 +288,7 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
288 | dev = alloc_irdadev(sizeof(*self)); | 288 | dev = alloc_irdadev(sizeof(*self)); |
289 | if (dev == NULL) { | 289 | if (dev == NULL) { |
290 | IRDA_ERROR("%s(), can't allocate memory for control block!\n", | 290 | IRDA_ERROR("%s(), can't allocate memory for control block!\n", |
291 | __FUNCTION__); | 291 | __func__); |
292 | return -ENOMEM; | 292 | return -ENOMEM; |
293 | } | 293 | } |
294 | 294 | ||
@@ -312,7 +312,7 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
312 | /* Reserve the ioports that we need */ | 312 | /* Reserve the ioports that we need */ |
313 | if (!request_region(self->io.fir_base, self->io.fir_ext, | 313 | if (!request_region(self->io.fir_base, self->io.fir_ext, |
314 | ALI_IRCC_DRIVER_NAME)) { | 314 | ALI_IRCC_DRIVER_NAME)) { |
315 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __FUNCTION__, | 315 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__, |
316 | self->io.fir_base); | 316 | self->io.fir_base); |
317 | err = -ENODEV; | 317 | err = -ENODEV; |
318 | goto err_out1; | 318 | goto err_out1; |
@@ -370,19 +370,19 @@ static int ali_ircc_open(int i, chipio_t *info) | |||
370 | 370 | ||
371 | err = register_netdev(dev); | 371 | err = register_netdev(dev); |
372 | if (err) { | 372 | if (err) { |
373 | IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__); | 373 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
374 | goto err_out4; | 374 | goto err_out4; |
375 | } | 375 | } |
376 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | 376 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); |
377 | 377 | ||
378 | /* Check dongle id */ | 378 | /* Check dongle id */ |
379 | dongle_id = ali_ircc_read_dongle_id(i, info); | 379 | dongle_id = ali_ircc_read_dongle_id(i, info); |
380 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __FUNCTION__, | 380 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __func__, |
381 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); | 381 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); |
382 | 382 | ||
383 | self->io.dongle_id = dongle_id; | 383 | self->io.dongle_id = dongle_id; |
384 | 384 | ||
385 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 385 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
386 | 386 | ||
387 | return 0; | 387 | return 0; |
388 | 388 | ||
@@ -411,7 +411,7 @@ static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |||
411 | { | 411 | { |
412 | int iobase; | 412 | int iobase; |
413 | 413 | ||
414 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 414 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__); |
415 | 415 | ||
416 | IRDA_ASSERT(self != NULL, return -1;); | 416 | IRDA_ASSERT(self != NULL, return -1;); |
417 | 417 | ||
@@ -421,7 +421,7 @@ static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |||
421 | unregister_netdev(self->netdev); | 421 | unregister_netdev(self->netdev); |
422 | 422 | ||
423 | /* Release the PORT that this driver is using */ | 423 | /* Release the PORT that this driver is using */ |
424 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __FUNCTION__, self->io.fir_base); | 424 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __func__, self->io.fir_base); |
425 | release_region(self->io.fir_base, self->io.fir_ext); | 425 | release_region(self->io.fir_base, self->io.fir_ext); |
426 | 426 | ||
427 | if (self->tx_buff.head) | 427 | if (self->tx_buff.head) |
@@ -435,7 +435,7 @@ static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |||
435 | dev_self[self->index] = NULL; | 435 | dev_self[self->index] = NULL; |
436 | free_netdev(self->netdev); | 436 | free_netdev(self->netdev); |
437 | 437 | ||
438 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 438 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
439 | 439 | ||
440 | return 0; | 440 | return 0; |
441 | } | 441 | } |
@@ -478,7 +478,7 @@ static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |||
478 | int cfg_base = info->cfg_base; | 478 | int cfg_base = info->cfg_base; |
479 | int hi, low, reg; | 479 | int hi, low, reg; |
480 | 480 | ||
481 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 481 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
482 | 482 | ||
483 | /* Enter Configuration */ | 483 | /* Enter Configuration */ |
484 | outb(chip->entr1, cfg_base); | 484 | outb(chip->entr1, cfg_base); |
@@ -497,13 +497,13 @@ static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |||
497 | 497 | ||
498 | info->sir_base = info->fir_base; | 498 | info->sir_base = info->fir_base; |
499 | 499 | ||
500 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__, info->fir_base); | 500 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, info->fir_base); |
501 | 501 | ||
502 | /* Read IRQ control register */ | 502 | /* Read IRQ control register */ |
503 | outb(0x70, cfg_base); | 503 | outb(0x70, cfg_base); |
504 | reg = inb(cfg_base+1); | 504 | reg = inb(cfg_base+1); |
505 | info->irq = reg & 0x0f; | 505 | info->irq = reg & 0x0f; |
506 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq); | 506 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
507 | 507 | ||
508 | /* Read DMA channel */ | 508 | /* Read DMA channel */ |
509 | outb(0x74, cfg_base); | 509 | outb(0x74, cfg_base); |
@@ -511,26 +511,26 @@ static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |||
511 | info->dma = reg & 0x07; | 511 | info->dma = reg & 0x07; |
512 | 512 | ||
513 | if(info->dma == 0x04) | 513 | if(info->dma == 0x04) |
514 | IRDA_WARNING("%s(), No DMA channel assigned !\n", __FUNCTION__); | 514 | IRDA_WARNING("%s(), No DMA channel assigned !\n", __func__); |
515 | else | 515 | else |
516 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma); | 516 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
517 | 517 | ||
518 | /* Read Enabled Status */ | 518 | /* Read Enabled Status */ |
519 | outb(0x30, cfg_base); | 519 | outb(0x30, cfg_base); |
520 | reg = inb(cfg_base+1); | 520 | reg = inb(cfg_base+1); |
521 | info->enabled = (reg & 0x80) && (reg & 0x01); | 521 | info->enabled = (reg & 0x80) && (reg & 0x01); |
522 | IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __FUNCTION__, info->enabled); | 522 | IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __func__, info->enabled); |
523 | 523 | ||
524 | /* Read Power Status */ | 524 | /* Read Power Status */ |
525 | outb(0x22, cfg_base); | 525 | outb(0x22, cfg_base); |
526 | reg = inb(cfg_base+1); | 526 | reg = inb(cfg_base+1); |
527 | info->suspended = (reg & 0x20); | 527 | info->suspended = (reg & 0x20); |
528 | IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __FUNCTION__, info->suspended); | 528 | IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __func__, info->suspended); |
529 | 529 | ||
530 | /* Exit configuration */ | 530 | /* Exit configuration */ |
531 | outb(0xbb, cfg_base); | 531 | outb(0xbb, cfg_base); |
532 | 532 | ||
533 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __FUNCTION__); | 533 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
534 | 534 | ||
535 | return 0; | 535 | return 0; |
536 | } | 536 | } |
@@ -548,7 +548,7 @@ static int ali_ircc_setup(chipio_t *info) | |||
548 | int version; | 548 | int version; |
549 | int iobase = info->fir_base; | 549 | int iobase = info->fir_base; |
550 | 550 | ||
551 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 551 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
552 | 552 | ||
553 | /* Locking comments : | 553 | /* Locking comments : |
554 | * Most operations here need to be protected. We are called before | 554 | * Most operations here need to be protected. We are called before |
@@ -609,7 +609,7 @@ static int ali_ircc_setup(chipio_t *info) | |||
609 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM | 609 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM |
610 | // Turn on the interrupts in ali_ircc_net_open | 610 | // Turn on the interrupts in ali_ircc_net_open |
611 | 611 | ||
612 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__); | 612 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
613 | 613 | ||
614 | return 0; | 614 | return 0; |
615 | } | 615 | } |
@@ -626,7 +626,7 @@ static int ali_ircc_read_dongle_id (int i, chipio_t *info) | |||
626 | int dongle_id, reg; | 626 | int dongle_id, reg; |
627 | int cfg_base = info->cfg_base; | 627 | int cfg_base = info->cfg_base; |
628 | 628 | ||
629 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 629 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
630 | 630 | ||
631 | /* Enter Configuration */ | 631 | /* Enter Configuration */ |
632 | outb(chips[i].entr1, cfg_base); | 632 | outb(chips[i].entr1, cfg_base); |
@@ -640,13 +640,13 @@ static int ali_ircc_read_dongle_id (int i, chipio_t *info) | |||
640 | outb(0xf0, cfg_base); | 640 | outb(0xf0, cfg_base); |
641 | reg = inb(cfg_base+1); | 641 | reg = inb(cfg_base+1); |
642 | dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01); | 642 | dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01); |
643 | IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __FUNCTION__, | 643 | IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __func__, |
644 | dongle_id, dongle_types[dongle_id]); | 644 | dongle_id, dongle_types[dongle_id]); |
645 | 645 | ||
646 | /* Exit configuration */ | 646 | /* Exit configuration */ |
647 | outb(0xbb, cfg_base); | 647 | outb(0xbb, cfg_base); |
648 | 648 | ||
649 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__); | 649 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
650 | 650 | ||
651 | return dongle_id; | 651 | return dongle_id; |
652 | } | 652 | } |
@@ -663,7 +663,7 @@ static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id) | |||
663 | struct ali_ircc_cb *self; | 663 | struct ali_ircc_cb *self; |
664 | int ret; | 664 | int ret; |
665 | 665 | ||
666 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 666 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
667 | 667 | ||
668 | self = dev->priv; | 668 | self = dev->priv; |
669 | 669 | ||
@@ -677,7 +677,7 @@ static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id) | |||
677 | 677 | ||
678 | spin_unlock(&self->lock); | 678 | spin_unlock(&self->lock); |
679 | 679 | ||
680 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__); | 680 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
681 | return ret; | 681 | return ret; |
682 | } | 682 | } |
683 | /* | 683 | /* |
@@ -691,7 +691,7 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
691 | __u8 eir, OldMessageCount; | 691 | __u8 eir, OldMessageCount; |
692 | int iobase, tmp; | 692 | int iobase, tmp; |
693 | 693 | ||
694 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 694 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__); |
695 | 695 | ||
696 | iobase = self->io.fir_base; | 696 | iobase = self->io.fir_base; |
697 | 697 | ||
@@ -704,10 +704,10 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
704 | //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM | 704 | //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM |
705 | eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ | 705 | eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ |
706 | 706 | ||
707 | IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __FUNCTION__,self->InterruptID); | 707 | IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __func__,self->InterruptID); |
708 | IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __FUNCTION__,self->LineStatus); | 708 | IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __func__,self->LineStatus); |
709 | IRDA_DEBUG(1, "%s(), self->ier = %x\n", __FUNCTION__,self->ier); | 709 | IRDA_DEBUG(1, "%s(), self->ier = %x\n", __func__,self->ier); |
710 | IRDA_DEBUG(1, "%s(), eir = %x\n", __FUNCTION__,eir); | 710 | IRDA_DEBUG(1, "%s(), eir = %x\n", __func__,eir); |
711 | 711 | ||
712 | /* Disable interrupts */ | 712 | /* Disable interrupts */ |
713 | SetCOMInterrupts(self, FALSE); | 713 | SetCOMInterrupts(self, FALSE); |
@@ -718,7 +718,7 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
718 | { | 718 | { |
719 | if (self->io.direction == IO_XMIT) /* TX */ | 719 | if (self->io.direction == IO_XMIT) /* TX */ |
720 | { | 720 | { |
721 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __FUNCTION__); | 721 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __func__); |
722 | 722 | ||
723 | if(ali_ircc_dma_xmit_complete(self)) | 723 | if(ali_ircc_dma_xmit_complete(self)) |
724 | { | 724 | { |
@@ -737,23 +737,23 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
737 | } | 737 | } |
738 | else /* RX */ | 738 | else /* RX */ |
739 | { | 739 | { |
740 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __FUNCTION__); | 740 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __func__); |
741 | 741 | ||
742 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | 742 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) |
743 | { | 743 | { |
744 | self->rcvFramesOverflow = TRUE; | 744 | self->rcvFramesOverflow = TRUE; |
745 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******** \n", __FUNCTION__); | 745 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******** \n", __func__); |
746 | } | 746 | } |
747 | 747 | ||
748 | if (ali_ircc_dma_receive_complete(self)) | 748 | if (ali_ircc_dma_receive_complete(self)) |
749 | { | 749 | { |
750 | IRDA_DEBUG(1, "%s(), ******* receive complete ******** \n", __FUNCTION__); | 750 | IRDA_DEBUG(1, "%s(), ******* receive complete ******** \n", __func__); |
751 | 751 | ||
752 | self->ier = IER_EOM; | 752 | self->ier = IER_EOM; |
753 | } | 753 | } |
754 | else | 754 | else |
755 | { | 755 | { |
756 | IRDA_DEBUG(1, "%s(), ******* Not receive complete ******** \n", __FUNCTION__); | 756 | IRDA_DEBUG(1, "%s(), ******* Not receive complete ******** \n", __func__); |
757 | 757 | ||
758 | self->ier = IER_EOM | IER_TIMER; | 758 | self->ier = IER_EOM | IER_TIMER; |
759 | } | 759 | } |
@@ -766,7 +766,7 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
766 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | 766 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) |
767 | { | 767 | { |
768 | self->rcvFramesOverflow = TRUE; | 768 | self->rcvFramesOverflow = TRUE; |
769 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******* \n", __FUNCTION__); | 769 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******* \n", __func__); |
770 | } | 770 | } |
771 | /* Disable Timer */ | 771 | /* Disable Timer */ |
772 | switch_bank(iobase, BANK1); | 772 | switch_bank(iobase, BANK1); |
@@ -798,7 +798,7 @@ static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |||
798 | /* Restore Interrupt */ | 798 | /* Restore Interrupt */ |
799 | SetCOMInterrupts(self, TRUE); | 799 | SetCOMInterrupts(self, TRUE); |
800 | 800 | ||
801 | IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __FUNCTION__); | 801 | IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __func__); |
802 | return IRQ_RETVAL(eir); | 802 | return IRQ_RETVAL(eir); |
803 | } | 803 | } |
804 | 804 | ||
@@ -813,7 +813,7 @@ static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |||
813 | int iobase; | 813 | int iobase; |
814 | int iir, lsr; | 814 | int iir, lsr; |
815 | 815 | ||
816 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 816 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
817 | 817 | ||
818 | iobase = self->io.sir_base; | 818 | iobase = self->io.sir_base; |
819 | 819 | ||
@@ -822,13 +822,13 @@ static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |||
822 | /* Clear interrupt */ | 822 | /* Clear interrupt */ |
823 | lsr = inb(iobase+UART_LSR); | 823 | lsr = inb(iobase+UART_LSR); |
824 | 824 | ||
825 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __FUNCTION__, | 825 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __func__, |
826 | iir, lsr, iobase); | 826 | iir, lsr, iobase); |
827 | 827 | ||
828 | switch (iir) | 828 | switch (iir) |
829 | { | 829 | { |
830 | case UART_IIR_RLSI: | 830 | case UART_IIR_RLSI: |
831 | IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__); | 831 | IRDA_DEBUG(2, "%s(), RLSI\n", __func__); |
832 | break; | 832 | break; |
833 | case UART_IIR_RDI: | 833 | case UART_IIR_RDI: |
834 | /* Receive interrupt */ | 834 | /* Receive interrupt */ |
@@ -842,14 +842,14 @@ static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |||
842 | } | 842 | } |
843 | break; | 843 | break; |
844 | default: | 844 | default: |
845 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __FUNCTION__, iir); | 845 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __func__, iir); |
846 | break; | 846 | break; |
847 | } | 847 | } |
848 | 848 | ||
849 | } | 849 | } |
850 | 850 | ||
851 | 851 | ||
852 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__); | 852 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
853 | 853 | ||
854 | return IRQ_RETVAL(iir); | 854 | return IRQ_RETVAL(iir); |
855 | } | 855 | } |
@@ -866,7 +866,7 @@ static void ali_ircc_sir_receive(struct ali_ircc_cb *self) | |||
866 | int boguscount = 0; | 866 | int boguscount = 0; |
867 | int iobase; | 867 | int iobase; |
868 | 868 | ||
869 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__); | 869 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
870 | IRDA_ASSERT(self != NULL, return;); | 870 | IRDA_ASSERT(self != NULL, return;); |
871 | 871 | ||
872 | iobase = self->io.sir_base; | 872 | iobase = self->io.sir_base; |
@@ -881,12 +881,12 @@ static void ali_ircc_sir_receive(struct ali_ircc_cb *self) | |||
881 | 881 | ||
882 | /* Make sure we don't stay here too long */ | 882 | /* Make sure we don't stay here too long */ |
883 | if (boguscount++ > 32) { | 883 | if (boguscount++ > 32) { |
884 | IRDA_DEBUG(2,"%s(), breaking!\n", __FUNCTION__); | 884 | IRDA_DEBUG(2,"%s(), breaking!\n", __func__); |
885 | break; | 885 | break; |
886 | } | 886 | } |
887 | } while (inb(iobase+UART_LSR) & UART_LSR_DR); | 887 | } while (inb(iobase+UART_LSR) & UART_LSR_DR); |
888 | 888 | ||
889 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 889 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
890 | } | 890 | } |
891 | 891 | ||
892 | /* | 892 | /* |
@@ -903,7 +903,7 @@ static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |||
903 | 903 | ||
904 | IRDA_ASSERT(self != NULL, return;); | 904 | IRDA_ASSERT(self != NULL, return;); |
905 | 905 | ||
906 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 906 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
907 | 907 | ||
908 | iobase = self->io.sir_base; | 908 | iobase = self->io.sir_base; |
909 | 909 | ||
@@ -922,16 +922,16 @@ static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |||
922 | { | 922 | { |
923 | /* We must wait until all data are gone */ | 923 | /* We must wait until all data are gone */ |
924 | while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT)) | 924 | while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT)) |
925 | IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __FUNCTION__ ); | 925 | IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __func__ ); |
926 | 926 | ||
927 | IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __FUNCTION__ , self->new_speed); | 927 | IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __func__ , self->new_speed); |
928 | ali_ircc_change_speed(self, self->new_speed); | 928 | ali_ircc_change_speed(self, self->new_speed); |
929 | self->new_speed = 0; | 929 | self->new_speed = 0; |
930 | 930 | ||
931 | // benjamin 2000/11/10 06:32PM | 931 | // benjamin 2000/11/10 06:32PM |
932 | if (self->io.speed > 115200) | 932 | if (self->io.speed > 115200) |
933 | { | 933 | { |
934 | IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT \n", __FUNCTION__ ); | 934 | IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT \n", __func__ ); |
935 | 935 | ||
936 | self->ier = IER_EOM; | 936 | self->ier = IER_EOM; |
937 | // SetCOMInterrupts(self, TRUE); | 937 | // SetCOMInterrupts(self, TRUE); |
@@ -949,7 +949,7 @@ static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |||
949 | outb(UART_IER_RDI, iobase+UART_IER); | 949 | outb(UART_IER_RDI, iobase+UART_IER); |
950 | } | 950 | } |
951 | 951 | ||
952 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 952 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
953 | } | 953 | } |
954 | 954 | ||
955 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | 955 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) |
@@ -957,9 +957,9 @@ static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | |||
957 | struct net_device *dev = self->netdev; | 957 | struct net_device *dev = self->netdev; |
958 | int iobase; | 958 | int iobase; |
959 | 959 | ||
960 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 960 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
961 | 961 | ||
962 | IRDA_DEBUG(2, "%s(), setting speed = %d \n", __FUNCTION__ , baud); | 962 | IRDA_DEBUG(2, "%s(), setting speed = %d \n", __func__ , baud); |
963 | 963 | ||
964 | /* This function *must* be called with irq off and spin-lock. | 964 | /* This function *must* be called with irq off and spin-lock. |
965 | * - Jean II */ | 965 | * - Jean II */ |
@@ -998,7 +998,7 @@ static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | |||
998 | 998 | ||
999 | netif_wake_queue(self->netdev); | 999 | netif_wake_queue(self->netdev); |
1000 | 1000 | ||
1001 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1001 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1002 | } | 1002 | } |
1003 | 1003 | ||
1004 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | 1004 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) |
@@ -1008,14 +1008,14 @@ static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | |||
1008 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv; | 1008 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv; |
1009 | struct net_device *dev; | 1009 | struct net_device *dev; |
1010 | 1010 | ||
1011 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1011 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1012 | 1012 | ||
1013 | IRDA_ASSERT(self != NULL, return;); | 1013 | IRDA_ASSERT(self != NULL, return;); |
1014 | 1014 | ||
1015 | dev = self->netdev; | 1015 | dev = self->netdev; |
1016 | iobase = self->io.fir_base; | 1016 | iobase = self->io.fir_base; |
1017 | 1017 | ||
1018 | IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __FUNCTION__ ,self->io.speed,baud); | 1018 | IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __func__ ,self->io.speed,baud); |
1019 | 1019 | ||
1020 | /* Come from SIR speed */ | 1020 | /* Come from SIR speed */ |
1021 | if(self->io.speed <=115200) | 1021 | if(self->io.speed <=115200) |
@@ -1029,7 +1029,7 @@ static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | |||
1029 | // Set Dongle Speed mode | 1029 | // Set Dongle Speed mode |
1030 | ali_ircc_change_dongle_speed(self, baud); | 1030 | ali_ircc_change_dongle_speed(self, baud); |
1031 | 1031 | ||
1032 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1032 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1033 | } | 1033 | } |
1034 | 1034 | ||
1035 | /* | 1035 | /* |
@@ -1047,9 +1047,9 @@ static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) | |||
1047 | int lcr; /* Line control reg */ | 1047 | int lcr; /* Line control reg */ |
1048 | int divisor; | 1048 | int divisor; |
1049 | 1049 | ||
1050 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1050 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1051 | 1051 | ||
1052 | IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __FUNCTION__ , speed); | 1052 | IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __func__ , speed); |
1053 | 1053 | ||
1054 | IRDA_ASSERT(self != NULL, return;); | 1054 | IRDA_ASSERT(self != NULL, return;); |
1055 | 1055 | ||
@@ -1103,7 +1103,7 @@ static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) | |||
1103 | 1103 | ||
1104 | spin_unlock_irqrestore(&self->lock, flags); | 1104 | spin_unlock_irqrestore(&self->lock, flags); |
1105 | 1105 | ||
1106 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1106 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1107 | } | 1107 | } |
1108 | 1108 | ||
1109 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | 1109 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) |
@@ -1113,14 +1113,14 @@ static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | |||
1113 | int iobase,dongle_id; | 1113 | int iobase,dongle_id; |
1114 | int tmp = 0; | 1114 | int tmp = 0; |
1115 | 1115 | ||
1116 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1116 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1117 | 1117 | ||
1118 | iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */ | 1118 | iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */ |
1119 | dongle_id = self->io.dongle_id; | 1119 | dongle_id = self->io.dongle_id; |
1120 | 1120 | ||
1121 | /* We are already locked, no need to do it again */ | 1121 | /* We are already locked, no need to do it again */ |
1122 | 1122 | ||
1123 | IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __FUNCTION__ , dongle_types[dongle_id], speed); | 1123 | IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __func__ , dongle_types[dongle_id], speed); |
1124 | 1124 | ||
1125 | switch_bank(iobase, BANK2); | 1125 | switch_bank(iobase, BANK2); |
1126 | tmp = inb(iobase+FIR_IRDA_CR); | 1126 | tmp = inb(iobase+FIR_IRDA_CR); |
@@ -1284,7 +1284,7 @@ static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | |||
1284 | 1284 | ||
1285 | switch_bank(iobase, BANK0); | 1285 | switch_bank(iobase, BANK0); |
1286 | 1286 | ||
1287 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1287 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1288 | } | 1288 | } |
1289 | 1289 | ||
1290 | /* | 1290 | /* |
@@ -1297,11 +1297,11 @@ static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |||
1297 | { | 1297 | { |
1298 | int actual = 0; | 1298 | int actual = 0; |
1299 | 1299 | ||
1300 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1300 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1301 | 1301 | ||
1302 | /* Tx FIFO should be empty! */ | 1302 | /* Tx FIFO should be empty! */ |
1303 | if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { | 1303 | if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { |
1304 | IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __FUNCTION__ ); | 1304 | IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __func__ ); |
1305 | return 0; | 1305 | return 0; |
1306 | } | 1306 | } |
1307 | 1307 | ||
@@ -1313,7 +1313,7 @@ static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |||
1313 | actual++; | 1313 | actual++; |
1314 | } | 1314 | } |
1315 | 1315 | ||
1316 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1316 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1317 | return actual; | 1317 | return actual; |
1318 | } | 1318 | } |
1319 | 1319 | ||
@@ -1329,7 +1329,7 @@ static int ali_ircc_net_open(struct net_device *dev) | |||
1329 | int iobase; | 1329 | int iobase; |
1330 | char hwname[32]; | 1330 | char hwname[32]; |
1331 | 1331 | ||
1332 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1332 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1333 | 1333 | ||
1334 | IRDA_ASSERT(dev != NULL, return -1;); | 1334 | IRDA_ASSERT(dev != NULL, return -1;); |
1335 | 1335 | ||
@@ -1375,7 +1375,7 @@ static int ali_ircc_net_open(struct net_device *dev) | |||
1375 | */ | 1375 | */ |
1376 | self->irlap = irlap_open(dev, &self->qos, hwname); | 1376 | self->irlap = irlap_open(dev, &self->qos, hwname); |
1377 | 1377 | ||
1378 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1378 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1379 | 1379 | ||
1380 | return 0; | 1380 | return 0; |
1381 | } | 1381 | } |
@@ -1392,7 +1392,7 @@ static int ali_ircc_net_close(struct net_device *dev) | |||
1392 | struct ali_ircc_cb *self; | 1392 | struct ali_ircc_cb *self; |
1393 | //int iobase; | 1393 | //int iobase; |
1394 | 1394 | ||
1395 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1395 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__ ); |
1396 | 1396 | ||
1397 | IRDA_ASSERT(dev != NULL, return -1;); | 1397 | IRDA_ASSERT(dev != NULL, return -1;); |
1398 | 1398 | ||
@@ -1415,7 +1415,7 @@ static int ali_ircc_net_close(struct net_device *dev) | |||
1415 | free_irq(self->io.irq, dev); | 1415 | free_irq(self->io.irq, dev); |
1416 | free_dma(self->io.dma); | 1416 | free_dma(self->io.dma); |
1417 | 1417 | ||
1418 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1418 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1419 | 1419 | ||
1420 | return 0; | 1420 | return 0; |
1421 | } | 1421 | } |
@@ -1434,7 +1434,7 @@ static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1434 | __u32 speed; | 1434 | __u32 speed; |
1435 | int mtt, diff; | 1435 | int mtt, diff; |
1436 | 1436 | ||
1437 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 1437 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1438 | 1438 | ||
1439 | self = (struct ali_ircc_cb *) dev->priv; | 1439 | self = (struct ali_ircc_cb *) dev->priv; |
1440 | iobase = self->io.fir_base; | 1440 | iobase = self->io.fir_base; |
@@ -1488,7 +1488,7 @@ static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1488 | diff = self->now.tv_usec - self->stamp.tv_usec; | 1488 | diff = self->now.tv_usec - self->stamp.tv_usec; |
1489 | /* self->stamp is set from ali_ircc_dma_receive_complete() */ | 1489 | /* self->stamp is set from ali_ircc_dma_receive_complete() */ |
1490 | 1490 | ||
1491 | IRDA_DEBUG(1, "%s(), ******* diff = %d ******* \n", __FUNCTION__ , diff); | 1491 | IRDA_DEBUG(1, "%s(), ******* diff = %d ******* \n", __func__ , diff); |
1492 | 1492 | ||
1493 | if (diff < 0) | 1493 | if (diff < 0) |
1494 | diff += 1000000; | 1494 | diff += 1000000; |
@@ -1510,7 +1510,7 @@ static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1510 | /* Adjust for timer resolution */ | 1510 | /* Adjust for timer resolution */ |
1511 | mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */ | 1511 | mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */ |
1512 | 1512 | ||
1513 | IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __FUNCTION__ , mtt); | 1513 | IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __func__ , mtt); |
1514 | 1514 | ||
1515 | /* Setup timer */ | 1515 | /* Setup timer */ |
1516 | if (mtt == 1) /* 500 us */ | 1516 | if (mtt == 1) /* 500 us */ |
@@ -1567,7 +1567,7 @@ static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1567 | spin_unlock_irqrestore(&self->lock, flags); | 1567 | spin_unlock_irqrestore(&self->lock, flags); |
1568 | dev_kfree_skb(skb); | 1568 | dev_kfree_skb(skb); |
1569 | 1569 | ||
1570 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1570 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1571 | return 0; | 1571 | return 0; |
1572 | } | 1572 | } |
1573 | 1573 | ||
@@ -1578,7 +1578,7 @@ static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |||
1578 | unsigned char FIFO_OPTI, Hi, Lo; | 1578 | unsigned char FIFO_OPTI, Hi, Lo; |
1579 | 1579 | ||
1580 | 1580 | ||
1581 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 1581 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1582 | 1582 | ||
1583 | iobase = self->io.fir_base; | 1583 | iobase = self->io.fir_base; |
1584 | 1584 | ||
@@ -1629,7 +1629,7 @@ static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |||
1629 | tmp = inb(iobase+FIR_LCR_B); | 1629 | tmp = inb(iobase+FIR_LCR_B); |
1630 | tmp &= ~0x20; // Disable SIP | 1630 | tmp &= ~0x20; // Disable SIP |
1631 | outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); | 1631 | outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); |
1632 | IRDA_DEBUG(1, "%s(), ******* Change to TX mode: FIR_LCR_B = 0x%x ******* \n", __FUNCTION__ , inb(iobase+FIR_LCR_B)); | 1632 | IRDA_DEBUG(1, "%s(), ******* Change to TX mode: FIR_LCR_B = 0x%x ******* \n", __func__ , inb(iobase+FIR_LCR_B)); |
1633 | 1633 | ||
1634 | outb(0, iobase+FIR_LSR); | 1634 | outb(0, iobase+FIR_LSR); |
1635 | 1635 | ||
@@ -1639,7 +1639,7 @@ static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |||
1639 | 1639 | ||
1640 | switch_bank(iobase, BANK0); | 1640 | switch_bank(iobase, BANK0); |
1641 | 1641 | ||
1642 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1642 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1643 | } | 1643 | } |
1644 | 1644 | ||
1645 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | 1645 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) |
@@ -1647,7 +1647,7 @@ static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |||
1647 | int iobase; | 1647 | int iobase; |
1648 | int ret = TRUE; | 1648 | int ret = TRUE; |
1649 | 1649 | ||
1650 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 1650 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1651 | 1651 | ||
1652 | iobase = self->io.fir_base; | 1652 | iobase = self->io.fir_base; |
1653 | 1653 | ||
@@ -1660,7 +1660,7 @@ static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |||
1660 | if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT) | 1660 | if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT) |
1661 | 1661 | ||
1662 | { | 1662 | { |
1663 | IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __FUNCTION__); | 1663 | IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __func__); |
1664 | self->stats.tx_errors++; | 1664 | self->stats.tx_errors++; |
1665 | self->stats.tx_fifo_errors++; | 1665 | self->stats.tx_fifo_errors++; |
1666 | } | 1666 | } |
@@ -1703,7 +1703,7 @@ static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |||
1703 | 1703 | ||
1704 | switch_bank(iobase, BANK0); | 1704 | switch_bank(iobase, BANK0); |
1705 | 1705 | ||
1706 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1706 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1707 | return ret; | 1707 | return ret; |
1708 | } | 1708 | } |
1709 | 1709 | ||
@@ -1718,7 +1718,7 @@ static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |||
1718 | { | 1718 | { |
1719 | int iobase, tmp; | 1719 | int iobase, tmp; |
1720 | 1720 | ||
1721 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 1721 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1722 | 1722 | ||
1723 | iobase = self->io.fir_base; | 1723 | iobase = self->io.fir_base; |
1724 | 1724 | ||
@@ -1756,7 +1756,7 @@ static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |||
1756 | //switch_bank(iobase, BANK0); | 1756 | //switch_bank(iobase, BANK0); |
1757 | tmp = inb(iobase+FIR_LCR_B); | 1757 | tmp = inb(iobase+FIR_LCR_B); |
1758 | outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM | 1758 | outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM |
1759 | IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x *** \n", __FUNCTION__ , inb(iobase+FIR_LCR_B)); | 1759 | IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x *** \n", __func__ , inb(iobase+FIR_LCR_B)); |
1760 | 1760 | ||
1761 | /* Set Rx Threshold */ | 1761 | /* Set Rx Threshold */ |
1762 | switch_bank(iobase, BANK1); | 1762 | switch_bank(iobase, BANK1); |
@@ -1768,7 +1768,7 @@ static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |||
1768 | outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | 1768 | outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); |
1769 | 1769 | ||
1770 | switch_bank(iobase, BANK0); | 1770 | switch_bank(iobase, BANK0); |
1771 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1771 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1772 | return 0; | 1772 | return 0; |
1773 | } | 1773 | } |
1774 | 1774 | ||
@@ -1779,7 +1779,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1779 | __u8 status, MessageCount; | 1779 | __u8 status, MessageCount; |
1780 | int len, i, iobase, val; | 1780 | int len, i, iobase, val; |
1781 | 1781 | ||
1782 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 1782 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1783 | 1783 | ||
1784 | st_fifo = &self->st_fifo; | 1784 | st_fifo = &self->st_fifo; |
1785 | iobase = self->io.fir_base; | 1785 | iobase = self->io.fir_base; |
@@ -1788,7 +1788,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1788 | MessageCount = inb(iobase+ FIR_LSR)&0x07; | 1788 | MessageCount = inb(iobase+ FIR_LSR)&0x07; |
1789 | 1789 | ||
1790 | if (MessageCount > 0) | 1790 | if (MessageCount > 0) |
1791 | IRDA_DEBUG(0, "%s(), Messsage count = %d,\n", __FUNCTION__ , MessageCount); | 1791 | IRDA_DEBUG(0, "%s(), Messsage count = %d,\n", __func__ , MessageCount); |
1792 | 1792 | ||
1793 | for (i=0; i<=MessageCount; i++) | 1793 | for (i=0; i<=MessageCount; i++) |
1794 | { | 1794 | { |
@@ -1801,11 +1801,11 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1801 | len = len << 8; | 1801 | len = len << 8; |
1802 | len |= inb(iobase+FIR_RX_DSR_LO); | 1802 | len |= inb(iobase+FIR_RX_DSR_LO); |
1803 | 1803 | ||
1804 | IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __FUNCTION__ , len); | 1804 | IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __func__ , len); |
1805 | IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __FUNCTION__ , status); | 1805 | IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __func__ , status); |
1806 | 1806 | ||
1807 | if (st_fifo->tail >= MAX_RX_WINDOW) { | 1807 | if (st_fifo->tail >= MAX_RX_WINDOW) { |
1808 | IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__ ); | 1808 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__ ); |
1809 | continue; | 1809 | continue; |
1810 | } | 1810 | } |
1811 | 1811 | ||
@@ -1828,7 +1828,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1828 | /* Check for errors */ | 1828 | /* Check for errors */ |
1829 | if ((status & 0xd8) || self->rcvFramesOverflow || (len==0)) | 1829 | if ((status & 0xd8) || self->rcvFramesOverflow || (len==0)) |
1830 | { | 1830 | { |
1831 | IRDA_DEBUG(0,"%s(), ************* RX Errors ************ \n", __FUNCTION__ ); | 1831 | IRDA_DEBUG(0,"%s(), ************* RX Errors ************ \n", __func__ ); |
1832 | 1832 | ||
1833 | /* Skip frame */ | 1833 | /* Skip frame */ |
1834 | self->stats.rx_errors++; | 1834 | self->stats.rx_errors++; |
@@ -1838,29 +1838,29 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1838 | if (status & LSR_FIFO_UR) | 1838 | if (status & LSR_FIFO_UR) |
1839 | { | 1839 | { |
1840 | self->stats.rx_frame_errors++; | 1840 | self->stats.rx_frame_errors++; |
1841 | IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************ \n", __FUNCTION__ ); | 1841 | IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************ \n", __func__ ); |
1842 | } | 1842 | } |
1843 | if (status & LSR_FRAME_ERROR) | 1843 | if (status & LSR_FRAME_ERROR) |
1844 | { | 1844 | { |
1845 | self->stats.rx_frame_errors++; | 1845 | self->stats.rx_frame_errors++; |
1846 | IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************ \n", __FUNCTION__ ); | 1846 | IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************ \n", __func__ ); |
1847 | } | 1847 | } |
1848 | 1848 | ||
1849 | if (status & LSR_CRC_ERROR) | 1849 | if (status & LSR_CRC_ERROR) |
1850 | { | 1850 | { |
1851 | self->stats.rx_crc_errors++; | 1851 | self->stats.rx_crc_errors++; |
1852 | IRDA_DEBUG(0,"%s(), ************* CRC Errors ************ \n", __FUNCTION__ ); | 1852 | IRDA_DEBUG(0,"%s(), ************* CRC Errors ************ \n", __func__ ); |
1853 | } | 1853 | } |
1854 | 1854 | ||
1855 | if(self->rcvFramesOverflow) | 1855 | if(self->rcvFramesOverflow) |
1856 | { | 1856 | { |
1857 | self->stats.rx_frame_errors++; | 1857 | self->stats.rx_frame_errors++; |
1858 | IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************ \n", __FUNCTION__ ); | 1858 | IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************ \n", __func__ ); |
1859 | } | 1859 | } |
1860 | if(len == 0) | 1860 | if(len == 0) |
1861 | { | 1861 | { |
1862 | self->stats.rx_frame_errors++; | 1862 | self->stats.rx_frame_errors++; |
1863 | IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 ********* \n", __FUNCTION__ ); | 1863 | IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 ********* \n", __func__ ); |
1864 | } | 1864 | } |
1865 | } | 1865 | } |
1866 | else | 1866 | else |
@@ -1872,7 +1872,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1872 | val = inb(iobase+FIR_BSR); | 1872 | val = inb(iobase+FIR_BSR); |
1873 | if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) | 1873 | if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) |
1874 | { | 1874 | { |
1875 | IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************ \n", __FUNCTION__ ); | 1875 | IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************ \n", __func__ ); |
1876 | 1876 | ||
1877 | /* Put this entry back in fifo */ | 1877 | /* Put this entry back in fifo */ |
1878 | st_fifo->head--; | 1878 | st_fifo->head--; |
@@ -1909,7 +1909,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1909 | { | 1909 | { |
1910 | IRDA_WARNING("%s(), memory squeeze, " | 1910 | IRDA_WARNING("%s(), memory squeeze, " |
1911 | "dropping frame.\n", | 1911 | "dropping frame.\n", |
1912 | __FUNCTION__); | 1912 | __func__); |
1913 | self->stats.rx_dropped++; | 1913 | self->stats.rx_dropped++; |
1914 | 1914 | ||
1915 | return FALSE; | 1915 | return FALSE; |
@@ -1937,7 +1937,7 @@ static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |||
1937 | 1937 | ||
1938 | switch_bank(iobase, BANK0); | 1938 | switch_bank(iobase, BANK0); |
1939 | 1939 | ||
1940 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 1940 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1941 | return TRUE; | 1941 | return TRUE; |
1942 | } | 1942 | } |
1943 | 1943 | ||
@@ -1956,7 +1956,7 @@ static int ali_ircc_sir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1956 | int iobase; | 1956 | int iobase; |
1957 | __u32 speed; | 1957 | __u32 speed; |
1958 | 1958 | ||
1959 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 1959 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1960 | 1960 | ||
1961 | IRDA_ASSERT(dev != NULL, return 0;); | 1961 | IRDA_ASSERT(dev != NULL, return 0;); |
1962 | 1962 | ||
@@ -2005,7 +2005,7 @@ static int ali_ircc_sir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2005 | 2005 | ||
2006 | dev_kfree_skb(skb); | 2006 | dev_kfree_skb(skb); |
2007 | 2007 | ||
2008 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2008 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
2009 | 2009 | ||
2010 | return 0; | 2010 | return 0; |
2011 | } | 2011 | } |
@@ -2024,7 +2024,7 @@ static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2024 | unsigned long flags; | 2024 | unsigned long flags; |
2025 | int ret = 0; | 2025 | int ret = 0; |
2026 | 2026 | ||
2027 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2027 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
2028 | 2028 | ||
2029 | IRDA_ASSERT(dev != NULL, return -1;); | 2029 | IRDA_ASSERT(dev != NULL, return -1;); |
2030 | 2030 | ||
@@ -2032,11 +2032,11 @@ static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2032 | 2032 | ||
2033 | IRDA_ASSERT(self != NULL, return -1;); | 2033 | IRDA_ASSERT(self != NULL, return -1;); |
2034 | 2034 | ||
2035 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__ , dev->name, cmd); | 2035 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd); |
2036 | 2036 | ||
2037 | switch (cmd) { | 2037 | switch (cmd) { |
2038 | case SIOCSBANDWIDTH: /* Set bandwidth */ | 2038 | case SIOCSBANDWIDTH: /* Set bandwidth */ |
2039 | IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __FUNCTION__ ); | 2039 | IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __func__ ); |
2040 | /* | 2040 | /* |
2041 | * This function will also be used by IrLAP to change the | 2041 | * This function will also be used by IrLAP to change the |
2042 | * speed, so we still must allow for speed change within | 2042 | * speed, so we still must allow for speed change within |
@@ -2050,13 +2050,13 @@ static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2050 | spin_unlock_irqrestore(&self->lock, flags); | 2050 | spin_unlock_irqrestore(&self->lock, flags); |
2051 | break; | 2051 | break; |
2052 | case SIOCSMEDIABUSY: /* Set media busy */ | 2052 | case SIOCSMEDIABUSY: /* Set media busy */ |
2053 | IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __FUNCTION__ ); | 2053 | IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __func__ ); |
2054 | if (!capable(CAP_NET_ADMIN)) | 2054 | if (!capable(CAP_NET_ADMIN)) |
2055 | return -EPERM; | 2055 | return -EPERM; |
2056 | irda_device_set_media_busy(self->netdev, TRUE); | 2056 | irda_device_set_media_busy(self->netdev, TRUE); |
2057 | break; | 2057 | break; |
2058 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | 2058 | case SIOCGRECEIVING: /* Check if we are receiving right now */ |
2059 | IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __FUNCTION__ ); | 2059 | IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __func__ ); |
2060 | /* This is protected */ | 2060 | /* This is protected */ |
2061 | irq->ifr_receiving = ali_ircc_is_receiving(self); | 2061 | irq->ifr_receiving = ali_ircc_is_receiving(self); |
2062 | break; | 2062 | break; |
@@ -2064,7 +2064,7 @@ static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2064 | ret = -EOPNOTSUPP; | 2064 | ret = -EOPNOTSUPP; |
2065 | } | 2065 | } |
2066 | 2066 | ||
2067 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2067 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
2068 | 2068 | ||
2069 | return ret; | 2069 | return ret; |
2070 | } | 2070 | } |
@@ -2081,7 +2081,7 @@ static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |||
2081 | int status = FALSE; | 2081 | int status = FALSE; |
2082 | int iobase; | 2082 | int iobase; |
2083 | 2083 | ||
2084 | IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __FUNCTION__ ); | 2084 | IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __func__ ); |
2085 | 2085 | ||
2086 | IRDA_ASSERT(self != NULL, return FALSE;); | 2086 | IRDA_ASSERT(self != NULL, return FALSE;); |
2087 | 2087 | ||
@@ -2095,7 +2095,7 @@ static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |||
2095 | if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) | 2095 | if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) |
2096 | { | 2096 | { |
2097 | /* We are receiving something */ | 2097 | /* We are receiving something */ |
2098 | IRDA_DEBUG(1, "%s(), We are receiving something\n", __FUNCTION__ ); | 2098 | IRDA_DEBUG(1, "%s(), We are receiving something\n", __func__ ); |
2099 | status = TRUE; | 2099 | status = TRUE; |
2100 | } | 2100 | } |
2101 | switch_bank(iobase, BANK0); | 2101 | switch_bank(iobase, BANK0); |
@@ -2107,7 +2107,7 @@ static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |||
2107 | 2107 | ||
2108 | spin_unlock_irqrestore(&self->lock, flags); | 2108 | spin_unlock_irqrestore(&self->lock, flags); |
2109 | 2109 | ||
2110 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2110 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
2111 | 2111 | ||
2112 | return status; | 2112 | return status; |
2113 | } | 2113 | } |
@@ -2116,9 +2116,9 @@ static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev) | |||
2116 | { | 2116 | { |
2117 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) dev->priv; | 2117 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) dev->priv; |
2118 | 2118 | ||
2119 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2119 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
2120 | 2120 | ||
2121 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2121 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
2122 | 2122 | ||
2123 | return &self->stats; | 2123 | return &self->stats; |
2124 | } | 2124 | } |
@@ -2164,7 +2164,7 @@ static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | |||
2164 | 2164 | ||
2165 | int iobase = self->io.fir_base; /* or sir_base */ | 2165 | int iobase = self->io.fir_base; /* or sir_base */ |
2166 | 2166 | ||
2167 | IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __FUNCTION__ , enable); | 2167 | IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __func__ , enable); |
2168 | 2168 | ||
2169 | /* Enable the interrupt which we wish to */ | 2169 | /* Enable the interrupt which we wish to */ |
2170 | if (enable){ | 2170 | if (enable){ |
@@ -2205,14 +2205,14 @@ static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | |||
2205 | else | 2205 | else |
2206 | outb(newMask, iobase+UART_IER); | 2206 | outb(newMask, iobase+UART_IER); |
2207 | 2207 | ||
2208 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2208 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
2209 | } | 2209 | } |
2210 | 2210 | ||
2211 | static void SIR2FIR(int iobase) | 2211 | static void SIR2FIR(int iobase) |
2212 | { | 2212 | { |
2213 | //unsigned char tmp; | 2213 | //unsigned char tmp; |
2214 | 2214 | ||
2215 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2215 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
2216 | 2216 | ||
2217 | /* Already protected (change_speed() or setup()), no need to lock. | 2217 | /* Already protected (change_speed() or setup()), no need to lock. |
2218 | * Jean II */ | 2218 | * Jean II */ |
@@ -2228,14 +2228,14 @@ static void SIR2FIR(int iobase) | |||
2228 | //tmp |= 0x20; | 2228 | //tmp |= 0x20; |
2229 | //outb(tmp, iobase+FIR_LCR_B); | 2229 | //outb(tmp, iobase+FIR_LCR_B); |
2230 | 2230 | ||
2231 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2231 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
2232 | } | 2232 | } |
2233 | 2233 | ||
2234 | static void FIR2SIR(int iobase) | 2234 | static void FIR2SIR(int iobase) |
2235 | { | 2235 | { |
2236 | unsigned char val; | 2236 | unsigned char val; |
2237 | 2237 | ||
2238 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __FUNCTION__ ); | 2238 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
2239 | 2239 | ||
2240 | /* Already protected (change_speed() or setup()), no need to lock. | 2240 | /* Already protected (change_speed() or setup()), no need to lock. |
2241 | * Jean II */ | 2241 | * Jean II */ |
@@ -2251,7 +2251,7 @@ static void FIR2SIR(int iobase) | |||
2251 | val = inb(iobase+UART_LSR); | 2251 | val = inb(iobase+UART_LSR); |
2252 | val = inb(iobase+UART_MSR); | 2252 | val = inb(iobase+UART_MSR); |
2253 | 2253 | ||
2254 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __FUNCTION__ ); | 2254 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
2255 | } | 2255 | } |
2256 | 2256 | ||
2257 | MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); | 2257 | MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); |
diff --git a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c index 34ad189fff67..69d16b30323b 100644 --- a/drivers/net/irda/donauboe.c +++ b/drivers/net/irda/donauboe.c | |||
@@ -245,7 +245,7 @@ toshoboe_dumpregs (struct toshoboe_cb *self) | |||
245 | { | 245 | { |
246 | __u32 ringbase; | 246 | __u32 ringbase; |
247 | 247 | ||
248 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 248 | IRDA_DEBUG (4, "%s()\n", __func__); |
249 | 249 | ||
250 | ringbase = INB (OBOE_RING_BASE0) << 10; | 250 | ringbase = INB (OBOE_RING_BASE0) << 10; |
251 | ringbase |= INB (OBOE_RING_BASE1) << 18; | 251 | ringbase |= INB (OBOE_RING_BASE1) << 18; |
@@ -293,7 +293,7 @@ static void | |||
293 | toshoboe_disablebm (struct toshoboe_cb *self) | 293 | toshoboe_disablebm (struct toshoboe_cb *self) |
294 | { | 294 | { |
295 | __u8 command; | 295 | __u8 command; |
296 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 296 | IRDA_DEBUG (4, "%s()\n", __func__); |
297 | 297 | ||
298 | pci_read_config_byte (self->pdev, PCI_COMMAND, &command); | 298 | pci_read_config_byte (self->pdev, PCI_COMMAND, &command); |
299 | command &= ~PCI_COMMAND_MASTER; | 299 | command &= ~PCI_COMMAND_MASTER; |
@@ -305,7 +305,7 @@ toshoboe_disablebm (struct toshoboe_cb *self) | |||
305 | static void | 305 | static void |
306 | toshoboe_stopchip (struct toshoboe_cb *self) | 306 | toshoboe_stopchip (struct toshoboe_cb *self) |
307 | { | 307 | { |
308 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 308 | IRDA_DEBUG (4, "%s()\n", __func__); |
309 | 309 | ||
310 | /*Disable interrupts */ | 310 | /*Disable interrupts */ |
311 | OUTB (0x0, OBOE_IER); | 311 | OUTB (0x0, OBOE_IER); |
@@ -350,7 +350,7 @@ toshoboe_setbaud (struct toshoboe_cb *self) | |||
350 | __u16 pconfig = 0; | 350 | __u16 pconfig = 0; |
351 | __u8 config0l = 0; | 351 | __u8 config0l = 0; |
352 | 352 | ||
353 | IRDA_DEBUG (2, "%s(%d/%d)\n", __FUNCTION__, self->speed, self->io.speed); | 353 | IRDA_DEBUG (2, "%s(%d/%d)\n", __func__, self->speed, self->io.speed); |
354 | 354 | ||
355 | switch (self->speed) | 355 | switch (self->speed) |
356 | { | 356 | { |
@@ -482,7 +482,7 @@ toshoboe_setbaud (struct toshoboe_cb *self) | |||
482 | static void | 482 | static void |
483 | toshoboe_enablebm (struct toshoboe_cb *self) | 483 | toshoboe_enablebm (struct toshoboe_cb *self) |
484 | { | 484 | { |
485 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 485 | IRDA_DEBUG (4, "%s()\n", __func__); |
486 | pci_set_master (self->pdev); | 486 | pci_set_master (self->pdev); |
487 | } | 487 | } |
488 | 488 | ||
@@ -492,7 +492,7 @@ toshoboe_initring (struct toshoboe_cb *self) | |||
492 | { | 492 | { |
493 | int i; | 493 | int i; |
494 | 494 | ||
495 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 495 | IRDA_DEBUG (4, "%s()\n", __func__); |
496 | 496 | ||
497 | for (i = 0; i < TX_SLOTS; ++i) | 497 | for (i = 0; i < TX_SLOTS; ++i) |
498 | { | 498 | { |
@@ -550,7 +550,7 @@ toshoboe_startchip (struct toshoboe_cb *self) | |||
550 | { | 550 | { |
551 | __u32 physaddr; | 551 | __u32 physaddr; |
552 | 552 | ||
553 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 553 | IRDA_DEBUG (4, "%s()\n", __func__); |
554 | 554 | ||
555 | toshoboe_initring (self); | 555 | toshoboe_initring (self); |
556 | toshoboe_enablebm (self); | 556 | toshoboe_enablebm (self); |
@@ -824,7 +824,7 @@ toshoboe_probe (struct toshoboe_cb *self) | |||
824 | #endif | 824 | #endif |
825 | unsigned long flags; | 825 | unsigned long flags; |
826 | 826 | ||
827 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 827 | IRDA_DEBUG (4, "%s()\n", __func__); |
828 | 828 | ||
829 | if (request_irq (self->io.irq, toshoboe_probeinterrupt, | 829 | if (request_irq (self->io.irq, toshoboe_probeinterrupt, |
830 | self->io.irqflags, "toshoboe", (void *) self)) | 830 | self->io.irqflags, "toshoboe", (void *) self)) |
@@ -983,10 +983,10 @@ toshoboe_hard_xmit (struct sk_buff *skb, struct net_device *dev) | |||
983 | 983 | ||
984 | IRDA_ASSERT (self != NULL, return 0; ); | 984 | IRDA_ASSERT (self != NULL, return 0; ); |
985 | 985 | ||
986 | IRDA_DEBUG (1, "%s.tx:%x(%x)%x\n", __FUNCTION__ | 986 | IRDA_DEBUG (1, "%s.tx:%x(%x)%x\n", __func__ |
987 | ,skb->len,self->txpending,INB (OBOE_ENABLEH)); | 987 | ,skb->len,self->txpending,INB (OBOE_ENABLEH)); |
988 | if (!cb->magic) { | 988 | if (!cb->magic) { |
989 | IRDA_DEBUG (2, "%s.Not IrLAP:%x\n", __FUNCTION__, cb->magic); | 989 | IRDA_DEBUG (2, "%s.Not IrLAP:%x\n", __func__, cb->magic); |
990 | #ifdef DUMP_PACKETS | 990 | #ifdef DUMP_PACKETS |
991 | _dumpbufs(skb->data,skb->len,'>'); | 991 | _dumpbufs(skb->data,skb->len,'>'); |
992 | #endif | 992 | #endif |
@@ -1015,7 +1015,7 @@ toshoboe_hard_xmit (struct sk_buff *skb, struct net_device *dev) | |||
1015 | { | 1015 | { |
1016 | self->new_speed = speed; | 1016 | self->new_speed = speed; |
1017 | IRDA_DEBUG (1, "%s: Queued TxDone scheduled speed change %d\n" , | 1017 | IRDA_DEBUG (1, "%s: Queued TxDone scheduled speed change %d\n" , |
1018 | __FUNCTION__, speed); | 1018 | __func__, speed); |
1019 | /* if no data, that's all! */ | 1019 | /* if no data, that's all! */ |
1020 | if (!skb->len) | 1020 | if (!skb->len) |
1021 | { | 1021 | { |
@@ -1057,7 +1057,7 @@ toshoboe_hard_xmit (struct sk_buff *skb, struct net_device *dev) | |||
1057 | /* which we will add a wrong checksum to */ | 1057 | /* which we will add a wrong checksum to */ |
1058 | 1058 | ||
1059 | mtt = toshoboe_makemttpacket (self, self->tx_bufs[self->txs], mtt); | 1059 | mtt = toshoboe_makemttpacket (self, self->tx_bufs[self->txs], mtt); |
1060 | IRDA_DEBUG (1, "%s.mtt:%x(%x)%d\n", __FUNCTION__ | 1060 | IRDA_DEBUG (1, "%s.mtt:%x(%x)%d\n", __func__ |
1061 | ,skb->len,mtt,self->txpending); | 1061 | ,skb->len,mtt,self->txpending); |
1062 | if (mtt) | 1062 | if (mtt) |
1063 | { | 1063 | { |
@@ -1101,7 +1101,7 @@ dumpbufs(skb->data,skb->len,'>'); | |||
1101 | 1101 | ||
1102 | if (self->ring->tx[self->txs].control & OBOE_CTL_TX_HW_OWNS) | 1102 | if (self->ring->tx[self->txs].control & OBOE_CTL_TX_HW_OWNS) |
1103 | { | 1103 | { |
1104 | IRDA_DEBUG (0, "%s.ful:%x(%x)%x\n", __FUNCTION__ | 1104 | IRDA_DEBUG (0, "%s.ful:%x(%x)%x\n", __func__ |
1105 | ,skb->len, self->ring->tx[self->txs].control, self->txpending); | 1105 | ,skb->len, self->ring->tx[self->txs].control, self->txpending); |
1106 | toshoboe_start_DMA(self, OBOE_CONFIG0H_ENTX); | 1106 | toshoboe_start_DMA(self, OBOE_CONFIG0H_ENTX); |
1107 | spin_unlock_irqrestore(&self->spinlock, flags); | 1107 | spin_unlock_irqrestore(&self->spinlock, flags); |
@@ -1179,7 +1179,7 @@ toshoboe_interrupt (int irq, void *dev_id) | |||
1179 | if (self->ring->tx[i].control & OBOE_CTL_TX_HW_OWNS) | 1179 | if (self->ring->tx[i].control & OBOE_CTL_TX_HW_OWNS) |
1180 | self->txpending++; | 1180 | self->txpending++; |
1181 | } | 1181 | } |
1182 | IRDA_DEBUG (1, "%s.txd(%x)%x/%x\n", __FUNCTION__ | 1182 | IRDA_DEBUG (1, "%s.txd(%x)%x/%x\n", __func__ |
1183 | ,irqstat,txp,self->txpending); | 1183 | ,irqstat,txp,self->txpending); |
1184 | 1184 | ||
1185 | txp = INB (OBOE_TXSLOT) & OBOE_SLOT_MASK; | 1185 | txp = INB (OBOE_TXSLOT) & OBOE_SLOT_MASK; |
@@ -1209,7 +1209,7 @@ toshoboe_interrupt (int irq, void *dev_id) | |||
1209 | { | 1209 | { |
1210 | self->speed = self->new_speed; | 1210 | self->speed = self->new_speed; |
1211 | IRDA_DEBUG (1, "%s: Executed TxDone scheduled speed change %d\n", | 1211 | IRDA_DEBUG (1, "%s: Executed TxDone scheduled speed change %d\n", |
1212 | __FUNCTION__, self->speed); | 1212 | __func__, self->speed); |
1213 | toshoboe_setbaud (self); | 1213 | toshoboe_setbaud (self); |
1214 | } | 1214 | } |
1215 | 1215 | ||
@@ -1224,7 +1224,7 @@ toshoboe_interrupt (int irq, void *dev_id) | |||
1224 | { | 1224 | { |
1225 | int len = self->ring->rx[self->rxs].len; | 1225 | int len = self->ring->rx[self->rxs].len; |
1226 | skb = NULL; | 1226 | skb = NULL; |
1227 | IRDA_DEBUG (3, "%s.rcv:%x(%x)\n", __FUNCTION__ | 1227 | IRDA_DEBUG (3, "%s.rcv:%x(%x)\n", __func__ |
1228 | ,len,self->ring->rx[self->rxs].control); | 1228 | ,len,self->ring->rx[self->rxs].control); |
1229 | 1229 | ||
1230 | #ifdef DUMP_PACKETS | 1230 | #ifdef DUMP_PACKETS |
@@ -1246,7 +1246,7 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1246 | len -= 2; | 1246 | len -= 2; |
1247 | else | 1247 | else |
1248 | len = 0; | 1248 | len = 0; |
1249 | IRDA_DEBUG (1, "%s.SIR:%x(%x)\n", __FUNCTION__, len,enable); | 1249 | IRDA_DEBUG (1, "%s.SIR:%x(%x)\n", __func__, len,enable); |
1250 | } | 1250 | } |
1251 | 1251 | ||
1252 | #ifdef USE_MIR | 1252 | #ifdef USE_MIR |
@@ -1256,7 +1256,7 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1256 | len -= 2; | 1256 | len -= 2; |
1257 | else | 1257 | else |
1258 | len = 0; | 1258 | len = 0; |
1259 | IRDA_DEBUG (2, "%s.MIR:%x(%x)\n", __FUNCTION__, len,enable); | 1259 | IRDA_DEBUG (2, "%s.MIR:%x(%x)\n", __func__, len,enable); |
1260 | } | 1260 | } |
1261 | #endif | 1261 | #endif |
1262 | else if (enable & OBOE_ENABLEH_FIRON) | 1262 | else if (enable & OBOE_ENABLEH_FIRON) |
@@ -1265,10 +1265,10 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1265 | len -= 4; /*FIXME: check this */ | 1265 | len -= 4; /*FIXME: check this */ |
1266 | else | 1266 | else |
1267 | len = 0; | 1267 | len = 0; |
1268 | IRDA_DEBUG (1, "%s.FIR:%x(%x)\n", __FUNCTION__, len,enable); | 1268 | IRDA_DEBUG (1, "%s.FIR:%x(%x)\n", __func__, len,enable); |
1269 | } | 1269 | } |
1270 | else | 1270 | else |
1271 | IRDA_DEBUG (0, "%s.?IR:%x(%x)\n", __FUNCTION__, len,enable); | 1271 | IRDA_DEBUG (0, "%s.?IR:%x(%x)\n", __func__, len,enable); |
1272 | 1272 | ||
1273 | if (len) | 1273 | if (len) |
1274 | { | 1274 | { |
@@ -1289,7 +1289,7 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1289 | { | 1289 | { |
1290 | printk (KERN_INFO | 1290 | printk (KERN_INFO |
1291 | "%s(), memory squeeze, dropping frame.\n", | 1291 | "%s(), memory squeeze, dropping frame.\n", |
1292 | __FUNCTION__); | 1292 | __func__); |
1293 | } | 1293 | } |
1294 | } | 1294 | } |
1295 | } | 1295 | } |
@@ -1301,7 +1301,7 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1301 | /* (SIR) data is splitted in several slots. */ | 1301 | /* (SIR) data is splitted in several slots. */ |
1302 | /* we have to join all the received buffers received */ | 1302 | /* we have to join all the received buffers received */ |
1303 | /*in a large buffer before checking CRC. */ | 1303 | /*in a large buffer before checking CRC. */ |
1304 | IRDA_DEBUG (0, "%s.err:%x(%x)\n", __FUNCTION__ | 1304 | IRDA_DEBUG (0, "%s.err:%x(%x)\n", __func__ |
1305 | ,len,self->ring->rx[self->rxs].control); | 1305 | ,len,self->ring->rx[self->rxs].control); |
1306 | } | 1306 | } |
1307 | 1307 | ||
@@ -1329,7 +1329,7 @@ dumpbufs(self->rx_bufs[self->rxs],len,'<'); | |||
1329 | if (irqstat & OBOE_INT_SIP) | 1329 | if (irqstat & OBOE_INT_SIP) |
1330 | { | 1330 | { |
1331 | self->int_sip++; | 1331 | self->int_sip++; |
1332 | IRDA_DEBUG (1, "%s.sip:%x(%x)%x\n", __FUNCTION__ | 1332 | IRDA_DEBUG (1, "%s.sip:%x(%x)%x\n", __func__ |
1333 | ,self->int_sip,irqstat,self->txpending); | 1333 | ,self->int_sip,irqstat,self->txpending); |
1334 | } | 1334 | } |
1335 | return IRQ_HANDLED; | 1335 | return IRQ_HANDLED; |
@@ -1343,7 +1343,7 @@ toshoboe_net_open (struct net_device *dev) | |||
1343 | unsigned long flags; | 1343 | unsigned long flags; |
1344 | int rc; | 1344 | int rc; |
1345 | 1345 | ||
1346 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1346 | IRDA_DEBUG (4, "%s()\n", __func__); |
1347 | 1347 | ||
1348 | self = netdev_priv(dev); | 1348 | self = netdev_priv(dev); |
1349 | 1349 | ||
@@ -1381,7 +1381,7 @@ toshoboe_net_close (struct net_device *dev) | |||
1381 | { | 1381 | { |
1382 | struct toshoboe_cb *self; | 1382 | struct toshoboe_cb *self; |
1383 | 1383 | ||
1384 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1384 | IRDA_DEBUG (4, "%s()\n", __func__); |
1385 | 1385 | ||
1386 | IRDA_ASSERT (dev != NULL, return -1; ); | 1386 | IRDA_ASSERT (dev != NULL, return -1; ); |
1387 | self = (struct toshoboe_cb *) dev->priv; | 1387 | self = (struct toshoboe_cb *) dev->priv; |
@@ -1426,7 +1426,7 @@ toshoboe_net_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1426 | 1426 | ||
1427 | IRDA_ASSERT (self != NULL, return -1; ); | 1427 | IRDA_ASSERT (self != NULL, return -1; ); |
1428 | 1428 | ||
1429 | IRDA_DEBUG (5, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); | 1429 | IRDA_DEBUG (5, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
1430 | 1430 | ||
1431 | /* Disable interrupts & save flags */ | 1431 | /* Disable interrupts & save flags */ |
1432 | spin_lock_irqsave(&self->spinlock, flags); | 1432 | spin_lock_irqsave(&self->spinlock, flags); |
@@ -1438,7 +1438,7 @@ toshoboe_net_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1438 | * speed, so we still must allow for speed change within | 1438 | * speed, so we still must allow for speed change within |
1439 | * interrupt context. | 1439 | * interrupt context. |
1440 | */ | 1440 | */ |
1441 | IRDA_DEBUG (1, "%s(BANDWIDTH), %s, (%X/%ld\n", __FUNCTION__ | 1441 | IRDA_DEBUG (1, "%s(BANDWIDTH), %s, (%X/%ld\n", __func__ |
1442 | ,dev->name, INB (OBOE_STATUS), irq->ifr_baudrate ); | 1442 | ,dev->name, INB (OBOE_STATUS), irq->ifr_baudrate ); |
1443 | if (!in_interrupt () && !capable (CAP_NET_ADMIN)) { | 1443 | if (!in_interrupt () && !capable (CAP_NET_ADMIN)) { |
1444 | ret = -EPERM; | 1444 | ret = -EPERM; |
@@ -1451,7 +1451,7 @@ toshoboe_net_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1451 | self->new_speed = irq->ifr_baudrate; | 1451 | self->new_speed = irq->ifr_baudrate; |
1452 | break; | 1452 | break; |
1453 | case SIOCSMEDIABUSY: /* Set media busy */ | 1453 | case SIOCSMEDIABUSY: /* Set media busy */ |
1454 | IRDA_DEBUG (1, "%s(MEDIABUSY), %s, (%X/%x)\n", __FUNCTION__ | 1454 | IRDA_DEBUG (1, "%s(MEDIABUSY), %s, (%X/%x)\n", __func__ |
1455 | ,dev->name, INB (OBOE_STATUS), capable (CAP_NET_ADMIN) ); | 1455 | ,dev->name, INB (OBOE_STATUS), capable (CAP_NET_ADMIN) ); |
1456 | if (!capable (CAP_NET_ADMIN)) { | 1456 | if (!capable (CAP_NET_ADMIN)) { |
1457 | ret = -EPERM; | 1457 | ret = -EPERM; |
@@ -1461,11 +1461,11 @@ toshoboe_net_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1461 | break; | 1461 | break; |
1462 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | 1462 | case SIOCGRECEIVING: /* Check if we are receiving right now */ |
1463 | irq->ifr_receiving = (INB (OBOE_STATUS) & OBOE_STATUS_RXBUSY) ? 1 : 0; | 1463 | irq->ifr_receiving = (INB (OBOE_STATUS) & OBOE_STATUS_RXBUSY) ? 1 : 0; |
1464 | IRDA_DEBUG (3, "%s(RECEIVING), %s, (%X/%x)\n", __FUNCTION__ | 1464 | IRDA_DEBUG (3, "%s(RECEIVING), %s, (%X/%x)\n", __func__ |
1465 | ,dev->name, INB (OBOE_STATUS), irq->ifr_receiving ); | 1465 | ,dev->name, INB (OBOE_STATUS), irq->ifr_receiving ); |
1466 | break; | 1466 | break; |
1467 | default: | 1467 | default: |
1468 | IRDA_DEBUG (1, "%s(?), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); | 1468 | IRDA_DEBUG (1, "%s(?), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
1469 | ret = -EOPNOTSUPP; | 1469 | ret = -EOPNOTSUPP; |
1470 | } | 1470 | } |
1471 | out: | 1471 | out: |
@@ -1492,7 +1492,7 @@ toshoboe_close (struct pci_dev *pci_dev) | |||
1492 | int i; | 1492 | int i; |
1493 | struct toshoboe_cb *self = (struct toshoboe_cb*)pci_get_drvdata(pci_dev); | 1493 | struct toshoboe_cb *self = (struct toshoboe_cb*)pci_get_drvdata(pci_dev); |
1494 | 1494 | ||
1495 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1495 | IRDA_DEBUG (4, "%s()\n", __func__); |
1496 | 1496 | ||
1497 | IRDA_ASSERT (self != NULL, return; ); | 1497 | IRDA_ASSERT (self != NULL, return; ); |
1498 | 1498 | ||
@@ -1533,7 +1533,7 @@ toshoboe_open (struct pci_dev *pci_dev, const struct pci_device_id *pdid) | |||
1533 | int ok = 0; | 1533 | int ok = 0; |
1534 | int err; | 1534 | int err; |
1535 | 1535 | ||
1536 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1536 | IRDA_DEBUG (4, "%s()\n", __func__); |
1537 | 1537 | ||
1538 | if ((err=pci_enable_device(pci_dev))) | 1538 | if ((err=pci_enable_device(pci_dev))) |
1539 | return err; | 1539 | return err; |
@@ -1700,7 +1700,7 @@ toshoboe_gotosleep (struct pci_dev *pci_dev, pm_message_t crap) | |||
1700 | unsigned long flags; | 1700 | unsigned long flags; |
1701 | int i = 10; | 1701 | int i = 10; |
1702 | 1702 | ||
1703 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1703 | IRDA_DEBUG (4, "%s()\n", __func__); |
1704 | 1704 | ||
1705 | if (!self || self->stopped) | 1705 | if (!self || self->stopped) |
1706 | return 0; | 1706 | return 0; |
@@ -1728,7 +1728,7 @@ toshoboe_wakeup (struct pci_dev *pci_dev) | |||
1728 | struct toshoboe_cb *self = (struct toshoboe_cb*)pci_get_drvdata(pci_dev); | 1728 | struct toshoboe_cb *self = (struct toshoboe_cb*)pci_get_drvdata(pci_dev); |
1729 | unsigned long flags; | 1729 | unsigned long flags; |
1730 | 1730 | ||
1731 | IRDA_DEBUG (4, "%s()\n", __FUNCTION__); | 1731 | IRDA_DEBUG (4, "%s()\n", __func__); |
1732 | 1732 | ||
1733 | if (!self || !self->stopped) | 1733 | if (!self || !self->stopped) |
1734 | return 0; | 1734 | return 0; |
diff --git a/drivers/net/irda/girbil-sir.c b/drivers/net/irda/girbil-sir.c index 738531b16bd3..a31b8fa8aaa9 100644 --- a/drivers/net/irda/girbil-sir.c +++ b/drivers/net/irda/girbil-sir.c | |||
@@ -86,7 +86,7 @@ static int girbil_open(struct sir_dev *dev) | |||
86 | { | 86 | { |
87 | struct qos_info *qos = &dev->qos; | 87 | struct qos_info *qos = &dev->qos; |
88 | 88 | ||
89 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 89 | IRDA_DEBUG(2, "%s()\n", __func__); |
90 | 90 | ||
91 | /* Power on dongle */ | 91 | /* Power on dongle */ |
92 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 92 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
@@ -102,7 +102,7 @@ static int girbil_open(struct sir_dev *dev) | |||
102 | 102 | ||
103 | static int girbil_close(struct sir_dev *dev) | 103 | static int girbil_close(struct sir_dev *dev) |
104 | { | 104 | { |
105 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 105 | IRDA_DEBUG(2, "%s()\n", __func__); |
106 | 106 | ||
107 | /* Power off dongle */ | 107 | /* Power off dongle */ |
108 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 108 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -126,7 +126,7 @@ static int girbil_change_speed(struct sir_dev *dev, unsigned speed) | |||
126 | u8 control[2]; | 126 | u8 control[2]; |
127 | static int ret = 0; | 127 | static int ret = 0; |
128 | 128 | ||
129 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 129 | IRDA_DEBUG(2, "%s()\n", __func__); |
130 | 130 | ||
131 | /* dongle alread reset - port and dongle at default speed */ | 131 | /* dongle alread reset - port and dongle at default speed */ |
132 | 132 | ||
@@ -179,7 +179,7 @@ static int girbil_change_speed(struct sir_dev *dev, unsigned speed) | |||
179 | break; | 179 | break; |
180 | 180 | ||
181 | default: | 181 | default: |
182 | IRDA_ERROR("%s - undefined state %d\n", __FUNCTION__, state); | 182 | IRDA_ERROR("%s - undefined state %d\n", __func__, state); |
183 | ret = -EINVAL; | 183 | ret = -EINVAL; |
184 | break; | 184 | break; |
185 | } | 185 | } |
@@ -209,7 +209,7 @@ static int girbil_reset(struct sir_dev *dev) | |||
209 | u8 control = GIRBIL_TXEN | GIRBIL_RXEN; | 209 | u8 control = GIRBIL_TXEN | GIRBIL_RXEN; |
210 | int ret = 0; | 210 | int ret = 0; |
211 | 211 | ||
212 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 212 | IRDA_DEBUG(2, "%s()\n", __func__); |
213 | 213 | ||
214 | switch (state) { | 214 | switch (state) { |
215 | case SIRDEV_STATE_DONGLE_RESET: | 215 | case SIRDEV_STATE_DONGLE_RESET: |
@@ -241,7 +241,7 @@ static int girbil_reset(struct sir_dev *dev) | |||
241 | break; | 241 | break; |
242 | 242 | ||
243 | default: | 243 | default: |
244 | IRDA_ERROR("%s(), undefined state %d\n", __FUNCTION__, state); | 244 | IRDA_ERROR("%s(), undefined state %d\n", __func__, state); |
245 | ret = -1; | 245 | ret = -1; |
246 | break; | 246 | break; |
247 | } | 247 | } |
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c index 18b471cd1447..b5d6b9ac162a 100644 --- a/drivers/net/irda/irda-usb.c +++ b/drivers/net/irda/irda-usb.c | |||
@@ -177,12 +177,12 @@ static void irda_usb_build_header(struct irda_usb_cb *self, | |||
177 | (!force) && (self->speed != -1)) { | 177 | (!force) && (self->speed != -1)) { |
178 | /* No speed and xbofs change here | 178 | /* No speed and xbofs change here |
179 | * (we'll do it later in the write callback) */ | 179 | * (we'll do it later in the write callback) */ |
180 | IRDA_DEBUG(2, "%s(), not changing speed yet\n", __FUNCTION__); | 180 | IRDA_DEBUG(2, "%s(), not changing speed yet\n", __func__); |
181 | *header = 0; | 181 | *header = 0; |
182 | return; | 182 | return; |
183 | } | 183 | } |
184 | 184 | ||
185 | IRDA_DEBUG(2, "%s(), changing speed to %d\n", __FUNCTION__, self->new_speed); | 185 | IRDA_DEBUG(2, "%s(), changing speed to %d\n", __func__, self->new_speed); |
186 | self->speed = self->new_speed; | 186 | self->speed = self->new_speed; |
187 | /* We will do ` self->new_speed = -1; ' in the completion | 187 | /* We will do ` self->new_speed = -1; ' in the completion |
188 | * handler just in case the current URB fail - Jean II */ | 188 | * handler just in case the current URB fail - Jean II */ |
@@ -228,7 +228,7 @@ static void irda_usb_build_header(struct irda_usb_cb *self, | |||
228 | 228 | ||
229 | /* Set the negotiated additional XBOFS */ | 229 | /* Set the negotiated additional XBOFS */ |
230 | if (self->new_xbofs != -1) { | 230 | if (self->new_xbofs != -1) { |
231 | IRDA_DEBUG(2, "%s(), changing xbofs to %d\n", __FUNCTION__, self->new_xbofs); | 231 | IRDA_DEBUG(2, "%s(), changing xbofs to %d\n", __func__, self->new_xbofs); |
232 | self->xbofs = self->new_xbofs; | 232 | self->xbofs = self->new_xbofs; |
233 | /* We will do ` self->new_xbofs = -1; ' in the completion | 233 | /* We will do ` self->new_xbofs = -1; ' in the completion |
234 | * handler just in case the current URB fail - Jean II */ | 234 | * handler just in case the current URB fail - Jean II */ |
@@ -302,13 +302,13 @@ static void irda_usb_change_speed_xbofs(struct irda_usb_cb *self) | |||
302 | struct urb *urb; | 302 | struct urb *urb; |
303 | int ret; | 303 | int ret; |
304 | 304 | ||
305 | IRDA_DEBUG(2, "%s(), speed=%d, xbofs=%d\n", __FUNCTION__, | 305 | IRDA_DEBUG(2, "%s(), speed=%d, xbofs=%d\n", __func__, |
306 | self->new_speed, self->new_xbofs); | 306 | self->new_speed, self->new_xbofs); |
307 | 307 | ||
308 | /* Grab the speed URB */ | 308 | /* Grab the speed URB */ |
309 | urb = self->speed_urb; | 309 | urb = self->speed_urb; |
310 | if (urb->status != 0) { | 310 | if (urb->status != 0) { |
311 | IRDA_WARNING("%s(), URB still in use!\n", __FUNCTION__); | 311 | IRDA_WARNING("%s(), URB still in use!\n", __func__); |
312 | return; | 312 | return; |
313 | } | 313 | } |
314 | 314 | ||
@@ -334,7 +334,7 @@ static void irda_usb_change_speed_xbofs(struct irda_usb_cb *self) | |||
334 | 334 | ||
335 | /* Irq disabled -> GFP_ATOMIC */ | 335 | /* Irq disabled -> GFP_ATOMIC */ |
336 | if ((ret = usb_submit_urb(urb, GFP_ATOMIC))) { | 336 | if ((ret = usb_submit_urb(urb, GFP_ATOMIC))) { |
337 | IRDA_WARNING("%s(), failed Speed URB\n", __FUNCTION__); | 337 | IRDA_WARNING("%s(), failed Speed URB\n", __func__); |
338 | } | 338 | } |
339 | } | 339 | } |
340 | 340 | ||
@@ -347,7 +347,7 @@ static void speed_bulk_callback(struct urb *urb) | |||
347 | { | 347 | { |
348 | struct irda_usb_cb *self = urb->context; | 348 | struct irda_usb_cb *self = urb->context; |
349 | 349 | ||
350 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 350 | IRDA_DEBUG(2, "%s()\n", __func__); |
351 | 351 | ||
352 | /* We should always have a context */ | 352 | /* We should always have a context */ |
353 | IRDA_ASSERT(self != NULL, return;); | 353 | IRDA_ASSERT(self != NULL, return;); |
@@ -357,7 +357,7 @@ static void speed_bulk_callback(struct urb *urb) | |||
357 | /* Check for timeout and other USB nasties */ | 357 | /* Check for timeout and other USB nasties */ |
358 | if (urb->status != 0) { | 358 | if (urb->status != 0) { |
359 | /* I get a lot of -ECONNABORTED = -103 here - Jean II */ | 359 | /* I get a lot of -ECONNABORTED = -103 here - Jean II */ |
360 | IRDA_DEBUG(0, "%s(), URB complete status %d, transfer_flags 0x%04X\n", __FUNCTION__, urb->status, urb->transfer_flags); | 360 | IRDA_DEBUG(0, "%s(), URB complete status %d, transfer_flags 0x%04X\n", __func__, urb->status, urb->transfer_flags); |
361 | 361 | ||
362 | /* Don't do anything here, that might confuse the USB layer. | 362 | /* Don't do anything here, that might confuse the USB layer. |
363 | * Instead, we will wait for irda_usb_net_timeout(), the | 363 | * Instead, we will wait for irda_usb_net_timeout(), the |
@@ -392,7 +392,7 @@ static int irda_usb_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
392 | int res, mtt; | 392 | int res, mtt; |
393 | int err = 1; /* Failed */ | 393 | int err = 1; /* Failed */ |
394 | 394 | ||
395 | IRDA_DEBUG(4, "%s() on %s\n", __FUNCTION__, netdev->name); | 395 | IRDA_DEBUG(4, "%s() on %s\n", __func__, netdev->name); |
396 | 396 | ||
397 | netif_stop_queue(netdev); | 397 | netif_stop_queue(netdev); |
398 | 398 | ||
@@ -403,7 +403,7 @@ static int irda_usb_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
403 | * We need to check self->present under the spinlock because | 403 | * We need to check self->present under the spinlock because |
404 | * of irda_usb_disconnect() is synchronous - Jean II */ | 404 | * of irda_usb_disconnect() is synchronous - Jean II */ |
405 | if (!self->present) { | 405 | if (!self->present) { |
406 | IRDA_DEBUG(0, "%s(), Device is gone...\n", __FUNCTION__); | 406 | IRDA_DEBUG(0, "%s(), Device is gone...\n", __func__); |
407 | goto drop; | 407 | goto drop; |
408 | } | 408 | } |
409 | 409 | ||
@@ -437,7 +437,7 @@ static int irda_usb_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
437 | } | 437 | } |
438 | 438 | ||
439 | if (urb->status != 0) { | 439 | if (urb->status != 0) { |
440 | IRDA_WARNING("%s(), URB still in use!\n", __FUNCTION__); | 440 | IRDA_WARNING("%s(), URB still in use!\n", __func__); |
441 | goto drop; | 441 | goto drop; |
442 | } | 442 | } |
443 | 443 | ||
@@ -524,7 +524,7 @@ static int irda_usb_hard_xmit(struct sk_buff *skb, struct net_device *netdev) | |||
524 | 524 | ||
525 | /* Ask USB to send the packet - Irq disabled -> GFP_ATOMIC */ | 525 | /* Ask USB to send the packet - Irq disabled -> GFP_ATOMIC */ |
526 | if ((res = usb_submit_urb(urb, GFP_ATOMIC))) { | 526 | if ((res = usb_submit_urb(urb, GFP_ATOMIC))) { |
527 | IRDA_WARNING("%s(), failed Tx URB\n", __FUNCTION__); | 527 | IRDA_WARNING("%s(), failed Tx URB\n", __func__); |
528 | self->stats.tx_errors++; | 528 | self->stats.tx_errors++; |
529 | /* Let USB recover : We will catch that in the watchdog */ | 529 | /* Let USB recover : We will catch that in the watchdog */ |
530 | /*netif_start_queue(netdev);*/ | 530 | /*netif_start_queue(netdev);*/ |
@@ -556,7 +556,7 @@ static void write_bulk_callback(struct urb *urb) | |||
556 | struct sk_buff *skb = urb->context; | 556 | struct sk_buff *skb = urb->context; |
557 | struct irda_usb_cb *self = ((struct irda_skb_cb *) skb->cb)->context; | 557 | struct irda_usb_cb *self = ((struct irda_skb_cb *) skb->cb)->context; |
558 | 558 | ||
559 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 559 | IRDA_DEBUG(2, "%s()\n", __func__); |
560 | 560 | ||
561 | /* We should always have a context */ | 561 | /* We should always have a context */ |
562 | IRDA_ASSERT(self != NULL, return;); | 562 | IRDA_ASSERT(self != NULL, return;); |
@@ -570,7 +570,7 @@ static void write_bulk_callback(struct urb *urb) | |||
570 | /* Check for timeout and other USB nasties */ | 570 | /* Check for timeout and other USB nasties */ |
571 | if (urb->status != 0) { | 571 | if (urb->status != 0) { |
572 | /* I get a lot of -ECONNABORTED = -103 here - Jean II */ | 572 | /* I get a lot of -ECONNABORTED = -103 here - Jean II */ |
573 | IRDA_DEBUG(0, "%s(), URB complete status %d, transfer_flags 0x%04X\n", __FUNCTION__, urb->status, urb->transfer_flags); | 573 | IRDA_DEBUG(0, "%s(), URB complete status %d, transfer_flags 0x%04X\n", __func__, urb->status, urb->transfer_flags); |
574 | 574 | ||
575 | /* Don't do anything here, that might confuse the USB layer, | 575 | /* Don't do anything here, that might confuse the USB layer, |
576 | * and we could go in recursion and blow the kernel stack... | 576 | * and we could go in recursion and blow the kernel stack... |
@@ -589,7 +589,7 @@ static void write_bulk_callback(struct urb *urb) | |||
589 | 589 | ||
590 | /* If the network is closed, stop everything */ | 590 | /* If the network is closed, stop everything */ |
591 | if ((!self->netopen) || (!self->present)) { | 591 | if ((!self->netopen) || (!self->present)) { |
592 | IRDA_DEBUG(0, "%s(), Network is gone...\n", __FUNCTION__); | 592 | IRDA_DEBUG(0, "%s(), Network is gone...\n", __func__); |
593 | spin_unlock_irqrestore(&self->lock, flags); | 593 | spin_unlock_irqrestore(&self->lock, flags); |
594 | return; | 594 | return; |
595 | } | 595 | } |
@@ -600,7 +600,7 @@ static void write_bulk_callback(struct urb *urb) | |||
600 | (self->new_xbofs != self->xbofs)) { | 600 | (self->new_xbofs != self->xbofs)) { |
601 | /* We haven't changed speed yet (because of | 601 | /* We haven't changed speed yet (because of |
602 | * IUC_SPEED_BUG), so do it now - Jean II */ | 602 | * IUC_SPEED_BUG), so do it now - Jean II */ |
603 | IRDA_DEBUG(1, "%s(), Changing speed now...\n", __FUNCTION__); | 603 | IRDA_DEBUG(1, "%s(), Changing speed now...\n", __func__); |
604 | irda_usb_change_speed_xbofs(self); | 604 | irda_usb_change_speed_xbofs(self); |
605 | } else { | 605 | } else { |
606 | /* New speed and xbof is now commited in hardware */ | 606 | /* New speed and xbof is now commited in hardware */ |
@@ -632,7 +632,7 @@ static void irda_usb_net_timeout(struct net_device *netdev) | |||
632 | struct urb *urb; | 632 | struct urb *urb; |
633 | int done = 0; /* If we have made any progress */ | 633 | int done = 0; /* If we have made any progress */ |
634 | 634 | ||
635 | IRDA_DEBUG(0, "%s(), Network layer thinks we timed out!\n", __FUNCTION__); | 635 | IRDA_DEBUG(0, "%s(), Network layer thinks we timed out!\n", __func__); |
636 | IRDA_ASSERT(self != NULL, return;); | 636 | IRDA_ASSERT(self != NULL, return;); |
637 | 637 | ||
638 | /* Protect us from USB callbacks, net Tx and else. */ | 638 | /* Protect us from USB callbacks, net Tx and else. */ |
@@ -640,7 +640,7 @@ static void irda_usb_net_timeout(struct net_device *netdev) | |||
640 | 640 | ||
641 | /* self->present *MUST* be read under spinlock */ | 641 | /* self->present *MUST* be read under spinlock */ |
642 | if (!self->present) { | 642 | if (!self->present) { |
643 | IRDA_WARNING("%s(), device not present!\n", __FUNCTION__); | 643 | IRDA_WARNING("%s(), device not present!\n", __func__); |
644 | netif_stop_queue(netdev); | 644 | netif_stop_queue(netdev); |
645 | spin_unlock_irqrestore(&self->lock, flags); | 645 | spin_unlock_irqrestore(&self->lock, flags); |
646 | return; | 646 | return; |
@@ -763,7 +763,7 @@ static void irda_usb_submit(struct irda_usb_cb *self, struct sk_buff *skb, struc | |||
763 | struct irda_skb_cb *cb; | 763 | struct irda_skb_cb *cb; |
764 | int ret; | 764 | int ret; |
765 | 765 | ||
766 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 766 | IRDA_DEBUG(2, "%s()\n", __func__); |
767 | 767 | ||
768 | /* This should never happen */ | 768 | /* This should never happen */ |
769 | IRDA_ASSERT(skb != NULL, return;); | 769 | IRDA_ASSERT(skb != NULL, return;); |
@@ -786,7 +786,7 @@ static void irda_usb_submit(struct irda_usb_cb *self, struct sk_buff *skb, struc | |||
786 | /* If this ever happen, we are in deep s***. | 786 | /* If this ever happen, we are in deep s***. |
787 | * Basically, the Rx path will stop... */ | 787 | * Basically, the Rx path will stop... */ |
788 | IRDA_WARNING("%s(), Failed to submit Rx URB %d\n", | 788 | IRDA_WARNING("%s(), Failed to submit Rx URB %d\n", |
789 | __FUNCTION__, ret); | 789 | __func__, ret); |
790 | } | 790 | } |
791 | } | 791 | } |
792 | 792 | ||
@@ -807,7 +807,7 @@ static void irda_usb_receive(struct urb *urb) | |||
807 | struct urb *next_urb; | 807 | struct urb *next_urb; |
808 | unsigned int len, docopy; | 808 | unsigned int len, docopy; |
809 | 809 | ||
810 | IRDA_DEBUG(2, "%s(), len=%d\n", __FUNCTION__, urb->actual_length); | 810 | IRDA_DEBUG(2, "%s(), len=%d\n", __func__, urb->actual_length); |
811 | 811 | ||
812 | /* Find ourselves */ | 812 | /* Find ourselves */ |
813 | cb = (struct irda_skb_cb *) skb->cb; | 813 | cb = (struct irda_skb_cb *) skb->cb; |
@@ -817,7 +817,7 @@ static void irda_usb_receive(struct urb *urb) | |||
817 | 817 | ||
818 | /* If the network is closed or the device gone, stop everything */ | 818 | /* If the network is closed or the device gone, stop everything */ |
819 | if ((!self->netopen) || (!self->present)) { | 819 | if ((!self->netopen) || (!self->present)) { |
820 | IRDA_DEBUG(0, "%s(), Network is gone!\n", __FUNCTION__); | 820 | IRDA_DEBUG(0, "%s(), Network is gone!\n", __func__); |
821 | /* Don't re-submit the URB : will stall the Rx path */ | 821 | /* Don't re-submit the URB : will stall the Rx path */ |
822 | return; | 822 | return; |
823 | } | 823 | } |
@@ -840,7 +840,7 @@ static void irda_usb_receive(struct urb *urb) | |||
840 | /* Usually precursor to a hot-unplug on OHCI. */ | 840 | /* Usually precursor to a hot-unplug on OHCI. */ |
841 | default: | 841 | default: |
842 | self->stats.rx_errors++; | 842 | self->stats.rx_errors++; |
843 | IRDA_DEBUG(0, "%s(), RX status %d, transfer_flags 0x%04X \n", __FUNCTION__, urb->status, urb->transfer_flags); | 843 | IRDA_DEBUG(0, "%s(), RX status %d, transfer_flags 0x%04X \n", __func__, urb->status, urb->transfer_flags); |
844 | break; | 844 | break; |
845 | } | 845 | } |
846 | /* If we received an error, we don't want to resubmit the | 846 | /* If we received an error, we don't want to resubmit the |
@@ -861,7 +861,7 @@ static void irda_usb_receive(struct urb *urb) | |||
861 | 861 | ||
862 | /* Check for empty frames */ | 862 | /* Check for empty frames */ |
863 | if (urb->actual_length <= self->header_length) { | 863 | if (urb->actual_length <= self->header_length) { |
864 | IRDA_WARNING("%s(), empty frame!\n", __FUNCTION__); | 864 | IRDA_WARNING("%s(), empty frame!\n", __func__); |
865 | goto done; | 865 | goto done; |
866 | } | 866 | } |
867 | 867 | ||
@@ -967,7 +967,7 @@ static void irda_usb_rx_defer_expired(unsigned long data) | |||
967 | struct irda_skb_cb *cb; | 967 | struct irda_skb_cb *cb; |
968 | struct urb *next_urb; | 968 | struct urb *next_urb; |
969 | 969 | ||
970 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 970 | IRDA_DEBUG(2, "%s()\n", __func__); |
971 | 971 | ||
972 | /* Find ourselves */ | 972 | /* Find ourselves */ |
973 | cb = (struct irda_skb_cb *) skb->cb; | 973 | cb = (struct irda_skb_cb *) skb->cb; |
@@ -1053,7 +1053,7 @@ static int stir421x_fw_upload(struct irda_usb_cb *self, | |||
1053 | patch_block, block_size, | 1053 | patch_block, block_size, |
1054 | &actual_len, msecs_to_jiffies(500)); | 1054 | &actual_len, msecs_to_jiffies(500)); |
1055 | IRDA_DEBUG(3,"%s(): Bulk send %u bytes, ret=%d\n", | 1055 | IRDA_DEBUG(3,"%s(): Bulk send %u bytes, ret=%d\n", |
1056 | __FUNCTION__, actual_len, ret); | 1056 | __func__, actual_len, ret); |
1057 | 1057 | ||
1058 | if (ret < 0) | 1058 | if (ret < 0) |
1059 | break; | 1059 | break; |
@@ -1092,7 +1092,7 @@ static int stir421x_patch_device(struct irda_usb_cb *self) | |||
1092 | 1092 | ||
1093 | /* We get a patch from userspace */ | 1093 | /* We get a patch from userspace */ |
1094 | IRDA_MESSAGE("%s(): Received firmware %s (%zu bytes)\n", | 1094 | IRDA_MESSAGE("%s(): Received firmware %s (%zu bytes)\n", |
1095 | __FUNCTION__, stir421x_fw_name, fw->size); | 1095 | __func__, stir421x_fw_name, fw->size); |
1096 | 1096 | ||
1097 | ret = -EINVAL; | 1097 | ret = -EINVAL; |
1098 | 1098 | ||
@@ -1116,7 +1116,7 @@ static int stir421x_patch_device(struct irda_usb_cb *self) | |||
1116 | + (build % 10); | 1116 | + (build % 10); |
1117 | 1117 | ||
1118 | IRDA_DEBUG(3, "%s(): Firmware Product version %ld\n", | 1118 | IRDA_DEBUG(3, "%s(): Firmware Product version %ld\n", |
1119 | __FUNCTION__, fw_version); | 1119 | __func__, fw_version); |
1120 | } | 1120 | } |
1121 | } | 1121 | } |
1122 | 1122 | ||
@@ -1172,7 +1172,7 @@ static int irda_usb_net_open(struct net_device *netdev) | |||
1172 | char hwname[16]; | 1172 | char hwname[16]; |
1173 | int i; | 1173 | int i; |
1174 | 1174 | ||
1175 | IRDA_DEBUG(1, "%s()\n", __FUNCTION__); | 1175 | IRDA_DEBUG(1, "%s()\n", __func__); |
1176 | 1176 | ||
1177 | IRDA_ASSERT(netdev != NULL, return -1;); | 1177 | IRDA_ASSERT(netdev != NULL, return -1;); |
1178 | self = (struct irda_usb_cb *) netdev->priv; | 1178 | self = (struct irda_usb_cb *) netdev->priv; |
@@ -1182,13 +1182,13 @@ static int irda_usb_net_open(struct net_device *netdev) | |||
1182 | /* Can only open the device if it's there */ | 1182 | /* Can only open the device if it's there */ |
1183 | if(!self->present) { | 1183 | if(!self->present) { |
1184 | spin_unlock_irqrestore(&self->lock, flags); | 1184 | spin_unlock_irqrestore(&self->lock, flags); |
1185 | IRDA_WARNING("%s(), device not present!\n", __FUNCTION__); | 1185 | IRDA_WARNING("%s(), device not present!\n", __func__); |
1186 | return -1; | 1186 | return -1; |
1187 | } | 1187 | } |
1188 | 1188 | ||
1189 | if(self->needspatch) { | 1189 | if(self->needspatch) { |
1190 | spin_unlock_irqrestore(&self->lock, flags); | 1190 | spin_unlock_irqrestore(&self->lock, flags); |
1191 | IRDA_WARNING("%s(), device needs patch\n", __FUNCTION__) ; | 1191 | IRDA_WARNING("%s(), device needs patch\n", __func__) ; |
1192 | return -EIO ; | 1192 | return -EIO ; |
1193 | } | 1193 | } |
1194 | 1194 | ||
@@ -1231,7 +1231,7 @@ static int irda_usb_net_open(struct net_device *netdev) | |||
1231 | /* If this ever happen, we are in deep s***. | 1231 | /* If this ever happen, we are in deep s***. |
1232 | * Basically, we can't start the Rx path... */ | 1232 | * Basically, we can't start the Rx path... */ |
1233 | IRDA_WARNING("%s(), Failed to allocate Rx skb\n", | 1233 | IRDA_WARNING("%s(), Failed to allocate Rx skb\n", |
1234 | __FUNCTION__); | 1234 | __func__); |
1235 | return -1; | 1235 | return -1; |
1236 | } | 1236 | } |
1237 | //skb_reserve(newskb, USB_IRDA_HEADER - 1); | 1237 | //skb_reserve(newskb, USB_IRDA_HEADER - 1); |
@@ -1254,7 +1254,7 @@ static int irda_usb_net_close(struct net_device *netdev) | |||
1254 | struct irda_usb_cb *self; | 1254 | struct irda_usb_cb *self; |
1255 | int i; | 1255 | int i; |
1256 | 1256 | ||
1257 | IRDA_DEBUG(1, "%s()\n", __FUNCTION__); | 1257 | IRDA_DEBUG(1, "%s()\n", __func__); |
1258 | 1258 | ||
1259 | IRDA_ASSERT(netdev != NULL, return -1;); | 1259 | IRDA_ASSERT(netdev != NULL, return -1;); |
1260 | self = (struct irda_usb_cb *) netdev->priv; | 1260 | self = (struct irda_usb_cb *) netdev->priv; |
@@ -1309,7 +1309,7 @@ static int irda_usb_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
1309 | self = dev->priv; | 1309 | self = dev->priv; |
1310 | IRDA_ASSERT(self != NULL, return -1;); | 1310 | IRDA_ASSERT(self != NULL, return -1;); |
1311 | 1311 | ||
1312 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); | 1312 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
1313 | 1313 | ||
1314 | switch (cmd) { | 1314 | switch (cmd) { |
1315 | case SIOCSBANDWIDTH: /* Set bandwidth */ | 1315 | case SIOCSBANDWIDTH: /* Set bandwidth */ |
@@ -1367,7 +1367,7 @@ static inline void irda_usb_init_qos(struct irda_usb_cb *self) | |||
1367 | { | 1367 | { |
1368 | struct irda_class_desc *desc; | 1368 | struct irda_class_desc *desc; |
1369 | 1369 | ||
1370 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 1370 | IRDA_DEBUG(3, "%s()\n", __func__); |
1371 | 1371 | ||
1372 | desc = self->irda_desc; | 1372 | desc = self->irda_desc; |
1373 | 1373 | ||
@@ -1384,7 +1384,7 @@ static inline void irda_usb_init_qos(struct irda_usb_cb *self) | |||
1384 | self->qos.data_size.bits = desc->bmDataSize; | 1384 | self->qos.data_size.bits = desc->bmDataSize; |
1385 | 1385 | ||
1386 | IRDA_DEBUG(0, "%s(), dongle says speed=0x%X, size=0x%X, window=0x%X, bofs=0x%X, turn=0x%X\n", | 1386 | IRDA_DEBUG(0, "%s(), dongle says speed=0x%X, size=0x%X, window=0x%X, bofs=0x%X, turn=0x%X\n", |
1387 | __FUNCTION__, self->qos.baud_rate.bits, self->qos.data_size.bits, self->qos.window_size.bits, self->qos.additional_bofs.bits, self->qos.min_turn_time.bits); | 1387 | __func__, self->qos.baud_rate.bits, self->qos.data_size.bits, self->qos.window_size.bits, self->qos.additional_bofs.bits, self->qos.min_turn_time.bits); |
1388 | 1388 | ||
1389 | /* Don't always trust what the dongle tell us */ | 1389 | /* Don't always trust what the dongle tell us */ |
1390 | if(self->capability & IUC_SIR_ONLY) | 1390 | if(self->capability & IUC_SIR_ONLY) |
@@ -1419,7 +1419,7 @@ static inline int irda_usb_open(struct irda_usb_cb *self) | |||
1419 | { | 1419 | { |
1420 | struct net_device *netdev = self->netdev; | 1420 | struct net_device *netdev = self->netdev; |
1421 | 1421 | ||
1422 | IRDA_DEBUG(1, "%s()\n", __FUNCTION__); | 1422 | IRDA_DEBUG(1, "%s()\n", __func__); |
1423 | 1423 | ||
1424 | irda_usb_init_qos(self); | 1424 | irda_usb_init_qos(self); |
1425 | 1425 | ||
@@ -1442,7 +1442,7 @@ static inline int irda_usb_open(struct irda_usb_cb *self) | |||
1442 | */ | 1442 | */ |
1443 | static inline void irda_usb_close(struct irda_usb_cb *self) | 1443 | static inline void irda_usb_close(struct irda_usb_cb *self) |
1444 | { | 1444 | { |
1445 | IRDA_DEBUG(1, "%s()\n", __FUNCTION__); | 1445 | IRDA_DEBUG(1, "%s()\n", __func__); |
1446 | 1446 | ||
1447 | /* Remove netdevice */ | 1447 | /* Remove netdevice */ |
1448 | unregister_netdev(self->netdev); | 1448 | unregister_netdev(self->netdev); |
@@ -1515,13 +1515,13 @@ static inline int irda_usb_parse_endpoints(struct irda_usb_cb *self, struct usb_ | |||
1515 | /* This is our interrupt endpoint */ | 1515 | /* This is our interrupt endpoint */ |
1516 | self->bulk_int_ep = ep; | 1516 | self->bulk_int_ep = ep; |
1517 | } else { | 1517 | } else { |
1518 | IRDA_ERROR("%s(), Unrecognised endpoint %02X.\n", __FUNCTION__, ep); | 1518 | IRDA_ERROR("%s(), Unrecognised endpoint %02X.\n", __func__, ep); |
1519 | } | 1519 | } |
1520 | } | 1520 | } |
1521 | } | 1521 | } |
1522 | 1522 | ||
1523 | IRDA_DEBUG(0, "%s(), And our endpoints are : in=%02X, out=%02X (%d), int=%02X\n", | 1523 | IRDA_DEBUG(0, "%s(), And our endpoints are : in=%02X, out=%02X (%d), int=%02X\n", |
1524 | __FUNCTION__, self->bulk_in_ep, self->bulk_out_ep, self->bulk_out_mtu, self->bulk_int_ep); | 1524 | __func__, self->bulk_in_ep, self->bulk_out_ep, self->bulk_out_mtu, self->bulk_int_ep); |
1525 | 1525 | ||
1526 | return((self->bulk_in_ep != 0) && (self->bulk_out_ep != 0)); | 1526 | return((self->bulk_in_ep != 0) && (self->bulk_out_ep != 0)); |
1527 | } | 1527 | } |
@@ -1583,7 +1583,7 @@ static inline struct irda_class_desc *irda_usb_find_class_desc(struct usb_interf | |||
1583 | 0, intf->altsetting->desc.bInterfaceNumber, desc, | 1583 | 0, intf->altsetting->desc.bInterfaceNumber, desc, |
1584 | sizeof(*desc), 500); | 1584 | sizeof(*desc), 500); |
1585 | 1585 | ||
1586 | IRDA_DEBUG(1, "%s(), ret=%d\n", __FUNCTION__, ret); | 1586 | IRDA_DEBUG(1, "%s(), ret=%d\n", __func__, ret); |
1587 | if (ret < sizeof(*desc)) { | 1587 | if (ret < sizeof(*desc)) { |
1588 | IRDA_WARNING("usb-irda: class_descriptor read %s (%d)\n", | 1588 | IRDA_WARNING("usb-irda: class_descriptor read %s (%d)\n", |
1589 | (ret<0) ? "failed" : "too short", ret); | 1589 | (ret<0) ? "failed" : "too short", ret); |
@@ -1696,10 +1696,10 @@ static int irda_usb_probe(struct usb_interface *intf, | |||
1696 | /* Martin Diehl says if we get a -EPIPE we should | 1696 | /* Martin Diehl says if we get a -EPIPE we should |
1697 | * be fine and we don't need to do a usb_clear_halt(). | 1697 | * be fine and we don't need to do a usb_clear_halt(). |
1698 | * - Jean II */ | 1698 | * - Jean II */ |
1699 | IRDA_DEBUG(0, "%s(), Received -EPIPE, ignoring...\n", __FUNCTION__); | 1699 | IRDA_DEBUG(0, "%s(), Received -EPIPE, ignoring...\n", __func__); |
1700 | break; | 1700 | break; |
1701 | default: | 1701 | default: |
1702 | IRDA_DEBUG(0, "%s(), Unknown error %d\n", __FUNCTION__, ret); | 1702 | IRDA_DEBUG(0, "%s(), Unknown error %d\n", __func__, ret); |
1703 | ret = -EIO; | 1703 | ret = -EIO; |
1704 | goto err_out_3; | 1704 | goto err_out_3; |
1705 | } | 1705 | } |
@@ -1708,7 +1708,7 @@ static int irda_usb_probe(struct usb_interface *intf, | |||
1708 | interface = intf->cur_altsetting; | 1708 | interface = intf->cur_altsetting; |
1709 | if(!irda_usb_parse_endpoints(self, interface->endpoint, | 1709 | if(!irda_usb_parse_endpoints(self, interface->endpoint, |
1710 | interface->desc.bNumEndpoints)) { | 1710 | interface->desc.bNumEndpoints)) { |
1711 | IRDA_ERROR("%s(), Bogus endpoints...\n", __FUNCTION__); | 1711 | IRDA_ERROR("%s(), Bogus endpoints...\n", __func__); |
1712 | ret = -EIO; | 1712 | ret = -EIO; |
1713 | goto err_out_3; | 1713 | goto err_out_3; |
1714 | } | 1714 | } |
@@ -1815,7 +1815,7 @@ static void irda_usb_disconnect(struct usb_interface *intf) | |||
1815 | struct irda_usb_cb *self = usb_get_intfdata(intf); | 1815 | struct irda_usb_cb *self = usb_get_intfdata(intf); |
1816 | int i; | 1816 | int i; |
1817 | 1817 | ||
1818 | IRDA_DEBUG(1, "%s()\n", __FUNCTION__); | 1818 | IRDA_DEBUG(1, "%s()\n", __func__); |
1819 | 1819 | ||
1820 | usb_set_intfdata(intf, NULL); | 1820 | usb_set_intfdata(intf, NULL); |
1821 | if (!self) | 1821 | if (!self) |
@@ -1865,7 +1865,7 @@ static void irda_usb_disconnect(struct usb_interface *intf) | |||
1865 | 1865 | ||
1866 | /* Free self and network device */ | 1866 | /* Free self and network device */ |
1867 | free_netdev(self->netdev); | 1867 | free_netdev(self->netdev); |
1868 | IRDA_DEBUG(0, "%s(), USB IrDA Disconnected\n", __FUNCTION__); | 1868 | IRDA_DEBUG(0, "%s(), USB IrDA Disconnected\n", __func__); |
1869 | } | 1869 | } |
1870 | 1870 | ||
1871 | /*------------------------------------------------------------------*/ | 1871 | /*------------------------------------------------------------------*/ |
diff --git a/drivers/net/irda/irtty-sir.c b/drivers/net/irda/irtty-sir.c index 9e33196f9459..6bcee01c684c 100644 --- a/drivers/net/irda/irtty-sir.c +++ b/drivers/net/irda/irtty-sir.c | |||
@@ -231,7 +231,7 @@ static void irtty_receive_buf(struct tty_struct *tty, const unsigned char *cp, | |||
231 | 231 | ||
232 | dev = priv->dev; | 232 | dev = priv->dev; |
233 | if (!dev) { | 233 | if (!dev) { |
234 | IRDA_WARNING("%s(), not ready yet!\n", __FUNCTION__); | 234 | IRDA_WARNING("%s(), not ready yet!\n", __func__); |
235 | return; | 235 | return; |
236 | } | 236 | } |
237 | 237 | ||
@@ -388,7 +388,7 @@ static int irtty_ioctl(struct tty_struct *tty, struct file *file, unsigned int c | |||
388 | IRDA_ASSERT(priv != NULL, return -ENODEV;); | 388 | IRDA_ASSERT(priv != NULL, return -ENODEV;); |
389 | IRDA_ASSERT(priv->magic == IRTTY_MAGIC, return -EBADR;); | 389 | IRDA_ASSERT(priv->magic == IRTTY_MAGIC, return -EBADR;); |
390 | 390 | ||
391 | IRDA_DEBUG(3, "%s(cmd=0x%X)\n", __FUNCTION__, cmd); | 391 | IRDA_DEBUG(3, "%s(cmd=0x%X)\n", __func__, cmd); |
392 | 392 | ||
393 | dev = priv->dev; | 393 | dev = priv->dev; |
394 | IRDA_ASSERT(dev != NULL, return -1;); | 394 | IRDA_ASSERT(dev != NULL, return -1;); |
@@ -476,7 +476,7 @@ static int irtty_open(struct tty_struct *tty) | |||
476 | 476 | ||
477 | mutex_unlock(&irtty_mutex); | 477 | mutex_unlock(&irtty_mutex); |
478 | 478 | ||
479 | IRDA_DEBUG(0, "%s - %s: irda line discipline opened\n", __FUNCTION__, tty->name); | 479 | IRDA_DEBUG(0, "%s - %s: irda line discipline opened\n", __func__, tty->name); |
480 | 480 | ||
481 | return 0; | 481 | return 0; |
482 | 482 | ||
@@ -528,7 +528,7 @@ static void irtty_close(struct tty_struct *tty) | |||
528 | 528 | ||
529 | kfree(priv); | 529 | kfree(priv); |
530 | 530 | ||
531 | IRDA_DEBUG(0, "%s - %s: irda line discipline closed\n", __FUNCTION__, tty->name); | 531 | IRDA_DEBUG(0, "%s - %s: irda line discipline closed\n", __func__, tty->name); |
532 | } | 532 | } |
533 | 533 | ||
534 | /* ------------------------------------------------------- */ | 534 | /* ------------------------------------------------------- */ |
@@ -566,7 +566,7 @@ static void __exit irtty_sir_cleanup(void) | |||
566 | 566 | ||
567 | if ((err = tty_unregister_ldisc(N_IRDA))) { | 567 | if ((err = tty_unregister_ldisc(N_IRDA))) { |
568 | IRDA_ERROR("%s(), can't unregister line discipline (err = %d)\n", | 568 | IRDA_ERROR("%s(), can't unregister line discipline (err = %d)\n", |
569 | __FUNCTION__, err); | 569 | __func__, err); |
570 | } | 570 | } |
571 | } | 571 | } |
572 | 572 | ||
diff --git a/drivers/net/irda/kingsun-sir.c b/drivers/net/irda/kingsun-sir.c index 648e54b3f00e..73fe83be34fe 100644 --- a/drivers/net/irda/kingsun-sir.c +++ b/drivers/net/irda/kingsun-sir.c | |||
@@ -243,7 +243,7 @@ static void kingsun_rcv_irq(struct urb *urb) | |||
243 | } | 243 | } |
244 | } else if (urb->actual_length > 0) { | 244 | } else if (urb->actual_length > 0) { |
245 | err("%s(): Unexpected response length, expected %d got %d", | 245 | err("%s(): Unexpected response length, expected %d got %d", |
246 | __FUNCTION__, kingsun->max_rx, urb->actual_length); | 246 | __func__, kingsun->max_rx, urb->actual_length); |
247 | } | 247 | } |
248 | /* This urb has already been filled in kingsun_net_open */ | 248 | /* This urb has already been filled in kingsun_net_open */ |
249 | ret = usb_submit_urb(urb, GFP_ATOMIC); | 249 | ret = usb_submit_urb(urb, GFP_ATOMIC); |
diff --git a/drivers/net/irda/litelink-sir.c b/drivers/net/irda/litelink-sir.c index 73261c54bbfd..d6d9d2e5ad49 100644 --- a/drivers/net/irda/litelink-sir.c +++ b/drivers/net/irda/litelink-sir.c | |||
@@ -78,7 +78,7 @@ static int litelink_open(struct sir_dev *dev) | |||
78 | { | 78 | { |
79 | struct qos_info *qos = &dev->qos; | 79 | struct qos_info *qos = &dev->qos; |
80 | 80 | ||
81 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 81 | IRDA_DEBUG(2, "%s()\n", __func__); |
82 | 82 | ||
83 | /* Power up dongle */ | 83 | /* Power up dongle */ |
84 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 84 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
@@ -95,7 +95,7 @@ static int litelink_open(struct sir_dev *dev) | |||
95 | 95 | ||
96 | static int litelink_close(struct sir_dev *dev) | 96 | static int litelink_close(struct sir_dev *dev) |
97 | { | 97 | { |
98 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 98 | IRDA_DEBUG(2, "%s()\n", __func__); |
99 | 99 | ||
100 | /* Power off dongle */ | 100 | /* Power off dongle */ |
101 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 101 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -113,7 +113,7 @@ static int litelink_change_speed(struct sir_dev *dev, unsigned speed) | |||
113 | { | 113 | { |
114 | int i; | 114 | int i; |
115 | 115 | ||
116 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 116 | IRDA_DEBUG(2, "%s()\n", __func__); |
117 | 117 | ||
118 | /* dongle already reset by irda-thread - current speed (dongle and | 118 | /* dongle already reset by irda-thread - current speed (dongle and |
119 | * port) is the default speed (115200 for litelink!) | 119 | * port) is the default speed (115200 for litelink!) |
@@ -156,7 +156,7 @@ static int litelink_change_speed(struct sir_dev *dev, unsigned speed) | |||
156 | */ | 156 | */ |
157 | static int litelink_reset(struct sir_dev *dev) | 157 | static int litelink_reset(struct sir_dev *dev) |
158 | { | 158 | { |
159 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 159 | IRDA_DEBUG(2, "%s()\n", __func__); |
160 | 160 | ||
161 | /* probably the power-up can be dropped here, but with only | 161 | /* probably the power-up can be dropped here, but with only |
162 | * 15 usec delay it's not worth the risk unless somebody with | 162 | * 15 usec delay it's not worth the risk unless somebody with |
diff --git a/drivers/net/irda/ma600-sir.c b/drivers/net/irda/ma600-sir.c index 809906d94762..1ceed9cfb7c4 100644 --- a/drivers/net/irda/ma600-sir.c +++ b/drivers/net/irda/ma600-sir.c | |||
@@ -67,13 +67,13 @@ static struct dongle_driver ma600 = { | |||
67 | 67 | ||
68 | static int __init ma600_sir_init(void) | 68 | static int __init ma600_sir_init(void) |
69 | { | 69 | { |
70 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 70 | IRDA_DEBUG(2, "%s()\n", __func__); |
71 | return irda_register_dongle(&ma600); | 71 | return irda_register_dongle(&ma600); |
72 | } | 72 | } |
73 | 73 | ||
74 | static void __exit ma600_sir_cleanup(void) | 74 | static void __exit ma600_sir_cleanup(void) |
75 | { | 75 | { |
76 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 76 | IRDA_DEBUG(2, "%s()\n", __func__); |
77 | irda_unregister_dongle(&ma600); | 77 | irda_unregister_dongle(&ma600); |
78 | } | 78 | } |
79 | 79 | ||
@@ -88,7 +88,7 @@ static int ma600_open(struct sir_dev *dev) | |||
88 | { | 88 | { |
89 | struct qos_info *qos = &dev->qos; | 89 | struct qos_info *qos = &dev->qos; |
90 | 90 | ||
91 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 91 | IRDA_DEBUG(2, "%s()\n", __func__); |
92 | 92 | ||
93 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 93 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
94 | 94 | ||
@@ -106,7 +106,7 @@ static int ma600_open(struct sir_dev *dev) | |||
106 | 106 | ||
107 | static int ma600_close(struct sir_dev *dev) | 107 | static int ma600_close(struct sir_dev *dev) |
108 | { | 108 | { |
109 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 109 | IRDA_DEBUG(2, "%s()\n", __func__); |
110 | 110 | ||
111 | /* Power off dongle */ | 111 | /* Power off dongle */ |
112 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 112 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -176,7 +176,7 @@ static int ma600_change_speed(struct sir_dev *dev, unsigned speed) | |||
176 | { | 176 | { |
177 | u8 byte; | 177 | u8 byte; |
178 | 178 | ||
179 | IRDA_DEBUG(2, "%s(), speed=%d (was %d)\n", __FUNCTION__, | 179 | IRDA_DEBUG(2, "%s(), speed=%d (was %d)\n", __func__, |
180 | speed, dev->speed); | 180 | speed, dev->speed); |
181 | 181 | ||
182 | /* dongle already reset, dongle and port at default speed (9600) */ | 182 | /* dongle already reset, dongle and port at default speed (9600) */ |
@@ -201,12 +201,12 @@ static int ma600_change_speed(struct sir_dev *dev, unsigned speed) | |||
201 | sirdev_raw_read(dev, &byte, sizeof(byte)); | 201 | sirdev_raw_read(dev, &byte, sizeof(byte)); |
202 | if (byte != get_control_byte(speed)) { | 202 | if (byte != get_control_byte(speed)) { |
203 | IRDA_WARNING("%s(): bad control byte read-back %02x != %02x\n", | 203 | IRDA_WARNING("%s(): bad control byte read-back %02x != %02x\n", |
204 | __FUNCTION__, (unsigned) byte, | 204 | __func__, (unsigned) byte, |
205 | (unsigned) get_control_byte(speed)); | 205 | (unsigned) get_control_byte(speed)); |
206 | return -1; | 206 | return -1; |
207 | } | 207 | } |
208 | else | 208 | else |
209 | IRDA_DEBUG(2, "%s() control byte write read OK\n", __FUNCTION__); | 209 | IRDA_DEBUG(2, "%s() control byte write read OK\n", __func__); |
210 | #endif | 210 | #endif |
211 | 211 | ||
212 | /* Set DTR, Set RTS */ | 212 | /* Set DTR, Set RTS */ |
@@ -238,7 +238,7 @@ static int ma600_change_speed(struct sir_dev *dev, unsigned speed) | |||
238 | 238 | ||
239 | int ma600_reset(struct sir_dev *dev) | 239 | int ma600_reset(struct sir_dev *dev) |
240 | { | 240 | { |
241 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 241 | IRDA_DEBUG(2, "%s()\n", __func__); |
242 | 242 | ||
243 | /* Reset the dongle : set DTR low for 10 ms */ | 243 | /* Reset the dongle : set DTR low for 10 ms */ |
244 | sirdev_set_dtr_rts(dev, FALSE, TRUE); | 244 | sirdev_set_dtr_rts(dev, FALSE, TRUE); |
diff --git a/drivers/net/irda/mcp2120-sir.c b/drivers/net/irda/mcp2120-sir.c index 67bd016e4df8..5e2f4859cee7 100644 --- a/drivers/net/irda/mcp2120-sir.c +++ b/drivers/net/irda/mcp2120-sir.c | |||
@@ -63,7 +63,7 @@ static int mcp2120_open(struct sir_dev *dev) | |||
63 | { | 63 | { |
64 | struct qos_info *qos = &dev->qos; | 64 | struct qos_info *qos = &dev->qos; |
65 | 65 | ||
66 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 66 | IRDA_DEBUG(2, "%s()\n", __func__); |
67 | 67 | ||
68 | /* seems no explicit power-on required here and reset switching it on anyway */ | 68 | /* seems no explicit power-on required here and reset switching it on anyway */ |
69 | 69 | ||
@@ -76,7 +76,7 @@ static int mcp2120_open(struct sir_dev *dev) | |||
76 | 76 | ||
77 | static int mcp2120_close(struct sir_dev *dev) | 77 | static int mcp2120_close(struct sir_dev *dev) |
78 | { | 78 | { |
79 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 79 | IRDA_DEBUG(2, "%s()\n", __func__); |
80 | 80 | ||
81 | /* Power off dongle */ | 81 | /* Power off dongle */ |
82 | /* reset and inhibit mcp2120 */ | 82 | /* reset and inhibit mcp2120 */ |
@@ -102,7 +102,7 @@ static int mcp2120_change_speed(struct sir_dev *dev, unsigned speed) | |||
102 | u8 control[2]; | 102 | u8 control[2]; |
103 | static int ret = 0; | 103 | static int ret = 0; |
104 | 104 | ||
105 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 105 | IRDA_DEBUG(2, "%s()\n", __func__); |
106 | 106 | ||
107 | switch (state) { | 107 | switch (state) { |
108 | case SIRDEV_STATE_DONGLE_SPEED: | 108 | case SIRDEV_STATE_DONGLE_SPEED: |
@@ -155,7 +155,7 @@ static int mcp2120_change_speed(struct sir_dev *dev, unsigned speed) | |||
155 | break; | 155 | break; |
156 | 156 | ||
157 | default: | 157 | default: |
158 | IRDA_ERROR("%s(), undefine state %d\n", __FUNCTION__, state); | 158 | IRDA_ERROR("%s(), undefine state %d\n", __func__, state); |
159 | ret = -EINVAL; | 159 | ret = -EINVAL; |
160 | break; | 160 | break; |
161 | } | 161 | } |
@@ -187,7 +187,7 @@ static int mcp2120_reset(struct sir_dev *dev) | |||
187 | unsigned delay = 0; | 187 | unsigned delay = 0; |
188 | int ret = 0; | 188 | int ret = 0; |
189 | 189 | ||
190 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 190 | IRDA_DEBUG(2, "%s()\n", __func__); |
191 | 191 | ||
192 | switch (state) { | 192 | switch (state) { |
193 | case SIRDEV_STATE_DONGLE_RESET: | 193 | case SIRDEV_STATE_DONGLE_RESET: |
@@ -213,7 +213,7 @@ static int mcp2120_reset(struct sir_dev *dev) | |||
213 | break; | 213 | break; |
214 | 214 | ||
215 | default: | 215 | default: |
216 | IRDA_ERROR("%s(), undefined state %d\n", __FUNCTION__, state); | 216 | IRDA_ERROR("%s(), undefined state %d\n", __func__, state); |
217 | ret = -EINVAL; | 217 | ret = -EINVAL; |
218 | break; | 218 | break; |
219 | } | 219 | } |
diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c index effc1ce8179a..8583d951a6ad 100644 --- a/drivers/net/irda/nsc-ircc.c +++ b/drivers/net/irda/nsc-ircc.c | |||
@@ -151,8 +151,8 @@ static char *dongle_types[] = { | |||
151 | static chipio_t pnp_info; | 151 | static chipio_t pnp_info; |
152 | static const struct pnp_device_id nsc_ircc_pnp_table[] = { | 152 | static const struct pnp_device_id nsc_ircc_pnp_table[] = { |
153 | { .id = "NSC6001", .driver_data = 0 }, | 153 | { .id = "NSC6001", .driver_data = 0 }, |
154 | { .id = "IBM0071", .driver_data = 0 }, | ||
155 | { .id = "HWPC224", .driver_data = 0 }, | 154 | { .id = "HWPC224", .driver_data = 0 }, |
155 | { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 }, | ||
156 | { } | 156 | { } |
157 | }; | 157 | }; |
158 | 158 | ||
@@ -223,7 +223,7 @@ static int __init nsc_ircc_init(void) | |||
223 | 223 | ||
224 | /* Probe for all the NSC chipsets we know about */ | 224 | /* Probe for all the NSC chipsets we know about */ |
225 | for (chip = chips; chip->name ; chip++) { | 225 | for (chip = chips; chip->name ; chip++) { |
226 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__, | 226 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, |
227 | chip->name); | 227 | chip->name); |
228 | 228 | ||
229 | /* Try all config registers for this chip */ | 229 | /* Try all config registers for this chip */ |
@@ -235,7 +235,7 @@ static int __init nsc_ircc_init(void) | |||
235 | /* Read index register */ | 235 | /* Read index register */ |
236 | reg = inb(cfg_base); | 236 | reg = inb(cfg_base); |
237 | if (reg == 0xff) { | 237 | if (reg == 0xff) { |
238 | IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __FUNCTION__, cfg_base); | 238 | IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base); |
239 | continue; | 239 | continue; |
240 | } | 240 | } |
241 | 241 | ||
@@ -244,7 +244,7 @@ static int __init nsc_ircc_init(void) | |||
244 | id = inb(cfg_base+1); | 244 | id = inb(cfg_base+1); |
245 | if ((id & chip->cid_mask) == chip->cid_value) { | 245 | if ((id & chip->cid_mask) == chip->cid_value) { |
246 | IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n", | 246 | IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n", |
247 | __FUNCTION__, chip->name, id & ~chip->cid_mask); | 247 | __func__, chip->name, id & ~chip->cid_mask); |
248 | 248 | ||
249 | /* | 249 | /* |
250 | * If we found a correct PnP setting, | 250 | * If we found a correct PnP setting, |
@@ -295,7 +295,7 @@ static int __init nsc_ircc_init(void) | |||
295 | } | 295 | } |
296 | i++; | 296 | i++; |
297 | } else { | 297 | } else { |
298 | IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id); | 298 | IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id); |
299 | } | 299 | } |
300 | } | 300 | } |
301 | } | 301 | } |
@@ -345,7 +345,7 @@ static int __init nsc_ircc_open(chipio_t *info) | |||
345 | void *ret; | 345 | void *ret; |
346 | int err, chip_index; | 346 | int err, chip_index; |
347 | 347 | ||
348 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 348 | IRDA_DEBUG(2, "%s()\n", __func__); |
349 | 349 | ||
350 | 350 | ||
351 | for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) { | 351 | for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) { |
@@ -354,7 +354,7 @@ static int __init nsc_ircc_open(chipio_t *info) | |||
354 | } | 354 | } |
355 | 355 | ||
356 | if (chip_index == ARRAY_SIZE(dev_self)) { | 356 | if (chip_index == ARRAY_SIZE(dev_self)) { |
357 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__); | 357 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__); |
358 | return -ENOMEM; | 358 | return -ENOMEM; |
359 | } | 359 | } |
360 | 360 | ||
@@ -369,7 +369,7 @@ static int __init nsc_ircc_open(chipio_t *info) | |||
369 | dev = alloc_irdadev(sizeof(struct nsc_ircc_cb)); | 369 | dev = alloc_irdadev(sizeof(struct nsc_ircc_cb)); |
370 | if (dev == NULL) { | 370 | if (dev == NULL) { |
371 | IRDA_ERROR("%s(), can't allocate memory for " | 371 | IRDA_ERROR("%s(), can't allocate memory for " |
372 | "control block!\n", __FUNCTION__); | 372 | "control block!\n", __func__); |
373 | return -ENOMEM; | 373 | return -ENOMEM; |
374 | } | 374 | } |
375 | 375 | ||
@@ -393,7 +393,7 @@ static int __init nsc_ircc_open(chipio_t *info) | |||
393 | ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name); | 393 | ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name); |
394 | if (!ret) { | 394 | if (!ret) { |
395 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", | 395 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", |
396 | __FUNCTION__, self->io.fir_base); | 396 | __func__, self->io.fir_base); |
397 | err = -ENODEV; | 397 | err = -ENODEV; |
398 | goto out1; | 398 | goto out1; |
399 | } | 399 | } |
@@ -450,7 +450,7 @@ static int __init nsc_ircc_open(chipio_t *info) | |||
450 | 450 | ||
451 | err = register_netdev(dev); | 451 | err = register_netdev(dev); |
452 | if (err) { | 452 | if (err) { |
453 | IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__); | 453 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
454 | goto out4; | 454 | goto out4; |
455 | } | 455 | } |
456 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | 456 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); |
@@ -506,7 +506,7 @@ static int __exit nsc_ircc_close(struct nsc_ircc_cb *self) | |||
506 | { | 506 | { |
507 | int iobase; | 507 | int iobase; |
508 | 508 | ||
509 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__); | 509 | IRDA_DEBUG(4, "%s()\n", __func__); |
510 | 510 | ||
511 | IRDA_ASSERT(self != NULL, return -1;); | 511 | IRDA_ASSERT(self != NULL, return -1;); |
512 | 512 | ||
@@ -519,7 +519,7 @@ static int __exit nsc_ircc_close(struct nsc_ircc_cb *self) | |||
519 | 519 | ||
520 | /* Release the PORT that this driver is using */ | 520 | /* Release the PORT that this driver is using */ |
521 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", | 521 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", |
522 | __FUNCTION__, self->io.fir_base); | 522 | __func__, self->io.fir_base); |
523 | release_region(self->io.fir_base, self->io.fir_ext); | 523 | release_region(self->io.fir_base, self->io.fir_ext); |
524 | 524 | ||
525 | if (self->tx_buff.head) | 525 | if (self->tx_buff.head) |
@@ -557,7 +557,7 @@ static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info) | |||
557 | case 0x2e8: outb(0x15, cfg_base+1); break; | 557 | case 0x2e8: outb(0x15, cfg_base+1); break; |
558 | case 0x3f8: outb(0x16, cfg_base+1); break; | 558 | case 0x3f8: outb(0x16, cfg_base+1); break; |
559 | case 0x2f8: outb(0x17, cfg_base+1); break; | 559 | case 0x2f8: outb(0x17, cfg_base+1); break; |
560 | default: IRDA_ERROR("%s(), invalid base_address", __FUNCTION__); | 560 | default: IRDA_ERROR("%s(), invalid base_address", __func__); |
561 | } | 561 | } |
562 | 562 | ||
563 | /* Control Signal Routing Register (CSRT) */ | 563 | /* Control Signal Routing Register (CSRT) */ |
@@ -569,7 +569,7 @@ static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info) | |||
569 | case 9: temp = 0x05; break; | 569 | case 9: temp = 0x05; break; |
570 | case 11: temp = 0x06; break; | 570 | case 11: temp = 0x06; break; |
571 | case 15: temp = 0x07; break; | 571 | case 15: temp = 0x07; break; |
572 | default: IRDA_ERROR("%s(), invalid irq", __FUNCTION__); | 572 | default: IRDA_ERROR("%s(), invalid irq", __func__); |
573 | } | 573 | } |
574 | outb(CFG_108_CSRT, cfg_base); | 574 | outb(CFG_108_CSRT, cfg_base); |
575 | 575 | ||
@@ -577,7 +577,7 @@ static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info) | |||
577 | case 0: outb(0x08+temp, cfg_base+1); break; | 577 | case 0: outb(0x08+temp, cfg_base+1); break; |
578 | case 1: outb(0x10+temp, cfg_base+1); break; | 578 | case 1: outb(0x10+temp, cfg_base+1); break; |
579 | case 3: outb(0x18+temp, cfg_base+1); break; | 579 | case 3: outb(0x18+temp, cfg_base+1); break; |
580 | default: IRDA_ERROR("%s(), invalid dma", __FUNCTION__); | 580 | default: IRDA_ERROR("%s(), invalid dma", __func__); |
581 | } | 581 | } |
582 | 582 | ||
583 | outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */ | 583 | outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */ |
@@ -616,7 +616,7 @@ static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info) | |||
616 | break; | 616 | break; |
617 | } | 617 | } |
618 | info->sir_base = info->fir_base; | 618 | info->sir_base = info->fir_base; |
619 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __FUNCTION__, | 619 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, |
620 | info->fir_base); | 620 | info->fir_base); |
621 | 621 | ||
622 | /* Read control signals routing register (CSRT) */ | 622 | /* Read control signals routing register (CSRT) */ |
@@ -649,7 +649,7 @@ static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info) | |||
649 | info->irq = 15; | 649 | info->irq = 15; |
650 | break; | 650 | break; |
651 | } | 651 | } |
652 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __FUNCTION__, info->irq); | 652 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
653 | 653 | ||
654 | /* Currently we only read Rx DMA but it will also be used for Tx */ | 654 | /* Currently we only read Rx DMA but it will also be used for Tx */ |
655 | switch ((reg >> 3) & 0x03) { | 655 | switch ((reg >> 3) & 0x03) { |
@@ -666,7 +666,7 @@ static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info) | |||
666 | info->dma = 3; | 666 | info->dma = 3; |
667 | break; | 667 | break; |
668 | } | 668 | } |
669 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __FUNCTION__, info->dma); | 669 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
670 | 670 | ||
671 | /* Read mode control register (MCTL) */ | 671 | /* Read mode control register (MCTL) */ |
672 | outb(CFG_108_MCTL, cfg_base); | 672 | outb(CFG_108_MCTL, cfg_base); |
@@ -823,7 +823,7 @@ static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info) | |||
823 | /* User is sure about his config... accept it. */ | 823 | /* User is sure about his config... accept it. */ |
824 | IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): " | 824 | IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): " |
825 | "io=0x%04x, irq=%d, dma=%d\n", | 825 | "io=0x%04x, irq=%d, dma=%d\n", |
826 | __FUNCTION__, info->fir_base, info->irq, info->dma); | 826 | __func__, info->fir_base, info->irq, info->dma); |
827 | 827 | ||
828 | /* Access bank for SP2 */ | 828 | /* Access bank for SP2 */ |
829 | outb(CFG_39X_LDN, cfg_base); | 829 | outb(CFG_39X_LDN, cfg_base); |
@@ -864,7 +864,7 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info) | |||
864 | int enabled, susp; | 864 | int enabled, susp; |
865 | 865 | ||
866 | IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n", | 866 | IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n", |
867 | __FUNCTION__, cfg_base); | 867 | __func__, cfg_base); |
868 | 868 | ||
869 | /* This function should be executed with irq off to avoid | 869 | /* This function should be executed with irq off to avoid |
870 | * another driver messing with the Super I/O bank - Jean II */ | 870 | * another driver messing with the Super I/O bank - Jean II */ |
@@ -898,7 +898,7 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info) | |||
898 | outb(CFG_39X_SPC, cfg_base); | 898 | outb(CFG_39X_SPC, cfg_base); |
899 | susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1); | 899 | susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1); |
900 | 900 | ||
901 | IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __FUNCTION__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp); | 901 | IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp); |
902 | 902 | ||
903 | /* Configure SP2 */ | 903 | /* Configure SP2 */ |
904 | 904 | ||
@@ -930,7 +930,10 @@ static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *i | |||
930 | pnp_info.dma = -1; | 930 | pnp_info.dma = -1; |
931 | pnp_succeeded = 1; | 931 | pnp_succeeded = 1; |
932 | 932 | ||
933 | /* There don't seem to be any way to get the cfg_base. | 933 | if (id->driver_data & NSC_FORCE_DONGLE_TYPE9) |
934 | dongle_id = 0x9; | ||
935 | |||
936 | /* There doesn't seem to be any way of getting the cfg_base. | ||
934 | * On my box, cfg_base is in the PnP descriptor of the | 937 | * On my box, cfg_base is in the PnP descriptor of the |
935 | * motherboard. Oh well... Jean II */ | 938 | * motherboard. Oh well... Jean II */ |
936 | 939 | ||
@@ -947,7 +950,7 @@ static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *i | |||
947 | pnp_info.dma = pnp_dma(dev, 0); | 950 | pnp_info.dma = pnp_dma(dev, 0); |
948 | 951 | ||
949 | IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n", | 952 | IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n", |
950 | __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma); | 953 | __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma); |
951 | 954 | ||
952 | if((pnp_info.fir_base == 0) || | 955 | if((pnp_info.fir_base == 0) || |
953 | (pnp_info.irq == -1) || (pnp_info.dma == -1)) { | 956 | (pnp_info.irq == -1) || (pnp_info.dma == -1)) { |
@@ -976,7 +979,7 @@ static int nsc_ircc_setup(chipio_t *info) | |||
976 | version = inb(iobase+MID); | 979 | version = inb(iobase+MID); |
977 | 980 | ||
978 | IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n", | 981 | IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n", |
979 | __FUNCTION__, driver_name, version); | 982 | __func__, driver_name, version); |
980 | 983 | ||
981 | /* Should be 0x2? */ | 984 | /* Should be 0x2? */ |
982 | if (0x20 != (version & 0xf0)) { | 985 | if (0x20 != (version & 0xf0)) { |
@@ -1080,30 +1083,30 @@ static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) | |||
1080 | case 0x00: /* same as */ | 1083 | case 0x00: /* same as */ |
1081 | case 0x01: /* Differential serial interface */ | 1084 | case 0x01: /* Differential serial interface */ |
1082 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1085 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1083 | __FUNCTION__, dongle_types[dongle_id]); | 1086 | __func__, dongle_types[dongle_id]); |
1084 | break; | 1087 | break; |
1085 | case 0x02: /* same as */ | 1088 | case 0x02: /* same as */ |
1086 | case 0x03: /* Reserved */ | 1089 | case 0x03: /* Reserved */ |
1087 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1090 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1088 | __FUNCTION__, dongle_types[dongle_id]); | 1091 | __func__, dongle_types[dongle_id]); |
1089 | break; | 1092 | break; |
1090 | case 0x04: /* Sharp RY5HD01 */ | 1093 | case 0x04: /* Sharp RY5HD01 */ |
1091 | break; | 1094 | break; |
1092 | case 0x05: /* Reserved, but this is what the Thinkpad reports */ | 1095 | case 0x05: /* Reserved, but this is what the Thinkpad reports */ |
1093 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1096 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1094 | __FUNCTION__, dongle_types[dongle_id]); | 1097 | __func__, dongle_types[dongle_id]); |
1095 | break; | 1098 | break; |
1096 | case 0x06: /* Single-ended serial interface */ | 1099 | case 0x06: /* Single-ended serial interface */ |
1097 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1100 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1098 | __FUNCTION__, dongle_types[dongle_id]); | 1101 | __func__, dongle_types[dongle_id]); |
1099 | break; | 1102 | break; |
1100 | case 0x07: /* Consumer-IR only */ | 1103 | case 0x07: /* Consumer-IR only */ |
1101 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | 1104 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", |
1102 | __FUNCTION__, dongle_types[dongle_id]); | 1105 | __func__, dongle_types[dongle_id]); |
1103 | break; | 1106 | break; |
1104 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ | 1107 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ |
1105 | IRDA_DEBUG(0, "%s(), %s\n", | 1108 | IRDA_DEBUG(0, "%s(), %s\n", |
1106 | __FUNCTION__, dongle_types[dongle_id]); | 1109 | __func__, dongle_types[dongle_id]); |
1107 | break; | 1110 | break; |
1108 | case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */ | 1111 | case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */ |
1109 | outb(0x28, iobase+7); /* Set irsl[0-2] as output */ | 1112 | outb(0x28, iobase+7); /* Set irsl[0-2] as output */ |
@@ -1111,7 +1114,7 @@ static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) | |||
1111 | case 0x0A: /* same as */ | 1114 | case 0x0A: /* same as */ |
1112 | case 0x0B: /* Reserved */ | 1115 | case 0x0B: /* Reserved */ |
1113 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1116 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1114 | __FUNCTION__, dongle_types[dongle_id]); | 1117 | __func__, dongle_types[dongle_id]); |
1115 | break; | 1118 | break; |
1116 | case 0x0C: /* same as */ | 1119 | case 0x0C: /* same as */ |
1117 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ | 1120 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ |
@@ -1126,14 +1129,14 @@ static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) | |||
1126 | break; | 1129 | break; |
1127 | case 0x0F: /* No dongle connected */ | 1130 | case 0x0F: /* No dongle connected */ |
1128 | IRDA_DEBUG(0, "%s(), %s\n", | 1131 | IRDA_DEBUG(0, "%s(), %s\n", |
1129 | __FUNCTION__, dongle_types[dongle_id]); | 1132 | __func__, dongle_types[dongle_id]); |
1130 | 1133 | ||
1131 | switch_bank(iobase, BANK0); | 1134 | switch_bank(iobase, BANK0); |
1132 | outb(0x62, iobase+MCR); | 1135 | outb(0x62, iobase+MCR); |
1133 | break; | 1136 | break; |
1134 | default: | 1137 | default: |
1135 | IRDA_DEBUG(0, "%s(), invalid dongle_id %#x", | 1138 | IRDA_DEBUG(0, "%s(), invalid dongle_id %#x", |
1136 | __FUNCTION__, dongle_id); | 1139 | __func__, dongle_id); |
1137 | } | 1140 | } |
1138 | 1141 | ||
1139 | /* IRCFG1: IRSL1 and 2 are set to IrDA mode */ | 1142 | /* IRCFG1: IRSL1 and 2 are set to IrDA mode */ |
@@ -1165,30 +1168,30 @@ static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) | |||
1165 | case 0x00: /* same as */ | 1168 | case 0x00: /* same as */ |
1166 | case 0x01: /* Differential serial interface */ | 1169 | case 0x01: /* Differential serial interface */ |
1167 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1170 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1168 | __FUNCTION__, dongle_types[dongle_id]); | 1171 | __func__, dongle_types[dongle_id]); |
1169 | break; | 1172 | break; |
1170 | case 0x02: /* same as */ | 1173 | case 0x02: /* same as */ |
1171 | case 0x03: /* Reserved */ | 1174 | case 0x03: /* Reserved */ |
1172 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1175 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1173 | __FUNCTION__, dongle_types[dongle_id]); | 1176 | __func__, dongle_types[dongle_id]); |
1174 | break; | 1177 | break; |
1175 | case 0x04: /* Sharp RY5HD01 */ | 1178 | case 0x04: /* Sharp RY5HD01 */ |
1176 | break; | 1179 | break; |
1177 | case 0x05: /* Reserved */ | 1180 | case 0x05: /* Reserved */ |
1178 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1181 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1179 | __FUNCTION__, dongle_types[dongle_id]); | 1182 | __func__, dongle_types[dongle_id]); |
1180 | break; | 1183 | break; |
1181 | case 0x06: /* Single-ended serial interface */ | 1184 | case 0x06: /* Single-ended serial interface */ |
1182 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1185 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1183 | __FUNCTION__, dongle_types[dongle_id]); | 1186 | __func__, dongle_types[dongle_id]); |
1184 | break; | 1187 | break; |
1185 | case 0x07: /* Consumer-IR only */ | 1188 | case 0x07: /* Consumer-IR only */ |
1186 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | 1189 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", |
1187 | __FUNCTION__, dongle_types[dongle_id]); | 1190 | __func__, dongle_types[dongle_id]); |
1188 | break; | 1191 | break; |
1189 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ | 1192 | case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */ |
1190 | IRDA_DEBUG(0, "%s(), %s\n", | 1193 | IRDA_DEBUG(0, "%s(), %s\n", |
1191 | __FUNCTION__, dongle_types[dongle_id]); | 1194 | __func__, dongle_types[dongle_id]); |
1192 | outb(0x00, iobase+4); | 1195 | outb(0x00, iobase+4); |
1193 | if (speed > 115200) | 1196 | if (speed > 115200) |
1194 | outb(0x01, iobase+4); | 1197 | outb(0x01, iobase+4); |
@@ -1207,7 +1210,7 @@ static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) | |||
1207 | case 0x0A: /* same as */ | 1210 | case 0x0A: /* same as */ |
1208 | case 0x0B: /* Reserved */ | 1211 | case 0x0B: /* Reserved */ |
1209 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", | 1212 | IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n", |
1210 | __FUNCTION__, dongle_types[dongle_id]); | 1213 | __func__, dongle_types[dongle_id]); |
1211 | break; | 1214 | break; |
1212 | case 0x0C: /* same as */ | 1215 | case 0x0C: /* same as */ |
1213 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ | 1216 | case 0x0D: /* HP HSDL-1100/HSDL-2100 */ |
@@ -1216,13 +1219,13 @@ static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) | |||
1216 | break; | 1219 | break; |
1217 | case 0x0F: /* No dongle connected */ | 1220 | case 0x0F: /* No dongle connected */ |
1218 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", | 1221 | IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n", |
1219 | __FUNCTION__, dongle_types[dongle_id]); | 1222 | __func__, dongle_types[dongle_id]); |
1220 | 1223 | ||
1221 | switch_bank(iobase, BANK0); | 1224 | switch_bank(iobase, BANK0); |
1222 | outb(0x62, iobase+MCR); | 1225 | outb(0x62, iobase+MCR); |
1223 | break; | 1226 | break; |
1224 | default: | 1227 | default: |
1225 | IRDA_DEBUG(0, "%s(), invalid data_rate\n", __FUNCTION__); | 1228 | IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__); |
1226 | } | 1229 | } |
1227 | /* Restore bank register */ | 1230 | /* Restore bank register */ |
1228 | outb(bank, iobase+BSR); | 1231 | outb(bank, iobase+BSR); |
@@ -1243,7 +1246,7 @@ static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed) | |||
1243 | __u8 bank; | 1246 | __u8 bank; |
1244 | __u8 ier; /* Interrupt enable register */ | 1247 | __u8 ier; /* Interrupt enable register */ |
1245 | 1248 | ||
1246 | IRDA_DEBUG(2, "%s(), speed=%d\n", __FUNCTION__, speed); | 1249 | IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed); |
1247 | 1250 | ||
1248 | IRDA_ASSERT(self != NULL, return 0;); | 1251 | IRDA_ASSERT(self != NULL, return 0;); |
1249 | 1252 | ||
@@ -1276,20 +1279,20 @@ static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed) | |||
1276 | outb(inb(iobase+4) | 0x04, iobase+4); | 1279 | outb(inb(iobase+4) | 0x04, iobase+4); |
1277 | 1280 | ||
1278 | mcr = MCR_MIR; | 1281 | mcr = MCR_MIR; |
1279 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__); | 1282 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__); |
1280 | break; | 1283 | break; |
1281 | case 1152000: | 1284 | case 1152000: |
1282 | mcr = MCR_MIR; | 1285 | mcr = MCR_MIR; |
1283 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__); | 1286 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__); |
1284 | break; | 1287 | break; |
1285 | case 4000000: | 1288 | case 4000000: |
1286 | mcr = MCR_FIR; | 1289 | mcr = MCR_FIR; |
1287 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__); | 1290 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__); |
1288 | break; | 1291 | break; |
1289 | default: | 1292 | default: |
1290 | mcr = MCR_FIR; | 1293 | mcr = MCR_FIR; |
1291 | IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", | 1294 | IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", |
1292 | __FUNCTION__, speed); | 1295 | __func__, speed); |
1293 | break; | 1296 | break; |
1294 | } | 1297 | } |
1295 | 1298 | ||
@@ -1594,7 +1597,7 @@ static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
1594 | int actual = 0; | 1597 | int actual = 0; |
1595 | __u8 bank; | 1598 | __u8 bank; |
1596 | 1599 | ||
1597 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__); | 1600 | IRDA_DEBUG(4, "%s()\n", __func__); |
1598 | 1601 | ||
1599 | /* Save current bank */ | 1602 | /* Save current bank */ |
1600 | bank = inb(iobase+BSR); | 1603 | bank = inb(iobase+BSR); |
@@ -1602,7 +1605,7 @@ static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
1602 | switch_bank(iobase, BANK0); | 1605 | switch_bank(iobase, BANK0); |
1603 | if (!(inb_p(iobase+LSR) & LSR_TXEMP)) { | 1606 | if (!(inb_p(iobase+LSR) & LSR_TXEMP)) { |
1604 | IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n", | 1607 | IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n", |
1605 | __FUNCTION__); | 1608 | __func__); |
1606 | 1609 | ||
1607 | /* FIFO may still be filled to the Tx interrupt threshold */ | 1610 | /* FIFO may still be filled to the Tx interrupt threshold */ |
1608 | fifo_size -= 17; | 1611 | fifo_size -= 17; |
@@ -1615,7 +1618,7 @@ static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
1615 | } | 1618 | } |
1616 | 1619 | ||
1617 | IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", | 1620 | IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", |
1618 | __FUNCTION__, fifo_size, actual, len); | 1621 | __func__, fifo_size, actual, len); |
1619 | 1622 | ||
1620 | /* Restore bank */ | 1623 | /* Restore bank */ |
1621 | outb(bank, iobase+BSR); | 1624 | outb(bank, iobase+BSR); |
@@ -1636,7 +1639,7 @@ static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self) | |||
1636 | __u8 bank; | 1639 | __u8 bank; |
1637 | int ret = TRUE; | 1640 | int ret = TRUE; |
1638 | 1641 | ||
1639 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 1642 | IRDA_DEBUG(2, "%s()\n", __func__); |
1640 | 1643 | ||
1641 | iobase = self->io.fir_base; | 1644 | iobase = self->io.fir_base; |
1642 | 1645 | ||
@@ -1767,7 +1770,7 @@ static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) | |||
1767 | len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8); | 1770 | len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8); |
1768 | 1771 | ||
1769 | if (st_fifo->tail >= MAX_RX_WINDOW) { | 1772 | if (st_fifo->tail >= MAX_RX_WINDOW) { |
1770 | IRDA_DEBUG(0, "%s(), window is full!\n", __FUNCTION__); | 1773 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__); |
1771 | continue; | 1774 | continue; |
1772 | } | 1775 | } |
1773 | 1776 | ||
@@ -1859,7 +1862,7 @@ static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) | |||
1859 | if (skb == NULL) { | 1862 | if (skb == NULL) { |
1860 | IRDA_WARNING("%s(), memory squeeze, " | 1863 | IRDA_WARNING("%s(), memory squeeze, " |
1861 | "dropping frame.\n", | 1864 | "dropping frame.\n", |
1862 | __FUNCTION__); | 1865 | __func__); |
1863 | self->stats.rx_dropped++; | 1866 | self->stats.rx_dropped++; |
1864 | 1867 | ||
1865 | /* Restore bank register */ | 1868 | /* Restore bank register */ |
@@ -1965,7 +1968,7 @@ static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir) | |||
1965 | * Need to be after self->io.direction to avoid race with | 1968 | * Need to be after self->io.direction to avoid race with |
1966 | * nsc_ircc_hard_xmit_sir() - Jean II */ | 1969 | * nsc_ircc_hard_xmit_sir() - Jean II */ |
1967 | if (self->new_speed) { | 1970 | if (self->new_speed) { |
1968 | IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__); | 1971 | IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__); |
1969 | self->ier = nsc_ircc_change_speed(self, | 1972 | self->ier = nsc_ircc_change_speed(self, |
1970 | self->new_speed); | 1973 | self->new_speed); |
1971 | self->new_speed = 0; | 1974 | self->new_speed = 0; |
@@ -2051,7 +2054,7 @@ static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, | |||
2051 | } else | 2054 | } else |
2052 | IRDA_WARNING("%s(), potential " | 2055 | IRDA_WARNING("%s(), potential " |
2053 | "Tx queue lockup !\n", | 2056 | "Tx queue lockup !\n", |
2054 | __FUNCTION__); | 2057 | __func__); |
2055 | } | 2058 | } |
2056 | } else { | 2059 | } else { |
2057 | /* Not finished yet, so interrupt on DMA again */ | 2060 | /* Not finished yet, so interrupt on DMA again */ |
@@ -2160,7 +2163,7 @@ static int nsc_ircc_net_open(struct net_device *dev) | |||
2160 | char hwname[32]; | 2163 | char hwname[32]; |
2161 | __u8 bank; | 2164 | __u8 bank; |
2162 | 2165 | ||
2163 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__); | 2166 | IRDA_DEBUG(4, "%s()\n", __func__); |
2164 | 2167 | ||
2165 | IRDA_ASSERT(dev != NULL, return -1;); | 2168 | IRDA_ASSERT(dev != NULL, return -1;); |
2166 | self = (struct nsc_ircc_cb *) dev->priv; | 2169 | self = (struct nsc_ircc_cb *) dev->priv; |
@@ -2222,7 +2225,7 @@ static int nsc_ircc_net_close(struct net_device *dev) | |||
2222 | int iobase; | 2225 | int iobase; |
2223 | __u8 bank; | 2226 | __u8 bank; |
2224 | 2227 | ||
2225 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__); | 2228 | IRDA_DEBUG(4, "%s()\n", __func__); |
2226 | 2229 | ||
2227 | IRDA_ASSERT(dev != NULL, return -1;); | 2230 | IRDA_ASSERT(dev != NULL, return -1;); |
2228 | 2231 | ||
@@ -2276,7 +2279,7 @@ static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2276 | 2279 | ||
2277 | IRDA_ASSERT(self != NULL, return -1;); | 2280 | IRDA_ASSERT(self != NULL, return -1;); |
2278 | 2281 | ||
2279 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); | 2282 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
2280 | 2283 | ||
2281 | switch (cmd) { | 2284 | switch (cmd) { |
2282 | case SIOCSBANDWIDTH: /* Set bandwidth */ | 2285 | case SIOCSBANDWIDTH: /* Set bandwidth */ |
diff --git a/drivers/net/irda/nsc-ircc.h b/drivers/net/irda/nsc-ircc.h index 29398a4f73fd..71cd3c5a0762 100644 --- a/drivers/net/irda/nsc-ircc.h +++ b/drivers/net/irda/nsc-ircc.h | |||
@@ -35,6 +35,9 @@ | |||
35 | #include <linux/types.h> | 35 | #include <linux/types.h> |
36 | #include <asm/io.h> | 36 | #include <asm/io.h> |
37 | 37 | ||
38 | /* Features for chips (set in driver_data) */ | ||
39 | #define NSC_FORCE_DONGLE_TYPE9 0x00000001 | ||
40 | |||
38 | /* DMA modes needed */ | 41 | /* DMA modes needed */ |
39 | #define DMA_TX_MODE 0x08 /* Mem to I/O, ++, demand. */ | 42 | #define DMA_TX_MODE 0x08 /* Mem to I/O, ++, demand. */ |
40 | #define DMA_RX_MODE 0x04 /* I/O to mem, ++, demand. */ | 43 | #define DMA_RX_MODE 0x04 /* I/O to mem, ++, demand. */ |
diff --git a/drivers/net/irda/old_belkin-sir.c b/drivers/net/irda/old_belkin-sir.c index 8c22c7374a23..75714bc71030 100644 --- a/drivers/net/irda/old_belkin-sir.c +++ b/drivers/net/irda/old_belkin-sir.c | |||
@@ -92,7 +92,7 @@ static int old_belkin_open(struct sir_dev *dev) | |||
92 | { | 92 | { |
93 | struct qos_info *qos = &dev->qos; | 93 | struct qos_info *qos = &dev->qos; |
94 | 94 | ||
95 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 95 | IRDA_DEBUG(2, "%s()\n", __func__); |
96 | 96 | ||
97 | /* Power on dongle */ | 97 | /* Power on dongle */ |
98 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 98 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
@@ -110,7 +110,7 @@ static int old_belkin_open(struct sir_dev *dev) | |||
110 | 110 | ||
111 | static int old_belkin_close(struct sir_dev *dev) | 111 | static int old_belkin_close(struct sir_dev *dev) |
112 | { | 112 | { |
113 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 113 | IRDA_DEBUG(2, "%s()\n", __func__); |
114 | 114 | ||
115 | /* Power off dongle */ | 115 | /* Power off dongle */ |
116 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 116 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -125,7 +125,7 @@ static int old_belkin_close(struct sir_dev *dev) | |||
125 | */ | 125 | */ |
126 | static int old_belkin_change_speed(struct sir_dev *dev, unsigned speed) | 126 | static int old_belkin_change_speed(struct sir_dev *dev, unsigned speed) |
127 | { | 127 | { |
128 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 128 | IRDA_DEBUG(2, "%s()\n", __func__); |
129 | 129 | ||
130 | dev->speed = 9600; | 130 | dev->speed = 9600; |
131 | return (speed==dev->speed) ? 0 : -EINVAL; | 131 | return (speed==dev->speed) ? 0 : -EINVAL; |
@@ -139,7 +139,7 @@ static int old_belkin_change_speed(struct sir_dev *dev, unsigned speed) | |||
139 | */ | 139 | */ |
140 | static int old_belkin_reset(struct sir_dev *dev) | 140 | static int old_belkin_reset(struct sir_dev *dev) |
141 | { | 141 | { |
142 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 142 | IRDA_DEBUG(2, "%s()\n", __func__); |
143 | 143 | ||
144 | /* This dongles speed "defaults" to 9600 bps ;-) */ | 144 | /* This dongles speed "defaults" to 9600 bps ;-) */ |
145 | dev->speed = 9600; | 145 | dev->speed = 9600; |
diff --git a/drivers/net/irda/sir_dev.c b/drivers/net/irda/sir_dev.c index 6078e03de9a8..3f32909c24c8 100644 --- a/drivers/net/irda/sir_dev.c +++ b/drivers/net/irda/sir_dev.c | |||
@@ -80,7 +80,7 @@ static int sirdev_tx_complete_fsm(struct sir_dev *dev) | |||
80 | return 0; | 80 | return 0; |
81 | 81 | ||
82 | default: | 82 | default: |
83 | IRDA_ERROR("%s - undefined state\n", __FUNCTION__); | 83 | IRDA_ERROR("%s - undefined state\n", __func__); |
84 | return -EINVAL; | 84 | return -EINVAL; |
85 | } | 85 | } |
86 | fsm->substate = next_state; | 86 | fsm->substate = next_state; |
@@ -107,11 +107,11 @@ static void sirdev_config_fsm(struct work_struct *work) | |||
107 | int ret = -1; | 107 | int ret = -1; |
108 | unsigned delay; | 108 | unsigned delay; |
109 | 109 | ||
110 | IRDA_DEBUG(2, "%s(), <%ld>\n", __FUNCTION__, jiffies); | 110 | IRDA_DEBUG(2, "%s(), <%ld>\n", __func__, jiffies); |
111 | 111 | ||
112 | do { | 112 | do { |
113 | IRDA_DEBUG(3, "%s - state=0x%04x / substate=0x%04x\n", | 113 | IRDA_DEBUG(3, "%s - state=0x%04x / substate=0x%04x\n", |
114 | __FUNCTION__, fsm->state, fsm->substate); | 114 | __func__, fsm->state, fsm->substate); |
115 | 115 | ||
116 | next_state = fsm->state; | 116 | next_state = fsm->state; |
117 | delay = 0; | 117 | delay = 0; |
@@ -249,12 +249,12 @@ static void sirdev_config_fsm(struct work_struct *work) | |||
249 | break; | 249 | break; |
250 | 250 | ||
251 | default: | 251 | default: |
252 | IRDA_ERROR("%s - undefined state\n", __FUNCTION__); | 252 | IRDA_ERROR("%s - undefined state\n", __func__); |
253 | fsm->result = -EINVAL; | 253 | fsm->result = -EINVAL; |
254 | /* fall thru */ | 254 | /* fall thru */ |
255 | 255 | ||
256 | case SIRDEV_STATE_ERROR: | 256 | case SIRDEV_STATE_ERROR: |
257 | IRDA_ERROR("%s - error: %d\n", __FUNCTION__, fsm->result); | 257 | IRDA_ERROR("%s - error: %d\n", __func__, fsm->result); |
258 | 258 | ||
259 | #if 0 /* don't enable this before we have netdev->tx_timeout to recover */ | 259 | #if 0 /* don't enable this before we have netdev->tx_timeout to recover */ |
260 | netif_stop_queue(dev->netdev); | 260 | netif_stop_queue(dev->netdev); |
@@ -284,11 +284,12 @@ int sirdev_schedule_request(struct sir_dev *dev, int initial_state, unsigned par | |||
284 | { | 284 | { |
285 | struct sir_fsm *fsm = &dev->fsm; | 285 | struct sir_fsm *fsm = &dev->fsm; |
286 | 286 | ||
287 | IRDA_DEBUG(2, "%s - state=0x%04x / param=%u\n", __FUNCTION__, initial_state, param); | 287 | IRDA_DEBUG(2, "%s - state=0x%04x / param=%u\n", __func__, |
288 | initial_state, param); | ||
288 | 289 | ||
289 | if (down_trylock(&fsm->sem)) { | 290 | if (down_trylock(&fsm->sem)) { |
290 | if (in_interrupt() || in_atomic() || irqs_disabled()) { | 291 | if (in_interrupt() || in_atomic() || irqs_disabled()) { |
291 | IRDA_DEBUG(1, "%s(), state machine busy!\n", __FUNCTION__); | 292 | IRDA_DEBUG(1, "%s(), state machine busy!\n", __func__); |
292 | return -EWOULDBLOCK; | 293 | return -EWOULDBLOCK; |
293 | } else | 294 | } else |
294 | down(&fsm->sem); | 295 | down(&fsm->sem); |
@@ -296,7 +297,7 @@ int sirdev_schedule_request(struct sir_dev *dev, int initial_state, unsigned par | |||
296 | 297 | ||
297 | if (fsm->state == SIRDEV_STATE_DEAD) { | 298 | if (fsm->state == SIRDEV_STATE_DEAD) { |
298 | /* race with sirdev_close should never happen */ | 299 | /* race with sirdev_close should never happen */ |
299 | IRDA_ERROR("%s(), instance staled!\n", __FUNCTION__); | 300 | IRDA_ERROR("%s(), instance staled!\n", __func__); |
300 | up(&fsm->sem); | 301 | up(&fsm->sem); |
301 | return -ESTALE; /* or better EPIPE? */ | 302 | return -ESTALE; /* or better EPIPE? */ |
302 | } | 303 | } |
@@ -341,7 +342,7 @@ int sirdev_set_dongle(struct sir_dev *dev, IRDA_DONGLE type) | |||
341 | { | 342 | { |
342 | int err; | 343 | int err; |
343 | 344 | ||
344 | IRDA_DEBUG(3, "%s : requesting dongle %d.\n", __FUNCTION__, type); | 345 | IRDA_DEBUG(3, "%s : requesting dongle %d.\n", __func__, type); |
345 | 346 | ||
346 | err = sirdev_schedule_dongle_open(dev, type); | 347 | err = sirdev_schedule_dongle_open(dev, type); |
347 | if (unlikely(err)) | 348 | if (unlikely(err)) |
@@ -376,7 +377,7 @@ int sirdev_raw_write(struct sir_dev *dev, const char *buf, int len) | |||
376 | 377 | ||
377 | ret = dev->drv->do_write(dev, dev->tx_buff.data, dev->tx_buff.len); | 378 | ret = dev->drv->do_write(dev, dev->tx_buff.data, dev->tx_buff.len); |
378 | if (ret > 0) { | 379 | if (ret > 0) { |
379 | IRDA_DEBUG(3, "%s(), raw-tx started\n", __FUNCTION__); | 380 | IRDA_DEBUG(3, "%s(), raw-tx started\n", __func__); |
380 | 381 | ||
381 | dev->tx_buff.data += ret; | 382 | dev->tx_buff.data += ret; |
382 | dev->tx_buff.len -= ret; | 383 | dev->tx_buff.len -= ret; |
@@ -437,7 +438,7 @@ void sirdev_write_complete(struct sir_dev *dev) | |||
437 | spin_lock_irqsave(&dev->tx_lock, flags); | 438 | spin_lock_irqsave(&dev->tx_lock, flags); |
438 | 439 | ||
439 | IRDA_DEBUG(3, "%s() - dev->tx_buff.len = %d\n", | 440 | IRDA_DEBUG(3, "%s() - dev->tx_buff.len = %d\n", |
440 | __FUNCTION__, dev->tx_buff.len); | 441 | __func__, dev->tx_buff.len); |
441 | 442 | ||
442 | if (likely(dev->tx_buff.len > 0)) { | 443 | if (likely(dev->tx_buff.len > 0)) { |
443 | /* Write data left in transmit buffer */ | 444 | /* Write data left in transmit buffer */ |
@@ -450,7 +451,7 @@ void sirdev_write_complete(struct sir_dev *dev) | |||
450 | else if (unlikely(actual<0)) { | 451 | else if (unlikely(actual<0)) { |
451 | /* could be dropped later when we have tx_timeout to recover */ | 452 | /* could be dropped later when we have tx_timeout to recover */ |
452 | IRDA_ERROR("%s: drv->do_write failed (%d)\n", | 453 | IRDA_ERROR("%s: drv->do_write failed (%d)\n", |
453 | __FUNCTION__, actual); | 454 | __func__, actual); |
454 | if ((skb=dev->tx_skb) != NULL) { | 455 | if ((skb=dev->tx_skb) != NULL) { |
455 | dev->tx_skb = NULL; | 456 | dev->tx_skb = NULL; |
456 | dev_kfree_skb_any(skb); | 457 | dev_kfree_skb_any(skb); |
@@ -471,7 +472,7 @@ void sirdev_write_complete(struct sir_dev *dev) | |||
471 | * restarted when the irda-thread has completed the request. | 472 | * restarted when the irda-thread has completed the request. |
472 | */ | 473 | */ |
473 | 474 | ||
474 | IRDA_DEBUG(3, "%s(), raw-tx done\n", __FUNCTION__); | 475 | IRDA_DEBUG(3, "%s(), raw-tx done\n", __func__); |
475 | dev->raw_tx = 0; | 476 | dev->raw_tx = 0; |
476 | goto done; /* no post-frame handling in raw mode */ | 477 | goto done; /* no post-frame handling in raw mode */ |
477 | } | 478 | } |
@@ -488,7 +489,7 @@ void sirdev_write_complete(struct sir_dev *dev) | |||
488 | * re-activated. | 489 | * re-activated. |
489 | */ | 490 | */ |
490 | 491 | ||
491 | IRDA_DEBUG(5, "%s(), finished with frame!\n", __FUNCTION__); | 492 | IRDA_DEBUG(5, "%s(), finished with frame!\n", __func__); |
492 | 493 | ||
493 | if ((skb=dev->tx_skb) != NULL) { | 494 | if ((skb=dev->tx_skb) != NULL) { |
494 | dev->tx_skb = NULL; | 495 | dev->tx_skb = NULL; |
@@ -498,14 +499,14 @@ void sirdev_write_complete(struct sir_dev *dev) | |||
498 | } | 499 | } |
499 | 500 | ||
500 | if (unlikely(dev->new_speed > 0)) { | 501 | if (unlikely(dev->new_speed > 0)) { |
501 | IRDA_DEBUG(5, "%s(), Changing speed!\n", __FUNCTION__); | 502 | IRDA_DEBUG(5, "%s(), Changing speed!\n", __func__); |
502 | err = sirdev_schedule_speed(dev, dev->new_speed); | 503 | err = sirdev_schedule_speed(dev, dev->new_speed); |
503 | if (unlikely(err)) { | 504 | if (unlikely(err)) { |
504 | /* should never happen | 505 | /* should never happen |
505 | * forget the speed change and hope the stack recovers | 506 | * forget the speed change and hope the stack recovers |
506 | */ | 507 | */ |
507 | IRDA_ERROR("%s - schedule speed change failed: %d\n", | 508 | IRDA_ERROR("%s - schedule speed change failed: %d\n", |
508 | __FUNCTION__, err); | 509 | __func__, err); |
509 | netif_wake_queue(dev->netdev); | 510 | netif_wake_queue(dev->netdev); |
510 | } | 511 | } |
511 | /* else: success | 512 | /* else: success |
@@ -532,13 +533,13 @@ EXPORT_SYMBOL(sirdev_write_complete); | |||
532 | int sirdev_receive(struct sir_dev *dev, const unsigned char *cp, size_t count) | 533 | int sirdev_receive(struct sir_dev *dev, const unsigned char *cp, size_t count) |
533 | { | 534 | { |
534 | if (!dev || !dev->netdev) { | 535 | if (!dev || !dev->netdev) { |
535 | IRDA_WARNING("%s(), not ready yet!\n", __FUNCTION__); | 536 | IRDA_WARNING("%s(), not ready yet!\n", __func__); |
536 | return -1; | 537 | return -1; |
537 | } | 538 | } |
538 | 539 | ||
539 | if (!dev->irlap) { | 540 | if (!dev->irlap) { |
540 | IRDA_WARNING("%s - too early: %p / %zd!\n", | 541 | IRDA_WARNING("%s - too early: %p / %zd!\n", |
541 | __FUNCTION__, cp, count); | 542 | __func__, cp, count); |
542 | return -1; | 543 | return -1; |
543 | } | 544 | } |
544 | 545 | ||
@@ -548,7 +549,7 @@ int sirdev_receive(struct sir_dev *dev, const unsigned char *cp, size_t count) | |||
548 | */ | 549 | */ |
549 | irda_device_set_media_busy(dev->netdev, TRUE); | 550 | irda_device_set_media_busy(dev->netdev, TRUE); |
550 | dev->stats.rx_dropped++; | 551 | dev->stats.rx_dropped++; |
551 | IRDA_DEBUG(0, "%s; rx-drop: %zd\n", __FUNCTION__, count); | 552 | IRDA_DEBUG(0, "%s; rx-drop: %zd\n", __func__, count); |
552 | return 0; | 553 | return 0; |
553 | } | 554 | } |
554 | 555 | ||
@@ -600,7 +601,7 @@ static int sirdev_hard_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
600 | 601 | ||
601 | netif_stop_queue(ndev); | 602 | netif_stop_queue(ndev); |
602 | 603 | ||
603 | IRDA_DEBUG(3, "%s(), skb->len = %d\n", __FUNCTION__, skb->len); | 604 | IRDA_DEBUG(3, "%s(), skb->len = %d\n", __func__, skb->len); |
604 | 605 | ||
605 | speed = irda_get_next_speed(skb); | 606 | speed = irda_get_next_speed(skb); |
606 | if ((speed != dev->speed) && (speed != -1)) { | 607 | if ((speed != dev->speed) && (speed != -1)) { |
@@ -637,7 +638,7 @@ static int sirdev_hard_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
637 | 638 | ||
638 | /* Check problems */ | 639 | /* Check problems */ |
639 | if(spin_is_locked(&dev->tx_lock)) { | 640 | if(spin_is_locked(&dev->tx_lock)) { |
640 | IRDA_DEBUG(3, "%s(), write not completed\n", __FUNCTION__); | 641 | IRDA_DEBUG(3, "%s(), write not completed\n", __func__); |
641 | } | 642 | } |
642 | 643 | ||
643 | /* serialize with write completion */ | 644 | /* serialize with write completion */ |
@@ -666,7 +667,7 @@ static int sirdev_hard_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
666 | else if (unlikely(actual < 0)) { | 667 | else if (unlikely(actual < 0)) { |
667 | /* could be dropped later when we have tx_timeout to recover */ | 668 | /* could be dropped later when we have tx_timeout to recover */ |
668 | IRDA_ERROR("%s: drv->do_write failed (%d)\n", | 669 | IRDA_ERROR("%s: drv->do_write failed (%d)\n", |
669 | __FUNCTION__, actual); | 670 | __func__, actual); |
670 | dev_kfree_skb_any(skb); | 671 | dev_kfree_skb_any(skb); |
671 | dev->stats.tx_errors++; | 672 | dev->stats.tx_errors++; |
672 | dev->stats.tx_dropped++; | 673 | dev->stats.tx_dropped++; |
@@ -687,7 +688,7 @@ static int sirdev_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) | |||
687 | 688 | ||
688 | IRDA_ASSERT(dev != NULL, return -1;); | 689 | IRDA_ASSERT(dev != NULL, return -1;); |
689 | 690 | ||
690 | IRDA_DEBUG(3, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, ndev->name, cmd); | 691 | IRDA_DEBUG(3, "%s(), %s, (cmd=0x%X)\n", __func__, ndev->name, cmd); |
691 | 692 | ||
692 | switch (cmd) { | 693 | switch (cmd) { |
693 | case SIOCSBANDWIDTH: /* Set bandwidth */ | 694 | case SIOCSBANDWIDTH: /* Set bandwidth */ |
@@ -804,7 +805,7 @@ static int sirdev_open(struct net_device *ndev) | |||
804 | if (!try_module_get(drv->owner)) | 805 | if (!try_module_get(drv->owner)) |
805 | return -ESTALE; | 806 | return -ESTALE; |
806 | 807 | ||
807 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 808 | IRDA_DEBUG(2, "%s()\n", __func__); |
808 | 809 | ||
809 | if (sirdev_alloc_buffers(dev)) | 810 | if (sirdev_alloc_buffers(dev)) |
810 | goto errout_dec; | 811 | goto errout_dec; |
@@ -822,7 +823,7 @@ static int sirdev_open(struct net_device *ndev) | |||
822 | 823 | ||
823 | netif_wake_queue(ndev); | 824 | netif_wake_queue(ndev); |
824 | 825 | ||
825 | IRDA_DEBUG(2, "%s - done, speed = %d\n", __FUNCTION__, dev->speed); | 826 | IRDA_DEBUG(2, "%s - done, speed = %d\n", __func__, dev->speed); |
826 | 827 | ||
827 | return 0; | 828 | return 0; |
828 | 829 | ||
@@ -842,7 +843,7 @@ static int sirdev_close(struct net_device *ndev) | |||
842 | struct sir_dev *dev = ndev->priv; | 843 | struct sir_dev *dev = ndev->priv; |
843 | const struct sir_driver *drv; | 844 | const struct sir_driver *drv; |
844 | 845 | ||
845 | // IRDA_DEBUG(0, "%s\n", __FUNCTION__); | 846 | // IRDA_DEBUG(0, "%s\n", __func__); |
846 | 847 | ||
847 | netif_stop_queue(ndev); | 848 | netif_stop_queue(ndev); |
848 | 849 | ||
@@ -878,7 +879,7 @@ struct sir_dev * sirdev_get_instance(const struct sir_driver *drv, const char *n | |||
878 | struct net_device *ndev; | 879 | struct net_device *ndev; |
879 | struct sir_dev *dev; | 880 | struct sir_dev *dev; |
880 | 881 | ||
881 | IRDA_DEBUG(0, "%s - %s\n", __FUNCTION__, name); | 882 | IRDA_DEBUG(0, "%s - %s\n", __func__, name); |
882 | 883 | ||
883 | /* instead of adding tests to protect against drv->do_write==NULL | 884 | /* instead of adding tests to protect against drv->do_write==NULL |
884 | * at several places we refuse to create a sir_dev instance for | 885 | * at several places we refuse to create a sir_dev instance for |
@@ -892,7 +893,7 @@ struct sir_dev * sirdev_get_instance(const struct sir_driver *drv, const char *n | |||
892 | */ | 893 | */ |
893 | ndev = alloc_irdadev(sizeof(*dev)); | 894 | ndev = alloc_irdadev(sizeof(*dev)); |
894 | if (ndev == NULL) { | 895 | if (ndev == NULL) { |
895 | IRDA_ERROR("%s - Can't allocate memory for IrDA control block!\n", __FUNCTION__); | 896 | IRDA_ERROR("%s - Can't allocate memory for IrDA control block!\n", __func__); |
896 | goto out; | 897 | goto out; |
897 | } | 898 | } |
898 | dev = ndev->priv; | 899 | dev = ndev->priv; |
@@ -921,7 +922,7 @@ struct sir_dev * sirdev_get_instance(const struct sir_driver *drv, const char *n | |||
921 | ndev->do_ioctl = sirdev_ioctl; | 922 | ndev->do_ioctl = sirdev_ioctl; |
922 | 923 | ||
923 | if (register_netdev(ndev)) { | 924 | if (register_netdev(ndev)) { |
924 | IRDA_ERROR("%s(), register_netdev() failed!\n", __FUNCTION__); | 925 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
925 | goto out_freenetdev; | 926 | goto out_freenetdev; |
926 | } | 927 | } |
927 | 928 | ||
@@ -938,7 +939,7 @@ int sirdev_put_instance(struct sir_dev *dev) | |||
938 | { | 939 | { |
939 | int err = 0; | 940 | int err = 0; |
940 | 941 | ||
941 | IRDA_DEBUG(0, "%s\n", __FUNCTION__); | 942 | IRDA_DEBUG(0, "%s\n", __func__); |
942 | 943 | ||
943 | atomic_set(&dev->enable_rx, 0); | 944 | atomic_set(&dev->enable_rx, 0); |
944 | 945 | ||
@@ -948,7 +949,7 @@ int sirdev_put_instance(struct sir_dev *dev) | |||
948 | if (dev->dongle_drv) | 949 | if (dev->dongle_drv) |
949 | err = sirdev_schedule_dongle_close(dev); | 950 | err = sirdev_schedule_dongle_close(dev); |
950 | if (err) | 951 | if (err) |
951 | IRDA_ERROR("%s - error %d\n", __FUNCTION__, err); | 952 | IRDA_ERROR("%s - error %d\n", __func__, err); |
952 | 953 | ||
953 | sirdev_close(dev->netdev); | 954 | sirdev_close(dev->netdev); |
954 | 955 | ||
diff --git a/drivers/net/irda/sir_dongle.c b/drivers/net/irda/sir_dongle.c index 25d5b8a96bdc..36030241f7a9 100644 --- a/drivers/net/irda/sir_dongle.c +++ b/drivers/net/irda/sir_dongle.c | |||
@@ -36,7 +36,7 @@ int irda_register_dongle(struct dongle_driver *new) | |||
36 | struct dongle_driver *drv; | 36 | struct dongle_driver *drv; |
37 | 37 | ||
38 | IRDA_DEBUG(0, "%s : registering dongle \"%s\" (%d).\n", | 38 | IRDA_DEBUG(0, "%s : registering dongle \"%s\" (%d).\n", |
39 | __FUNCTION__, new->driver_name, new->type); | 39 | __func__, new->driver_name, new->type); |
40 | 40 | ||
41 | mutex_lock(&dongle_list_lock); | 41 | mutex_lock(&dongle_list_lock); |
42 | list_for_each(entry, &dongle_list) { | 42 | list_for_each(entry, &dongle_list) { |
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c index 78dc8e7837f0..b5360fe99d3a 100644 --- a/drivers/net/irda/smsc-ircc2.c +++ b/drivers/net/irda/smsc-ircc2.c | |||
@@ -460,7 +460,7 @@ static int __init smsc_ircc_init(void) | |||
460 | { | 460 | { |
461 | int ret; | 461 | int ret; |
462 | 462 | ||
463 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 463 | IRDA_DEBUG(1, "%s\n", __func__); |
464 | 464 | ||
465 | ret = platform_driver_register(&smsc_ircc_driver); | 465 | ret = platform_driver_register(&smsc_ircc_driver); |
466 | if (ret) { | 466 | if (ret) { |
@@ -500,7 +500,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u | |||
500 | struct net_device *dev; | 500 | struct net_device *dev; |
501 | int err; | 501 | int err; |
502 | 502 | ||
503 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 503 | IRDA_DEBUG(1, "%s\n", __func__); |
504 | 504 | ||
505 | err = smsc_ircc_present(fir_base, sir_base); | 505 | err = smsc_ircc_present(fir_base, sir_base); |
506 | if (err) | 506 | if (err) |
@@ -508,7 +508,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u | |||
508 | 508 | ||
509 | err = -ENOMEM; | 509 | err = -ENOMEM; |
510 | if (dev_count >= ARRAY_SIZE(dev_self)) { | 510 | if (dev_count >= ARRAY_SIZE(dev_self)) { |
511 | IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__); | 511 | IRDA_WARNING("%s(), too many devices!\n", __func__); |
512 | goto err_out1; | 512 | goto err_out1; |
513 | } | 513 | } |
514 | 514 | ||
@@ -517,7 +517,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u | |||
517 | */ | 517 | */ |
518 | dev = alloc_irdadev(sizeof(struct smsc_ircc_cb)); | 518 | dev = alloc_irdadev(sizeof(struct smsc_ircc_cb)); |
519 | if (!dev) { | 519 | if (!dev) { |
520 | IRDA_WARNING("%s() can't allocate net device\n", __FUNCTION__); | 520 | IRDA_WARNING("%s() can't allocate net device\n", __func__); |
521 | goto err_out1; | 521 | goto err_out1; |
522 | } | 522 | } |
523 | 523 | ||
@@ -633,14 +633,14 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base) | |||
633 | if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT, | 633 | if (!request_region(fir_base, SMSC_IRCC2_FIR_CHIP_IO_EXTENT, |
634 | driver_name)) { | 634 | driver_name)) { |
635 | IRDA_WARNING("%s: can't get fir_base of 0x%03x\n", | 635 | IRDA_WARNING("%s: can't get fir_base of 0x%03x\n", |
636 | __FUNCTION__, fir_base); | 636 | __func__, fir_base); |
637 | goto out1; | 637 | goto out1; |
638 | } | 638 | } |
639 | 639 | ||
640 | if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT, | 640 | if (!request_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT, |
641 | driver_name)) { | 641 | driver_name)) { |
642 | IRDA_WARNING("%s: can't get sir_base of 0x%03x\n", | 642 | IRDA_WARNING("%s: can't get sir_base of 0x%03x\n", |
643 | __FUNCTION__, sir_base); | 643 | __func__, sir_base); |
644 | goto out2; | 644 | goto out2; |
645 | } | 645 | } |
646 | 646 | ||
@@ -656,7 +656,7 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base) | |||
656 | 656 | ||
657 | if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) { | 657 | if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) { |
658 | IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", | 658 | IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", |
659 | __FUNCTION__, fir_base); | 659 | __func__, fir_base); |
660 | goto out3; | 660 | goto out3; |
661 | } | 661 | } |
662 | IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, " | 662 | IRDA_MESSAGE("SMsC IrDA Controller found\n IrCC version %d.%d, " |
@@ -793,7 +793,7 @@ static int smsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd | |||
793 | 793 | ||
794 | IRDA_ASSERT(self != NULL, return -1;); | 794 | IRDA_ASSERT(self != NULL, return -1;); |
795 | 795 | ||
796 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd); | 796 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd); |
797 | 797 | ||
798 | switch (cmd) { | 798 | switch (cmd) { |
799 | case SIOCSBANDWIDTH: /* Set bandwidth */ | 799 | case SIOCSBANDWIDTH: /* Set bandwidth */ |
@@ -878,7 +878,7 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev) | |||
878 | unsigned long flags; | 878 | unsigned long flags; |
879 | s32 speed; | 879 | s32 speed; |
880 | 880 | ||
881 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 881 | IRDA_DEBUG(1, "%s\n", __func__); |
882 | 882 | ||
883 | IRDA_ASSERT(dev != NULL, return 0;); | 883 | IRDA_ASSERT(dev != NULL, return 0;); |
884 | 884 | ||
@@ -953,21 +953,21 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed) | |||
953 | ir_mode = IRCC_CFGA_IRDA_HDLC; | 953 | ir_mode = IRCC_CFGA_IRDA_HDLC; |
954 | ctrl = IRCC_CRC; | 954 | ctrl = IRCC_CRC; |
955 | fast = 0; | 955 | fast = 0; |
956 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__); | 956 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__); |
957 | break; | 957 | break; |
958 | case 1152000: | 958 | case 1152000: |
959 | ir_mode = IRCC_CFGA_IRDA_HDLC; | 959 | ir_mode = IRCC_CFGA_IRDA_HDLC; |
960 | ctrl = IRCC_1152 | IRCC_CRC; | 960 | ctrl = IRCC_1152 | IRCC_CRC; |
961 | fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA; | 961 | fast = IRCC_LCR_A_FAST | IRCC_LCR_A_GP_DATA; |
962 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", | 962 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", |
963 | __FUNCTION__); | 963 | __func__); |
964 | break; | 964 | break; |
965 | case 4000000: | 965 | case 4000000: |
966 | ir_mode = IRCC_CFGA_IRDA_4PPM; | 966 | ir_mode = IRCC_CFGA_IRDA_4PPM; |
967 | ctrl = IRCC_CRC; | 967 | ctrl = IRCC_CRC; |
968 | fast = IRCC_LCR_A_FAST; | 968 | fast = IRCC_LCR_A_FAST; |
969 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", | 969 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", |
970 | __FUNCTION__); | 970 | __func__); |
971 | break; | 971 | break; |
972 | } | 972 | } |
973 | #if 0 | 973 | #if 0 |
@@ -995,7 +995,7 @@ static void smsc_ircc_fir_start(struct smsc_ircc_cb *self) | |||
995 | struct net_device *dev; | 995 | struct net_device *dev; |
996 | int fir_base; | 996 | int fir_base; |
997 | 997 | ||
998 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 998 | IRDA_DEBUG(1, "%s\n", __func__); |
999 | 999 | ||
1000 | IRDA_ASSERT(self != NULL, return;); | 1000 | IRDA_ASSERT(self != NULL, return;); |
1001 | dev = self->netdev; | 1001 | dev = self->netdev; |
@@ -1043,7 +1043,7 @@ static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self) | |||
1043 | { | 1043 | { |
1044 | int fir_base; | 1044 | int fir_base; |
1045 | 1045 | ||
1046 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1046 | IRDA_DEBUG(1, "%s\n", __func__); |
1047 | 1047 | ||
1048 | IRDA_ASSERT(self != NULL, return;); | 1048 | IRDA_ASSERT(self != NULL, return;); |
1049 | 1049 | ||
@@ -1067,7 +1067,7 @@ static void smsc_ircc_change_speed(struct smsc_ircc_cb *self, u32 speed) | |||
1067 | struct net_device *dev; | 1067 | struct net_device *dev; |
1068 | int last_speed_was_sir; | 1068 | int last_speed_was_sir; |
1069 | 1069 | ||
1070 | IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed); | 1070 | IRDA_DEBUG(0, "%s() changing speed to: %d\n", __func__, speed); |
1071 | 1071 | ||
1072 | IRDA_ASSERT(self != NULL, return;); | 1072 | IRDA_ASSERT(self != NULL, return;); |
1073 | dev = self->netdev; | 1073 | dev = self->netdev; |
@@ -1135,7 +1135,7 @@ void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed) | |||
1135 | int lcr; /* Line control reg */ | 1135 | int lcr; /* Line control reg */ |
1136 | int divisor; | 1136 | int divisor; |
1137 | 1137 | ||
1138 | IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __FUNCTION__, speed); | 1138 | IRDA_DEBUG(0, "%s(), Setting speed to: %d\n", __func__, speed); |
1139 | 1139 | ||
1140 | IRDA_ASSERT(self != NULL, return;); | 1140 | IRDA_ASSERT(self != NULL, return;); |
1141 | iobase = self->io.sir_base; | 1141 | iobase = self->io.sir_base; |
@@ -1170,7 +1170,7 @@ void smsc_ircc_set_sir_speed(struct smsc_ircc_cb *self, __u32 speed) | |||
1170 | /* Turn on interrups */ | 1170 | /* Turn on interrups */ |
1171 | outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER); | 1171 | outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER); |
1172 | 1172 | ||
1173 | IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed); | 1173 | IRDA_DEBUG(2, "%s() speed changed to: %d\n", __func__, speed); |
1174 | } | 1174 | } |
1175 | 1175 | ||
1176 | 1176 | ||
@@ -1253,7 +1253,7 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int bofs) | |||
1253 | int iobase = self->io.fir_base; | 1253 | int iobase = self->io.fir_base; |
1254 | u8 ctrl; | 1254 | u8 ctrl; |
1255 | 1255 | ||
1256 | IRDA_DEBUG(3, "%s\n", __FUNCTION__); | 1256 | IRDA_DEBUG(3, "%s\n", __func__); |
1257 | #if 1 | 1257 | #if 1 |
1258 | /* Disable Rx */ | 1258 | /* Disable Rx */ |
1259 | register_bank(iobase, 0); | 1259 | register_bank(iobase, 0); |
@@ -1307,7 +1307,7 @@ static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self) | |||
1307 | { | 1307 | { |
1308 | int iobase = self->io.fir_base; | 1308 | int iobase = self->io.fir_base; |
1309 | 1309 | ||
1310 | IRDA_DEBUG(3, "%s\n", __FUNCTION__); | 1310 | IRDA_DEBUG(3, "%s\n", __func__); |
1311 | #if 0 | 1311 | #if 0 |
1312 | /* Disable Tx */ | 1312 | /* Disable Tx */ |
1313 | register_bank(iobase, 0); | 1313 | register_bank(iobase, 0); |
@@ -1411,7 +1411,7 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self) | |||
1411 | 1411 | ||
1412 | register_bank(iobase, 0); | 1412 | register_bank(iobase, 0); |
1413 | 1413 | ||
1414 | IRDA_DEBUG(3, "%s\n", __FUNCTION__); | 1414 | IRDA_DEBUG(3, "%s\n", __func__); |
1415 | #if 0 | 1415 | #if 0 |
1416 | /* Disable Rx */ | 1416 | /* Disable Rx */ |
1417 | register_bank(iobase, 0); | 1417 | register_bank(iobase, 0); |
@@ -1422,7 +1422,7 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self) | |||
1422 | lsr= inb(iobase + IRCC_LSR); | 1422 | lsr= inb(iobase + IRCC_LSR); |
1423 | msgcnt = inb(iobase + IRCC_LCR_B) & 0x08; | 1423 | msgcnt = inb(iobase + IRCC_LCR_B) & 0x08; |
1424 | 1424 | ||
1425 | IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__, | 1425 | IRDA_DEBUG(2, "%s: dma count = %d\n", __func__, |
1426 | get_dma_residue(self->io.dma)); | 1426 | get_dma_residue(self->io.dma)); |
1427 | 1427 | ||
1428 | len = self->rx_buff.truesize - get_dma_residue(self->io.dma); | 1428 | len = self->rx_buff.truesize - get_dma_residue(self->io.dma); |
@@ -1445,15 +1445,15 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self) | |||
1445 | len -= self->io.speed < 4000000 ? 2 : 4; | 1445 | len -= self->io.speed < 4000000 ? 2 : 4; |
1446 | 1446 | ||
1447 | if (len < 2 || len > 2050) { | 1447 | if (len < 2 || len > 2050) { |
1448 | IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len); | 1448 | IRDA_WARNING("%s(), bogus len=%d\n", __func__, len); |
1449 | return; | 1449 | return; |
1450 | } | 1450 | } |
1451 | IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len); | 1451 | IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __func__, msgcnt, len); |
1452 | 1452 | ||
1453 | skb = dev_alloc_skb(len + 1); | 1453 | skb = dev_alloc_skb(len + 1); |
1454 | if (!skb) { | 1454 | if (!skb) { |
1455 | IRDA_WARNING("%s(), memory squeeze, dropping frame.\n", | 1455 | IRDA_WARNING("%s(), memory squeeze, dropping frame.\n", |
1456 | __FUNCTION__); | 1456 | __func__); |
1457 | return; | 1457 | return; |
1458 | } | 1458 | } |
1459 | /* Make sure IP header gets aligned */ | 1459 | /* Make sure IP header gets aligned */ |
@@ -1494,7 +1494,7 @@ static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self) | |||
1494 | 1494 | ||
1495 | /* Make sure we don't stay here to long */ | 1495 | /* Make sure we don't stay here to long */ |
1496 | if (boguscount++ > 32) { | 1496 | if (boguscount++ > 32) { |
1497 | IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__); | 1497 | IRDA_DEBUG(2, "%s(), breaking!\n", __func__); |
1498 | break; | 1498 | break; |
1499 | } | 1499 | } |
1500 | } while (inb(iobase + UART_LSR) & UART_LSR_DR); | 1500 | } while (inb(iobase + UART_LSR) & UART_LSR_DR); |
@@ -1536,7 +1536,7 @@ static irqreturn_t smsc_ircc_interrupt(int dummy, void *dev_id) | |||
1536 | lcra = inb(iobase + IRCC_LCR_A); | 1536 | lcra = inb(iobase + IRCC_LCR_A); |
1537 | lsr = inb(iobase + IRCC_LSR); | 1537 | lsr = inb(iobase + IRCC_LSR); |
1538 | 1538 | ||
1539 | IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir); | 1539 | IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __func__, iir); |
1540 | 1540 | ||
1541 | if (iir & IRCC_IIR_EOM) { | 1541 | if (iir & IRCC_IIR_EOM) { |
1542 | if (self->io.direction == IO_RECV) | 1542 | if (self->io.direction == IO_RECV) |
@@ -1548,7 +1548,7 @@ static irqreturn_t smsc_ircc_interrupt(int dummy, void *dev_id) | |||
1548 | } | 1548 | } |
1549 | 1549 | ||
1550 | if (iir & IRCC_IIR_ACTIVE_FRAME) { | 1550 | if (iir & IRCC_IIR_ACTIVE_FRAME) { |
1551 | /*printk(KERN_WARNING "%s(): Active Frame\n", __FUNCTION__);*/ | 1551 | /*printk(KERN_WARNING "%s(): Active Frame\n", __func__);*/ |
1552 | } | 1552 | } |
1553 | 1553 | ||
1554 | /* Enable interrupts again */ | 1554 | /* Enable interrupts again */ |
@@ -1587,11 +1587,11 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev) | |||
1587 | lsr = inb(iobase + UART_LSR); | 1587 | lsr = inb(iobase + UART_LSR); |
1588 | 1588 | ||
1589 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", | 1589 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", |
1590 | __FUNCTION__, iir, lsr, iobase); | 1590 | __func__, iir, lsr, iobase); |
1591 | 1591 | ||
1592 | switch (iir) { | 1592 | switch (iir) { |
1593 | case UART_IIR_RLSI: | 1593 | case UART_IIR_RLSI: |
1594 | IRDA_DEBUG(2, "%s(), RLSI\n", __FUNCTION__); | 1594 | IRDA_DEBUG(2, "%s(), RLSI\n", __func__); |
1595 | break; | 1595 | break; |
1596 | case UART_IIR_RDI: | 1596 | case UART_IIR_RDI: |
1597 | /* Receive interrupt */ | 1597 | /* Receive interrupt */ |
@@ -1604,7 +1604,7 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev) | |||
1604 | break; | 1604 | break; |
1605 | default: | 1605 | default: |
1606 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", | 1606 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", |
1607 | __FUNCTION__, iir); | 1607 | __func__, iir); |
1608 | break; | 1608 | break; |
1609 | } | 1609 | } |
1610 | 1610 | ||
@@ -1631,11 +1631,11 @@ static int ircc_is_receiving(struct smsc_ircc_cb *self) | |||
1631 | int status = FALSE; | 1631 | int status = FALSE; |
1632 | /* int iobase; */ | 1632 | /* int iobase; */ |
1633 | 1633 | ||
1634 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1634 | IRDA_DEBUG(1, "%s\n", __func__); |
1635 | 1635 | ||
1636 | IRDA_ASSERT(self != NULL, return FALSE;); | 1636 | IRDA_ASSERT(self != NULL, return FALSE;); |
1637 | 1637 | ||
1638 | IRDA_DEBUG(0, "%s: dma count = %d\n", __FUNCTION__, | 1638 | IRDA_DEBUG(0, "%s: dma count = %d\n", __func__, |
1639 | get_dma_residue(self->io.dma)); | 1639 | get_dma_residue(self->io.dma)); |
1640 | 1640 | ||
1641 | status = (self->rx_buff.state != OUTSIDE_FRAME); | 1641 | status = (self->rx_buff.state != OUTSIDE_FRAME); |
@@ -1652,7 +1652,7 @@ static int smsc_ircc_request_irq(struct smsc_ircc_cb *self) | |||
1652 | self->netdev->name, self->netdev); | 1652 | self->netdev->name, self->netdev); |
1653 | if (error) | 1653 | if (error) |
1654 | IRDA_DEBUG(0, "%s(), unable to allocate irq=%d, err=%d\n", | 1654 | IRDA_DEBUG(0, "%s(), unable to allocate irq=%d, err=%d\n", |
1655 | __FUNCTION__, self->io.irq, error); | 1655 | __func__, self->io.irq, error); |
1656 | 1656 | ||
1657 | return error; | 1657 | return error; |
1658 | } | 1658 | } |
@@ -1696,21 +1696,21 @@ static int smsc_ircc_net_open(struct net_device *dev) | |||
1696 | struct smsc_ircc_cb *self; | 1696 | struct smsc_ircc_cb *self; |
1697 | char hwname[16]; | 1697 | char hwname[16]; |
1698 | 1698 | ||
1699 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1699 | IRDA_DEBUG(1, "%s\n", __func__); |
1700 | 1700 | ||
1701 | IRDA_ASSERT(dev != NULL, return -1;); | 1701 | IRDA_ASSERT(dev != NULL, return -1;); |
1702 | self = netdev_priv(dev); | 1702 | self = netdev_priv(dev); |
1703 | IRDA_ASSERT(self != NULL, return 0;); | 1703 | IRDA_ASSERT(self != NULL, return 0;); |
1704 | 1704 | ||
1705 | if (self->io.suspended) { | 1705 | if (self->io.suspended) { |
1706 | IRDA_DEBUG(0, "%s(), device is suspended\n", __FUNCTION__); | 1706 | IRDA_DEBUG(0, "%s(), device is suspended\n", __func__); |
1707 | return -EAGAIN; | 1707 | return -EAGAIN; |
1708 | } | 1708 | } |
1709 | 1709 | ||
1710 | if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name, | 1710 | if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name, |
1711 | (void *) dev)) { | 1711 | (void *) dev)) { |
1712 | IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n", | 1712 | IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n", |
1713 | __FUNCTION__, self->io.irq); | 1713 | __func__, self->io.irq); |
1714 | return -EAGAIN; | 1714 | return -EAGAIN; |
1715 | } | 1715 | } |
1716 | 1716 | ||
@@ -1734,7 +1734,7 @@ static int smsc_ircc_net_open(struct net_device *dev) | |||
1734 | smsc_ircc_net_close(dev); | 1734 | smsc_ircc_net_close(dev); |
1735 | 1735 | ||
1736 | IRDA_WARNING("%s(), unable to allocate DMA=%d\n", | 1736 | IRDA_WARNING("%s(), unable to allocate DMA=%d\n", |
1737 | __FUNCTION__, self->io.dma); | 1737 | __func__, self->io.dma); |
1738 | return -EAGAIN; | 1738 | return -EAGAIN; |
1739 | } | 1739 | } |
1740 | 1740 | ||
@@ -1753,7 +1753,7 @@ static int smsc_ircc_net_close(struct net_device *dev) | |||
1753 | { | 1753 | { |
1754 | struct smsc_ircc_cb *self; | 1754 | struct smsc_ircc_cb *self; |
1755 | 1755 | ||
1756 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1756 | IRDA_DEBUG(1, "%s\n", __func__); |
1757 | 1757 | ||
1758 | IRDA_ASSERT(dev != NULL, return -1;); | 1758 | IRDA_ASSERT(dev != NULL, return -1;); |
1759 | self = netdev_priv(dev); | 1759 | self = netdev_priv(dev); |
@@ -1836,7 +1836,7 @@ static int smsc_ircc_resume(struct platform_device *dev) | |||
1836 | */ | 1836 | */ |
1837 | static int __exit smsc_ircc_close(struct smsc_ircc_cb *self) | 1837 | static int __exit smsc_ircc_close(struct smsc_ircc_cb *self) |
1838 | { | 1838 | { |
1839 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1839 | IRDA_DEBUG(1, "%s\n", __func__); |
1840 | 1840 | ||
1841 | IRDA_ASSERT(self != NULL, return -1;); | 1841 | IRDA_ASSERT(self != NULL, return -1;); |
1842 | 1842 | ||
@@ -1848,12 +1848,12 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self) | |||
1848 | smsc_ircc_stop_interrupts(self); | 1848 | smsc_ircc_stop_interrupts(self); |
1849 | 1849 | ||
1850 | /* Release the PORTS that this driver is using */ | 1850 | /* Release the PORTS that this driver is using */ |
1851 | IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__, | 1851 | IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __func__, |
1852 | self->io.fir_base); | 1852 | self->io.fir_base); |
1853 | 1853 | ||
1854 | release_region(self->io.fir_base, self->io.fir_ext); | 1854 | release_region(self->io.fir_base, self->io.fir_ext); |
1855 | 1855 | ||
1856 | IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__, | 1856 | IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __func__, |
1857 | self->io.sir_base); | 1857 | self->io.sir_base); |
1858 | 1858 | ||
1859 | release_region(self->io.sir_base, self->io.sir_ext); | 1859 | release_region(self->io.sir_base, self->io.sir_ext); |
@@ -1875,7 +1875,7 @@ static void __exit smsc_ircc_cleanup(void) | |||
1875 | { | 1875 | { |
1876 | int i; | 1876 | int i; |
1877 | 1877 | ||
1878 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 1878 | IRDA_DEBUG(1, "%s\n", __func__); |
1879 | 1879 | ||
1880 | for (i = 0; i < 2; i++) { | 1880 | for (i = 0; i < 2; i++) { |
1881 | if (dev_self[i]) | 1881 | if (dev_self[i]) |
@@ -1899,7 +1899,7 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self) | |||
1899 | struct net_device *dev; | 1899 | struct net_device *dev; |
1900 | int fir_base, sir_base; | 1900 | int fir_base, sir_base; |
1901 | 1901 | ||
1902 | IRDA_DEBUG(3, "%s\n", __FUNCTION__); | 1902 | IRDA_DEBUG(3, "%s\n", __func__); |
1903 | 1903 | ||
1904 | IRDA_ASSERT(self != NULL, return;); | 1904 | IRDA_ASSERT(self != NULL, return;); |
1905 | dev = self->netdev; | 1905 | dev = self->netdev; |
@@ -1926,7 +1926,7 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self) | |||
1926 | /* Turn on interrups */ | 1926 | /* Turn on interrups */ |
1927 | outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER); | 1927 | outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER); |
1928 | 1928 | ||
1929 | IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__); | 1929 | IRDA_DEBUG(3, "%s() - exit\n", __func__); |
1930 | 1930 | ||
1931 | outb(0x00, fir_base + IRCC_MASTER); | 1931 | outb(0x00, fir_base + IRCC_MASTER); |
1932 | } | 1932 | } |
@@ -1936,7 +1936,7 @@ void smsc_ircc_sir_stop(struct smsc_ircc_cb *self) | |||
1936 | { | 1936 | { |
1937 | int iobase; | 1937 | int iobase; |
1938 | 1938 | ||
1939 | IRDA_DEBUG(3, "%s\n", __FUNCTION__); | 1939 | IRDA_DEBUG(3, "%s\n", __func__); |
1940 | iobase = self->io.sir_base; | 1940 | iobase = self->io.sir_base; |
1941 | 1941 | ||
1942 | /* Reset UART */ | 1942 | /* Reset UART */ |
@@ -1962,7 +1962,7 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self) | |||
1962 | 1962 | ||
1963 | IRDA_ASSERT(self != NULL, return;); | 1963 | IRDA_ASSERT(self != NULL, return;); |
1964 | 1964 | ||
1965 | IRDA_DEBUG(4, "%s\n", __FUNCTION__); | 1965 | IRDA_DEBUG(4, "%s\n", __func__); |
1966 | 1966 | ||
1967 | iobase = self->io.sir_base; | 1967 | iobase = self->io.sir_base; |
1968 | 1968 | ||
@@ -1984,7 +1984,7 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self) | |||
1984 | */ | 1984 | */ |
1985 | if (self->new_speed) { | 1985 | if (self->new_speed) { |
1986 | IRDA_DEBUG(5, "%s(), Changing speed to %d.\n", | 1986 | IRDA_DEBUG(5, "%s(), Changing speed to %d.\n", |
1987 | __FUNCTION__, self->new_speed); | 1987 | __func__, self->new_speed); |
1988 | smsc_ircc_sir_wait_hw_transmitter_finish(self); | 1988 | smsc_ircc_sir_wait_hw_transmitter_finish(self); |
1989 | smsc_ircc_change_speed(self, self->new_speed); | 1989 | smsc_ircc_change_speed(self, self->new_speed); |
1990 | self->new_speed = 0; | 1990 | self->new_speed = 0; |
@@ -2023,7 +2023,7 @@ static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |||
2023 | 2023 | ||
2024 | /* Tx FIFO should be empty! */ | 2024 | /* Tx FIFO should be empty! */ |
2025 | if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) { | 2025 | if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) { |
2026 | IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__); | 2026 | IRDA_WARNING("%s(), failed, fifo not empty!\n", __func__); |
2027 | return 0; | 2027 | return 0; |
2028 | } | 2028 | } |
2029 | 2029 | ||
@@ -2123,7 +2123,7 @@ static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self) | |||
2123 | udelay(1); | 2123 | udelay(1); |
2124 | 2124 | ||
2125 | if (count == 0) | 2125 | if (count == 0) |
2126 | IRDA_DEBUG(0, "%s(): stuck transmitter\n", __FUNCTION__); | 2126 | IRDA_DEBUG(0, "%s(): stuck transmitter\n", __func__); |
2127 | } | 2127 | } |
2128 | 2128 | ||
2129 | 2129 | ||
@@ -2145,7 +2145,7 @@ static int __init smsc_ircc_look_for_chips(void) | |||
2145 | while (address->cfg_base) { | 2145 | while (address->cfg_base) { |
2146 | cfg_base = address->cfg_base; | 2146 | cfg_base = address->cfg_base; |
2147 | 2147 | ||
2148 | /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/ | 2148 | /*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __func__, cfg_base, address->type);*/ |
2149 | 2149 | ||
2150 | if (address->type & SMSCSIO_TYPE_FDC) { | 2150 | if (address->type & SMSCSIO_TYPE_FDC) { |
2151 | type = "FDC"; | 2151 | type = "FDC"; |
@@ -2184,7 +2184,7 @@ static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned shor | |||
2184 | u8 mode, dma, irq; | 2184 | u8 mode, dma, irq; |
2185 | int ret = -ENODEV; | 2185 | int ret = -ENODEV; |
2186 | 2186 | ||
2187 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 2187 | IRDA_DEBUG(1, "%s\n", __func__); |
2188 | 2188 | ||
2189 | if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL) | 2189 | if (smsc_ircc_probe(cfgbase, SMSCSIOFLAT_DEVICEID_REG, chips, type) == NULL) |
2190 | return ret; | 2190 | return ret; |
@@ -2192,10 +2192,10 @@ static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned shor | |||
2192 | outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase); | 2192 | outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase); |
2193 | mode = inb(cfgbase + 1); | 2193 | mode = inb(cfgbase + 1); |
2194 | 2194 | ||
2195 | /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/ | 2195 | /*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __func__, mode);*/ |
2196 | 2196 | ||
2197 | if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA)) | 2197 | if (!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA)) |
2198 | IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__); | 2198 | IRDA_WARNING("%s(): IrDA not enabled\n", __func__); |
2199 | 2199 | ||
2200 | outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase); | 2200 | outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase); |
2201 | sirbase = inb(cfgbase + 1) << 2; | 2201 | sirbase = inb(cfgbase + 1) << 2; |
@@ -2212,7 +2212,7 @@ static int __init smsc_superio_flat(const struct smsc_chip *chips, unsigned shor | |||
2212 | outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase); | 2212 | outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase); |
2213 | irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK; | 2213 | irq = inb(cfgbase + 1) & SMSCSIOFLAT_UART2IRQSELECT_MASK; |
2214 | 2214 | ||
2215 | IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __FUNCTION__, firbase, sirbase, dma, irq, mode); | 2215 | IRDA_MESSAGE("%s(): fir: 0x%02x, sir: 0x%02x, dma: %02d, irq: %d, mode: 0x%02x\n", __func__, firbase, sirbase, dma, irq, mode); |
2216 | 2216 | ||
2217 | if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0) | 2217 | if (firbase && smsc_ircc_open(firbase, sirbase, dma, irq) == 0) |
2218 | ret = 0; | 2218 | ret = 0; |
@@ -2234,7 +2234,7 @@ static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned sho | |||
2234 | unsigned short fir_io, sir_io; | 2234 | unsigned short fir_io, sir_io; |
2235 | int ret = -ENODEV; | 2235 | int ret = -ENODEV; |
2236 | 2236 | ||
2237 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 2237 | IRDA_DEBUG(1, "%s\n", __func__); |
2238 | 2238 | ||
2239 | if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL) | 2239 | if (smsc_ircc_probe(cfg_base, 0x20, chips, type) == NULL) |
2240 | return ret; | 2240 | return ret; |
@@ -2268,7 +2268,7 @@ static int __init smsc_superio_paged(const struct smsc_chip *chips, unsigned sho | |||
2268 | 2268 | ||
2269 | static int __init smsc_access(unsigned short cfg_base, unsigned char reg) | 2269 | static int __init smsc_access(unsigned short cfg_base, unsigned char reg) |
2270 | { | 2270 | { |
2271 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 2271 | IRDA_DEBUG(1, "%s\n", __func__); |
2272 | 2272 | ||
2273 | outb(reg, cfg_base); | 2273 | outb(reg, cfg_base); |
2274 | return inb(cfg_base) != reg ? -1 : 0; | 2274 | return inb(cfg_base) != reg ? -1 : 0; |
@@ -2278,7 +2278,7 @@ static const struct smsc_chip * __init smsc_ircc_probe(unsigned short cfg_base, | |||
2278 | { | 2278 | { |
2279 | u8 devid, xdevid, rev; | 2279 | u8 devid, xdevid, rev; |
2280 | 2280 | ||
2281 | IRDA_DEBUG(1, "%s\n", __FUNCTION__); | 2281 | IRDA_DEBUG(1, "%s\n", __func__); |
2282 | 2282 | ||
2283 | /* Leave configuration */ | 2283 | /* Leave configuration */ |
2284 | 2284 | ||
@@ -2353,7 +2353,7 @@ static int __init smsc_superio_fdc(unsigned short cfg_base) | |||
2353 | 2353 | ||
2354 | if (!request_region(cfg_base, 2, driver_name)) { | 2354 | if (!request_region(cfg_base, 2, driver_name)) { |
2355 | IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", | 2355 | IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", |
2356 | __FUNCTION__, cfg_base); | 2356 | __func__, cfg_base); |
2357 | } else { | 2357 | } else { |
2358 | if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") || | 2358 | if (!smsc_superio_flat(fdc_chips_flat, cfg_base, "FDC") || |
2359 | !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC")) | 2359 | !smsc_superio_paged(fdc_chips_paged, cfg_base, "FDC")) |
@@ -2371,7 +2371,7 @@ static int __init smsc_superio_lpc(unsigned short cfg_base) | |||
2371 | 2371 | ||
2372 | if (!request_region(cfg_base, 2, driver_name)) { | 2372 | if (!request_region(cfg_base, 2, driver_name)) { |
2373 | IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", | 2373 | IRDA_WARNING("%s: can't get cfg_base of 0x%03x\n", |
2374 | __FUNCTION__, cfg_base); | 2374 | __func__, cfg_base); |
2375 | } else { | 2375 | } else { |
2376 | if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") || | 2376 | if (!smsc_superio_flat(lpc_chips_flat, cfg_base, "LPC") || |
2377 | !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC")) | 2377 | !smsc_superio_paged(lpc_chips_paged, cfg_base, "LPC")) |
@@ -2932,7 +2932,7 @@ static void smsc_ircc_set_transceiver_smsc_ircc_atc(int fir_base, u32 speed) | |||
2932 | /* empty */; | 2932 | /* empty */; |
2933 | 2933 | ||
2934 | if (val) | 2934 | if (val) |
2935 | IRDA_WARNING("%s(): ATC: 0x%02x\n", __FUNCTION__, | 2935 | IRDA_WARNING("%s(): ATC: 0x%02x\n", __func__, |
2936 | inb(fir_base + IRCC_ATC)); | 2936 | inb(fir_base + IRCC_ATC)); |
2937 | } | 2937 | } |
2938 | 2938 | ||
diff --git a/drivers/net/irda/tekram-sir.c b/drivers/net/irda/tekram-sir.c index d1ce5ae6a172..048a15422844 100644 --- a/drivers/net/irda/tekram-sir.c +++ b/drivers/net/irda/tekram-sir.c | |||
@@ -77,7 +77,7 @@ static int tekram_open(struct sir_dev *dev) | |||
77 | { | 77 | { |
78 | struct qos_info *qos = &dev->qos; | 78 | struct qos_info *qos = &dev->qos; |
79 | 79 | ||
80 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 80 | IRDA_DEBUG(2, "%s()\n", __func__); |
81 | 81 | ||
82 | sirdev_set_dtr_rts(dev, TRUE, TRUE); | 82 | sirdev_set_dtr_rts(dev, TRUE, TRUE); |
83 | 83 | ||
@@ -92,7 +92,7 @@ static int tekram_open(struct sir_dev *dev) | |||
92 | 92 | ||
93 | static int tekram_close(struct sir_dev *dev) | 93 | static int tekram_close(struct sir_dev *dev) |
94 | { | 94 | { |
95 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 95 | IRDA_DEBUG(2, "%s()\n", __func__); |
96 | 96 | ||
97 | /* Power off dongle */ | 97 | /* Power off dongle */ |
98 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 98 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -130,7 +130,7 @@ static int tekram_change_speed(struct sir_dev *dev, unsigned speed) | |||
130 | u8 byte; | 130 | u8 byte; |
131 | static int ret = 0; | 131 | static int ret = 0; |
132 | 132 | ||
133 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 133 | IRDA_DEBUG(2, "%s()\n", __func__); |
134 | 134 | ||
135 | switch(state) { | 135 | switch(state) { |
136 | case SIRDEV_STATE_DONGLE_SPEED: | 136 | case SIRDEV_STATE_DONGLE_SPEED: |
@@ -179,7 +179,7 @@ static int tekram_change_speed(struct sir_dev *dev, unsigned speed) | |||
179 | break; | 179 | break; |
180 | 180 | ||
181 | default: | 181 | default: |
182 | IRDA_ERROR("%s - undefined state %d\n", __FUNCTION__, state); | 182 | IRDA_ERROR("%s - undefined state %d\n", __func__, state); |
183 | ret = -EINVAL; | 183 | ret = -EINVAL; |
184 | break; | 184 | break; |
185 | } | 185 | } |
@@ -204,7 +204,7 @@ static int tekram_change_speed(struct sir_dev *dev, unsigned speed) | |||
204 | 204 | ||
205 | static int tekram_reset(struct sir_dev *dev) | 205 | static int tekram_reset(struct sir_dev *dev) |
206 | { | 206 | { |
207 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 207 | IRDA_DEBUG(2, "%s()\n", __func__); |
208 | 208 | ||
209 | /* Clear DTR, Set RTS */ | 209 | /* Clear DTR, Set RTS */ |
210 | sirdev_set_dtr_rts(dev, FALSE, TRUE); | 210 | sirdev_set_dtr_rts(dev, FALSE, TRUE); |
diff --git a/drivers/net/irda/toim3232-sir.c b/drivers/net/irda/toim3232-sir.c index aa1a9b0ed83e..fcf287b749db 100644 --- a/drivers/net/irda/toim3232-sir.c +++ b/drivers/net/irda/toim3232-sir.c | |||
@@ -181,7 +181,7 @@ static int toim3232_open(struct sir_dev *dev) | |||
181 | { | 181 | { |
182 | struct qos_info *qos = &dev->qos; | 182 | struct qos_info *qos = &dev->qos; |
183 | 183 | ||
184 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 184 | IRDA_DEBUG(2, "%s()\n", __func__); |
185 | 185 | ||
186 | /* Pull the lines high to start with. | 186 | /* Pull the lines high to start with. |
187 | * | 187 | * |
@@ -209,7 +209,7 @@ static int toim3232_open(struct sir_dev *dev) | |||
209 | 209 | ||
210 | static int toim3232_close(struct sir_dev *dev) | 210 | static int toim3232_close(struct sir_dev *dev) |
211 | { | 211 | { |
212 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 212 | IRDA_DEBUG(2, "%s()\n", __func__); |
213 | 213 | ||
214 | /* Power off dongle */ | 214 | /* Power off dongle */ |
215 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 215 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
@@ -241,7 +241,7 @@ static int toim3232_change_speed(struct sir_dev *dev, unsigned speed) | |||
241 | u8 byte; | 241 | u8 byte; |
242 | static int ret = 0; | 242 | static int ret = 0; |
243 | 243 | ||
244 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 244 | IRDA_DEBUG(2, "%s()\n", __func__); |
245 | 245 | ||
246 | switch(state) { | 246 | switch(state) { |
247 | case SIRDEV_STATE_DONGLE_SPEED: | 247 | case SIRDEV_STATE_DONGLE_SPEED: |
@@ -299,7 +299,7 @@ static int toim3232_change_speed(struct sir_dev *dev, unsigned speed) | |||
299 | break; | 299 | break; |
300 | 300 | ||
301 | default: | 301 | default: |
302 | printk(KERN_ERR "%s - undefined state %d\n", __FUNCTION__, state); | 302 | printk(KERN_ERR "%s - undefined state %d\n", __func__, state); |
303 | ret = -EINVAL; | 303 | ret = -EINVAL; |
304 | break; | 304 | break; |
305 | } | 305 | } |
@@ -344,7 +344,7 @@ static int toim3232_change_speed(struct sir_dev *dev, unsigned speed) | |||
344 | 344 | ||
345 | static int toim3232_reset(struct sir_dev *dev) | 345 | static int toim3232_reset(struct sir_dev *dev) |
346 | { | 346 | { |
347 | IRDA_DEBUG(2, "%s()\n", __FUNCTION__); | 347 | IRDA_DEBUG(2, "%s()\n", __func__); |
348 | 348 | ||
349 | /* Switch off both DTR and RTS to switch off dongle */ | 349 | /* Switch off both DTR and RTS to switch off dongle */ |
350 | sirdev_set_dtr_rts(dev, FALSE, FALSE); | 350 | sirdev_set_dtr_rts(dev, FALSE, FALSE); |
diff --git a/drivers/net/irda/via-ircc.c b/drivers/net/irda/via-ircc.c index 04ad3573b159..84e609ea5fbb 100644 --- a/drivers/net/irda/via-ircc.c +++ b/drivers/net/irda/via-ircc.c | |||
@@ -152,12 +152,12 @@ static int __init via_ircc_init(void) | |||
152 | { | 152 | { |
153 | int rc; | 153 | int rc; |
154 | 154 | ||
155 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 155 | IRDA_DEBUG(3, "%s()\n", __func__); |
156 | 156 | ||
157 | rc = pci_register_driver(&via_driver); | 157 | rc = pci_register_driver(&via_driver); |
158 | if (rc < 0) { | 158 | if (rc < 0) { |
159 | IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n", | 159 | IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n", |
160 | __FUNCTION__, rc); | 160 | __func__, rc); |
161 | return -ENODEV; | 161 | return -ENODEV; |
162 | } | 162 | } |
163 | return 0; | 163 | return 0; |
@@ -170,11 +170,11 @@ static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_devi | |||
170 | u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase; | 170 | u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase; |
171 | chipio_t info; | 171 | chipio_t info; |
172 | 172 | ||
173 | IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __FUNCTION__, id->device); | 173 | IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device); |
174 | 174 | ||
175 | rc = pci_enable_device (pcidev); | 175 | rc = pci_enable_device (pcidev); |
176 | if (rc) { | 176 | if (rc) { |
177 | IRDA_DEBUG(0, "%s(): error rc = %d\n", __FUNCTION__, rc); | 177 | IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc); |
178 | return -ENODEV; | 178 | return -ENODEV; |
179 | } | 179 | } |
180 | 180 | ||
@@ -185,7 +185,7 @@ static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_devi | |||
185 | Chipset=0x3076; | 185 | Chipset=0x3076; |
186 | 186 | ||
187 | if (Chipset==0x3076) { | 187 | if (Chipset==0x3076) { |
188 | IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __FUNCTION__); | 188 | IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__); |
189 | 189 | ||
190 | WriteLPCReg(7,0x0c ); | 190 | WriteLPCReg(7,0x0c ); |
191 | temp=ReadLPCReg(0x30);//check if BIOS Enable Fir | 191 | temp=ReadLPCReg(0x30);//check if BIOS Enable Fir |
@@ -222,7 +222,7 @@ static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_devi | |||
222 | } else | 222 | } else |
223 | rc = -ENODEV; //IR not turn on | 223 | rc = -ENODEV; //IR not turn on |
224 | } else { //Not VT1211 | 224 | } else { //Not VT1211 |
225 | IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __FUNCTION__); | 225 | IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__); |
226 | 226 | ||
227 | pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir | 227 | pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir |
228 | if((bTmp&0x01)==1) { // BIOS enable FIR | 228 | if((bTmp&0x01)==1) { // BIOS enable FIR |
@@ -262,7 +262,7 @@ static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_devi | |||
262 | rc = -ENODEV; //IR not turn on !!!!! | 262 | rc = -ENODEV; //IR not turn on !!!!! |
263 | }//Not VT1211 | 263 | }//Not VT1211 |
264 | 264 | ||
265 | IRDA_DEBUG(2, "%s(): End - rc = %d\n", __FUNCTION__, rc); | 265 | IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc); |
266 | return rc; | 266 | return rc; |
267 | } | 267 | } |
268 | 268 | ||
@@ -276,7 +276,7 @@ static void via_ircc_clean(void) | |||
276 | { | 276 | { |
277 | int i; | 277 | int i; |
278 | 278 | ||
279 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 279 | IRDA_DEBUG(3, "%s()\n", __func__); |
280 | 280 | ||
281 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { | 281 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
282 | if (dev_self[i]) | 282 | if (dev_self[i]) |
@@ -286,7 +286,7 @@ static void via_ircc_clean(void) | |||
286 | 286 | ||
287 | static void __devexit via_remove_one (struct pci_dev *pdev) | 287 | static void __devexit via_remove_one (struct pci_dev *pdev) |
288 | { | 288 | { |
289 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 289 | IRDA_DEBUG(3, "%s()\n", __func__); |
290 | 290 | ||
291 | /* FIXME : This is ugly. We should use pci_get_drvdata(pdev); | 291 | /* FIXME : This is ugly. We should use pci_get_drvdata(pdev); |
292 | * to get our driver instance and call directly via_ircc_close(). | 292 | * to get our driver instance and call directly via_ircc_close(). |
@@ -301,7 +301,7 @@ static void __devexit via_remove_one (struct pci_dev *pdev) | |||
301 | 301 | ||
302 | static void __exit via_ircc_cleanup(void) | 302 | static void __exit via_ircc_cleanup(void) |
303 | { | 303 | { |
304 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 304 | IRDA_DEBUG(3, "%s()\n", __func__); |
305 | 305 | ||
306 | /* FIXME : This should be redundant, as pci_unregister_driver() | 306 | /* FIXME : This should be redundant, as pci_unregister_driver() |
307 | * should call via_remove_one() on each device. | 307 | * should call via_remove_one() on each device. |
@@ -324,7 +324,7 @@ static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id) | |||
324 | struct via_ircc_cb *self; | 324 | struct via_ircc_cb *self; |
325 | int err; | 325 | int err; |
326 | 326 | ||
327 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 327 | IRDA_DEBUG(3, "%s()\n", __func__); |
328 | 328 | ||
329 | if (i >= ARRAY_SIZE(dev_self)) | 329 | if (i >= ARRAY_SIZE(dev_self)) |
330 | return -ENOMEM; | 330 | return -ENOMEM; |
@@ -360,7 +360,7 @@ static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id) | |||
360 | /* Reserve the ioports that we need */ | 360 | /* Reserve the ioports that we need */ |
361 | if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) { | 361 | if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) { |
362 | IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n", | 362 | IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n", |
363 | __FUNCTION__, self->io.fir_base); | 363 | __func__, self->io.fir_base); |
364 | err = -ENODEV; | 364 | err = -ENODEV; |
365 | goto err_out1; | 365 | goto err_out1; |
366 | } | 366 | } |
@@ -471,7 +471,7 @@ static int via_ircc_close(struct via_ircc_cb *self) | |||
471 | { | 471 | { |
472 | int iobase; | 472 | int iobase; |
473 | 473 | ||
474 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 474 | IRDA_DEBUG(3, "%s()\n", __func__); |
475 | 475 | ||
476 | IRDA_ASSERT(self != NULL, return -1;); | 476 | IRDA_ASSERT(self != NULL, return -1;); |
477 | 477 | ||
@@ -483,7 +483,7 @@ static int via_ircc_close(struct via_ircc_cb *self) | |||
483 | 483 | ||
484 | /* Release the PORT that this driver is using */ | 484 | /* Release the PORT that this driver is using */ |
485 | IRDA_DEBUG(2, "%s(), Releasing Region %03x\n", | 485 | IRDA_DEBUG(2, "%s(), Releasing Region %03x\n", |
486 | __FUNCTION__, self->io.fir_base); | 486 | __func__, self->io.fir_base); |
487 | release_region(self->io.fir_base, self->io.fir_ext); | 487 | release_region(self->io.fir_base, self->io.fir_ext); |
488 | if (self->tx_buff.head) | 488 | if (self->tx_buff.head) |
489 | dma_free_coherent(NULL, self->tx_buff.truesize, | 489 | dma_free_coherent(NULL, self->tx_buff.truesize, |
@@ -509,7 +509,7 @@ static void via_hw_init(struct via_ircc_cb *self) | |||
509 | { | 509 | { |
510 | int iobase = self->io.fir_base; | 510 | int iobase = self->io.fir_base; |
511 | 511 | ||
512 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 512 | IRDA_DEBUG(3, "%s()\n", __func__); |
513 | 513 | ||
514 | SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095 | 514 | SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095 |
515 | // FIFO Init | 515 | // FIFO Init |
@@ -582,7 +582,7 @@ static void via_ircc_change_dongle_speed(int iobase, int speed, | |||
582 | speed = speed; | 582 | speed = speed; |
583 | 583 | ||
584 | IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n", | 584 | IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n", |
585 | __FUNCTION__, speed, iobase, dongle_id); | 585 | __func__, speed, iobase, dongle_id); |
586 | 586 | ||
587 | switch (dongle_id) { | 587 | switch (dongle_id) { |
588 | 588 | ||
@@ -671,7 +671,7 @@ static void via_ircc_change_dongle_speed(int iobase, int speed, | |||
671 | 671 | ||
672 | case 0x11: /* Temic TFDS4500 */ | 672 | case 0x11: /* Temic TFDS4500 */ |
673 | 673 | ||
674 | IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __FUNCTION__); | 674 | IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__); |
675 | 675 | ||
676 | UseOneRX(iobase, ON); //use ONE RX....RX1 | 676 | UseOneRX(iobase, ON); //use ONE RX....RX1 |
677 | InvertTX(iobase, OFF); | 677 | InvertTX(iobase, OFF); |
@@ -689,7 +689,7 @@ static void via_ircc_change_dongle_speed(int iobase, int speed, | |||
689 | SlowIRRXLowActive(iobase, OFF); | 689 | SlowIRRXLowActive(iobase, OFF); |
690 | 690 | ||
691 | } else{ | 691 | } else{ |
692 | IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __FUNCTION__); | 692 | IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__); |
693 | } | 693 | } |
694 | break; | 694 | break; |
695 | 695 | ||
@@ -707,7 +707,7 @@ static void via_ircc_change_dongle_speed(int iobase, int speed, | |||
707 | 707 | ||
708 | default: | 708 | default: |
709 | IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n", | 709 | IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n", |
710 | __FUNCTION__, dongle_id); | 710 | __func__, dongle_id); |
711 | } | 711 | } |
712 | } | 712 | } |
713 | 713 | ||
@@ -726,7 +726,7 @@ static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed) | |||
726 | iobase = self->io.fir_base; | 726 | iobase = self->io.fir_base; |
727 | /* Update accounting for new speed */ | 727 | /* Update accounting for new speed */ |
728 | self->io.speed = speed; | 728 | self->io.speed = speed; |
729 | IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __FUNCTION__, speed); | 729 | IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed); |
730 | 730 | ||
731 | WriteReg(iobase, I_ST_CT_0, 0x0); | 731 | WriteReg(iobase, I_ST_CT_0, 0x0); |
732 | 732 | ||
@@ -957,7 +957,7 @@ static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase) | |||
957 | self->tx_buff.head) + self->tx_buff_dma, | 957 | self->tx_buff.head) + self->tx_buff_dma, |
958 | self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE); | 958 | self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE); |
959 | IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n", | 959 | IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n", |
960 | __FUNCTION__, self->tx_fifo.ptr, | 960 | __func__, self->tx_fifo.ptr, |
961 | self->tx_fifo.queue[self->tx_fifo.ptr].len, | 961 | self->tx_fifo.queue[self->tx_fifo.ptr].len, |
962 | self->tx_fifo.len); | 962 | self->tx_fifo.len); |
963 | 963 | ||
@@ -981,7 +981,7 @@ static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self) | |||
981 | int ret = TRUE; | 981 | int ret = TRUE; |
982 | u8 Tx_status; | 982 | u8 Tx_status; |
983 | 983 | ||
984 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 984 | IRDA_DEBUG(3, "%s()\n", __func__); |
985 | 985 | ||
986 | iobase = self->io.fir_base; | 986 | iobase = self->io.fir_base; |
987 | /* Disable DMA */ | 987 | /* Disable DMA */ |
@@ -1014,7 +1014,7 @@ static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self) | |||
1014 | } | 1014 | } |
1015 | IRDA_DEBUG(1, | 1015 | IRDA_DEBUG(1, |
1016 | "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n", | 1016 | "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n", |
1017 | __FUNCTION__, | 1017 | __func__, |
1018 | self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free); | 1018 | self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free); |
1019 | /* F01_S | 1019 | /* F01_S |
1020 | // Any frames to be sent back-to-back? | 1020 | // Any frames to be sent back-to-back? |
@@ -1050,7 +1050,7 @@ static int via_ircc_dma_receive(struct via_ircc_cb *self) | |||
1050 | 1050 | ||
1051 | iobase = self->io.fir_base; | 1051 | iobase = self->io.fir_base; |
1052 | 1052 | ||
1053 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 1053 | IRDA_DEBUG(3, "%s()\n", __func__); |
1054 | 1054 | ||
1055 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | 1055 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; |
1056 | self->tx_fifo.tail = self->tx_buff.head; | 1056 | self->tx_fifo.tail = self->tx_buff.head; |
@@ -1134,13 +1134,13 @@ static int via_ircc_dma_receive_complete(struct via_ircc_cb *self, | |||
1134 | return TRUE; //interrupt only, data maybe move by RxT | 1134 | return TRUE; //interrupt only, data maybe move by RxT |
1135 | if (((len - 4) < 2) || ((len - 4) > 2048)) { | 1135 | if (((len - 4) < 2) || ((len - 4) > 2048)) { |
1136 | IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n", | 1136 | IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n", |
1137 | __FUNCTION__, len, RxCurCount(iobase, self), | 1137 | __func__, len, RxCurCount(iobase, self), |
1138 | self->RxLastCount); | 1138 | self->RxLastCount); |
1139 | hwreset(self); | 1139 | hwreset(self); |
1140 | return FALSE; | 1140 | return FALSE; |
1141 | } | 1141 | } |
1142 | IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n", | 1142 | IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n", |
1143 | __FUNCTION__, | 1143 | __func__, |
1144 | st_fifo->len, len - 4, RxCurCount(iobase, self)); | 1144 | st_fifo->len, len - 4, RxCurCount(iobase, self)); |
1145 | 1145 | ||
1146 | st_fifo->entries[st_fifo->tail].status = status; | 1146 | st_fifo->entries[st_fifo->tail].status = status; |
@@ -1187,7 +1187,7 @@ F01_E */ | |||
1187 | skb_put(skb, len - 4); | 1187 | skb_put(skb, len - 4); |
1188 | 1188 | ||
1189 | skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4); | 1189 | skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4); |
1190 | IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __FUNCTION__, | 1190 | IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__, |
1191 | len - 4, self->rx_buff.data); | 1191 | len - 4, self->rx_buff.data); |
1192 | 1192 | ||
1193 | // Move to next frame | 1193 | // Move to next frame |
@@ -1217,7 +1217,7 @@ static int upload_rxdata(struct via_ircc_cb *self, int iobase) | |||
1217 | 1217 | ||
1218 | len = GetRecvByte(iobase, self); | 1218 | len = GetRecvByte(iobase, self); |
1219 | 1219 | ||
1220 | IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len); | 1220 | IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len); |
1221 | 1221 | ||
1222 | if ((len - 4) < 2) { | 1222 | if ((len - 4) < 2) { |
1223 | self->stats.rx_dropped++; | 1223 | self->stats.rx_dropped++; |
@@ -1302,7 +1302,7 @@ static int RxTimerHandler(struct via_ircc_cb *self, int iobase) | |||
1302 | skb_put(skb, len - 4); | 1302 | skb_put(skb, len - 4); |
1303 | skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4); | 1303 | skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4); |
1304 | 1304 | ||
1305 | IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __FUNCTION__, | 1305 | IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__, |
1306 | len - 4, st_fifo->head); | 1306 | len - 4, st_fifo->head); |
1307 | 1307 | ||
1308 | // Move to next frame | 1308 | // Move to next frame |
@@ -1318,7 +1318,7 @@ static int RxTimerHandler(struct via_ircc_cb *self, int iobase) | |||
1318 | 1318 | ||
1319 | IRDA_DEBUG(2, | 1319 | IRDA_DEBUG(2, |
1320 | "%s(): End of upload HostStatus=%x,RxStatus=%x\n", | 1320 | "%s(): End of upload HostStatus=%x,RxStatus=%x\n", |
1321 | __FUNCTION__, | 1321 | __func__, |
1322 | GetHostStatus(iobase), GetRXStatus(iobase)); | 1322 | GetHostStatus(iobase), GetRXStatus(iobase)); |
1323 | 1323 | ||
1324 | /* | 1324 | /* |
@@ -1358,7 +1358,7 @@ static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id) | |||
1358 | iHostIntType = GetHostStatus(iobase); | 1358 | iHostIntType = GetHostStatus(iobase); |
1359 | 1359 | ||
1360 | IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n", | 1360 | IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n", |
1361 | __FUNCTION__, iHostIntType, | 1361 | __func__, iHostIntType, |
1362 | (iHostIntType & 0x40) ? "Timer" : "", | 1362 | (iHostIntType & 0x40) ? "Timer" : "", |
1363 | (iHostIntType & 0x20) ? "Tx" : "", | 1363 | (iHostIntType & 0x20) ? "Tx" : "", |
1364 | (iHostIntType & 0x10) ? "Rx" : "", | 1364 | (iHostIntType & 0x10) ? "Rx" : "", |
@@ -1388,7 +1388,7 @@ static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id) | |||
1388 | iTxIntType = GetTXStatus(iobase); | 1388 | iTxIntType = GetTXStatus(iobase); |
1389 | 1389 | ||
1390 | IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n", | 1390 | IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n", |
1391 | __FUNCTION__, iTxIntType, | 1391 | __func__, iTxIntType, |
1392 | (iTxIntType & 0x08) ? "FIFO underr." : "", | 1392 | (iTxIntType & 0x08) ? "FIFO underr." : "", |
1393 | (iTxIntType & 0x04) ? "EOM" : "", | 1393 | (iTxIntType & 0x04) ? "EOM" : "", |
1394 | (iTxIntType & 0x02) ? "FIFO ready" : "", | 1394 | (iTxIntType & 0x02) ? "FIFO ready" : "", |
@@ -1412,7 +1412,7 @@ static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id) | |||
1412 | iRxIntType = GetRXStatus(iobase); | 1412 | iRxIntType = GetRXStatus(iobase); |
1413 | 1413 | ||
1414 | IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n", | 1414 | IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n", |
1415 | __FUNCTION__, iRxIntType, | 1415 | __func__, iRxIntType, |
1416 | (iRxIntType & 0x80) ? "PHY err." : "", | 1416 | (iRxIntType & 0x80) ? "PHY err." : "", |
1417 | (iRxIntType & 0x40) ? "CRC err" : "", | 1417 | (iRxIntType & 0x40) ? "CRC err" : "", |
1418 | (iRxIntType & 0x20) ? "FIFO overr." : "", | 1418 | (iRxIntType & 0x20) ? "FIFO overr." : "", |
@@ -1421,7 +1421,7 @@ static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id) | |||
1421 | (iRxIntType & 0x02) ? "RxMaxLen" : "", | 1421 | (iRxIntType & 0x02) ? "RxMaxLen" : "", |
1422 | (iRxIntType & 0x01) ? "SIR bad" : ""); | 1422 | (iRxIntType & 0x01) ? "SIR bad" : ""); |
1423 | if (!iRxIntType) | 1423 | if (!iRxIntType) |
1424 | IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __FUNCTION__); | 1424 | IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__); |
1425 | 1425 | ||
1426 | if (iRxIntType & 0x10) { | 1426 | if (iRxIntType & 0x10) { |
1427 | if (via_ircc_dma_receive_complete(self, iobase)) { | 1427 | if (via_ircc_dma_receive_complete(self, iobase)) { |
@@ -1431,7 +1431,7 @@ static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id) | |||
1431 | } // No ERR | 1431 | } // No ERR |
1432 | else { //ERR | 1432 | else { //ERR |
1433 | IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n", | 1433 | IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n", |
1434 | __FUNCTION__, iRxIntType, iHostIntType, | 1434 | __func__, iRxIntType, iHostIntType, |
1435 | RxCurCount(iobase, self), | 1435 | RxCurCount(iobase, self), |
1436 | self->RxLastCount); | 1436 | self->RxLastCount); |
1437 | 1437 | ||
@@ -1456,7 +1456,7 @@ static void hwreset(struct via_ircc_cb *self) | |||
1456 | int iobase; | 1456 | int iobase; |
1457 | iobase = self->io.fir_base; | 1457 | iobase = self->io.fir_base; |
1458 | 1458 | ||
1459 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 1459 | IRDA_DEBUG(3, "%s()\n", __func__); |
1460 | 1460 | ||
1461 | ResetChip(iobase, 5); | 1461 | ResetChip(iobase, 5); |
1462 | EnableDMA(iobase, OFF); | 1462 | EnableDMA(iobase, OFF); |
@@ -1501,7 +1501,7 @@ static int via_ircc_is_receiving(struct via_ircc_cb *self) | |||
1501 | if (CkRxRecv(iobase, self)) | 1501 | if (CkRxRecv(iobase, self)) |
1502 | status = TRUE; | 1502 | status = TRUE; |
1503 | 1503 | ||
1504 | IRDA_DEBUG(2, "%s(): status=%x....\n", __FUNCTION__, status); | 1504 | IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status); |
1505 | 1505 | ||
1506 | return status; | 1506 | return status; |
1507 | } | 1507 | } |
@@ -1519,7 +1519,7 @@ static int via_ircc_net_open(struct net_device *dev) | |||
1519 | int iobase; | 1519 | int iobase; |
1520 | char hwname[32]; | 1520 | char hwname[32]; |
1521 | 1521 | ||
1522 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 1522 | IRDA_DEBUG(3, "%s()\n", __func__); |
1523 | 1523 | ||
1524 | IRDA_ASSERT(dev != NULL, return -1;); | 1524 | IRDA_ASSERT(dev != NULL, return -1;); |
1525 | self = (struct via_ircc_cb *) dev->priv; | 1525 | self = (struct via_ircc_cb *) dev->priv; |
@@ -1586,7 +1586,7 @@ static int via_ircc_net_close(struct net_device *dev) | |||
1586 | struct via_ircc_cb *self; | 1586 | struct via_ircc_cb *self; |
1587 | int iobase; | 1587 | int iobase; |
1588 | 1588 | ||
1589 | IRDA_DEBUG(3, "%s()\n", __FUNCTION__); | 1589 | IRDA_DEBUG(3, "%s()\n", __func__); |
1590 | 1590 | ||
1591 | IRDA_ASSERT(dev != NULL, return -1;); | 1591 | IRDA_ASSERT(dev != NULL, return -1;); |
1592 | self = (struct via_ircc_cb *) dev->priv; | 1592 | self = (struct via_ircc_cb *) dev->priv; |
@@ -1630,7 +1630,7 @@ static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, | |||
1630 | IRDA_ASSERT(dev != NULL, return -1;); | 1630 | IRDA_ASSERT(dev != NULL, return -1;); |
1631 | self = dev->priv; | 1631 | self = dev->priv; |
1632 | IRDA_ASSERT(self != NULL, return -1;); | 1632 | IRDA_ASSERT(self != NULL, return -1;); |
1633 | IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, | 1633 | IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, |
1634 | cmd); | 1634 | cmd); |
1635 | /* Disable interrupts & save flags */ | 1635 | /* Disable interrupts & save flags */ |
1636 | spin_lock_irqsave(&self->lock, flags); | 1636 | spin_lock_irqsave(&self->lock, flags); |
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c index d15e00b8591e..18f4b3a96aed 100644 --- a/drivers/net/irda/vlsi_ir.c +++ b/drivers/net/irda/vlsi_ir.c | |||
@@ -140,15 +140,15 @@ static void vlsi_ring_debug(struct vlsi_ring *r) | |||
140 | unsigned i; | 140 | unsigned i; |
141 | 141 | ||
142 | printk(KERN_DEBUG "%s - ring %p / size %u / mask 0x%04x / len %u / dir %d / hw %p\n", | 142 | printk(KERN_DEBUG "%s - ring %p / size %u / mask 0x%04x / len %u / dir %d / hw %p\n", |
143 | __FUNCTION__, r, r->size, r->mask, r->len, r->dir, r->rd[0].hw); | 143 | __func__, r, r->size, r->mask, r->len, r->dir, r->rd[0].hw); |
144 | printk(KERN_DEBUG "%s - head = %d / tail = %d\n", __FUNCTION__, | 144 | printk(KERN_DEBUG "%s - head = %d / tail = %d\n", __func__, |
145 | atomic_read(&r->head) & r->mask, atomic_read(&r->tail) & r->mask); | 145 | atomic_read(&r->head) & r->mask, atomic_read(&r->tail) & r->mask); |
146 | for (i = 0; i < r->size; i++) { | 146 | for (i = 0; i < r->size; i++) { |
147 | rd = &r->rd[i]; | 147 | rd = &r->rd[i]; |
148 | printk(KERN_DEBUG "%s - ring descr %u: ", __FUNCTION__, i); | 148 | printk(KERN_DEBUG "%s - ring descr %u: ", __func__, i); |
149 | printk("skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw); | 149 | printk("skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw); |
150 | printk(KERN_DEBUG "%s - hw: status=%02x count=%u addr=0x%08x\n", | 150 | printk(KERN_DEBUG "%s - hw: status=%02x count=%u addr=0x%08x\n", |
151 | __FUNCTION__, (unsigned) rd_get_status(rd), | 151 | __func__, (unsigned) rd_get_status(rd), |
152 | (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd)); | 152 | (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd)); |
153 | } | 153 | } |
154 | } | 154 | } |
@@ -435,7 +435,7 @@ static struct vlsi_ring *vlsi_alloc_ring(struct pci_dev *pdev, struct ring_descr | |||
435 | || !(busaddr = pci_map_single(pdev, rd->buf, len, dir))) { | 435 | || !(busaddr = pci_map_single(pdev, rd->buf, len, dir))) { |
436 | if (rd->buf) { | 436 | if (rd->buf) { |
437 | IRDA_ERROR("%s: failed to create PCI-MAP for %p", | 437 | IRDA_ERROR("%s: failed to create PCI-MAP for %p", |
438 | __FUNCTION__, rd->buf); | 438 | __func__, rd->buf); |
439 | kfree(rd->buf); | 439 | kfree(rd->buf); |
440 | rd->buf = NULL; | 440 | rd->buf = NULL; |
441 | } | 441 | } |
@@ -489,7 +489,7 @@ static int vlsi_create_hwif(vlsi_irda_dev_t *idev) | |||
489 | ringarea = pci_alloc_consistent(idev->pdev, HW_RING_AREA_SIZE, &idev->busaddr); | 489 | ringarea = pci_alloc_consistent(idev->pdev, HW_RING_AREA_SIZE, &idev->busaddr); |
490 | if (!ringarea) { | 490 | if (!ringarea) { |
491 | IRDA_ERROR("%s: insufficient memory for descriptor rings\n", | 491 | IRDA_ERROR("%s: insufficient memory for descriptor rings\n", |
492 | __FUNCTION__); | 492 | __func__); |
493 | goto out; | 493 | goto out; |
494 | } | 494 | } |
495 | memset(ringarea, 0, HW_RING_AREA_SIZE); | 495 | memset(ringarea, 0, HW_RING_AREA_SIZE); |
@@ -564,7 +564,7 @@ static int vlsi_process_rx(struct vlsi_ring *r, struct ring_descr *rd) | |||
564 | crclen = (idev->mode==IFF_FIR) ? sizeof(u32) : sizeof(u16); | 564 | crclen = (idev->mode==IFF_FIR) ? sizeof(u32) : sizeof(u16); |
565 | len -= crclen; /* remove trailing CRC */ | 565 | len -= crclen; /* remove trailing CRC */ |
566 | if (len <= 0) { | 566 | if (len <= 0) { |
567 | IRDA_DEBUG(0, "%s: strange frame (len=%d)\n", __FUNCTION__, len); | 567 | IRDA_DEBUG(0, "%s: strange frame (len=%d)\n", __func__, len); |
568 | ret |= VLSI_RX_DROP; | 568 | ret |= VLSI_RX_DROP; |
569 | goto done; | 569 | goto done; |
570 | } | 570 | } |
@@ -579,14 +579,14 @@ static int vlsi_process_rx(struct vlsi_ring *r, struct ring_descr *rd) | |||
579 | */ | 579 | */ |
580 | le16_to_cpus(rd->buf+len); | 580 | le16_to_cpus(rd->buf+len); |
581 | if (irda_calc_crc16(INIT_FCS,rd->buf,len+crclen) != GOOD_FCS) { | 581 | if (irda_calc_crc16(INIT_FCS,rd->buf,len+crclen) != GOOD_FCS) { |
582 | IRDA_DEBUG(0, "%s: crc error\n", __FUNCTION__); | 582 | IRDA_DEBUG(0, "%s: crc error\n", __func__); |
583 | ret |= VLSI_RX_CRC; | 583 | ret |= VLSI_RX_CRC; |
584 | goto done; | 584 | goto done; |
585 | } | 585 | } |
586 | } | 586 | } |
587 | 587 | ||
588 | if (!rd->skb) { | 588 | if (!rd->skb) { |
589 | IRDA_WARNING("%s: rx packet lost\n", __FUNCTION__); | 589 | IRDA_WARNING("%s: rx packet lost\n", __func__); |
590 | ret |= VLSI_RX_DROP; | 590 | ret |= VLSI_RX_DROP; |
591 | goto done; | 591 | goto done; |
592 | } | 592 | } |
@@ -617,7 +617,7 @@ static void vlsi_fill_rx(struct vlsi_ring *r) | |||
617 | for (rd = ring_last(r); rd != NULL; rd = ring_put(r)) { | 617 | for (rd = ring_last(r); rd != NULL; rd = ring_put(r)) { |
618 | if (rd_is_active(rd)) { | 618 | if (rd_is_active(rd)) { |
619 | IRDA_WARNING("%s: driver bug: rx descr race with hw\n", | 619 | IRDA_WARNING("%s: driver bug: rx descr race with hw\n", |
620 | __FUNCTION__); | 620 | __func__); |
621 | vlsi_ring_debug(r); | 621 | vlsi_ring_debug(r); |
622 | break; | 622 | break; |
623 | } | 623 | } |
@@ -676,7 +676,7 @@ static void vlsi_rx_interrupt(struct net_device *ndev) | |||
676 | 676 | ||
677 | if (ring_first(r) == NULL) { | 677 | if (ring_first(r) == NULL) { |
678 | /* we are in big trouble, if this should ever happen */ | 678 | /* we are in big trouble, if this should ever happen */ |
679 | IRDA_ERROR("%s: rx ring exhausted!\n", __FUNCTION__); | 679 | IRDA_ERROR("%s: rx ring exhausted!\n", __func__); |
680 | vlsi_ring_debug(r); | 680 | vlsi_ring_debug(r); |
681 | } | 681 | } |
682 | else | 682 | else |
@@ -697,7 +697,7 @@ static void vlsi_unarm_rx(vlsi_irda_dev_t *idev) | |||
697 | if (rd_is_active(rd)) { | 697 | if (rd_is_active(rd)) { |
698 | rd_set_status(rd, 0); | 698 | rd_set_status(rd, 0); |
699 | if (rd_get_count(rd)) { | 699 | if (rd_get_count(rd)) { |
700 | IRDA_DEBUG(0, "%s - dropping rx packet\n", __FUNCTION__); | 700 | IRDA_DEBUG(0, "%s - dropping rx packet\n", __func__); |
701 | ret = -VLSI_RX_DROP; | 701 | ret = -VLSI_RX_DROP; |
702 | } | 702 | } |
703 | rd_set_count(rd, 0); | 703 | rd_set_count(rd, 0); |
@@ -772,7 +772,7 @@ static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase) | |||
772 | int fifocnt; | 772 | int fifocnt; |
773 | 773 | ||
774 | baudrate = idev->new_baud; | 774 | baudrate = idev->new_baud; |
775 | IRDA_DEBUG(2, "%s: %d -> %d\n", __FUNCTION__, idev->baud, idev->new_baud); | 775 | IRDA_DEBUG(2, "%s: %d -> %d\n", __func__, idev->baud, idev->new_baud); |
776 | if (baudrate == 4000000) { | 776 | if (baudrate == 4000000) { |
777 | mode = IFF_FIR; | 777 | mode = IFF_FIR; |
778 | config = IRCFG_FIR; | 778 | config = IRCFG_FIR; |
@@ -789,7 +789,7 @@ static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase) | |||
789 | switch(baudrate) { | 789 | switch(baudrate) { |
790 | default: | 790 | default: |
791 | IRDA_WARNING("%s: undefined baudrate %d - fallback to 9600!\n", | 791 | IRDA_WARNING("%s: undefined baudrate %d - fallback to 9600!\n", |
792 | __FUNCTION__, baudrate); | 792 | __func__, baudrate); |
793 | baudrate = 9600; | 793 | baudrate = 9600; |
794 | /* fallthru */ | 794 | /* fallthru */ |
795 | case 2400: | 795 | case 2400: |
@@ -806,7 +806,7 @@ static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase) | |||
806 | 806 | ||
807 | fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; | 807 | fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; |
808 | if (fifocnt != 0) { | 808 | if (fifocnt != 0) { |
809 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", __FUNCTION__, fifocnt); | 809 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", __func__, fifocnt); |
810 | } | 810 | } |
811 | 811 | ||
812 | outw(0, iobase+VLSI_PIO_IRENABLE); | 812 | outw(0, iobase+VLSI_PIO_IRENABLE); |
@@ -830,14 +830,14 @@ static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase) | |||
830 | config ^= IRENABLE_SIR_ON; | 830 | config ^= IRENABLE_SIR_ON; |
831 | 831 | ||
832 | if (config != (IRENABLE_PHYANDCLOCK|IRENABLE_ENRXST)) { | 832 | if (config != (IRENABLE_PHYANDCLOCK|IRENABLE_ENRXST)) { |
833 | IRDA_WARNING("%s: failed to set %s mode!\n", __FUNCTION__, | 833 | IRDA_WARNING("%s: failed to set %s mode!\n", __func__, |
834 | (mode==IFF_SIR)?"SIR":((mode==IFF_MIR)?"MIR":"FIR")); | 834 | (mode==IFF_SIR)?"SIR":((mode==IFF_MIR)?"MIR":"FIR")); |
835 | ret = -1; | 835 | ret = -1; |
836 | } | 836 | } |
837 | else { | 837 | else { |
838 | if (inw(iobase+VLSI_PIO_PHYCTL) != nphyctl) { | 838 | if (inw(iobase+VLSI_PIO_PHYCTL) != nphyctl) { |
839 | IRDA_WARNING("%s: failed to apply baudrate %d\n", | 839 | IRDA_WARNING("%s: failed to apply baudrate %d\n", |
840 | __FUNCTION__, baudrate); | 840 | __func__, baudrate); |
841 | ret = -1; | 841 | ret = -1; |
842 | } | 842 | } |
843 | else { | 843 | else { |
@@ -849,7 +849,7 @@ static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase) | |||
849 | } | 849 | } |
850 | 850 | ||
851 | if (ret) | 851 | if (ret) |
852 | vlsi_reg_debug(iobase,__FUNCTION__); | 852 | vlsi_reg_debug(iobase,__func__); |
853 | 853 | ||
854 | return ret; | 854 | return ret; |
855 | } | 855 | } |
@@ -982,7 +982,7 @@ static int vlsi_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
982 | 982 | ||
983 | if (len >= r->len-5) | 983 | if (len >= r->len-5) |
984 | IRDA_WARNING("%s: possible buffer overflow with SIR wrapping!\n", | 984 | IRDA_WARNING("%s: possible buffer overflow with SIR wrapping!\n", |
985 | __FUNCTION__); | 985 | __func__); |
986 | } | 986 | } |
987 | else { | 987 | else { |
988 | /* hw deals with MIR/FIR mode wrapping */ | 988 | /* hw deals with MIR/FIR mode wrapping */ |
@@ -1027,7 +1027,7 @@ static int vlsi_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
1027 | 1027 | ||
1028 | fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; | 1028 | fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; |
1029 | if (fifocnt != 0) { | 1029 | if (fifocnt != 0) { |
1030 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", __FUNCTION__, fifocnt); | 1030 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", __func__, fifocnt); |
1031 | } | 1031 | } |
1032 | 1032 | ||
1033 | config = inw(iobase+VLSI_PIO_IRCFG); | 1033 | config = inw(iobase+VLSI_PIO_IRCFG); |
@@ -1040,7 +1040,7 @@ static int vlsi_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
1040 | 1040 | ||
1041 | if (ring_put(r) == NULL) { | 1041 | if (ring_put(r) == NULL) { |
1042 | netif_stop_queue(ndev); | 1042 | netif_stop_queue(ndev); |
1043 | IRDA_DEBUG(3, "%s: tx ring full - queue stopped\n", __FUNCTION__); | 1043 | IRDA_DEBUG(3, "%s: tx ring full - queue stopped\n", __func__); |
1044 | } | 1044 | } |
1045 | spin_unlock_irqrestore(&idev->lock, flags); | 1045 | spin_unlock_irqrestore(&idev->lock, flags); |
1046 | 1046 | ||
@@ -1049,7 +1049,7 @@ static int vlsi_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
1049 | drop_unlock: | 1049 | drop_unlock: |
1050 | spin_unlock_irqrestore(&idev->lock, flags); | 1050 | spin_unlock_irqrestore(&idev->lock, flags); |
1051 | drop: | 1051 | drop: |
1052 | IRDA_WARNING("%s: dropping packet - %s\n", __FUNCTION__, msg); | 1052 | IRDA_WARNING("%s: dropping packet - %s\n", __func__, msg); |
1053 | dev_kfree_skb_any(skb); | 1053 | dev_kfree_skb_any(skb); |
1054 | idev->stats.tx_errors++; | 1054 | idev->stats.tx_errors++; |
1055 | idev->stats.tx_dropped++; | 1055 | idev->stats.tx_dropped++; |
@@ -1106,7 +1106,7 @@ static void vlsi_tx_interrupt(struct net_device *ndev) | |||
1106 | fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; | 1106 | fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK; |
1107 | if (fifocnt != 0) { | 1107 | if (fifocnt != 0) { |
1108 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", | 1108 | IRDA_DEBUG(0, "%s: rx fifo not empty(%d)\n", |
1109 | __FUNCTION__, fifocnt); | 1109 | __func__, fifocnt); |
1110 | } | 1110 | } |
1111 | outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG); | 1111 | outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG); |
1112 | } | 1112 | } |
@@ -1115,7 +1115,7 @@ static void vlsi_tx_interrupt(struct net_device *ndev) | |||
1115 | 1115 | ||
1116 | if (netif_queue_stopped(ndev) && !idev->new_baud) { | 1116 | if (netif_queue_stopped(ndev) && !idev->new_baud) { |
1117 | netif_wake_queue(ndev); | 1117 | netif_wake_queue(ndev); |
1118 | IRDA_DEBUG(3, "%s: queue awoken\n", __FUNCTION__); | 1118 | IRDA_DEBUG(3, "%s: queue awoken\n", __func__); |
1119 | } | 1119 | } |
1120 | } | 1120 | } |
1121 | 1121 | ||
@@ -1138,7 +1138,7 @@ static void vlsi_unarm_tx(vlsi_irda_dev_t *idev) | |||
1138 | dev_kfree_skb_any(rd->skb); | 1138 | dev_kfree_skb_any(rd->skb); |
1139 | rd->skb = NULL; | 1139 | rd->skb = NULL; |
1140 | } | 1140 | } |
1141 | IRDA_DEBUG(0, "%s - dropping tx packet\n", __FUNCTION__); | 1141 | IRDA_DEBUG(0, "%s - dropping tx packet\n", __func__); |
1142 | ret = -VLSI_TX_DROP; | 1142 | ret = -VLSI_TX_DROP; |
1143 | } | 1143 | } |
1144 | else | 1144 | else |
@@ -1188,7 +1188,7 @@ static int vlsi_start_clock(struct pci_dev *pdev) | |||
1188 | if (count < 3) { | 1188 | if (count < 3) { |
1189 | if (clksrc == 1) { /* explicitly asked for PLL hence bail out */ | 1189 | if (clksrc == 1) { /* explicitly asked for PLL hence bail out */ |
1190 | IRDA_ERROR("%s: no PLL or failed to lock!\n", | 1190 | IRDA_ERROR("%s: no PLL or failed to lock!\n", |
1191 | __FUNCTION__); | 1191 | __func__); |
1192 | clkctl = CLKCTL_CLKSTP; | 1192 | clkctl = CLKCTL_CLKSTP; |
1193 | pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl); | 1193 | pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl); |
1194 | return -1; | 1194 | return -1; |
@@ -1197,7 +1197,7 @@ static int vlsi_start_clock(struct pci_dev *pdev) | |||
1197 | clksrc = 3; /* fallback to 40MHz XCLK (OB800) */ | 1197 | clksrc = 3; /* fallback to 40MHz XCLK (OB800) */ |
1198 | 1198 | ||
1199 | IRDA_DEBUG(0, "%s: PLL not locked, fallback to clksrc=%d\n", | 1199 | IRDA_DEBUG(0, "%s: PLL not locked, fallback to clksrc=%d\n", |
1200 | __FUNCTION__, clksrc); | 1200 | __func__, clksrc); |
1201 | } | 1201 | } |
1202 | else | 1202 | else |
1203 | clksrc = 1; /* got successful PLL lock */ | 1203 | clksrc = 1; /* got successful PLL lock */ |
@@ -1269,7 +1269,7 @@ static int vlsi_init_chip(struct pci_dev *pdev) | |||
1269 | /* start the clock and clean the registers */ | 1269 | /* start the clock and clean the registers */ |
1270 | 1270 | ||
1271 | if (vlsi_start_clock(pdev)) { | 1271 | if (vlsi_start_clock(pdev)) { |
1272 | IRDA_ERROR("%s: no valid clock source\n", __FUNCTION__); | 1272 | IRDA_ERROR("%s: no valid clock source\n", __func__); |
1273 | return -1; | 1273 | return -1; |
1274 | } | 1274 | } |
1275 | iobase = ndev->base_addr; | 1275 | iobase = ndev->base_addr; |
@@ -1386,7 +1386,7 @@ static void vlsi_tx_timeout(struct net_device *ndev) | |||
1386 | vlsi_irda_dev_t *idev = ndev->priv; | 1386 | vlsi_irda_dev_t *idev = ndev->priv; |
1387 | 1387 | ||
1388 | 1388 | ||
1389 | vlsi_reg_debug(ndev->base_addr, __FUNCTION__); | 1389 | vlsi_reg_debug(ndev->base_addr, __func__); |
1390 | vlsi_ring_debug(idev->tx_ring); | 1390 | vlsi_ring_debug(idev->tx_ring); |
1391 | 1391 | ||
1392 | if (netif_running(ndev)) | 1392 | if (netif_running(ndev)) |
@@ -1401,7 +1401,7 @@ static void vlsi_tx_timeout(struct net_device *ndev) | |||
1401 | 1401 | ||
1402 | if (vlsi_start_hw(idev)) | 1402 | if (vlsi_start_hw(idev)) |
1403 | IRDA_ERROR("%s: failed to restart hw - %s(%s) unusable!\n", | 1403 | IRDA_ERROR("%s: failed to restart hw - %s(%s) unusable!\n", |
1404 | __FUNCTION__, pci_name(idev->pdev), ndev->name); | 1404 | __func__, pci_name(idev->pdev), ndev->name); |
1405 | else | 1405 | else |
1406 | netif_start_queue(ndev); | 1406 | netif_start_queue(ndev); |
1407 | } | 1407 | } |
@@ -1446,7 +1446,7 @@ static int vlsi_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) | |||
1446 | break; | 1446 | break; |
1447 | default: | 1447 | default: |
1448 | IRDA_WARNING("%s: notsupp - cmd=%04x\n", | 1448 | IRDA_WARNING("%s: notsupp - cmd=%04x\n", |
1449 | __FUNCTION__, cmd); | 1449 | __func__, cmd); |
1450 | ret = -EOPNOTSUPP; | 1450 | ret = -EOPNOTSUPP; |
1451 | } | 1451 | } |
1452 | 1452 | ||
@@ -1491,7 +1491,7 @@ static irqreturn_t vlsi_interrupt(int irq, void *dev_instance) | |||
1491 | 1491 | ||
1492 | if (boguscount <= 0) | 1492 | if (boguscount <= 0) |
1493 | IRDA_MESSAGE("%s: too much work in interrupt!\n", | 1493 | IRDA_MESSAGE("%s: too much work in interrupt!\n", |
1494 | __FUNCTION__); | 1494 | __func__); |
1495 | return IRQ_RETVAL(handled); | 1495 | return IRQ_RETVAL(handled); |
1496 | } | 1496 | } |
1497 | 1497 | ||
@@ -1504,7 +1504,7 @@ static int vlsi_open(struct net_device *ndev) | |||
1504 | char hwname[32]; | 1504 | char hwname[32]; |
1505 | 1505 | ||
1506 | if (pci_request_regions(idev->pdev, drivername)) { | 1506 | if (pci_request_regions(idev->pdev, drivername)) { |
1507 | IRDA_WARNING("%s: io resource busy\n", __FUNCTION__); | 1507 | IRDA_WARNING("%s: io resource busy\n", __func__); |
1508 | goto errout; | 1508 | goto errout; |
1509 | } | 1509 | } |
1510 | ndev->base_addr = pci_resource_start(idev->pdev,0); | 1510 | ndev->base_addr = pci_resource_start(idev->pdev,0); |
@@ -1519,7 +1519,7 @@ static int vlsi_open(struct net_device *ndev) | |||
1519 | if (request_irq(ndev->irq, vlsi_interrupt, IRQF_SHARED, | 1519 | if (request_irq(ndev->irq, vlsi_interrupt, IRQF_SHARED, |
1520 | drivername, ndev)) { | 1520 | drivername, ndev)) { |
1521 | IRDA_WARNING("%s: couldn't get IRQ: %d\n", | 1521 | IRDA_WARNING("%s: couldn't get IRQ: %d\n", |
1522 | __FUNCTION__, ndev->irq); | 1522 | __func__, ndev->irq); |
1523 | goto errout_io; | 1523 | goto errout_io; |
1524 | } | 1524 | } |
1525 | 1525 | ||
@@ -1540,7 +1540,7 @@ static int vlsi_open(struct net_device *ndev) | |||
1540 | 1540 | ||
1541 | netif_start_queue(ndev); | 1541 | netif_start_queue(ndev); |
1542 | 1542 | ||
1543 | IRDA_MESSAGE("%s: device %s operational\n", __FUNCTION__, ndev->name); | 1543 | IRDA_MESSAGE("%s: device %s operational\n", __func__, ndev->name); |
1544 | 1544 | ||
1545 | return 0; | 1545 | return 0; |
1546 | 1546 | ||
@@ -1574,7 +1574,7 @@ static int vlsi_close(struct net_device *ndev) | |||
1574 | 1574 | ||
1575 | pci_release_regions(idev->pdev); | 1575 | pci_release_regions(idev->pdev); |
1576 | 1576 | ||
1577 | IRDA_MESSAGE("%s: device %s stopped\n", __FUNCTION__, ndev->name); | 1577 | IRDA_MESSAGE("%s: device %s stopped\n", __func__, ndev->name); |
1578 | 1578 | ||
1579 | return 0; | 1579 | return 0; |
1580 | } | 1580 | } |
@@ -1593,7 +1593,7 @@ static int vlsi_irda_init(struct net_device *ndev) | |||
1593 | 1593 | ||
1594 | if (pci_set_dma_mask(pdev,DMA_MASK_USED_BY_HW) | 1594 | if (pci_set_dma_mask(pdev,DMA_MASK_USED_BY_HW) |
1595 | || pci_set_dma_mask(pdev,DMA_MASK_MSTRPAGE)) { | 1595 | || pci_set_dma_mask(pdev,DMA_MASK_MSTRPAGE)) { |
1596 | IRDA_ERROR("%s: aborting due to PCI BM-DMA address limitations\n", __FUNCTION__); | 1596 | IRDA_ERROR("%s: aborting due to PCI BM-DMA address limitations\n", __func__); |
1597 | return -1; | 1597 | return -1; |
1598 | } | 1598 | } |
1599 | 1599 | ||
@@ -1645,14 +1645,14 @@ vlsi_irda_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1645 | 1645 | ||
1646 | if ( !pci_resource_start(pdev,0) | 1646 | if ( !pci_resource_start(pdev,0) |
1647 | || !(pci_resource_flags(pdev,0) & IORESOURCE_IO) ) { | 1647 | || !(pci_resource_flags(pdev,0) & IORESOURCE_IO) ) { |
1648 | IRDA_ERROR("%s: bar 0 invalid", __FUNCTION__); | 1648 | IRDA_ERROR("%s: bar 0 invalid", __func__); |
1649 | goto out_disable; | 1649 | goto out_disable; |
1650 | } | 1650 | } |
1651 | 1651 | ||
1652 | ndev = alloc_irdadev(sizeof(*idev)); | 1652 | ndev = alloc_irdadev(sizeof(*idev)); |
1653 | if (ndev==NULL) { | 1653 | if (ndev==NULL) { |
1654 | IRDA_ERROR("%s: Unable to allocate device memory.\n", | 1654 | IRDA_ERROR("%s: Unable to allocate device memory.\n", |
1655 | __FUNCTION__); | 1655 | __func__); |
1656 | goto out_disable; | 1656 | goto out_disable; |
1657 | } | 1657 | } |
1658 | 1658 | ||
@@ -1667,7 +1667,7 @@ vlsi_irda_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1667 | goto out_freedev; | 1667 | goto out_freedev; |
1668 | 1668 | ||
1669 | if (register_netdev(ndev) < 0) { | 1669 | if (register_netdev(ndev) < 0) { |
1670 | IRDA_ERROR("%s: register_netdev failed\n", __FUNCTION__); | 1670 | IRDA_ERROR("%s: register_netdev failed\n", __func__); |
1671 | goto out_freedev; | 1671 | goto out_freedev; |
1672 | } | 1672 | } |
1673 | 1673 | ||
@@ -1678,7 +1678,7 @@ vlsi_irda_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1678 | vlsi_proc_root, VLSI_PROC_FOPS, ndev); | 1678 | vlsi_proc_root, VLSI_PROC_FOPS, ndev); |
1679 | if (!ent) { | 1679 | if (!ent) { |
1680 | IRDA_WARNING("%s: failed to create proc entry\n", | 1680 | IRDA_WARNING("%s: failed to create proc entry\n", |
1681 | __FUNCTION__); | 1681 | __func__); |
1682 | } else { | 1682 | } else { |
1683 | ent->size = 0; | 1683 | ent->size = 0; |
1684 | } | 1684 | } |
@@ -1745,7 +1745,7 @@ static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1745 | 1745 | ||
1746 | if (!ndev) { | 1746 | if (!ndev) { |
1747 | IRDA_ERROR("%s - %s: no netdevice \n", | 1747 | IRDA_ERROR("%s - %s: no netdevice \n", |
1748 | __FUNCTION__, pci_name(pdev)); | 1748 | __func__, pci_name(pdev)); |
1749 | return 0; | 1749 | return 0; |
1750 | } | 1750 | } |
1751 | idev = ndev->priv; | 1751 | idev = ndev->priv; |
@@ -1756,7 +1756,7 @@ static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1756 | pdev->current_state = state.event; | 1756 | pdev->current_state = state.event; |
1757 | } | 1757 | } |
1758 | else | 1758 | else |
1759 | IRDA_ERROR("%s - %s: invalid suspend request %u -> %u\n", __FUNCTION__, pci_name(pdev), pdev->current_state, state.event); | 1759 | IRDA_ERROR("%s - %s: invalid suspend request %u -> %u\n", __func__, pci_name(pdev), pdev->current_state, state.event); |
1760 | mutex_unlock(&idev->mtx); | 1760 | mutex_unlock(&idev->mtx); |
1761 | return 0; | 1761 | return 0; |
1762 | } | 1762 | } |
@@ -1784,7 +1784,7 @@ static int vlsi_irda_resume(struct pci_dev *pdev) | |||
1784 | 1784 | ||
1785 | if (!ndev) { | 1785 | if (!ndev) { |
1786 | IRDA_ERROR("%s - %s: no netdevice \n", | 1786 | IRDA_ERROR("%s - %s: no netdevice \n", |
1787 | __FUNCTION__, pci_name(pdev)); | 1787 | __func__, pci_name(pdev)); |
1788 | return 0; | 1788 | return 0; |
1789 | } | 1789 | } |
1790 | idev = ndev->priv; | 1790 | idev = ndev->priv; |
@@ -1792,7 +1792,7 @@ static int vlsi_irda_resume(struct pci_dev *pdev) | |||
1792 | if (pdev->current_state == 0) { | 1792 | if (pdev->current_state == 0) { |
1793 | mutex_unlock(&idev->mtx); | 1793 | mutex_unlock(&idev->mtx); |
1794 | IRDA_WARNING("%s - %s: already resumed\n", | 1794 | IRDA_WARNING("%s - %s: already resumed\n", |
1795 | __FUNCTION__, pci_name(pdev)); | 1795 | __func__, pci_name(pdev)); |
1796 | return 0; | 1796 | return 0; |
1797 | } | 1797 | } |
1798 | 1798 | ||
@@ -1811,7 +1811,7 @@ static int vlsi_irda_resume(struct pci_dev *pdev) | |||
1811 | * now we explicitly set pdev->current_state = 0 after enabling the | 1811 | * now we explicitly set pdev->current_state = 0 after enabling the |
1812 | * device and independently resume_ok should catch any garbage config. | 1812 | * device and independently resume_ok should catch any garbage config. |
1813 | */ | 1813 | */ |
1814 | IRDA_WARNING("%s - hm, nothing to resume?\n", __FUNCTION__); | 1814 | IRDA_WARNING("%s - hm, nothing to resume?\n", __func__); |
1815 | mutex_unlock(&idev->mtx); | 1815 | mutex_unlock(&idev->mtx); |
1816 | return 0; | 1816 | return 0; |
1817 | } | 1817 | } |
diff --git a/drivers/net/irda/vlsi_ir.h b/drivers/net/irda/vlsi_ir.h index c8b9c74eea52..9b1884329fba 100644 --- a/drivers/net/irda/vlsi_ir.h +++ b/drivers/net/irda/vlsi_ir.h | |||
@@ -617,7 +617,7 @@ static inline void rd_set_addr_status(struct ring_descr *rd, dma_addr_t a, u8 s) | |||
617 | */ | 617 | */ |
618 | 618 | ||
619 | if ((a & ~DMA_MASK_MSTRPAGE)>>24 != MSTRPAGE_VALUE) { | 619 | if ((a & ~DMA_MASK_MSTRPAGE)>>24 != MSTRPAGE_VALUE) { |
620 | IRDA_ERROR("%s: pci busaddr inconsistency!\n", __FUNCTION__); | 620 | IRDA_ERROR("%s: pci busaddr inconsistency!\n", __func__); |
621 | dump_stack(); | 621 | dump_stack(); |
622 | return; | 622 | return; |
623 | } | 623 | } |
diff --git a/drivers/net/irda/w83977af_ir.c b/drivers/net/irda/w83977af_ir.c index 9fd2451b0fb2..002a6d769f21 100644 --- a/drivers/net/irda/w83977af_ir.c +++ b/drivers/net/irda/w83977af_ir.c | |||
@@ -114,7 +114,7 @@ static int __init w83977af_init(void) | |||
114 | { | 114 | { |
115 | int i; | 115 | int i; |
116 | 116 | ||
117 | IRDA_DEBUG(0, "%s()\n", __FUNCTION__ ); | 117 | IRDA_DEBUG(0, "%s()\n", __func__ ); |
118 | 118 | ||
119 | for (i=0; (io[i] < 2000) && (i < ARRAY_SIZE(dev_self)); i++) { | 119 | for (i=0; (io[i] < 2000) && (i < ARRAY_SIZE(dev_self)); i++) { |
120 | if (w83977af_open(i, io[i], irq[i], dma[i]) == 0) | 120 | if (w83977af_open(i, io[i], irq[i], dma[i]) == 0) |
@@ -133,7 +133,7 @@ static void __exit w83977af_cleanup(void) | |||
133 | { | 133 | { |
134 | int i; | 134 | int i; |
135 | 135 | ||
136 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__ ); | 136 | IRDA_DEBUG(4, "%s()\n", __func__ ); |
137 | 137 | ||
138 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { | 138 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
139 | if (dev_self[i]) | 139 | if (dev_self[i]) |
@@ -154,12 +154,12 @@ int w83977af_open(int i, unsigned int iobase, unsigned int irq, | |||
154 | struct w83977af_ir *self; | 154 | struct w83977af_ir *self; |
155 | int err; | 155 | int err; |
156 | 156 | ||
157 | IRDA_DEBUG(0, "%s()\n", __FUNCTION__ ); | 157 | IRDA_DEBUG(0, "%s()\n", __func__ ); |
158 | 158 | ||
159 | /* Lock the port that we need */ | 159 | /* Lock the port that we need */ |
160 | if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) { | 160 | if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) { |
161 | IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n", | 161 | IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n", |
162 | __FUNCTION__ , iobase); | 162 | __func__ , iobase); |
163 | return -ENODEV; | 163 | return -ENODEV; |
164 | } | 164 | } |
165 | 165 | ||
@@ -241,7 +241,7 @@ int w83977af_open(int i, unsigned int iobase, unsigned int irq, | |||
241 | 241 | ||
242 | err = register_netdev(dev); | 242 | err = register_netdev(dev); |
243 | if (err) { | 243 | if (err) { |
244 | IRDA_ERROR("%s(), register_netdevice() failed!\n", __FUNCTION__); | 244 | IRDA_ERROR("%s(), register_netdevice() failed!\n", __func__); |
245 | goto err_out3; | 245 | goto err_out3; |
246 | } | 246 | } |
247 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | 247 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); |
@@ -273,7 +273,7 @@ static int w83977af_close(struct w83977af_ir *self) | |||
273 | { | 273 | { |
274 | int iobase; | 274 | int iobase; |
275 | 275 | ||
276 | IRDA_DEBUG(0, "%s()\n", __FUNCTION__ ); | 276 | IRDA_DEBUG(0, "%s()\n", __func__ ); |
277 | 277 | ||
278 | iobase = self->io.fir_base; | 278 | iobase = self->io.fir_base; |
279 | 279 | ||
@@ -294,7 +294,7 @@ static int w83977af_close(struct w83977af_ir *self) | |||
294 | 294 | ||
295 | /* Release the PORT that this driver is using */ | 295 | /* Release the PORT that this driver is using */ |
296 | IRDA_DEBUG(0 , "%s(), Releasing Region %03x\n", | 296 | IRDA_DEBUG(0 , "%s(), Releasing Region %03x\n", |
297 | __FUNCTION__ , self->io.fir_base); | 297 | __func__ , self->io.fir_base); |
298 | release_region(self->io.fir_base, self->io.fir_ext); | 298 | release_region(self->io.fir_base, self->io.fir_ext); |
299 | 299 | ||
300 | if (self->tx_buff.head) | 300 | if (self->tx_buff.head) |
@@ -316,7 +316,7 @@ int w83977af_probe( int iobase, int irq, int dma) | |||
316 | int i; | 316 | int i; |
317 | 317 | ||
318 | for (i=0; i < 2; i++) { | 318 | for (i=0; i < 2; i++) { |
319 | IRDA_DEBUG( 0, "%s()\n", __FUNCTION__ ); | 319 | IRDA_DEBUG( 0, "%s()\n", __func__ ); |
320 | #ifdef CONFIG_USE_W977_PNP | 320 | #ifdef CONFIG_USE_W977_PNP |
321 | /* Enter PnP configuration mode */ | 321 | /* Enter PnP configuration mode */ |
322 | w977_efm_enter(efbase[i]); | 322 | w977_efm_enter(efbase[i]); |
@@ -403,7 +403,7 @@ int w83977af_probe( int iobase, int irq, int dma) | |||
403 | return 0; | 403 | return 0; |
404 | } else { | 404 | } else { |
405 | /* Try next extented function register address */ | 405 | /* Try next extented function register address */ |
406 | IRDA_DEBUG( 0, "%s(), Wrong chip version", __FUNCTION__ ); | 406 | IRDA_DEBUG( 0, "%s(), Wrong chip version", __func__ ); |
407 | } | 407 | } |
408 | } | 408 | } |
409 | return -1; | 409 | return -1; |
@@ -439,19 +439,19 @@ void w83977af_change_speed(struct w83977af_ir *self, __u32 speed) | |||
439 | case 115200: outb(0x01, iobase+ABLL); break; | 439 | case 115200: outb(0x01, iobase+ABLL); break; |
440 | case 576000: | 440 | case 576000: |
441 | ir_mode = HCR_MIR_576; | 441 | ir_mode = HCR_MIR_576; |
442 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__ ); | 442 | IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__ ); |
443 | break; | 443 | break; |
444 | case 1152000: | 444 | case 1152000: |
445 | ir_mode = HCR_MIR_1152; | 445 | ir_mode = HCR_MIR_1152; |
446 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__ ); | 446 | IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__ ); |
447 | break; | 447 | break; |
448 | case 4000000: | 448 | case 4000000: |
449 | ir_mode = HCR_FIR; | 449 | ir_mode = HCR_FIR; |
450 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__ ); | 450 | IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__ ); |
451 | break; | 451 | break; |
452 | default: | 452 | default: |
453 | ir_mode = HCR_FIR; | 453 | ir_mode = HCR_FIR; |
454 | IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", __FUNCTION__ , speed); | 454 | IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", __func__ , speed); |
455 | break; | 455 | break; |
456 | } | 456 | } |
457 | 457 | ||
@@ -501,7 +501,7 @@ int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
501 | 501 | ||
502 | iobase = self->io.fir_base; | 502 | iobase = self->io.fir_base; |
503 | 503 | ||
504 | IRDA_DEBUG(4, "%s(%ld), skb->len=%d\n", __FUNCTION__ , jiffies, | 504 | IRDA_DEBUG(4, "%s(%ld), skb->len=%d\n", __func__ , jiffies, |
505 | (int) skb->len); | 505 | (int) skb->len); |
506 | 506 | ||
507 | /* Lock transmit buffer */ | 507 | /* Lock transmit buffer */ |
@@ -549,7 +549,7 @@ int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |||
549 | outb(ICR_ETMRI, iobase+ICR); | 549 | outb(ICR_ETMRI, iobase+ICR); |
550 | } else { | 550 | } else { |
551 | #endif | 551 | #endif |
552 | IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __FUNCTION__ , jiffies, mtt); | 552 | IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __func__ , jiffies, mtt); |
553 | if (mtt) | 553 | if (mtt) |
554 | udelay(mtt); | 554 | udelay(mtt); |
555 | 555 | ||
@@ -591,7 +591,7 @@ static void w83977af_dma_write(struct w83977af_ir *self, int iobase) | |||
591 | unsigned long flags; | 591 | unsigned long flags; |
592 | __u8 hcr; | 592 | __u8 hcr; |
593 | #endif | 593 | #endif |
594 | IRDA_DEBUG(4, "%s(), len=%d\n", __FUNCTION__ , self->tx_buff.len); | 594 | IRDA_DEBUG(4, "%s(), len=%d\n", __func__ , self->tx_buff.len); |
595 | 595 | ||
596 | /* Save current set */ | 596 | /* Save current set */ |
597 | set = inb(iobase+SSR); | 597 | set = inb(iobase+SSR); |
@@ -643,7 +643,7 @@ static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
643 | int actual = 0; | 643 | int actual = 0; |
644 | __u8 set; | 644 | __u8 set; |
645 | 645 | ||
646 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__ ); | 646 | IRDA_DEBUG(4, "%s()\n", __func__ ); |
647 | 647 | ||
648 | /* Save current bank */ | 648 | /* Save current bank */ |
649 | set = inb(iobase+SSR); | 649 | set = inb(iobase+SSR); |
@@ -651,11 +651,11 @@ static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
651 | switch_bank(iobase, SET0); | 651 | switch_bank(iobase, SET0); |
652 | if (!(inb_p(iobase+USR) & USR_TSRE)) { | 652 | if (!(inb_p(iobase+USR) & USR_TSRE)) { |
653 | IRDA_DEBUG(4, | 653 | IRDA_DEBUG(4, |
654 | "%s(), warning, FIFO not empty yet!\n", __FUNCTION__ ); | 654 | "%s(), warning, FIFO not empty yet!\n", __func__ ); |
655 | 655 | ||
656 | fifo_size -= 17; | 656 | fifo_size -= 17; |
657 | IRDA_DEBUG(4, "%s(), %d bytes left in tx fifo\n", | 657 | IRDA_DEBUG(4, "%s(), %d bytes left in tx fifo\n", |
658 | __FUNCTION__ , fifo_size); | 658 | __func__ , fifo_size); |
659 | } | 659 | } |
660 | 660 | ||
661 | /* Fill FIFO with current frame */ | 661 | /* Fill FIFO with current frame */ |
@@ -665,7 +665,7 @@ static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size) | |||
665 | } | 665 | } |
666 | 666 | ||
667 | IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", | 667 | IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n", |
668 | __FUNCTION__ , fifo_size, actual, len); | 668 | __func__ , fifo_size, actual, len); |
669 | 669 | ||
670 | /* Restore bank */ | 670 | /* Restore bank */ |
671 | outb(set, iobase+SSR); | 671 | outb(set, iobase+SSR); |
@@ -685,7 +685,7 @@ static void w83977af_dma_xmit_complete(struct w83977af_ir *self) | |||
685 | int iobase; | 685 | int iobase; |
686 | __u8 set; | 686 | __u8 set; |
687 | 687 | ||
688 | IRDA_DEBUG(4, "%s(%ld)\n", __FUNCTION__ , jiffies); | 688 | IRDA_DEBUG(4, "%s(%ld)\n", __func__ , jiffies); |
689 | 689 | ||
690 | IRDA_ASSERT(self != NULL, return;); | 690 | IRDA_ASSERT(self != NULL, return;); |
691 | 691 | ||
@@ -700,7 +700,7 @@ static void w83977af_dma_xmit_complete(struct w83977af_ir *self) | |||
700 | 700 | ||
701 | /* Check for underrrun! */ | 701 | /* Check for underrrun! */ |
702 | if (inb(iobase+AUDR) & AUDR_UNDR) { | 702 | if (inb(iobase+AUDR) & AUDR_UNDR) { |
703 | IRDA_DEBUG(0, "%s(), Transmit underrun!\n", __FUNCTION__ ); | 703 | IRDA_DEBUG(0, "%s(), Transmit underrun!\n", __func__ ); |
704 | 704 | ||
705 | self->stats.tx_errors++; | 705 | self->stats.tx_errors++; |
706 | self->stats.tx_fifo_errors++; | 706 | self->stats.tx_fifo_errors++; |
@@ -741,7 +741,7 @@ int w83977af_dma_receive(struct w83977af_ir *self) | |||
741 | #endif | 741 | #endif |
742 | IRDA_ASSERT(self != NULL, return -1;); | 742 | IRDA_ASSERT(self != NULL, return -1;); |
743 | 743 | ||
744 | IRDA_DEBUG(4, "%s\n", __FUNCTION__ ); | 744 | IRDA_DEBUG(4, "%s\n", __func__ ); |
745 | 745 | ||
746 | iobase= self->io.fir_base; | 746 | iobase= self->io.fir_base; |
747 | 747 | ||
@@ -812,7 +812,7 @@ int w83977af_dma_receive_complete(struct w83977af_ir *self) | |||
812 | __u8 set; | 812 | __u8 set; |
813 | __u8 status; | 813 | __u8 status; |
814 | 814 | ||
815 | IRDA_DEBUG(4, "%s\n", __FUNCTION__ ); | 815 | IRDA_DEBUG(4, "%s\n", __func__ ); |
816 | 816 | ||
817 | st_fifo = &self->st_fifo; | 817 | st_fifo = &self->st_fifo; |
818 | 818 | ||
@@ -892,7 +892,7 @@ int w83977af_dma_receive_complete(struct w83977af_ir *self) | |||
892 | skb = dev_alloc_skb(len+1); | 892 | skb = dev_alloc_skb(len+1); |
893 | if (skb == NULL) { | 893 | if (skb == NULL) { |
894 | printk(KERN_INFO | 894 | printk(KERN_INFO |
895 | "%s(), memory squeeze, dropping frame.\n", __FUNCTION__); | 895 | "%s(), memory squeeze, dropping frame.\n", __func__); |
896 | /* Restore set register */ | 896 | /* Restore set register */ |
897 | outb(set, iobase+SSR); | 897 | outb(set, iobase+SSR); |
898 | 898 | ||
@@ -943,7 +943,7 @@ static void w83977af_pio_receive(struct w83977af_ir *self) | |||
943 | __u8 byte = 0x00; | 943 | __u8 byte = 0x00; |
944 | int iobase; | 944 | int iobase; |
945 | 945 | ||
946 | IRDA_DEBUG(4, "%s()\n", __FUNCTION__ ); | 946 | IRDA_DEBUG(4, "%s()\n", __func__ ); |
947 | 947 | ||
948 | IRDA_ASSERT(self != NULL, return;); | 948 | IRDA_ASSERT(self != NULL, return;); |
949 | 949 | ||
@@ -970,7 +970,7 @@ static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr) | |||
970 | __u8 set; | 970 | __u8 set; |
971 | int iobase; | 971 | int iobase; |
972 | 972 | ||
973 | IRDA_DEBUG(4, "%s(), isr=%#x\n", __FUNCTION__ , isr); | 973 | IRDA_DEBUG(4, "%s(), isr=%#x\n", __func__ , isr); |
974 | 974 | ||
975 | iobase = self->io.fir_base; | 975 | iobase = self->io.fir_base; |
976 | /* Transmit FIFO low on data */ | 976 | /* Transmit FIFO low on data */ |
@@ -1007,7 +1007,7 @@ static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr) | |||
1007 | /* Check if we need to change the speed? */ | 1007 | /* Check if we need to change the speed? */ |
1008 | if (self->new_speed) { | 1008 | if (self->new_speed) { |
1009 | IRDA_DEBUG(2, | 1009 | IRDA_DEBUG(2, |
1010 | "%s(), Changing speed!\n", __FUNCTION__ ); | 1010 | "%s(), Changing speed!\n", __func__ ); |
1011 | w83977af_change_speed(self, self->new_speed); | 1011 | w83977af_change_speed(self, self->new_speed); |
1012 | self->new_speed = 0; | 1012 | self->new_speed = 0; |
1013 | } | 1013 | } |
@@ -1189,7 +1189,7 @@ static int w83977af_net_open(struct net_device *dev) | |||
1189 | char hwname[32]; | 1189 | char hwname[32]; |
1190 | __u8 set; | 1190 | __u8 set; |
1191 | 1191 | ||
1192 | IRDA_DEBUG(0, "%s()\n", __FUNCTION__ ); | 1192 | IRDA_DEBUG(0, "%s()\n", __func__ ); |
1193 | 1193 | ||
1194 | IRDA_ASSERT(dev != NULL, return -1;); | 1194 | IRDA_ASSERT(dev != NULL, return -1;); |
1195 | self = (struct w83977af_ir *) dev->priv; | 1195 | self = (struct w83977af_ir *) dev->priv; |
@@ -1252,7 +1252,7 @@ static int w83977af_net_close(struct net_device *dev) | |||
1252 | int iobase; | 1252 | int iobase; |
1253 | __u8 set; | 1253 | __u8 set; |
1254 | 1254 | ||
1255 | IRDA_DEBUG(0, "%s()\n", __FUNCTION__ ); | 1255 | IRDA_DEBUG(0, "%s()\n", __func__ ); |
1256 | 1256 | ||
1257 | IRDA_ASSERT(dev != NULL, return -1;); | 1257 | IRDA_ASSERT(dev != NULL, return -1;); |
1258 | 1258 | ||
@@ -1307,7 +1307,7 @@ static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
1307 | 1307 | ||
1308 | IRDA_ASSERT(self != NULL, return -1;); | 1308 | IRDA_ASSERT(self != NULL, return -1;); |
1309 | 1309 | ||
1310 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__ , dev->name, cmd); | 1310 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd); |
1311 | 1311 | ||
1312 | spin_lock_irqsave(&self->lock, flags); | 1312 | spin_lock_irqsave(&self->lock, flags); |
1313 | 1313 | ||
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 8a97a0066a88..46819af3b062 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -55,7 +55,7 @@ | |||
55 | #include <asm/system.h> | 55 | #include <asm/system.h> |
56 | 56 | ||
57 | static char mv643xx_eth_driver_name[] = "mv643xx_eth"; | 57 | static char mv643xx_eth_driver_name[] = "mv643xx_eth"; |
58 | static char mv643xx_eth_driver_version[] = "1.1"; | 58 | static char mv643xx_eth_driver_version[] = "1.2"; |
59 | 59 | ||
60 | #define MV643XX_ETH_CHECKSUM_OFFLOAD_TX | 60 | #define MV643XX_ETH_CHECKSUM_OFFLOAD_TX |
61 | #define MV643XX_ETH_NAPI | 61 | #define MV643XX_ETH_NAPI |
@@ -90,12 +90,21 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
90 | #define PORT_SERIAL_CONTROL(p) (0x043c + ((p) << 10)) | 90 | #define PORT_SERIAL_CONTROL(p) (0x043c + ((p) << 10)) |
91 | #define PORT_STATUS(p) (0x0444 + ((p) << 10)) | 91 | #define PORT_STATUS(p) (0x0444 + ((p) << 10)) |
92 | #define TX_FIFO_EMPTY 0x00000400 | 92 | #define TX_FIFO_EMPTY 0x00000400 |
93 | #define TX_IN_PROGRESS 0x00000080 | ||
94 | #define PORT_SPEED_MASK 0x00000030 | ||
95 | #define PORT_SPEED_1000 0x00000010 | ||
96 | #define PORT_SPEED_100 0x00000020 | ||
97 | #define PORT_SPEED_10 0x00000000 | ||
98 | #define FLOW_CONTROL_ENABLED 0x00000008 | ||
99 | #define FULL_DUPLEX 0x00000004 | ||
100 | #define LINK_UP 0x00000002 | ||
93 | #define TXQ_COMMAND(p) (0x0448 + ((p) << 10)) | 101 | #define TXQ_COMMAND(p) (0x0448 + ((p) << 10)) |
94 | #define TXQ_FIX_PRIO_CONF(p) (0x044c + ((p) << 10)) | 102 | #define TXQ_FIX_PRIO_CONF(p) (0x044c + ((p) << 10)) |
95 | #define TX_BW_RATE(p) (0x0450 + ((p) << 10)) | 103 | #define TX_BW_RATE(p) (0x0450 + ((p) << 10)) |
96 | #define TX_BW_MTU(p) (0x0458 + ((p) << 10)) | 104 | #define TX_BW_MTU(p) (0x0458 + ((p) << 10)) |
97 | #define TX_BW_BURST(p) (0x045c + ((p) << 10)) | 105 | #define TX_BW_BURST(p) (0x045c + ((p) << 10)) |
98 | #define INT_CAUSE(p) (0x0460 + ((p) << 10)) | 106 | #define INT_CAUSE(p) (0x0460 + ((p) << 10)) |
107 | #define INT_TX_END_0 0x00080000 | ||
99 | #define INT_TX_END 0x07f80000 | 108 | #define INT_TX_END 0x07f80000 |
100 | #define INT_RX 0x0007fbfc | 109 | #define INT_RX 0x0007fbfc |
101 | #define INT_EXT 0x00000002 | 110 | #define INT_EXT 0x00000002 |
@@ -127,21 +136,21 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
127 | /* | 136 | /* |
128 | * SDMA configuration register. | 137 | * SDMA configuration register. |
129 | */ | 138 | */ |
130 | #define RX_BURST_SIZE_4_64BIT (2 << 1) | 139 | #define RX_BURST_SIZE_16_64BIT (4 << 1) |
131 | #define BLM_RX_NO_SWAP (1 << 4) | 140 | #define BLM_RX_NO_SWAP (1 << 4) |
132 | #define BLM_TX_NO_SWAP (1 << 5) | 141 | #define BLM_TX_NO_SWAP (1 << 5) |
133 | #define TX_BURST_SIZE_4_64BIT (2 << 22) | 142 | #define TX_BURST_SIZE_16_64BIT (4 << 22) |
134 | 143 | ||
135 | #if defined(__BIG_ENDIAN) | 144 | #if defined(__BIG_ENDIAN) |
136 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 145 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
137 | RX_BURST_SIZE_4_64BIT | \ | 146 | RX_BURST_SIZE_16_64BIT | \ |
138 | TX_BURST_SIZE_4_64BIT | 147 | TX_BURST_SIZE_16_64BIT |
139 | #elif defined(__LITTLE_ENDIAN) | 148 | #elif defined(__LITTLE_ENDIAN) |
140 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 149 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
141 | RX_BURST_SIZE_4_64BIT | \ | 150 | RX_BURST_SIZE_16_64BIT | \ |
142 | BLM_RX_NO_SWAP | \ | 151 | BLM_RX_NO_SWAP | \ |
143 | BLM_TX_NO_SWAP | \ | 152 | BLM_TX_NO_SWAP | \ |
144 | TX_BURST_SIZE_4_64BIT | 153 | TX_BURST_SIZE_16_64BIT |
145 | #else | 154 | #else |
146 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined | 155 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined |
147 | #endif | 156 | #endif |
@@ -153,9 +162,7 @@ static char mv643xx_eth_driver_version[] = "1.1"; | |||
153 | #define SET_MII_SPEED_TO_100 (1 << 24) | 162 | #define SET_MII_SPEED_TO_100 (1 << 24) |
154 | #define SET_GMII_SPEED_TO_1000 (1 << 23) | 163 | #define SET_GMII_SPEED_TO_1000 (1 << 23) |
155 | #define SET_FULL_DUPLEX_MODE (1 << 21) | 164 | #define SET_FULL_DUPLEX_MODE (1 << 21) |
156 | #define MAX_RX_PACKET_1522BYTE (1 << 17) | ||
157 | #define MAX_RX_PACKET_9700BYTE (5 << 17) | 165 | #define MAX_RX_PACKET_9700BYTE (5 << 17) |
158 | #define MAX_RX_PACKET_MASK (7 << 17) | ||
159 | #define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13) | 166 | #define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13) |
160 | #define DO_NOT_FORCE_LINK_FAIL (1 << 10) | 167 | #define DO_NOT_FORCE_LINK_FAIL (1 << 10) |
161 | #define SERIAL_PORT_CONTROL_RESERVED (1 << 9) | 168 | #define SERIAL_PORT_CONTROL_RESERVED (1 << 9) |
@@ -228,6 +235,8 @@ struct tx_desc { | |||
228 | #define GEN_IP_V4_CHECKSUM 0x00040000 | 235 | #define GEN_IP_V4_CHECKSUM 0x00040000 |
229 | #define GEN_TCP_UDP_CHECKSUM 0x00020000 | 236 | #define GEN_TCP_UDP_CHECKSUM 0x00020000 |
230 | #define UDP_FRAME 0x00010000 | 237 | #define UDP_FRAME 0x00010000 |
238 | #define MAC_HDR_EXTRA_4_BYTES 0x00008000 | ||
239 | #define MAC_HDR_EXTRA_8_BYTES 0x00000200 | ||
231 | 240 | ||
232 | #define TX_IHL_SHIFT 11 | 241 | #define TX_IHL_SHIFT 11 |
233 | 242 | ||
@@ -404,6 +413,17 @@ static void rxq_disable(struct rx_queue *rxq) | |||
404 | udelay(10); | 413 | udelay(10); |
405 | } | 414 | } |
406 | 415 | ||
416 | static void txq_reset_hw_ptr(struct tx_queue *txq) | ||
417 | { | ||
418 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | ||
419 | int off = TXQ_CURRENT_DESC_PTR(mp->port_num, txq->index); | ||
420 | u32 addr; | ||
421 | |||
422 | addr = (u32)txq->tx_desc_dma; | ||
423 | addr += txq->tx_curr_desc * sizeof(struct tx_desc); | ||
424 | wrl(mp, off, addr); | ||
425 | } | ||
426 | |||
407 | static void txq_enable(struct tx_queue *txq) | 427 | static void txq_enable(struct tx_queue *txq) |
408 | { | 428 | { |
409 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | 429 | struct mv643xx_eth_private *mp = txq_to_mp(txq); |
@@ -614,6 +634,12 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget) | |||
614 | for (i = 0; i < 8; i++) | 634 | for (i = 0; i < 8; i++) |
615 | if (mp->txq_mask & (1 << i)) | 635 | if (mp->txq_mask & (1 << i)) |
616 | txq_reclaim(mp->txq + i, 0); | 636 | txq_reclaim(mp->txq + i, 0); |
637 | |||
638 | if (netif_carrier_ok(mp->dev)) { | ||
639 | spin_lock(&mp->lock); | ||
640 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
641 | spin_unlock(&mp->lock); | ||
642 | } | ||
617 | } | 643 | } |
618 | #endif | 644 | #endif |
619 | 645 | ||
@@ -706,6 +732,7 @@ static inline __be16 sum16_as_be(__sum16 sum) | |||
706 | 732 | ||
707 | static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | 733 | static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) |
708 | { | 734 | { |
735 | struct mv643xx_eth_private *mp = txq_to_mp(txq); | ||
709 | int nr_frags = skb_shinfo(skb)->nr_frags; | 736 | int nr_frags = skb_shinfo(skb)->nr_frags; |
710 | int tx_index; | 737 | int tx_index; |
711 | struct tx_desc *desc; | 738 | struct tx_desc *desc; |
@@ -732,12 +759,36 @@ static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | |||
732 | desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); | 759 | desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); |
733 | 760 | ||
734 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 761 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
735 | BUG_ON(skb->protocol != htons(ETH_P_IP)); | 762 | int mac_hdr_len; |
763 | |||
764 | BUG_ON(skb->protocol != htons(ETH_P_IP) && | ||
765 | skb->protocol != htons(ETH_P_8021Q)); | ||
736 | 766 | ||
737 | cmd_sts |= GEN_TCP_UDP_CHECKSUM | | 767 | cmd_sts |= GEN_TCP_UDP_CHECKSUM | |
738 | GEN_IP_V4_CHECKSUM | | 768 | GEN_IP_V4_CHECKSUM | |
739 | ip_hdr(skb)->ihl << TX_IHL_SHIFT; | 769 | ip_hdr(skb)->ihl << TX_IHL_SHIFT; |
740 | 770 | ||
771 | mac_hdr_len = (void *)ip_hdr(skb) - (void *)skb->data; | ||
772 | switch (mac_hdr_len - ETH_HLEN) { | ||
773 | case 0: | ||
774 | break; | ||
775 | case 4: | ||
776 | cmd_sts |= MAC_HDR_EXTRA_4_BYTES; | ||
777 | break; | ||
778 | case 8: | ||
779 | cmd_sts |= MAC_HDR_EXTRA_8_BYTES; | ||
780 | break; | ||
781 | case 12: | ||
782 | cmd_sts |= MAC_HDR_EXTRA_4_BYTES; | ||
783 | cmd_sts |= MAC_HDR_EXTRA_8_BYTES; | ||
784 | break; | ||
785 | default: | ||
786 | if (net_ratelimit()) | ||
787 | dev_printk(KERN_ERR, &txq_to_mp(txq)->dev->dev, | ||
788 | "mac header length is %d?!\n", mac_hdr_len); | ||
789 | break; | ||
790 | } | ||
791 | |||
741 | switch (ip_hdr(skb)->protocol) { | 792 | switch (ip_hdr(skb)->protocol) { |
742 | case IPPROTO_UDP: | 793 | case IPPROTO_UDP: |
743 | cmd_sts |= UDP_FRAME; | 794 | cmd_sts |= UDP_FRAME; |
@@ -759,6 +810,10 @@ static void txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb) | |||
759 | wmb(); | 810 | wmb(); |
760 | desc->cmd_sts = cmd_sts; | 811 | desc->cmd_sts = cmd_sts; |
761 | 812 | ||
813 | /* clear TX_END interrupt status */ | ||
814 | wrl(mp, INT_CAUSE(mp->port_num), ~(INT_TX_END_0 << txq->index)); | ||
815 | rdl(mp, INT_CAUSE(mp->port_num)); | ||
816 | |||
762 | /* ensure all descriptors are written before poking hardware */ | 817 | /* ensure all descriptors are written before poking hardware */ |
763 | wmb(); | 818 | wmb(); |
764 | txq_enable(txq); | 819 | txq_enable(txq); |
@@ -1112,10 +1167,28 @@ static int mv643xx_eth_get_settings(struct net_device *dev, struct ethtool_cmd * | |||
1112 | 1167 | ||
1113 | static int mv643xx_eth_get_settings_phyless(struct net_device *dev, struct ethtool_cmd *cmd) | 1168 | static int mv643xx_eth_get_settings_phyless(struct net_device *dev, struct ethtool_cmd *cmd) |
1114 | { | 1169 | { |
1170 | struct mv643xx_eth_private *mp = netdev_priv(dev); | ||
1171 | u32 port_status; | ||
1172 | |||
1173 | port_status = rdl(mp, PORT_STATUS(mp->port_num)); | ||
1174 | |||
1115 | cmd->supported = SUPPORTED_MII; | 1175 | cmd->supported = SUPPORTED_MII; |
1116 | cmd->advertising = ADVERTISED_MII; | 1176 | cmd->advertising = ADVERTISED_MII; |
1117 | cmd->speed = SPEED_1000; | 1177 | switch (port_status & PORT_SPEED_MASK) { |
1118 | cmd->duplex = DUPLEX_FULL; | 1178 | case PORT_SPEED_10: |
1179 | cmd->speed = SPEED_10; | ||
1180 | break; | ||
1181 | case PORT_SPEED_100: | ||
1182 | cmd->speed = SPEED_100; | ||
1183 | break; | ||
1184 | case PORT_SPEED_1000: | ||
1185 | cmd->speed = SPEED_1000; | ||
1186 | break; | ||
1187 | default: | ||
1188 | cmd->speed = -1; | ||
1189 | break; | ||
1190 | } | ||
1191 | cmd->duplex = (port_status & FULL_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF; | ||
1119 | cmd->port = PORT_MII; | 1192 | cmd->port = PORT_MII; |
1120 | cmd->phy_address = 0; | 1193 | cmd->phy_address = 0; |
1121 | cmd->transceiver = XCVR_INTERNAL; | 1194 | cmd->transceiver = XCVR_INTERNAL; |
@@ -1539,8 +1612,11 @@ static int txq_init(struct mv643xx_eth_private *mp, int index) | |||
1539 | 1612 | ||
1540 | tx_desc = (struct tx_desc *)txq->tx_desc_area; | 1613 | tx_desc = (struct tx_desc *)txq->tx_desc_area; |
1541 | for (i = 0; i < txq->tx_ring_size; i++) { | 1614 | for (i = 0; i < txq->tx_ring_size; i++) { |
1615 | struct tx_desc *txd = tx_desc + i; | ||
1542 | int nexti = (i + 1) % txq->tx_ring_size; | 1616 | int nexti = (i + 1) % txq->tx_ring_size; |
1543 | tx_desc[i].next_desc_ptr = txq->tx_desc_dma + | 1617 | |
1618 | txd->cmd_sts = 0; | ||
1619 | txd->next_desc_ptr = txq->tx_desc_dma + | ||
1544 | nexti * sizeof(struct tx_desc); | 1620 | nexti * sizeof(struct tx_desc); |
1545 | } | 1621 | } |
1546 | 1622 | ||
@@ -1577,8 +1653,11 @@ static void txq_reclaim(struct tx_queue *txq, int force) | |||
1577 | desc = &txq->tx_desc_area[tx_index]; | 1653 | desc = &txq->tx_desc_area[tx_index]; |
1578 | cmd_sts = desc->cmd_sts; | 1654 | cmd_sts = desc->cmd_sts; |
1579 | 1655 | ||
1580 | if (!force && (cmd_sts & BUFFER_OWNED_BY_DMA)) | 1656 | if (cmd_sts & BUFFER_OWNED_BY_DMA) { |
1581 | break; | 1657 | if (!force) |
1658 | break; | ||
1659 | desc->cmd_sts = cmd_sts & ~BUFFER_OWNED_BY_DMA; | ||
1660 | } | ||
1582 | 1661 | ||
1583 | txq->tx_used_desc = (tx_index + 1) % txq->tx_ring_size; | 1662 | txq->tx_used_desc = (tx_index + 1) % txq->tx_ring_size; |
1584 | txq->tx_desc_count--; | 1663 | txq->tx_desc_count--; |
@@ -1632,49 +1711,61 @@ static void txq_deinit(struct tx_queue *txq) | |||
1632 | 1711 | ||
1633 | 1712 | ||
1634 | /* netdev ops and related ***************************************************/ | 1713 | /* netdev ops and related ***************************************************/ |
1635 | static void update_pscr(struct mv643xx_eth_private *mp, int speed, int duplex) | 1714 | static void handle_link_event(struct mv643xx_eth_private *mp) |
1636 | { | 1715 | { |
1637 | u32 pscr_o; | 1716 | struct net_device *dev = mp->dev; |
1638 | u32 pscr_n; | 1717 | u32 port_status; |
1639 | 1718 | int speed; | |
1640 | pscr_o = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | 1719 | int duplex; |
1720 | int fc; | ||
1721 | |||
1722 | port_status = rdl(mp, PORT_STATUS(mp->port_num)); | ||
1723 | if (!(port_status & LINK_UP)) { | ||
1724 | if (netif_carrier_ok(dev)) { | ||
1725 | int i; | ||
1641 | 1726 | ||
1642 | /* clear speed, duplex and rx buffer size fields */ | 1727 | printk(KERN_INFO "%s: link down\n", dev->name); |
1643 | pscr_n = pscr_o & ~(SET_MII_SPEED_TO_100 | | ||
1644 | SET_GMII_SPEED_TO_1000 | | ||
1645 | SET_FULL_DUPLEX_MODE | | ||
1646 | MAX_RX_PACKET_MASK); | ||
1647 | 1728 | ||
1648 | if (speed == SPEED_1000) { | 1729 | netif_carrier_off(dev); |
1649 | pscr_n |= SET_GMII_SPEED_TO_1000 | MAX_RX_PACKET_9700BYTE; | 1730 | netif_stop_queue(dev); |
1650 | } else { | ||
1651 | if (speed == SPEED_100) | ||
1652 | pscr_n |= SET_MII_SPEED_TO_100; | ||
1653 | pscr_n |= MAX_RX_PACKET_1522BYTE; | ||
1654 | } | ||
1655 | 1731 | ||
1656 | if (duplex == DUPLEX_FULL) | 1732 | for (i = 0; i < 8; i++) { |
1657 | pscr_n |= SET_FULL_DUPLEX_MODE; | 1733 | struct tx_queue *txq = mp->txq + i; |
1658 | 1734 | ||
1659 | if (pscr_n != pscr_o) { | 1735 | if (mp->txq_mask & (1 << i)) { |
1660 | if ((pscr_o & SERIAL_PORT_ENABLE) == 0) | 1736 | txq_reclaim(txq, 1); |
1661 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1737 | txq_reset_hw_ptr(txq); |
1662 | else { | 1738 | } |
1663 | int i; | 1739 | } |
1740 | } | ||
1741 | return; | ||
1742 | } | ||
1664 | 1743 | ||
1665 | for (i = 0; i < 8; i++) | 1744 | switch (port_status & PORT_SPEED_MASK) { |
1666 | if (mp->txq_mask & (1 << i)) | 1745 | case PORT_SPEED_10: |
1667 | txq_disable(mp->txq + i); | 1746 | speed = 10; |
1747 | break; | ||
1748 | case PORT_SPEED_100: | ||
1749 | speed = 100; | ||
1750 | break; | ||
1751 | case PORT_SPEED_1000: | ||
1752 | speed = 1000; | ||
1753 | break; | ||
1754 | default: | ||
1755 | speed = -1; | ||
1756 | break; | ||
1757 | } | ||
1758 | duplex = (port_status & FULL_DUPLEX) ? 1 : 0; | ||
1759 | fc = (port_status & FLOW_CONTROL_ENABLED) ? 1 : 0; | ||
1668 | 1760 | ||
1669 | pscr_o &= ~SERIAL_PORT_ENABLE; | 1761 | printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " |
1670 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_o); | 1762 | "flow control %sabled\n", dev->name, |
1671 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1763 | speed, duplex ? "full" : "half", |
1672 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr_n); | 1764 | fc ? "en" : "dis"); |
1673 | 1765 | ||
1674 | for (i = 0; i < 8; i++) | 1766 | if (!netif_carrier_ok(dev)) { |
1675 | if (mp->txq_mask & (1 << i)) | 1767 | netif_carrier_on(dev); |
1676 | txq_enable(mp->txq + i); | 1768 | netif_wake_queue(dev); |
1677 | } | ||
1678 | } | 1769 | } |
1679 | } | 1770 | } |
1680 | 1771 | ||
@@ -1684,7 +1775,6 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1684 | struct mv643xx_eth_private *mp = netdev_priv(dev); | 1775 | struct mv643xx_eth_private *mp = netdev_priv(dev); |
1685 | u32 int_cause; | 1776 | u32 int_cause; |
1686 | u32 int_cause_ext; | 1777 | u32 int_cause_ext; |
1687 | u32 txq_active; | ||
1688 | 1778 | ||
1689 | int_cause = rdl(mp, INT_CAUSE(mp->port_num)) & | 1779 | int_cause = rdl(mp, INT_CAUSE(mp->port_num)) & |
1690 | (INT_TX_END | INT_RX | INT_EXT); | 1780 | (INT_TX_END | INT_RX | INT_EXT); |
@@ -1698,30 +1788,8 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1698 | wrl(mp, INT_CAUSE_EXT(mp->port_num), ~int_cause_ext); | 1788 | wrl(mp, INT_CAUSE_EXT(mp->port_num), ~int_cause_ext); |
1699 | } | 1789 | } |
1700 | 1790 | ||
1701 | if (int_cause_ext & (INT_EXT_PHY | INT_EXT_LINK)) { | 1791 | if (int_cause_ext & (INT_EXT_PHY | INT_EXT_LINK)) |
1702 | if (mp->phy_addr == -1 || mii_link_ok(&mp->mii)) { | 1792 | handle_link_event(mp); |
1703 | int i; | ||
1704 | |||
1705 | if (mp->phy_addr != -1) { | ||
1706 | struct ethtool_cmd cmd; | ||
1707 | |||
1708 | mii_ethtool_gset(&mp->mii, &cmd); | ||
1709 | update_pscr(mp, cmd.speed, cmd.duplex); | ||
1710 | } | ||
1711 | |||
1712 | for (i = 0; i < 8; i++) | ||
1713 | if (mp->txq_mask & (1 << i)) | ||
1714 | txq_enable(mp->txq + i); | ||
1715 | |||
1716 | if (!netif_carrier_ok(dev)) { | ||
1717 | netif_carrier_on(dev); | ||
1718 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
1719 | } | ||
1720 | } else if (netif_carrier_ok(dev)) { | ||
1721 | netif_stop_queue(dev); | ||
1722 | netif_carrier_off(dev); | ||
1723 | } | ||
1724 | } | ||
1725 | 1793 | ||
1726 | /* | 1794 | /* |
1727 | * RxBuffer or RxError set for any of the 8 queues? | 1795 | * RxBuffer or RxError set for any of the 8 queues? |
@@ -1743,8 +1811,6 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1743 | } | 1811 | } |
1744 | #endif | 1812 | #endif |
1745 | 1813 | ||
1746 | txq_active = rdl(mp, TXQ_COMMAND(mp->port_num)); | ||
1747 | |||
1748 | /* | 1814 | /* |
1749 | * TxBuffer or TxError set for any of the 8 queues? | 1815 | * TxBuffer or TxError set for any of the 8 queues? |
1750 | */ | 1816 | */ |
@@ -1754,6 +1820,16 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1754 | for (i = 0; i < 8; i++) | 1820 | for (i = 0; i < 8; i++) |
1755 | if (mp->txq_mask & (1 << i)) | 1821 | if (mp->txq_mask & (1 << i)) |
1756 | txq_reclaim(mp->txq + i, 0); | 1822 | txq_reclaim(mp->txq + i, 0); |
1823 | |||
1824 | /* | ||
1825 | * Enough space again in the primary TX queue for a | ||
1826 | * full packet? | ||
1827 | */ | ||
1828 | if (netif_carrier_ok(dev)) { | ||
1829 | spin_lock(&mp->lock); | ||
1830 | __txq_maybe_wake(mp->txq + mp->txq_primary); | ||
1831 | spin_unlock(&mp->lock); | ||
1832 | } | ||
1757 | } | 1833 | } |
1758 | 1834 | ||
1759 | /* | 1835 | /* |
@@ -1763,19 +1839,25 @@ static irqreturn_t mv643xx_eth_irq(int irq, void *dev_id) | |||
1763 | int i; | 1839 | int i; |
1764 | 1840 | ||
1765 | wrl(mp, INT_CAUSE(mp->port_num), ~(int_cause & INT_TX_END)); | 1841 | wrl(mp, INT_CAUSE(mp->port_num), ~(int_cause & INT_TX_END)); |
1842 | |||
1843 | spin_lock(&mp->lock); | ||
1766 | for (i = 0; i < 8; i++) { | 1844 | for (i = 0; i < 8; i++) { |
1767 | struct tx_queue *txq = mp->txq + i; | 1845 | struct tx_queue *txq = mp->txq + i; |
1768 | if (txq->tx_desc_count && !((txq_active >> i) & 1)) | 1846 | u32 hw_desc_ptr; |
1847 | u32 expected_ptr; | ||
1848 | |||
1849 | if ((int_cause & (INT_TX_END_0 << i)) == 0) | ||
1850 | continue; | ||
1851 | |||
1852 | hw_desc_ptr = | ||
1853 | rdl(mp, TXQ_CURRENT_DESC_PTR(mp->port_num, i)); | ||
1854 | expected_ptr = (u32)txq->tx_desc_dma + | ||
1855 | txq->tx_curr_desc * sizeof(struct tx_desc); | ||
1856 | |||
1857 | if (hw_desc_ptr != expected_ptr) | ||
1769 | txq_enable(txq); | 1858 | txq_enable(txq); |
1770 | } | 1859 | } |
1771 | } | 1860 | spin_unlock(&mp->lock); |
1772 | |||
1773 | /* | ||
1774 | * Enough space again in the primary TX queue for a full packet? | ||
1775 | */ | ||
1776 | if (int_cause_ext & INT_EXT_TX) { | ||
1777 | struct tx_queue *txq = mp->txq + mp->txq_primary; | ||
1778 | __txq_maybe_wake(txq); | ||
1779 | } | 1861 | } |
1780 | 1862 | ||
1781 | return IRQ_HANDLED; | 1863 | return IRQ_HANDLED; |
@@ -1785,14 +1867,14 @@ static void phy_reset(struct mv643xx_eth_private *mp) | |||
1785 | { | 1867 | { |
1786 | unsigned int data; | 1868 | unsigned int data; |
1787 | 1869 | ||
1788 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 1870 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
1789 | data |= 0x8000; | 1871 | data |= BMCR_RESET; |
1790 | smi_reg_write(mp, mp->phy_addr, 0, data); | 1872 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); |
1791 | 1873 | ||
1792 | do { | 1874 | do { |
1793 | udelay(1); | 1875 | udelay(1); |
1794 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 1876 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
1795 | } while (data & 0x8000); | 1877 | } while (data & BMCR_RESET); |
1796 | } | 1878 | } |
1797 | 1879 | ||
1798 | static void port_start(struct mv643xx_eth_private *mp) | 1880 | static void port_start(struct mv643xx_eth_private *mp) |
@@ -1801,23 +1883,6 @@ static void port_start(struct mv643xx_eth_private *mp) | |||
1801 | int i; | 1883 | int i; |
1802 | 1884 | ||
1803 | /* | 1885 | /* |
1804 | * Configure basic link parameters. | ||
1805 | */ | ||
1806 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
1807 | pscr &= ~(SERIAL_PORT_ENABLE | FORCE_LINK_PASS); | ||
1808 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1809 | pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL | | ||
1810 | DISABLE_AUTO_NEG_SPEED_GMII | | ||
1811 | DISABLE_AUTO_NEG_FOR_DUPLEX | | ||
1812 | DO_NOT_FORCE_LINK_FAIL | | ||
1813 | SERIAL_PORT_CONTROL_RESERVED; | ||
1814 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1815 | pscr |= SERIAL_PORT_ENABLE; | ||
1816 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1817 | |||
1818 | wrl(mp, SDMA_CONFIG(mp->port_num), PORT_SDMA_CONFIG_DEFAULT_VALUE); | ||
1819 | |||
1820 | /* | ||
1821 | * Perform PHY reset, if there is a PHY. | 1886 | * Perform PHY reset, if there is a PHY. |
1822 | */ | 1887 | */ |
1823 | if (mp->phy_addr != -1) { | 1888 | if (mp->phy_addr != -1) { |
@@ -1829,21 +1894,31 @@ static void port_start(struct mv643xx_eth_private *mp) | |||
1829 | } | 1894 | } |
1830 | 1895 | ||
1831 | /* | 1896 | /* |
1897 | * Configure basic link parameters. | ||
1898 | */ | ||
1899 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
1900 | |||
1901 | pscr |= SERIAL_PORT_ENABLE; | ||
1902 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1903 | |||
1904 | pscr |= DO_NOT_FORCE_LINK_FAIL; | ||
1905 | if (mp->phy_addr == -1) | ||
1906 | pscr |= FORCE_LINK_PASS; | ||
1907 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
1908 | |||
1909 | wrl(mp, SDMA_CONFIG(mp->port_num), PORT_SDMA_CONFIG_DEFAULT_VALUE); | ||
1910 | |||
1911 | /* | ||
1832 | * Configure TX path and queues. | 1912 | * Configure TX path and queues. |
1833 | */ | 1913 | */ |
1834 | tx_set_rate(mp, 1000000000, 16777216); | 1914 | tx_set_rate(mp, 1000000000, 16777216); |
1835 | for (i = 0; i < 8; i++) { | 1915 | for (i = 0; i < 8; i++) { |
1836 | struct tx_queue *txq = mp->txq + i; | 1916 | struct tx_queue *txq = mp->txq + i; |
1837 | int off = TXQ_CURRENT_DESC_PTR(mp->port_num, i); | ||
1838 | u32 addr; | ||
1839 | 1917 | ||
1840 | if ((mp->txq_mask & (1 << i)) == 0) | 1918 | if ((mp->txq_mask & (1 << i)) == 0) |
1841 | continue; | 1919 | continue; |
1842 | 1920 | ||
1843 | addr = (u32)txq->tx_desc_dma; | 1921 | txq_reset_hw_ptr(txq); |
1844 | addr += txq->tx_curr_desc * sizeof(struct tx_desc); | ||
1845 | wrl(mp, off, addr); | ||
1846 | |||
1847 | txq_set_rate(txq, 1000000000, 16777216); | 1922 | txq_set_rate(txq, 1000000000, 16777216); |
1848 | txq_set_fixed_prio_mode(txq); | 1923 | txq_set_fixed_prio_mode(txq); |
1849 | } | 1924 | } |
@@ -1965,6 +2040,9 @@ static int mv643xx_eth_open(struct net_device *dev) | |||
1965 | napi_enable(&mp->napi); | 2040 | napi_enable(&mp->napi); |
1966 | #endif | 2041 | #endif |
1967 | 2042 | ||
2043 | netif_carrier_off(dev); | ||
2044 | netif_stop_queue(dev); | ||
2045 | |||
1968 | port_start(mp); | 2046 | port_start(mp); |
1969 | 2047 | ||
1970 | set_rx_coal(mp, 0); | 2048 | set_rx_coal(mp, 0); |
@@ -1999,8 +2077,14 @@ static void port_reset(struct mv643xx_eth_private *mp) | |||
1999 | if (mp->txq_mask & (1 << i)) | 2077 | if (mp->txq_mask & (1 << i)) |
2000 | txq_disable(mp->txq + i); | 2078 | txq_disable(mp->txq + i); |
2001 | } | 2079 | } |
2002 | while (!(rdl(mp, PORT_STATUS(mp->port_num)) & TX_FIFO_EMPTY)) | 2080 | |
2081 | while (1) { | ||
2082 | u32 ps = rdl(mp, PORT_STATUS(mp->port_num)); | ||
2083 | |||
2084 | if ((ps & (TX_IN_PROGRESS | TX_FIFO_EMPTY)) == TX_FIFO_EMPTY) | ||
2085 | break; | ||
2003 | udelay(10); | 2086 | udelay(10); |
2087 | } | ||
2004 | 2088 | ||
2005 | /* Reset the Enable bit in the Configuration Register */ | 2089 | /* Reset the Enable bit in the Configuration Register */ |
2006 | data = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | 2090 | data = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); |
@@ -2202,7 +2286,8 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev) | |||
2202 | int ret; | 2286 | int ret; |
2203 | 2287 | ||
2204 | if (!mv643xx_eth_version_printed++) | 2288 | if (!mv643xx_eth_version_printed++) |
2205 | printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); | 2289 | printk(KERN_NOTICE "MV-643xx 10/100/1000 ethernet " |
2290 | "driver version %s\n", mv643xx_eth_driver_version); | ||
2206 | 2291 | ||
2207 | ret = -EINVAL; | 2292 | ret = -EINVAL; |
2208 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2293 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -2338,14 +2423,14 @@ static int phy_detect(struct mv643xx_eth_private *mp) | |||
2338 | unsigned int data; | 2423 | unsigned int data; |
2339 | unsigned int data2; | 2424 | unsigned int data2; |
2340 | 2425 | ||
2341 | smi_reg_read(mp, mp->phy_addr, 0, &data); | 2426 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data); |
2342 | smi_reg_write(mp, mp->phy_addr, 0, data ^ 0x1000); | 2427 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data ^ BMCR_ANENABLE); |
2343 | 2428 | ||
2344 | smi_reg_read(mp, mp->phy_addr, 0, &data2); | 2429 | smi_reg_read(mp, mp->phy_addr, MII_BMCR, &data2); |
2345 | if (((data ^ data2) & 0x1000) == 0) | 2430 | if (((data ^ data2) & BMCR_ANENABLE) == 0) |
2346 | return -ENODEV; | 2431 | return -ENODEV; |
2347 | 2432 | ||
2348 | smi_reg_write(mp, mp->phy_addr, 0, data); | 2433 | smi_reg_write(mp, mp->phy_addr, MII_BMCR, data); |
2349 | 2434 | ||
2350 | return 0; | 2435 | return 0; |
2351 | } | 2436 | } |
@@ -2393,12 +2478,39 @@ static int phy_init(struct mv643xx_eth_private *mp, | |||
2393 | cmd.duplex = pd->duplex; | 2478 | cmd.duplex = pd->duplex; |
2394 | } | 2479 | } |
2395 | 2480 | ||
2396 | update_pscr(mp, cmd.speed, cmd.duplex); | ||
2397 | mv643xx_eth_set_settings(mp->dev, &cmd); | 2481 | mv643xx_eth_set_settings(mp->dev, &cmd); |
2398 | 2482 | ||
2399 | return 0; | 2483 | return 0; |
2400 | } | 2484 | } |
2401 | 2485 | ||
2486 | static void init_pscr(struct mv643xx_eth_private *mp, int speed, int duplex) | ||
2487 | { | ||
2488 | u32 pscr; | ||
2489 | |||
2490 | pscr = rdl(mp, PORT_SERIAL_CONTROL(mp->port_num)); | ||
2491 | if (pscr & SERIAL_PORT_ENABLE) { | ||
2492 | pscr &= ~SERIAL_PORT_ENABLE; | ||
2493 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
2494 | } | ||
2495 | |||
2496 | pscr = MAX_RX_PACKET_9700BYTE | SERIAL_PORT_CONTROL_RESERVED; | ||
2497 | if (mp->phy_addr == -1) { | ||
2498 | pscr |= DISABLE_AUTO_NEG_SPEED_GMII; | ||
2499 | if (speed == SPEED_1000) | ||
2500 | pscr |= SET_GMII_SPEED_TO_1000; | ||
2501 | else if (speed == SPEED_100) | ||
2502 | pscr |= SET_MII_SPEED_TO_100; | ||
2503 | |||
2504 | pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL; | ||
2505 | |||
2506 | pscr |= DISABLE_AUTO_NEG_FOR_DUPLEX; | ||
2507 | if (duplex == DUPLEX_FULL) | ||
2508 | pscr |= SET_FULL_DUPLEX_MODE; | ||
2509 | } | ||
2510 | |||
2511 | wrl(mp, PORT_SERIAL_CONTROL(mp->port_num), pscr); | ||
2512 | } | ||
2513 | |||
2402 | static int mv643xx_eth_probe(struct platform_device *pdev) | 2514 | static int mv643xx_eth_probe(struct platform_device *pdev) |
2403 | { | 2515 | { |
2404 | struct mv643xx_eth_platform_data *pd; | 2516 | struct mv643xx_eth_platform_data *pd; |
@@ -2452,6 +2564,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
2452 | } else { | 2564 | } else { |
2453 | SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops_phyless); | 2565 | SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops_phyless); |
2454 | } | 2566 | } |
2567 | init_pscr(mp, pd->speed, pd->duplex); | ||
2455 | 2568 | ||
2456 | 2569 | ||
2457 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 2570 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
@@ -2478,6 +2591,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
2478 | * have to map the buffers to ISA memory which is only 16 MB | 2591 | * have to map the buffers to ISA memory which is only 16 MB |
2479 | */ | 2592 | */ |
2480 | dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; | 2593 | dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; |
2594 | dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM; | ||
2481 | #endif | 2595 | #endif |
2482 | 2596 | ||
2483 | SET_NETDEV_DEV(dev, &pdev->dev); | 2597 | SET_NETDEV_DEV(dev, &pdev->dev); |
diff --git a/drivers/net/ne.c b/drivers/net/ne.c index 2fec6122c7fa..42443d697423 100644 --- a/drivers/net/ne.c +++ b/drivers/net/ne.c | |||
@@ -536,7 +536,7 @@ static int __init ne_probe1(struct net_device *dev, unsigned long ioaddr) | |||
536 | #ifdef CONFIG_NET_POLL_CONTROLLER | 536 | #ifdef CONFIG_NET_POLL_CONTROLLER |
537 | dev->poll_controller = eip_poll; | 537 | dev->poll_controller = eip_poll; |
538 | #endif | 538 | #endif |
539 | NS8390_init(dev, 0); | 539 | NS8390p_init(dev, 0); |
540 | 540 | ||
541 | ret = register_netdev(dev); | 541 | ret = register_netdev(dev); |
542 | if (ret) | 542 | if (ret) |
@@ -794,7 +794,7 @@ retry: | |||
794 | if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */ | 794 | if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */ |
795 | printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name); | 795 | printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name); |
796 | ne_reset_8390(dev); | 796 | ne_reset_8390(dev); |
797 | NS8390_init(dev,1); | 797 | NS8390p_init(dev, 1); |
798 | break; | 798 | break; |
799 | } | 799 | } |
800 | 800 | ||
@@ -855,7 +855,7 @@ static int ne_drv_resume(struct platform_device *pdev) | |||
855 | 855 | ||
856 | if (netif_running(dev)) { | 856 | if (netif_running(dev)) { |
857 | ne_reset_8390(dev); | 857 | ne_reset_8390(dev); |
858 | NS8390_init(dev, 1); | 858 | NS8390p_init(dev, 1); |
859 | netif_device_attach(dev); | 859 | netif_device_attach(dev); |
860 | } | 860 | } |
861 | return 0; | 861 | return 0; |
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index e13966bb5f77..9681618c3232 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c | |||
@@ -53,7 +53,7 @@ MODULE_LICENSE("GPL"); | |||
53 | 53 | ||
54 | static char config[MAX_PARAM_LENGTH]; | 54 | static char config[MAX_PARAM_LENGTH]; |
55 | module_param_string(netconsole, config, MAX_PARAM_LENGTH, 0); | 55 | module_param_string(netconsole, config, MAX_PARAM_LENGTH, 0); |
56 | MODULE_PARM_DESC(netconsole, " netconsole=[src-port]@[src-ip]/[dev],[tgt-port]@<tgt-ip>/[tgt-macaddr]\n"); | 56 | MODULE_PARM_DESC(netconsole, " netconsole=[src-port]@[src-ip]/[dev],[tgt-port]@<tgt-ip>/[tgt-macaddr]"); |
57 | 57 | ||
58 | #ifndef MODULE | 58 | #ifndef MODULE |
59 | static int __init option_setup(char *opt) | 59 | static int __init option_setup(char *opt) |
diff --git a/drivers/net/niu.c b/drivers/net/niu.c index 8ee7d7bb951b..e4765b713aba 100644 --- a/drivers/net/niu.c +++ b/drivers/net/niu.c | |||
@@ -6417,7 +6417,7 @@ static int niu_ethflow_to_class(int flow_type, u64 *class) | |||
6417 | *class = CLASS_CODE_SCTP_IPV6; | 6417 | *class = CLASS_CODE_SCTP_IPV6; |
6418 | break; | 6418 | break; |
6419 | default: | 6419 | default: |
6420 | return -1; | 6420 | return 0; |
6421 | } | 6421 | } |
6422 | 6422 | ||
6423 | return 1; | 6423 | return 1; |
diff --git a/drivers/net/ps3_gelic_wireless.c b/drivers/net/ps3_gelic_wireless.c index 6b2dee0cf3a9..a834b52a6a2c 100644 --- a/drivers/net/ps3_gelic_wireless.c +++ b/drivers/net/ps3_gelic_wireless.c | |||
@@ -1024,7 +1024,7 @@ static int gelic_wl_set_encode(struct net_device *netdev, | |||
1024 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); | 1024 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); |
1025 | struct iw_point *enc = &data->encoding; | 1025 | struct iw_point *enc = &data->encoding; |
1026 | __u16 flags; | 1026 | __u16 flags; |
1027 | unsigned int irqflag; | 1027 | unsigned long irqflag; |
1028 | int key_index, index_specified; | 1028 | int key_index, index_specified; |
1029 | int ret = 0; | 1029 | int ret = 0; |
1030 | 1030 | ||
@@ -1097,7 +1097,7 @@ static int gelic_wl_get_encode(struct net_device *netdev, | |||
1097 | { | 1097 | { |
1098 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); | 1098 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); |
1099 | struct iw_point *enc = &data->encoding; | 1099 | struct iw_point *enc = &data->encoding; |
1100 | unsigned int irqflag; | 1100 | unsigned long irqflag; |
1101 | unsigned int key_index, index_specified; | 1101 | unsigned int key_index, index_specified; |
1102 | int ret = 0; | 1102 | int ret = 0; |
1103 | 1103 | ||
@@ -1215,7 +1215,7 @@ static int gelic_wl_set_encodeext(struct net_device *netdev, | |||
1215 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | 1215 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; |
1216 | __u16 alg; | 1216 | __u16 alg; |
1217 | __u16 flags; | 1217 | __u16 flags; |
1218 | unsigned int irqflag; | 1218 | unsigned long irqflag; |
1219 | int key_index; | 1219 | int key_index; |
1220 | int ret = 0; | 1220 | int ret = 0; |
1221 | 1221 | ||
@@ -1303,7 +1303,7 @@ static int gelic_wl_get_encodeext(struct net_device *netdev, | |||
1303 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); | 1303 | struct gelic_wl_info *wl = port_wl(netdev_priv(netdev)); |
1304 | struct iw_point *enc = &data->encoding; | 1304 | struct iw_point *enc = &data->encoding; |
1305 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | 1305 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; |
1306 | unsigned int irqflag; | 1306 | unsigned long irqflag; |
1307 | int key_index; | 1307 | int key_index; |
1308 | int ret = 0; | 1308 | int ret = 0; |
1309 | int max_key_len; | 1309 | int max_key_len; |
@@ -1426,7 +1426,7 @@ static int gelic_wl_priv_set_psk(struct net_device *net_dev, | |||
1426 | { | 1426 | { |
1427 | struct gelic_wl_info *wl = port_wl(netdev_priv(net_dev)); | 1427 | struct gelic_wl_info *wl = port_wl(netdev_priv(net_dev)); |
1428 | unsigned int len; | 1428 | unsigned int len; |
1429 | unsigned int irqflag; | 1429 | unsigned long irqflag; |
1430 | int ret = 0; | 1430 | int ret = 0; |
1431 | 1431 | ||
1432 | pr_debug("%s:<- len=%d\n", __func__, data->data.length); | 1432 | pr_debug("%s:<- len=%d\n", __func__, data->data.length); |
@@ -1467,7 +1467,7 @@ static int gelic_wl_priv_get_psk(struct net_device *net_dev, | |||
1467 | { | 1467 | { |
1468 | struct gelic_wl_info *wl = port_wl(netdev_priv(net_dev)); | 1468 | struct gelic_wl_info *wl = port_wl(netdev_priv(net_dev)); |
1469 | char *p; | 1469 | char *p; |
1470 | unsigned int irqflag; | 1470 | unsigned long irqflag; |
1471 | unsigned int i; | 1471 | unsigned int i; |
1472 | 1472 | ||
1473 | pr_debug("%s:<-\n", __func__); | 1473 | pr_debug("%s:<-\n", __func__); |
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index 86d77d05190a..a2b073097e5c 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -3143,7 +3143,7 @@ static void tx_intr_handler(struct fifo_info *fifo_data) | |||
3143 | pkt_cnt++; | 3143 | pkt_cnt++; |
3144 | 3144 | ||
3145 | /* Updating the statistics block */ | 3145 | /* Updating the statistics block */ |
3146 | nic->stats.tx_bytes += skb->len; | 3146 | nic->dev->stats.tx_bytes += skb->len; |
3147 | nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize; | 3147 | nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize; |
3148 | dev_kfree_skb_irq(skb); | 3148 | dev_kfree_skb_irq(skb); |
3149 | 3149 | ||
@@ -4896,25 +4896,42 @@ static struct net_device_stats *s2io_get_stats(struct net_device *dev) | |||
4896 | /* Configure Stats for immediate updt */ | 4896 | /* Configure Stats for immediate updt */ |
4897 | s2io_updt_stats(sp); | 4897 | s2io_updt_stats(sp); |
4898 | 4898 | ||
4899 | /* Using sp->stats as a staging area, because reset (due to mtu | ||
4900 | change, for example) will clear some hardware counters */ | ||
4901 | dev->stats.tx_packets += | ||
4902 | le32_to_cpu(mac_control->stats_info->tmac_frms) - | ||
4903 | sp->stats.tx_packets; | ||
4899 | sp->stats.tx_packets = | 4904 | sp->stats.tx_packets = |
4900 | le32_to_cpu(mac_control->stats_info->tmac_frms); | 4905 | le32_to_cpu(mac_control->stats_info->tmac_frms); |
4906 | dev->stats.tx_errors += | ||
4907 | le32_to_cpu(mac_control->stats_info->tmac_any_err_frms) - | ||
4908 | sp->stats.tx_errors; | ||
4901 | sp->stats.tx_errors = | 4909 | sp->stats.tx_errors = |
4902 | le32_to_cpu(mac_control->stats_info->tmac_any_err_frms); | 4910 | le32_to_cpu(mac_control->stats_info->tmac_any_err_frms); |
4911 | dev->stats.rx_errors += | ||
4912 | le64_to_cpu(mac_control->stats_info->rmac_drop_frms) - | ||
4913 | sp->stats.rx_errors; | ||
4903 | sp->stats.rx_errors = | 4914 | sp->stats.rx_errors = |
4904 | le64_to_cpu(mac_control->stats_info->rmac_drop_frms); | 4915 | le64_to_cpu(mac_control->stats_info->rmac_drop_frms); |
4916 | dev->stats.multicast = | ||
4917 | le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms) - | ||
4918 | sp->stats.multicast; | ||
4905 | sp->stats.multicast = | 4919 | sp->stats.multicast = |
4906 | le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms); | 4920 | le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms); |
4921 | dev->stats.rx_length_errors = | ||
4922 | le64_to_cpu(mac_control->stats_info->rmac_long_frms) - | ||
4923 | sp->stats.rx_length_errors; | ||
4907 | sp->stats.rx_length_errors = | 4924 | sp->stats.rx_length_errors = |
4908 | le64_to_cpu(mac_control->stats_info->rmac_long_frms); | 4925 | le64_to_cpu(mac_control->stats_info->rmac_long_frms); |
4909 | 4926 | ||
4910 | /* collect per-ring rx_packets and rx_bytes */ | 4927 | /* collect per-ring rx_packets and rx_bytes */ |
4911 | sp->stats.rx_packets = sp->stats.rx_bytes = 0; | 4928 | dev->stats.rx_packets = dev->stats.rx_bytes = 0; |
4912 | for (i = 0; i < config->rx_ring_num; i++) { | 4929 | for (i = 0; i < config->rx_ring_num; i++) { |
4913 | sp->stats.rx_packets += mac_control->rings[i].rx_packets; | 4930 | dev->stats.rx_packets += mac_control->rings[i].rx_packets; |
4914 | sp->stats.rx_bytes += mac_control->rings[i].rx_bytes; | 4931 | dev->stats.rx_bytes += mac_control->rings[i].rx_bytes; |
4915 | } | 4932 | } |
4916 | 4933 | ||
4917 | return (&sp->stats); | 4934 | return (&dev->stats); |
4918 | } | 4935 | } |
4919 | 4936 | ||
4920 | /** | 4937 | /** |
@@ -7419,7 +7436,7 @@ static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp) | |||
7419 | if (err_mask != 0x5) { | 7436 | if (err_mask != 0x5) { |
7420 | DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n", | 7437 | DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n", |
7421 | dev->name, err_mask); | 7438 | dev->name, err_mask); |
7422 | sp->stats.rx_crc_errors++; | 7439 | dev->stats.rx_crc_errors++; |
7423 | sp->mac_control.stats_info->sw_stat.mem_freed | 7440 | sp->mac_control.stats_info->sw_stat.mem_freed |
7424 | += skb->truesize; | 7441 | += skb->truesize; |
7425 | dev_kfree_skb(skb); | 7442 | dev_kfree_skb(skb); |
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index c69ba1395fa9..6a06b9503e4f 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * SuperH Ethernet device driver | 2 | * SuperH Ethernet device driver |
3 | * | 3 | * |
4 | * Copyright (C) 2006,2007 Nobuhiro Iwamatsu | 4 | * Copyright (C) 2006-2008 Nobuhiro Iwamatsu |
5 | * Copyright (C) 2008 Renesas Solutions Corp. | 5 | * Copyright (C) 2008 Renesas Solutions Corp. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -143,13 +143,39 @@ static struct mdiobb_ops bb_ops = { | |||
143 | .get_mdio_data = sh_get_mdio, | 143 | .get_mdio_data = sh_get_mdio, |
144 | }; | 144 | }; |
145 | 145 | ||
146 | /* Chip Reset */ | ||
146 | static void sh_eth_reset(struct net_device *ndev) | 147 | static void sh_eth_reset(struct net_device *ndev) |
147 | { | 148 | { |
148 | u32 ioaddr = ndev->base_addr; | 149 | u32 ioaddr = ndev->base_addr; |
149 | 150 | ||
151 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
152 | int cnt = 100; | ||
153 | |||
154 | ctrl_outl(EDSR_ENALL, ioaddr + EDSR); | ||
155 | ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR); | ||
156 | while (cnt > 0) { | ||
157 | if (!(ctrl_inl(ioaddr + EDMR) & 0x3)) | ||
158 | break; | ||
159 | mdelay(1); | ||
160 | cnt--; | ||
161 | } | ||
162 | if (cnt < 0) | ||
163 | printk(KERN_ERR "Device reset fail\n"); | ||
164 | |||
165 | /* Table Init */ | ||
166 | ctrl_outl(0x0, ioaddr + TDLAR); | ||
167 | ctrl_outl(0x0, ioaddr + TDFAR); | ||
168 | ctrl_outl(0x0, ioaddr + TDFXR); | ||
169 | ctrl_outl(0x0, ioaddr + TDFFR); | ||
170 | ctrl_outl(0x0, ioaddr + RDLAR); | ||
171 | ctrl_outl(0x0, ioaddr + RDFAR); | ||
172 | ctrl_outl(0x0, ioaddr + RDFXR); | ||
173 | ctrl_outl(0x0, ioaddr + RDFFR); | ||
174 | #else | ||
150 | ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR); | 175 | ctrl_outl(ctrl_inl(ioaddr + EDMR) | EDMR_SRST, ioaddr + EDMR); |
151 | mdelay(3); | 176 | mdelay(3); |
152 | ctrl_outl(ctrl_inl(ioaddr + EDMR) & ~EDMR_SRST, ioaddr + EDMR); | 177 | ctrl_outl(ctrl_inl(ioaddr + EDMR) & ~EDMR_SRST, ioaddr + EDMR); |
178 | #endif | ||
153 | } | 179 | } |
154 | 180 | ||
155 | /* free skb and descriptor buffer */ | 181 | /* free skb and descriptor buffer */ |
@@ -180,6 +206,7 @@ static void sh_eth_ring_free(struct net_device *ndev) | |||
180 | /* format skb and descriptor buffer */ | 206 | /* format skb and descriptor buffer */ |
181 | static void sh_eth_ring_format(struct net_device *ndev) | 207 | static void sh_eth_ring_format(struct net_device *ndev) |
182 | { | 208 | { |
209 | u32 ioaddr = ndev->base_addr, reserve = 0; | ||
183 | struct sh_eth_private *mdp = netdev_priv(ndev); | 210 | struct sh_eth_private *mdp = netdev_priv(ndev); |
184 | int i; | 211 | int i; |
185 | struct sk_buff *skb; | 212 | struct sk_buff *skb; |
@@ -201,9 +228,15 @@ static void sh_eth_ring_format(struct net_device *ndev) | |||
201 | mdp->rx_skbuff[i] = skb; | 228 | mdp->rx_skbuff[i] = skb; |
202 | if (skb == NULL) | 229 | if (skb == NULL) |
203 | break; | 230 | break; |
204 | skb->dev = ndev; /* Mark as being used by this device. */ | 231 | skb->dev = ndev; /* Mark as being used by this device. */ |
232 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
233 | reserve = SH7763_SKB_ALIGN | ||
234 | - ((uint32_t)skb->data & (SH7763_SKB_ALIGN-1)); | ||
235 | if (reserve) | ||
236 | skb_reserve(skb, reserve); | ||
237 | #else | ||
205 | skb_reserve(skb, RX_OFFSET); | 238 | skb_reserve(skb, RX_OFFSET); |
206 | 239 | #endif | |
207 | /* RX descriptor */ | 240 | /* RX descriptor */ |
208 | rxdesc = &mdp->rx_ring[i]; | 241 | rxdesc = &mdp->rx_ring[i]; |
209 | rxdesc->addr = (u32)skb->data & ~0x3UL; | 242 | rxdesc->addr = (u32)skb->data & ~0x3UL; |
@@ -211,12 +244,25 @@ static void sh_eth_ring_format(struct net_device *ndev) | |||
211 | 244 | ||
212 | /* The size of the buffer is 16 byte boundary. */ | 245 | /* The size of the buffer is 16 byte boundary. */ |
213 | rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; | 246 | rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; |
247 | /* Rx descriptor address set */ | ||
248 | if (i == 0) { | ||
249 | ctrl_outl((u32)rxdesc, ioaddr + RDLAR); | ||
250 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
251 | ctrl_outl((u32)rxdesc, ioaddr + RDFAR); | ||
252 | #endif | ||
253 | } | ||
214 | } | 254 | } |
215 | 255 | ||
256 | /* Rx descriptor address set */ | ||
257 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
258 | ctrl_outl((u32)rxdesc, ioaddr + RDFXR); | ||
259 | ctrl_outl(0x1, ioaddr + RDFFR); | ||
260 | #endif | ||
261 | |||
216 | mdp->dirty_rx = (u32) (i - RX_RING_SIZE); | 262 | mdp->dirty_rx = (u32) (i - RX_RING_SIZE); |
217 | 263 | ||
218 | /* Mark the last entry as wrapping the ring. */ | 264 | /* Mark the last entry as wrapping the ring. */ |
219 | rxdesc->status |= cpu_to_le32(RC_RDEL); | 265 | rxdesc->status |= cpu_to_le32(RD_RDEL); |
220 | 266 | ||
221 | memset(mdp->tx_ring, 0, tx_ringsize); | 267 | memset(mdp->tx_ring, 0, tx_ringsize); |
222 | 268 | ||
@@ -226,8 +272,21 @@ static void sh_eth_ring_format(struct net_device *ndev) | |||
226 | txdesc = &mdp->tx_ring[i]; | 272 | txdesc = &mdp->tx_ring[i]; |
227 | txdesc->status = cpu_to_le32(TD_TFP); | 273 | txdesc->status = cpu_to_le32(TD_TFP); |
228 | txdesc->buffer_length = 0; | 274 | txdesc->buffer_length = 0; |
275 | if (i == 0) { | ||
276 | /* Rx descriptor address set */ | ||
277 | ctrl_outl((u32)txdesc, ioaddr + TDLAR); | ||
278 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
279 | ctrl_outl((u32)txdesc, ioaddr + TDFAR); | ||
280 | #endif | ||
281 | } | ||
229 | } | 282 | } |
230 | 283 | ||
284 | /* Rx descriptor address set */ | ||
285 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
286 | ctrl_outl((u32)txdesc, ioaddr + TDFXR); | ||
287 | ctrl_outl(0x1, ioaddr + TDFFR); | ||
288 | #endif | ||
289 | |||
231 | txdesc->status |= cpu_to_le32(TD_TDLE); | 290 | txdesc->status |= cpu_to_le32(TD_TDLE); |
232 | } | 291 | } |
233 | 292 | ||
@@ -311,31 +370,43 @@ static int sh_eth_dev_init(struct net_device *ndev) | |||
311 | /* Soft Reset */ | 370 | /* Soft Reset */ |
312 | sh_eth_reset(ndev); | 371 | sh_eth_reset(ndev); |
313 | 372 | ||
314 | ctrl_outl(RPADIR_PADS1, ioaddr + RPADIR); /* SH7712-DMA-RX-PAD2 */ | 373 | /* Descriptor format */ |
374 | sh_eth_ring_format(ndev); | ||
375 | ctrl_outl(RPADIR_INIT, ioaddr + RPADIR); | ||
315 | 376 | ||
316 | /* all sh_eth int mask */ | 377 | /* all sh_eth int mask */ |
317 | ctrl_outl(0, ioaddr + EESIPR); | 378 | ctrl_outl(0, ioaddr + EESIPR); |
318 | 379 | ||
319 | /* FIFO size set */ | 380 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) |
381 | ctrl_outl(EDMR_EL, ioaddr + EDMR); | ||
382 | #else | ||
320 | ctrl_outl(0, ioaddr + EDMR); /* Endian change */ | 383 | ctrl_outl(0, ioaddr + EDMR); /* Endian change */ |
384 | #endif | ||
321 | 385 | ||
386 | /* FIFO size set */ | ||
322 | ctrl_outl((FIFO_SIZE_T | FIFO_SIZE_R), ioaddr + FDR); | 387 | ctrl_outl((FIFO_SIZE_T | FIFO_SIZE_R), ioaddr + FDR); |
323 | ctrl_outl(0, ioaddr + TFTR); | 388 | ctrl_outl(0, ioaddr + TFTR); |
324 | 389 | ||
390 | /* Frame recv control */ | ||
325 | ctrl_outl(0, ioaddr + RMCR); | 391 | ctrl_outl(0, ioaddr + RMCR); |
326 | 392 | ||
327 | rx_int_var = mdp->rx_int_var = DESC_I_RINT8 | DESC_I_RINT5; | 393 | rx_int_var = mdp->rx_int_var = DESC_I_RINT8 | DESC_I_RINT5; |
328 | tx_int_var = mdp->tx_int_var = DESC_I_TINT2; | 394 | tx_int_var = mdp->tx_int_var = DESC_I_TINT2; |
329 | ctrl_outl(rx_int_var | tx_int_var, ioaddr + TRSCER); | 395 | ctrl_outl(rx_int_var | tx_int_var, ioaddr + TRSCER); |
330 | 396 | ||
397 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
398 | /* Burst sycle set */ | ||
399 | ctrl_outl(0x800, ioaddr + BCULR); | ||
400 | #endif | ||
401 | |||
331 | ctrl_outl((FIFO_F_D_RFF | FIFO_F_D_RFD), ioaddr + FCFTR); | 402 | ctrl_outl((FIFO_F_D_RFF | FIFO_F_D_RFD), ioaddr + FCFTR); |
332 | ctrl_outl(0, ioaddr + TRIMD); | ||
333 | 403 | ||
334 | /* Descriptor format */ | 404 | #if !defined(CONFIG_CPU_SUBTYPE_SH7763) |
335 | sh_eth_ring_format(ndev); | 405 | ctrl_outl(0, ioaddr + TRIMD); |
406 | #endif | ||
336 | 407 | ||
337 | ctrl_outl((u32)mdp->rx_ring, ioaddr + RDLAR); | 408 | /* Recv frame limit set register */ |
338 | ctrl_outl((u32)mdp->tx_ring, ioaddr + TDLAR); | 409 | ctrl_outl(RFLR_VALUE, ioaddr + RFLR); |
339 | 410 | ||
340 | ctrl_outl(ctrl_inl(ioaddr + EESR), ioaddr + EESR); | 411 | ctrl_outl(ctrl_inl(ioaddr + EESR), ioaddr + EESR); |
341 | ctrl_outl((DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff), ioaddr + EESIPR); | 412 | ctrl_outl((DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff), ioaddr + EESIPR); |
@@ -345,21 +416,26 @@ static int sh_eth_dev_init(struct net_device *ndev) | |||
345 | ECMR_ZPF | (mdp->duplex ? ECMR_DM : 0) | ECMR_TE | ECMR_RE; | 416 | ECMR_ZPF | (mdp->duplex ? ECMR_DM : 0) | ECMR_TE | ECMR_RE; |
346 | 417 | ||
347 | ctrl_outl(val, ioaddr + ECMR); | 418 | ctrl_outl(val, ioaddr + ECMR); |
348 | ctrl_outl(ECSR_BRCRX | ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | | 419 | |
349 | ECSIPR_MPDIP, ioaddr + ECSR); | 420 | /* E-MAC Status Register clear */ |
350 | ctrl_outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | | 421 | ctrl_outl(ECSR_INIT, ioaddr + ECSR); |
351 | ECSIPR_ICDIP | ECSIPR_MPDIP, ioaddr + ECSIPR); | 422 | |
423 | /* E-MAC Interrupt Enable register */ | ||
424 | ctrl_outl(ECSIPR_INIT, ioaddr + ECSIPR); | ||
352 | 425 | ||
353 | /* Set MAC address */ | 426 | /* Set MAC address */ |
354 | update_mac_address(ndev); | 427 | update_mac_address(ndev); |
355 | 428 | ||
356 | /* mask reset */ | 429 | /* mask reset */ |
357 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) | 430 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7763) |
358 | ctrl_outl(APR_AP, ioaddr + APR); | 431 | ctrl_outl(APR_AP, ioaddr + APR); |
359 | ctrl_outl(MPR_MP, ioaddr + MPR); | 432 | ctrl_outl(MPR_MP, ioaddr + MPR); |
360 | ctrl_outl(TPAUSER_UNLIMITED, ioaddr + TPAUSER); | 433 | ctrl_outl(TPAUSER_UNLIMITED, ioaddr + TPAUSER); |
434 | #endif | ||
435 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) | ||
361 | ctrl_outl(BCFR_UNLIMITED, ioaddr + BCFR); | 436 | ctrl_outl(BCFR_UNLIMITED, ioaddr + BCFR); |
362 | #endif | 437 | #endif |
438 | |||
363 | /* Setting the Rx mode will start the Rx process. */ | 439 | /* Setting the Rx mode will start the Rx process. */ |
364 | ctrl_outl(EDRRR_R, ioaddr + EDRRR); | 440 | ctrl_outl(EDRRR_R, ioaddr + EDRRR); |
365 | 441 | ||
@@ -407,7 +483,7 @@ static int sh_eth_rx(struct net_device *ndev) | |||
407 | int boguscnt = (mdp->dirty_rx + RX_RING_SIZE) - mdp->cur_rx; | 483 | int boguscnt = (mdp->dirty_rx + RX_RING_SIZE) - mdp->cur_rx; |
408 | struct sk_buff *skb; | 484 | struct sk_buff *skb; |
409 | u16 pkt_len = 0; | 485 | u16 pkt_len = 0; |
410 | u32 desc_status; | 486 | u32 desc_status, reserve = 0; |
411 | 487 | ||
412 | rxdesc = &mdp->rx_ring[entry]; | 488 | rxdesc = &mdp->rx_ring[entry]; |
413 | while (!(rxdesc->status & cpu_to_le32(RD_RACT))) { | 489 | while (!(rxdesc->status & cpu_to_le32(RD_RACT))) { |
@@ -454,28 +530,38 @@ static int sh_eth_rx(struct net_device *ndev) | |||
454 | for (; mdp->cur_rx - mdp->dirty_rx > 0; mdp->dirty_rx++) { | 530 | for (; mdp->cur_rx - mdp->dirty_rx > 0; mdp->dirty_rx++) { |
455 | entry = mdp->dirty_rx % RX_RING_SIZE; | 531 | entry = mdp->dirty_rx % RX_RING_SIZE; |
456 | rxdesc = &mdp->rx_ring[entry]; | 532 | rxdesc = &mdp->rx_ring[entry]; |
533 | /* The size of the buffer is 16 byte boundary. */ | ||
534 | rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; | ||
535 | |||
457 | if (mdp->rx_skbuff[entry] == NULL) { | 536 | if (mdp->rx_skbuff[entry] == NULL) { |
458 | skb = dev_alloc_skb(mdp->rx_buf_sz); | 537 | skb = dev_alloc_skb(mdp->rx_buf_sz); |
459 | mdp->rx_skbuff[entry] = skb; | 538 | mdp->rx_skbuff[entry] = skb; |
460 | if (skb == NULL) | 539 | if (skb == NULL) |
461 | break; /* Better luck next round. */ | 540 | break; /* Better luck next round. */ |
462 | skb->dev = ndev; | 541 | skb->dev = ndev; |
542 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
543 | reserve = SH7763_SKB_ALIGN | ||
544 | - ((uint32_t)skb->data & (SH7763_SKB_ALIGN-1)); | ||
545 | if (reserve) | ||
546 | skb_reserve(skb, reserve); | ||
547 | #else | ||
463 | skb_reserve(skb, RX_OFFSET); | 548 | skb_reserve(skb, RX_OFFSET); |
549 | #endif | ||
550 | skb->ip_summed = CHECKSUM_NONE; | ||
464 | rxdesc->addr = (u32)skb->data & ~0x3UL; | 551 | rxdesc->addr = (u32)skb->data & ~0x3UL; |
465 | } | 552 | } |
466 | /* The size of the buffer is 16 byte boundary. */ | ||
467 | rxdesc->buffer_length = (mdp->rx_buf_sz + 16) & ~0x0F; | ||
468 | if (entry >= RX_RING_SIZE - 1) | 553 | if (entry >= RX_RING_SIZE - 1) |
469 | rxdesc->status |= | 554 | rxdesc->status |= |
470 | cpu_to_le32(RD_RACT | RD_RFP | RC_RDEL); | 555 | cpu_to_le32(RD_RACT | RD_RFP | RD_RDEL); |
471 | else | 556 | else |
472 | rxdesc->status |= | 557 | rxdesc->status |= |
473 | cpu_to_le32(RD_RACT | RD_RFP); | 558 | cpu_to_le32(RD_RACT | RD_RFP); |
474 | } | 559 | } |
475 | 560 | ||
476 | /* Restart Rx engine if stopped. */ | 561 | /* Restart Rx engine if stopped. */ |
477 | /* If we don't need to check status, don't. -KDU */ | 562 | /* If we don't need to check status, don't. -KDU */ |
478 | ctrl_outl(EDRRR_R, ndev->base_addr + EDRRR); | 563 | if (!(ctrl_inl(ndev->base_addr + EDRRR) & EDRRR_R)) |
564 | ctrl_outl(EDRRR_R, ndev->base_addr + EDRRR); | ||
479 | 565 | ||
480 | return 0; | 566 | return 0; |
481 | } | 567 | } |
@@ -529,13 +615,14 @@ static void sh_eth_error(struct net_device *ndev, int intr_status) | |||
529 | printk(KERN_ERR "Receive Frame Overflow\n"); | 615 | printk(KERN_ERR "Receive Frame Overflow\n"); |
530 | } | 616 | } |
531 | } | 617 | } |
532 | 618 | #if !defined(CONFIG_CPU_SUBTYPE_SH7763) | |
533 | if (intr_status & EESR_ADE) { | 619 | if (intr_status & EESR_ADE) { |
534 | if (intr_status & EESR_TDE) { | 620 | if (intr_status & EESR_TDE) { |
535 | if (intr_status & EESR_TFE) | 621 | if (intr_status & EESR_TFE) |
536 | mdp->stats.tx_fifo_errors++; | 622 | mdp->stats.tx_fifo_errors++; |
537 | } | 623 | } |
538 | } | 624 | } |
625 | #endif | ||
539 | 626 | ||
540 | if (intr_status & EESR_RDE) { | 627 | if (intr_status & EESR_RDE) { |
541 | /* Receive Descriptor Empty int */ | 628 | /* Receive Descriptor Empty int */ |
@@ -550,8 +637,11 @@ static void sh_eth_error(struct net_device *ndev, int intr_status) | |||
550 | mdp->stats.rx_fifo_errors++; | 637 | mdp->stats.rx_fifo_errors++; |
551 | printk(KERN_ERR "Receive FIFO Overflow\n"); | 638 | printk(KERN_ERR "Receive FIFO Overflow\n"); |
552 | } | 639 | } |
553 | if (intr_status & | 640 | if (intr_status & (EESR_TWB | EESR_TABT | |
554 | (EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | EESR_TFE)) { | 641 | #if !defined(CONFIG_CPU_SUBTYPE_SH7763) |
642 | EESR_ADE | | ||
643 | #endif | ||
644 | EESR_TDE | EESR_TFE)) { | ||
555 | /* Tx error */ | 645 | /* Tx error */ |
556 | u32 edtrr = ctrl_inl(ndev->base_addr + EDTRR); | 646 | u32 edtrr = ctrl_inl(ndev->base_addr + EDTRR); |
557 | /* dmesg */ | 647 | /* dmesg */ |
@@ -582,17 +672,23 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev) | |||
582 | ioaddr = ndev->base_addr; | 672 | ioaddr = ndev->base_addr; |
583 | spin_lock(&mdp->lock); | 673 | spin_lock(&mdp->lock); |
584 | 674 | ||
675 | /* Get interrpt stat */ | ||
585 | intr_status = ctrl_inl(ioaddr + EESR); | 676 | intr_status = ctrl_inl(ioaddr + EESR); |
586 | /* Clear interrupt */ | 677 | /* Clear interrupt */ |
587 | ctrl_outl(intr_status, ioaddr + EESR); | 678 | ctrl_outl(intr_status, ioaddr + EESR); |
588 | 679 | ||
589 | if (intr_status & (EESR_FRC | EESR_RINT8 | | 680 | if (intr_status & (EESR_FRC | /* Frame recv*/ |
590 | EESR_RINT5 | EESR_RINT4 | EESR_RINT3 | EESR_RINT2 | | 681 | EESR_RMAF | /* Multi cast address recv*/ |
591 | EESR_RINT1)) | 682 | EESR_RRF | /* Bit frame recv */ |
683 | EESR_RTLF | /* Long frame recv*/ | ||
684 | EESR_RTSF | /* short frame recv */ | ||
685 | EESR_PRE | /* PHY-LSI recv error */ | ||
686 | EESR_CERF)){ /* recv frame CRC error */ | ||
592 | sh_eth_rx(ndev); | 687 | sh_eth_rx(ndev); |
593 | if (intr_status & (EESR_FTC | | 688 | } |
594 | EESR_TINT4 | EESR_TINT3 | EESR_TINT2 | EESR_TINT1)) { | ||
595 | 689 | ||
690 | /* Tx Check */ | ||
691 | if (intr_status & TX_CHECK) { | ||
596 | sh_eth_txfree(ndev); | 692 | sh_eth_txfree(ndev); |
597 | netif_wake_queue(ndev); | 693 | netif_wake_queue(ndev); |
598 | } | 694 | } |
@@ -631,11 +727,32 @@ static void sh_eth_adjust_link(struct net_device *ndev) | |||
631 | if (phydev->duplex != mdp->duplex) { | 727 | if (phydev->duplex != mdp->duplex) { |
632 | new_state = 1; | 728 | new_state = 1; |
633 | mdp->duplex = phydev->duplex; | 729 | mdp->duplex = phydev->duplex; |
730 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
731 | if (mdp->duplex) { /* FULL */ | ||
732 | ctrl_outl(ctrl_inl(ioaddr + ECMR) | ECMR_DM, | ||
733 | ioaddr + ECMR); | ||
734 | } else { /* Half */ | ||
735 | ctrl_outl(ctrl_inl(ioaddr + ECMR) & ~ECMR_DM, | ||
736 | ioaddr + ECMR); | ||
737 | } | ||
738 | #endif | ||
634 | } | 739 | } |
635 | 740 | ||
636 | if (phydev->speed != mdp->speed) { | 741 | if (phydev->speed != mdp->speed) { |
637 | new_state = 1; | 742 | new_state = 1; |
638 | mdp->speed = phydev->speed; | 743 | mdp->speed = phydev->speed; |
744 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
745 | switch (mdp->speed) { | ||
746 | case 10: /* 10BASE */ | ||
747 | ctrl_outl(GECMR_10, ioaddr + GECMR); break; | ||
748 | case 100:/* 100BASE */ | ||
749 | ctrl_outl(GECMR_100, ioaddr + GECMR); break; | ||
750 | case 1000: /* 1000BASE */ | ||
751 | ctrl_outl(GECMR_1000, ioaddr + GECMR); break; | ||
752 | default: | ||
753 | break; | ||
754 | } | ||
755 | #endif | ||
639 | } | 756 | } |
640 | if (mdp->link == PHY_DOWN) { | 757 | if (mdp->link == PHY_DOWN) { |
641 | ctrl_outl((ctrl_inl(ioaddr + ECMR) & ~ECMR_TXF) | 758 | ctrl_outl((ctrl_inl(ioaddr + ECMR) & ~ECMR_TXF) |
@@ -730,7 +847,7 @@ static int sh_eth_open(struct net_device *ndev) | |||
730 | /* Set the timer to check for link beat. */ | 847 | /* Set the timer to check for link beat. */ |
731 | init_timer(&mdp->timer); | 848 | init_timer(&mdp->timer); |
732 | mdp->timer.expires = (jiffies + (24 * HZ)) / 10;/* 2.4 sec. */ | 849 | mdp->timer.expires = (jiffies + (24 * HZ)) / 10;/* 2.4 sec. */ |
733 | setup_timer(&mdp->timer, sh_eth_timer, ndev); | 850 | setup_timer(&mdp->timer, sh_eth_timer, (unsigned long)ndev); |
734 | 851 | ||
735 | return ret; | 852 | return ret; |
736 | 853 | ||
@@ -820,7 +937,9 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
820 | 937 | ||
821 | mdp->cur_tx++; | 938 | mdp->cur_tx++; |
822 | 939 | ||
823 | ctrl_outl(EDTRR_TRNS, ndev->base_addr + EDTRR); | 940 | if (!(ctrl_inl(ndev->base_addr + EDTRR) & EDTRR_TRNS)) |
941 | ctrl_outl(EDTRR_TRNS, ndev->base_addr + EDTRR); | ||
942 | |||
824 | ndev->trans_start = jiffies; | 943 | ndev->trans_start = jiffies; |
825 | 944 | ||
826 | return 0; | 945 | return 0; |
@@ -877,9 +996,15 @@ static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev) | |||
877 | ctrl_outl(0, ioaddr + CDCR); /* (write clear) */ | 996 | ctrl_outl(0, ioaddr + CDCR); /* (write clear) */ |
878 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + LCCR); | 997 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + LCCR); |
879 | ctrl_outl(0, ioaddr + LCCR); /* (write clear) */ | 998 | ctrl_outl(0, ioaddr + LCCR); /* (write clear) */ |
999 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
1000 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + CERCR);/* CERCR */ | ||
1001 | ctrl_outl(0, ioaddr + CERCR); /* (write clear) */ | ||
1002 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + CEECR);/* CEECR */ | ||
1003 | ctrl_outl(0, ioaddr + CEECR); /* (write clear) */ | ||
1004 | #else | ||
880 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + CNDCR); | 1005 | mdp->stats.tx_carrier_errors += ctrl_inl(ioaddr + CNDCR); |
881 | ctrl_outl(0, ioaddr + CNDCR); /* (write clear) */ | 1006 | ctrl_outl(0, ioaddr + CNDCR); /* (write clear) */ |
882 | 1007 | #endif | |
883 | return &mdp->stats; | 1008 | return &mdp->stats; |
884 | } | 1009 | } |
885 | 1010 | ||
@@ -929,8 +1054,13 @@ static void sh_eth_tsu_init(u32 ioaddr) | |||
929 | ctrl_outl(0, ioaddr + TSU_FWSL0); | 1054 | ctrl_outl(0, ioaddr + TSU_FWSL0); |
930 | ctrl_outl(0, ioaddr + TSU_FWSL1); | 1055 | ctrl_outl(0, ioaddr + TSU_FWSL1); |
931 | ctrl_outl(TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL, ioaddr + TSU_FWSLC); | 1056 | ctrl_outl(TSU_FWSLC_POSTENU | TSU_FWSLC_POSTENL, ioaddr + TSU_FWSLC); |
1057 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
1058 | ctrl_outl(0, ioaddr + TSU_QTAG0); /* Disable QTAG(0->1) */ | ||
1059 | ctrl_outl(0, ioaddr + TSU_QTAG1); /* Disable QTAG(1->0) */ | ||
1060 | #else | ||
932 | ctrl_outl(0, ioaddr + TSU_QTAGM0); /* Disable QTAG(0->1) */ | 1061 | ctrl_outl(0, ioaddr + TSU_QTAGM0); /* Disable QTAG(0->1) */ |
933 | ctrl_outl(0, ioaddr + TSU_QTAGM1); /* Disable QTAG(1->0) */ | 1062 | ctrl_outl(0, ioaddr + TSU_QTAGM1); /* Disable QTAG(1->0) */ |
1063 | #endif | ||
934 | ctrl_outl(0, ioaddr + TSU_FWSR); /* all interrupt status clear */ | 1064 | ctrl_outl(0, ioaddr + TSU_FWSR); /* all interrupt status clear */ |
935 | ctrl_outl(0, ioaddr + TSU_FWINMK); /* Disable all interrupt */ | 1065 | ctrl_outl(0, ioaddr + TSU_FWINMK); /* Disable all interrupt */ |
936 | ctrl_outl(0, ioaddr + TSU_TEN); /* Disable all CAM entry */ | 1066 | ctrl_outl(0, ioaddr + TSU_TEN); /* Disable all CAM entry */ |
@@ -1088,7 +1218,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev) | |||
1088 | /* First device only init */ | 1218 | /* First device only init */ |
1089 | if (!devno) { | 1219 | if (!devno) { |
1090 | /* reset device */ | 1220 | /* reset device */ |
1091 | ctrl_outl(ARSTR_ARSTR, ndev->base_addr + ARSTR); | 1221 | ctrl_outl(ARSTR_ARSTR, ARSTR); |
1092 | mdelay(1); | 1222 | mdelay(1); |
1093 | 1223 | ||
1094 | /* TSU init (Init only)*/ | 1224 | /* TSU init (Init only)*/ |
@@ -1110,8 +1240,8 @@ static int sh_eth_drv_probe(struct platform_device *pdev) | |||
1110 | ndev->name, CARDNAME, (u32) ndev->base_addr); | 1240 | ndev->name, CARDNAME, (u32) ndev->base_addr); |
1111 | 1241 | ||
1112 | for (i = 0; i < 5; i++) | 1242 | for (i = 0; i < 5; i++) |
1113 | printk(KERN_INFO "%2.2x:", ndev->dev_addr[i]); | 1243 | printk(KERN_INFO "%02X:", ndev->dev_addr[i]); |
1114 | printk(KERN_INFO "%2.2x, IRQ %d.\n", ndev->dev_addr[i], ndev->irq); | 1244 | printk(KERN_INFO "%02X, IRQ %d.\n", ndev->dev_addr[i], ndev->irq); |
1115 | 1245 | ||
1116 | platform_set_drvdata(pdev, ndev); | 1246 | platform_set_drvdata(pdev, ndev); |
1117 | 1247 | ||
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index e01e1c347715..45ad1b09ca5a 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h | |||
@@ -32,118 +32,249 @@ | |||
32 | 32 | ||
33 | #define CARDNAME "sh-eth" | 33 | #define CARDNAME "sh-eth" |
34 | #define TX_TIMEOUT (5*HZ) | 34 | #define TX_TIMEOUT (5*HZ) |
35 | 35 | #define TX_RING_SIZE 64 /* Tx ring size */ | |
36 | #define TX_RING_SIZE 128 /* Tx ring size */ | 36 | #define RX_RING_SIZE 64 /* Rx ring size */ |
37 | #define RX_RING_SIZE 128 /* Rx ring size */ | ||
38 | #define RX_OFFSET 2 /* skb offset */ | ||
39 | #define ETHERSMALL 60 | 37 | #define ETHERSMALL 60 |
40 | #define PKT_BUF_SZ 1538 | 38 | #define PKT_BUF_SZ 1538 |
41 | 39 | ||
40 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
41 | |||
42 | #define SH7763_SKB_ALIGN 32 | ||
42 | /* Chip Base Address */ | 43 | /* Chip Base Address */ |
43 | #define SH_TSU_ADDR 0xA7000804 | 44 | # define SH_TSU_ADDR 0xFFE01800 |
45 | # define ARSTR 0xFFE01800 | ||
46 | |||
47 | /* Chip Registers */ | ||
48 | /* E-DMAC */ | ||
49 | # define EDSR 0x000 | ||
50 | # define EDMR 0x400 | ||
51 | # define EDTRR 0x408 | ||
52 | # define EDRRR 0x410 | ||
53 | # define EESR 0x428 | ||
54 | # define EESIPR 0x430 | ||
55 | # define TDLAR 0x010 | ||
56 | # define TDFAR 0x014 | ||
57 | # define TDFXR 0x018 | ||
58 | # define TDFFR 0x01C | ||
59 | # define RDLAR 0x030 | ||
60 | # define RDFAR 0x034 | ||
61 | # define RDFXR 0x038 | ||
62 | # define RDFFR 0x03C | ||
63 | # define TRSCER 0x438 | ||
64 | # define RMFCR 0x440 | ||
65 | # define TFTR 0x448 | ||
66 | # define FDR 0x450 | ||
67 | # define RMCR 0x458 | ||
68 | # define RPADIR 0x460 | ||
69 | # define FCFTR 0x468 | ||
70 | |||
71 | /* Ether Register */ | ||
72 | # define ECMR 0x500 | ||
73 | # define ECSR 0x510 | ||
74 | # define ECSIPR 0x518 | ||
75 | # define PIR 0x520 | ||
76 | # define PSR 0x528 | ||
77 | # define PIPR 0x52C | ||
78 | # define RFLR 0x508 | ||
79 | # define APR 0x554 | ||
80 | # define MPR 0x558 | ||
81 | # define PFTCR 0x55C | ||
82 | # define PFRCR 0x560 | ||
83 | # define TPAUSER 0x564 | ||
84 | # define GECMR 0x5B0 | ||
85 | # define BCULR 0x5B4 | ||
86 | # define MAHR 0x5C0 | ||
87 | # define MALR 0x5C8 | ||
88 | # define TROCR 0x700 | ||
89 | # define CDCR 0x708 | ||
90 | # define LCCR 0x710 | ||
91 | # define CEFCR 0x740 | ||
92 | # define FRECR 0x748 | ||
93 | # define TSFRCR 0x750 | ||
94 | # define TLFRCR 0x758 | ||
95 | # define RFCR 0x760 | ||
96 | # define CERCR 0x768 | ||
97 | # define CEECR 0x770 | ||
98 | # define MAFCR 0x778 | ||
99 | |||
100 | /* TSU Absolute Address */ | ||
101 | # define TSU_CTRST 0x004 | ||
102 | # define TSU_FWEN0 0x010 | ||
103 | # define TSU_FWEN1 0x014 | ||
104 | # define TSU_FCM 0x18 | ||
105 | # define TSU_BSYSL0 0x20 | ||
106 | # define TSU_BSYSL1 0x24 | ||
107 | # define TSU_PRISL0 0x28 | ||
108 | # define TSU_PRISL1 0x2C | ||
109 | # define TSU_FWSL0 0x30 | ||
110 | # define TSU_FWSL1 0x34 | ||
111 | # define TSU_FWSLC 0x38 | ||
112 | # define TSU_QTAG0 0x40 | ||
113 | # define TSU_QTAG1 0x44 | ||
114 | # define TSU_FWSR 0x50 | ||
115 | # define TSU_FWINMK 0x54 | ||
116 | # define TSU_ADQT0 0x48 | ||
117 | # define TSU_ADQT1 0x4C | ||
118 | # define TSU_VTAG0 0x58 | ||
119 | # define TSU_VTAG1 0x5C | ||
120 | # define TSU_ADSBSY 0x60 | ||
121 | # define TSU_TEN 0x64 | ||
122 | # define TSU_POST1 0x70 | ||
123 | # define TSU_POST2 0x74 | ||
124 | # define TSU_POST3 0x78 | ||
125 | # define TSU_POST4 0x7C | ||
126 | # define TSU_ADRH0 0x100 | ||
127 | # define TSU_ADRL0 0x104 | ||
128 | # define TSU_ADRH31 0x1F8 | ||
129 | # define TSU_ADRL31 0x1FC | ||
130 | |||
131 | # define TXNLCR0 0x80 | ||
132 | # define TXALCR0 0x84 | ||
133 | # define RXNLCR0 0x88 | ||
134 | # define RXALCR0 0x8C | ||
135 | # define FWNLCR0 0x90 | ||
136 | # define FWALCR0 0x94 | ||
137 | # define TXNLCR1 0xA0 | ||
138 | # define TXALCR1 0xA4 | ||
139 | # define RXNLCR1 0xA8 | ||
140 | # define RXALCR1 0xAC | ||
141 | # define FWNLCR1 0xB0 | ||
142 | # define FWALCR1 0x40 | ||
143 | |||
144 | #else /* CONFIG_CPU_SUBTYPE_SH7763 */ | ||
145 | # define RX_OFFSET 2 /* skb offset */ | ||
146 | /* Chip base address */ | ||
147 | # define SH_TSU_ADDR 0xA7000804 | ||
148 | # define ARSTR 0xA7000800 | ||
44 | 149 | ||
45 | /* Chip Registers */ | 150 | /* Chip Registers */ |
46 | /* E-DMAC */ | 151 | /* E-DMAC */ |
47 | #define EDMR 0x0000 | 152 | # define EDMR 0x0000 |
48 | #define EDTRR 0x0004 | 153 | # define EDTRR 0x0004 |
49 | #define EDRRR 0x0008 | 154 | # define EDRRR 0x0008 |
50 | #define TDLAR 0x000C | 155 | # define TDLAR 0x000C |
51 | #define RDLAR 0x0010 | 156 | # define RDLAR 0x0010 |
52 | #define EESR 0x0014 | 157 | # define EESR 0x0014 |
53 | #define EESIPR 0x0018 | 158 | # define EESIPR 0x0018 |
54 | #define TRSCER 0x001C | 159 | # define TRSCER 0x001C |
55 | #define RMFCR 0x0020 | 160 | # define RMFCR 0x0020 |
56 | #define TFTR 0x0024 | 161 | # define TFTR 0x0024 |
57 | #define FDR 0x0028 | 162 | # define FDR 0x0028 |
58 | #define RMCR 0x002C | 163 | # define RMCR 0x002C |
59 | #define EDOCR 0x0030 | 164 | # define EDOCR 0x0030 |
60 | #define FCFTR 0x0034 | 165 | # define FCFTR 0x0034 |
61 | #define RPADIR 0x0038 | 166 | # define RPADIR 0x0038 |
62 | #define TRIMD 0x003C | 167 | # define TRIMD 0x003C |
63 | #define RBWAR 0x0040 | 168 | # define RBWAR 0x0040 |
64 | #define RDFAR 0x0044 | 169 | # define RDFAR 0x0044 |
65 | #define TBRAR 0x004C | 170 | # define TBRAR 0x004C |
66 | #define TDFAR 0x0050 | 171 | # define TDFAR 0x0050 |
172 | |||
67 | /* Ether Register */ | 173 | /* Ether Register */ |
68 | #define ECMR 0x0160 | 174 | # define ECMR 0x0160 |
69 | #define ECSR 0x0164 | 175 | # define ECSR 0x0164 |
70 | #define ECSIPR 0x0168 | 176 | # define ECSIPR 0x0168 |
71 | #define PIR 0x016C | 177 | # define PIR 0x016C |
72 | #define MAHR 0x0170 | 178 | # define MAHR 0x0170 |
73 | #define MALR 0x0174 | 179 | # define MALR 0x0174 |
74 | #define RFLR 0x0178 | 180 | # define RFLR 0x0178 |
75 | #define PSR 0x017C | 181 | # define PSR 0x017C |
76 | #define TROCR 0x0180 | 182 | # define TROCR 0x0180 |
77 | #define CDCR 0x0184 | 183 | # define CDCR 0x0184 |
78 | #define LCCR 0x0188 | 184 | # define LCCR 0x0188 |
79 | #define CNDCR 0x018C | 185 | # define CNDCR 0x018C |
80 | #define CEFCR 0x0194 | 186 | # define CEFCR 0x0194 |
81 | #define FRECR 0x0198 | 187 | # define FRECR 0x0198 |
82 | #define TSFRCR 0x019C | 188 | # define TSFRCR 0x019C |
83 | #define TLFRCR 0x01A0 | 189 | # define TLFRCR 0x01A0 |
84 | #define RFCR 0x01A4 | 190 | # define RFCR 0x01A4 |
85 | #define MAFCR 0x01A8 | 191 | # define MAFCR 0x01A8 |
86 | #define IPGR 0x01B4 | 192 | # define IPGR 0x01B4 |
87 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) | 193 | # if defined(CONFIG_CPU_SUBTYPE_SH7710) |
88 | #define APR 0x01B8 | 194 | # define APR 0x01B8 |
89 | #define MPR 0x01BC | 195 | # define MPR 0x01BC |
90 | #define TPAUSER 0x1C4 | 196 | # define TPAUSER 0x1C4 |
91 | #define BCFR 0x1CC | 197 | # define BCFR 0x1CC |
92 | #endif /* CONFIG_CPU_SH7710 */ | 198 | # endif /* CONFIG_CPU_SH7710 */ |
93 | |||
94 | #define ARSTR 0x0800 | ||
95 | 199 | ||
96 | /* TSU */ | 200 | /* TSU */ |
97 | #define TSU_CTRST 0x004 | 201 | # define TSU_CTRST 0x004 |
98 | #define TSU_FWEN0 0x010 | 202 | # define TSU_FWEN0 0x010 |
99 | #define TSU_FWEN1 0x014 | 203 | # define TSU_FWEN1 0x014 |
100 | #define TSU_FCM 0x018 | 204 | # define TSU_FCM 0x018 |
101 | #define TSU_BSYSL0 0x020 | 205 | # define TSU_BSYSL0 0x020 |
102 | #define TSU_BSYSL1 0x024 | 206 | # define TSU_BSYSL1 0x024 |
103 | #define TSU_PRISL0 0x028 | 207 | # define TSU_PRISL0 0x028 |
104 | #define TSU_PRISL1 0x02C | 208 | # define TSU_PRISL1 0x02C |
105 | #define TSU_FWSL0 0x030 | 209 | # define TSU_FWSL0 0x030 |
106 | #define TSU_FWSL1 0x034 | 210 | # define TSU_FWSL1 0x034 |
107 | #define TSU_FWSLC 0x038 | 211 | # define TSU_FWSLC 0x038 |
108 | #define TSU_QTAGM0 0x040 | 212 | # define TSU_QTAGM0 0x040 |
109 | #define TSU_QTAGM1 0x044 | 213 | # define TSU_QTAGM1 0x044 |
110 | #define TSU_ADQT0 0x048 | 214 | # define TSU_ADQT0 0x048 |
111 | #define TSU_ADQT1 0x04C | 215 | # define TSU_ADQT1 0x04C |
112 | #define TSU_FWSR 0x050 | 216 | # define TSU_FWSR 0x050 |
113 | #define TSU_FWINMK 0x054 | 217 | # define TSU_FWINMK 0x054 |
114 | #define TSU_ADSBSY 0x060 | 218 | # define TSU_ADSBSY 0x060 |
115 | #define TSU_TEN 0x064 | 219 | # define TSU_TEN 0x064 |
116 | #define TSU_POST1 0x070 | 220 | # define TSU_POST1 0x070 |
117 | #define TSU_POST2 0x074 | 221 | # define TSU_POST2 0x074 |
118 | #define TSU_POST3 0x078 | 222 | # define TSU_POST3 0x078 |
119 | #define TSU_POST4 0x07C | 223 | # define TSU_POST4 0x07C |
120 | #define TXNLCR0 0x080 | 224 | # define TXNLCR0 0x080 |
121 | #define TXALCR0 0x084 | 225 | # define TXALCR0 0x084 |
122 | #define RXNLCR0 0x088 | 226 | # define RXNLCR0 0x088 |
123 | #define RXALCR0 0x08C | 227 | # define RXALCR0 0x08C |
124 | #define FWNLCR0 0x090 | 228 | # define FWNLCR0 0x090 |
125 | #define FWALCR0 0x094 | 229 | # define FWALCR0 0x094 |
126 | #define TXNLCR1 0x0A0 | 230 | # define TXNLCR1 0x0A0 |
127 | #define TXALCR1 0x0A4 | 231 | # define TXALCR1 0x0A4 |
128 | #define RXNLCR1 0x0A8 | 232 | # define RXNLCR1 0x0A8 |
129 | #define RXALCR1 0x0AC | 233 | # define RXALCR1 0x0AC |
130 | #define FWNLCR1 0x0B0 | 234 | # define FWNLCR1 0x0B0 |
131 | #define FWALCR1 0x0B4 | 235 | # define FWALCR1 0x0B4 |
132 | 236 | ||
133 | #define TSU_ADRH0 0x0100 | 237 | #define TSU_ADRH0 0x0100 |
134 | #define TSU_ADRL0 0x0104 | 238 | #define TSU_ADRL0 0x0104 |
135 | #define TSU_ADRL31 0x01FC | 239 | #define TSU_ADRL31 0x01FC |
136 | 240 | ||
137 | /* Register's bits */ | 241 | #endif /* CONFIG_CPU_SUBTYPE_SH7763 */ |
242 | |||
243 | /* | ||
244 | * Register's bits | ||
245 | */ | ||
246 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
247 | /* EDSR */ | ||
248 | enum EDSR_BIT { | ||
249 | EDSR_ENT = 0x01, EDSR_ENR = 0x02, | ||
250 | }; | ||
251 | #define EDSR_ENALL (EDSR_ENT|EDSR_ENR) | ||
252 | |||
253 | /* GECMR */ | ||
254 | enum GECMR_BIT { | ||
255 | GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01, | ||
256 | }; | ||
257 | #endif | ||
138 | 258 | ||
139 | /* EDMR */ | 259 | /* EDMR */ |
140 | enum DMAC_M_BIT { | 260 | enum DMAC_M_BIT { |
141 | EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, EDMR_SRST = 0x01, | 261 | EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, |
262 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
263 | EDMR_SRST = 0x03, | ||
264 | EMDR_DESC_R = 0x30, /* Descriptor reserve size */ | ||
265 | EDMR_EL = 0x40, /* Litte endian */ | ||
266 | #else /* CONFIG_CPU_SUBTYPE_SH7763 */ | ||
267 | EDMR_SRST = 0x01, | ||
268 | #endif | ||
142 | }; | 269 | }; |
143 | 270 | ||
144 | /* EDTRR */ | 271 | /* EDTRR */ |
145 | enum DMAC_T_BIT { | 272 | enum DMAC_T_BIT { |
273 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
274 | EDTRR_TRNS = 0x03, | ||
275 | #else | ||
146 | EDTRR_TRNS = 0x01, | 276 | EDTRR_TRNS = 0x01, |
277 | #endif | ||
147 | }; | 278 | }; |
148 | 279 | ||
149 | /* EDRRR*/ | 280 | /* EDRRR*/ |
@@ -173,21 +304,47 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, }; | |||
173 | 304 | ||
174 | /* EESR */ | 305 | /* EESR */ |
175 | enum EESR_BIT { | 306 | enum EESR_BIT { |
176 | EESR_TWB = 0x40000000, EESR_TABT = 0x04000000, | 307 | #ifndef CONFIG_CPU_SUBTYPE_SH7763 |
308 | EESR_TWB = 0x40000000, | ||
309 | #else | ||
310 | EESR_TWB = 0xC0000000, | ||
311 | EESR_TC1 = 0x20000000, | ||
312 | EESR_TUC = 0x10000000, | ||
313 | EESR_ROC = 0x80000000, | ||
314 | #endif | ||
315 | EESR_TABT = 0x04000000, | ||
177 | EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000, | 316 | EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000, |
178 | EESR_ADE = 0x00800000, EESR_ECI = 0x00400000, | 317 | #ifndef CONFIG_CPU_SUBTYPE_SH7763 |
179 | EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, | 318 | EESR_ADE = 0x00800000, |
180 | EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, | 319 | #endif |
181 | EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, | 320 | EESR_ECI = 0x00400000, |
182 | EESR_TINT4 = 0x00000800, EESR_TINT3 = 0x00000400, | 321 | EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, |
183 | EESR_TINT2 = 0x00000200, EESR_TINT1 = 0x00000100, | 322 | EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, |
184 | EESR_RINT8 = 0x00000080, EESR_RINT5 = 0x00000010, | 323 | EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, |
185 | EESR_RINT4 = 0x00000008, EESR_RINT3 = 0x00000004, | 324 | #ifndef CONFIG_CPU_SUBTYPE_SH7763 |
186 | EESR_RINT2 = 0x00000002, EESR_RINT1 = 0x00000001, | 325 | EESR_CND = 0x00000800, |
187 | }; | 326 | #endif |
188 | 327 | EESR_DLC = 0x00000400, | |
189 | #define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \ | 328 | EESR_CD = 0x00000200, EESR_RTO = 0x00000100, |
329 | EESR_RMAF = 0x00000080, EESR_CEEF = 0x00000040, | ||
330 | EESR_CELF = 0x00000020, EESR_RRF = 0x00000010, | ||
331 | EESR_RTLF = 0x00000008, EESR_RTSF = 0x00000004, | ||
332 | EESR_PRE = 0x00000002, EESR_CERF = 0x00000001, | ||
333 | }; | ||
334 | |||
335 | |||
336 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
337 | # define TX_CHECK (EESR_TC1 | EESR_FTC) | ||
338 | # define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \ | ||
339 | | EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI) | ||
340 | # define TX_ERROR_CEHCK (EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE) | ||
341 | |||
342 | #else | ||
343 | # define TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO) | ||
344 | # define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \ | ||
190 | | EESR_RFRMER | EESR_ADE | EESR_TFE | EESR_TDE | EESR_ECI) | 345 | | EESR_RFRMER | EESR_ADE | EESR_TFE | EESR_TDE | EESR_ECI) |
346 | # define TX_ERROR_CEHCK (EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | EESR_TFE) | ||
347 | #endif | ||
191 | 348 | ||
192 | /* EESIPR */ | 349 | /* EESIPR */ |
193 | enum DMAC_IM_BIT { | 350 | enum DMAC_IM_BIT { |
@@ -207,8 +364,8 @@ enum DMAC_IM_BIT { | |||
207 | 364 | ||
208 | /* Receive descriptor bit */ | 365 | /* Receive descriptor bit */ |
209 | enum RD_STS_BIT { | 366 | enum RD_STS_BIT { |
210 | RD_RACT = 0x80000000, RC_RDEL = 0x40000000, | 367 | RD_RACT = 0x80000000, RD_RDEL = 0x40000000, |
211 | RC_RFP1 = 0x20000000, RC_RFP0 = 0x10000000, | 368 | RD_RFP1 = 0x20000000, RD_RFP0 = 0x10000000, |
212 | RD_RFE = 0x08000000, RD_RFS10 = 0x00000200, | 369 | RD_RFE = 0x08000000, RD_RFS10 = 0x00000200, |
213 | RD_RFS9 = 0x00000100, RD_RFS8 = 0x00000080, | 370 | RD_RFS9 = 0x00000100, RD_RFS8 = 0x00000080, |
214 | RD_RFS7 = 0x00000040, RD_RFS6 = 0x00000020, | 371 | RD_RFS7 = 0x00000040, RD_RFS6 = 0x00000020, |
@@ -216,9 +373,9 @@ enum RD_STS_BIT { | |||
216 | RD_RFS3 = 0x00000004, RD_RFS2 = 0x00000002, | 373 | RD_RFS3 = 0x00000004, RD_RFS2 = 0x00000002, |
217 | RD_RFS1 = 0x00000001, | 374 | RD_RFS1 = 0x00000001, |
218 | }; | 375 | }; |
219 | #define RDF1ST RC_RFP1 | 376 | #define RDF1ST RD_RFP1 |
220 | #define RDFEND RC_RFP0 | 377 | #define RDFEND RD_RFP0 |
221 | #define RD_RFP (RC_RFP1|RC_RFP0) | 378 | #define RD_RFP (RD_RFP1|RD_RFP0) |
222 | 379 | ||
223 | /* FCFTR */ | 380 | /* FCFTR */ |
224 | enum FCFTR_BIT { | 381 | enum FCFTR_BIT { |
@@ -231,7 +388,8 @@ enum FCFTR_BIT { | |||
231 | 388 | ||
232 | /* Transfer descriptor bit */ | 389 | /* Transfer descriptor bit */ |
233 | enum TD_STS_BIT { | 390 | enum TD_STS_BIT { |
234 | TD_TACT = 0x80000000, TD_TDLE = 0x40000000, TD_TFP1 = 0x20000000, | 391 | TD_TACT = 0x80000000, |
392 | TD_TDLE = 0x40000000, TD_TFP1 = 0x20000000, | ||
235 | TD_TFP0 = 0x10000000, | 393 | TD_TFP0 = 0x10000000, |
236 | }; | 394 | }; |
237 | #define TDF1ST TD_TFP1 | 395 | #define TDF1ST TD_TFP1 |
@@ -242,6 +400,10 @@ enum TD_STS_BIT { | |||
242 | enum RECV_RST_BIT { RMCR_RST = 0x01, }; | 400 | enum RECV_RST_BIT { RMCR_RST = 0x01, }; |
243 | /* ECMR */ | 401 | /* ECMR */ |
244 | enum FELIC_MODE_BIT { | 402 | enum FELIC_MODE_BIT { |
403 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
404 | ECMR_TRCCM = 0x04000000, ECMR_RCSC = 0x00800000, | ||
405 | ECMR_DPAD = 0x00200000, ECMR_RZPF = 0x00100000, | ||
406 | #endif | ||
245 | ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000, | 407 | ECMR_ZPF = 0x00080000, ECMR_PFR = 0x00040000, ECMR_RXF = 0x00020000, |
246 | ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000, | 408 | ECMR_TXF = 0x00010000, ECMR_MCT = 0x00002000, ECMR_PRCEF = 0x00001000, |
247 | ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, | 409 | ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, |
@@ -249,18 +411,45 @@ enum FELIC_MODE_BIT { | |||
249 | ECMR_PRM = 0x00000001, | 411 | ECMR_PRM = 0x00000001, |
250 | }; | 412 | }; |
251 | 413 | ||
414 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
415 | #define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF |\ | ||
416 | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) | ||
417 | #else | ||
418 | #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR ECMR_RXF | ECMR_TXF | ECMR_MCT) | ||
419 | #endif | ||
420 | |||
252 | /* ECSR */ | 421 | /* ECSR */ |
253 | enum ECSR_STATUS_BIT { | 422 | enum ECSR_STATUS_BIT { |
254 | ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10, ECSR_LCHNG = 0x04, | 423 | #ifndef CONFIG_CPU_SUBTYPE_SH7763 |
424 | ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10, | ||
425 | #endif | ||
426 | ECSR_LCHNG = 0x04, | ||
255 | ECSR_MPD = 0x02, ECSR_ICD = 0x01, | 427 | ECSR_MPD = 0x02, ECSR_ICD = 0x01, |
256 | }; | 428 | }; |
257 | 429 | ||
430 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
431 | # define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP) | ||
432 | #else | ||
433 | # define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \ | ||
434 | ECSR_LCHNG | ECSR_ICD | ECSIPR_MPDIP) | ||
435 | #endif | ||
436 | |||
258 | /* ECSIPR */ | 437 | /* ECSIPR */ |
259 | enum ECSIPR_STATUS_MASK_BIT { | 438 | enum ECSIPR_STATUS_MASK_BIT { |
260 | ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10, ECSIPR_LCHNGIP = 0x04, | 439 | #ifndef CONFIG_CPU_SUBTYPE_SH7763 |
440 | ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10, | ||
441 | #endif | ||
442 | ECSIPR_LCHNGIP = 0x04, | ||
261 | ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01, | 443 | ECSIPR_MPDIP = 0x02, ECSIPR_ICDIP = 0x01, |
262 | }; | 444 | }; |
263 | 445 | ||
446 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
447 | # define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP) | ||
448 | #else | ||
449 | # define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \ | ||
450 | ECSIPR_ICDIP | ECSIPR_MPDIP) | ||
451 | #endif | ||
452 | |||
264 | /* APR */ | 453 | /* APR */ |
265 | enum APR_BIT { | 454 | enum APR_BIT { |
266 | APR_AP = 0x00000001, | 455 | APR_AP = 0x00000001, |
@@ -285,6 +474,15 @@ enum RPADIR_BIT { | |||
285 | RPADIR_PADR = 0x0003f, | 474 | RPADIR_PADR = 0x0003f, |
286 | }; | 475 | }; |
287 | 476 | ||
477 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
478 | # define RPADIR_INIT (0x00) | ||
479 | #else | ||
480 | # define RPADIR_INIT (RPADIR_PADS1) | ||
481 | #endif | ||
482 | |||
483 | /* RFLR */ | ||
484 | #define RFLR_VALUE 0x1000 | ||
485 | |||
288 | /* FDR */ | 486 | /* FDR */ |
289 | enum FIFO_SIZE_BIT { | 487 | enum FIFO_SIZE_BIT { |
290 | FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007, | 488 | FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007, |
@@ -316,7 +514,7 @@ enum PHY_ANA_BIT { | |||
316 | PHY_A_NP = 0x8000, PHY_A_ACK = 0x4000, PHY_A_RF = 0x2000, | 514 | PHY_A_NP = 0x8000, PHY_A_ACK = 0x4000, PHY_A_RF = 0x2000, |
317 | PHY_A_FCS = 0x0400, PHY_A_T4 = 0x0200, PHY_A_FDX = 0x0100, | 515 | PHY_A_FCS = 0x0400, PHY_A_T4 = 0x0200, PHY_A_FDX = 0x0100, |
318 | PHY_A_HDX = 0x0080, PHY_A_10FDX = 0x0040, PHY_A_10HDX = 0x0020, | 516 | PHY_A_HDX = 0x0080, PHY_A_10FDX = 0x0040, PHY_A_10HDX = 0x0020, |
319 | PHY_A_SEL = 0x001f, | 517 | PHY_A_SEL = 0x001e, |
320 | }; | 518 | }; |
321 | /* PHY_ANL */ | 519 | /* PHY_ANL */ |
322 | enum PHY_ANL_BIT { | 520 | enum PHY_ANL_BIT { |
@@ -449,6 +647,10 @@ struct sh_eth_private { | |||
449 | struct net_device_stats tsu_stats; /* TSU forward status */ | 647 | struct net_device_stats tsu_stats; /* TSU forward status */ |
450 | }; | 648 | }; |
451 | 649 | ||
650 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
651 | /* SH7763 has endian control register */ | ||
652 | #define swaps(x, y) | ||
653 | #else | ||
452 | static void swaps(char *src, int len) | 654 | static void swaps(char *src, int len) |
453 | { | 655 | { |
454 | #ifdef __LITTLE_ENDIAN__ | 656 | #ifdef __LITTLE_ENDIAN__ |
@@ -460,5 +662,5 @@ static void swaps(char *src, int len) | |||
460 | *p = swab32(*p); | 662 | *p = swab32(*p); |
461 | #endif | 663 | #endif |
462 | } | 664 | } |
463 | 665 | #endif /* CONFIG_CPU_SUBTYPE_SH7763 */ | |
464 | #endif | 666 | #endif |
diff --git a/drivers/net/skfp/smt.c b/drivers/net/skfp/smt.c index ffbfb1b79f97..805383b33d3c 100644 --- a/drivers/net/skfp/smt.c +++ b/drivers/net/skfp/smt.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include "h/smc.h" | 19 | #include "h/smc.h" |
20 | #include "h/smt_p.h" | 20 | #include "h/smt_p.h" |
21 | #include <linux/bitrev.h> | 21 | #include <linux/bitrev.h> |
22 | #include <linux/kernel.h> | ||
22 | 23 | ||
23 | #define KERNEL | 24 | #define KERNEL |
24 | #include "h/smtstate.h" | 25 | #include "h/smtstate.h" |
@@ -1730,20 +1731,18 @@ void fddi_send_antc(struct s_smc *smc, struct fddi_addr *dest) | |||
1730 | #endif | 1731 | #endif |
1731 | 1732 | ||
1732 | #ifdef DEBUG | 1733 | #ifdef DEBUG |
1733 | #define hextoasc(x) "0123456789abcdef"[x] | ||
1734 | |||
1735 | char *addr_to_string(struct fddi_addr *addr) | 1734 | char *addr_to_string(struct fddi_addr *addr) |
1736 | { | 1735 | { |
1737 | int i ; | 1736 | int i ; |
1738 | static char string[6*3] = "****" ; | 1737 | static char string[6*3] = "****" ; |
1739 | 1738 | ||
1740 | for (i = 0 ; i < 6 ; i++) { | 1739 | for (i = 0 ; i < 6 ; i++) { |
1741 | string[i*3] = hextoasc((addr->a[i]>>4)&0xf) ; | 1740 | string[i * 3] = hex_asc_hi(addr->a[i]); |
1742 | string[i*3+1] = hextoasc((addr->a[i])&0xf) ; | 1741 | string[i * 3 + 1] = hex_asc_lo(addr->a[i]); |
1743 | string[i*3+2] = ':' ; | 1742 | string[i * 3 + 2] = ':'; |
1744 | } | 1743 | } |
1745 | string[5*3+2] = 0 ; | 1744 | string[5 * 3 + 2] = 0; |
1746 | return(string) ; | 1745 | return(string); |
1747 | } | 1746 | } |
1748 | #endif | 1747 | #endif |
1749 | 1748 | ||
diff --git a/drivers/net/stnic.c b/drivers/net/stnic.c index b65be5d70fec..2ed0bd596815 100644 --- a/drivers/net/stnic.c +++ b/drivers/net/stnic.c | |||
@@ -19,7 +19,7 @@ | |||
19 | 19 | ||
20 | #include <asm/system.h> | 20 | #include <asm/system.h> |
21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
22 | #include <asm/se.h> | 22 | #include <mach-se/mach/se.h> |
23 | #include <asm/machvec.h> | 23 | #include <asm/machvec.h> |
24 | #ifdef CONFIG_SH_STANDARD_BIOS | 24 | #ifdef CONFIG_SH_STANDARD_BIOS |
25 | #include <asm/sh_bios.h> | 25 | #include <asm/sh_bios.h> |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 633c128a6228..d2439b85a790 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -1982,8 +1982,6 @@ static void tg3_power_down_phy(struct tg3 *tp) | |||
1982 | static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | 1982 | static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) |
1983 | { | 1983 | { |
1984 | u32 misc_host_ctrl; | 1984 | u32 misc_host_ctrl; |
1985 | u16 power_control, power_caps; | ||
1986 | int pm = tp->pm_cap; | ||
1987 | 1985 | ||
1988 | /* Make sure register accesses (indirect or otherwise) | 1986 | /* Make sure register accesses (indirect or otherwise) |
1989 | * will function correctly. | 1987 | * will function correctly. |
@@ -1992,18 +1990,10 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
1992 | TG3PCI_MISC_HOST_CTRL, | 1990 | TG3PCI_MISC_HOST_CTRL, |
1993 | tp->misc_host_ctrl); | 1991 | tp->misc_host_ctrl); |
1994 | 1992 | ||
1995 | pci_read_config_word(tp->pdev, | ||
1996 | pm + PCI_PM_CTRL, | ||
1997 | &power_control); | ||
1998 | power_control |= PCI_PM_CTRL_PME_STATUS; | ||
1999 | power_control &= ~(PCI_PM_CTRL_STATE_MASK); | ||
2000 | switch (state) { | 1993 | switch (state) { |
2001 | case PCI_D0: | 1994 | case PCI_D0: |
2002 | power_control |= 0; | 1995 | pci_enable_wake(tp->pdev, state, false); |
2003 | pci_write_config_word(tp->pdev, | 1996 | pci_set_power_state(tp->pdev, PCI_D0); |
2004 | pm + PCI_PM_CTRL, | ||
2005 | power_control); | ||
2006 | udelay(100); /* Delay after power state change */ | ||
2007 | 1997 | ||
2008 | /* Switch out of Vaux if it is a NIC */ | 1998 | /* Switch out of Vaux if it is a NIC */ |
2009 | if (tp->tg3_flags2 & TG3_FLG2_IS_NIC) | 1999 | if (tp->tg3_flags2 & TG3_FLG2_IS_NIC) |
@@ -2012,26 +2002,15 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
2012 | return 0; | 2002 | return 0; |
2013 | 2003 | ||
2014 | case PCI_D1: | 2004 | case PCI_D1: |
2015 | power_control |= 1; | ||
2016 | break; | ||
2017 | |||
2018 | case PCI_D2: | 2005 | case PCI_D2: |
2019 | power_control |= 2; | ||
2020 | break; | ||
2021 | |||
2022 | case PCI_D3hot: | 2006 | case PCI_D3hot: |
2023 | power_control |= 3; | ||
2024 | break; | 2007 | break; |
2025 | 2008 | ||
2026 | default: | 2009 | default: |
2027 | printk(KERN_WARNING PFX "%s: Invalid power state (%d) " | 2010 | printk(KERN_ERR PFX "%s: Invalid power state (D%d) requested\n", |
2028 | "requested.\n", | 2011 | tp->dev->name, state); |
2029 | tp->dev->name, state); | ||
2030 | return -EINVAL; | 2012 | return -EINVAL; |
2031 | } | 2013 | } |
2032 | |||
2033 | power_control |= PCI_PM_CTRL_PME_ENABLE; | ||
2034 | |||
2035 | misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL); | 2014 | misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL); |
2036 | tw32(TG3PCI_MISC_HOST_CTRL, | 2015 | tw32(TG3PCI_MISC_HOST_CTRL, |
2037 | misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT); | 2016 | misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT); |
@@ -2109,8 +2088,6 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
2109 | WOL_DRV_WOL | | 2088 | WOL_DRV_WOL | |
2110 | WOL_SET_MAGIC_PKT); | 2089 | WOL_SET_MAGIC_PKT); |
2111 | 2090 | ||
2112 | pci_read_config_word(tp->pdev, pm + PCI_PM_PMC, &power_caps); | ||
2113 | |||
2114 | if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) { | 2091 | if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) { |
2115 | u32 mac_mode; | 2092 | u32 mac_mode; |
2116 | 2093 | ||
@@ -2143,8 +2120,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
2143 | if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) | 2120 | if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) |
2144 | tw32(MAC_LED_CTRL, tp->led_ctrl); | 2121 | tw32(MAC_LED_CTRL, tp->led_ctrl); |
2145 | 2122 | ||
2146 | if (((power_caps & PCI_PM_CAP_PME_D3cold) && | 2123 | if (pci_pme_capable(tp->pdev, state) && |
2147 | (tp->tg3_flags & TG3_FLAG_WOL_ENABLE))) | 2124 | (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)) |
2148 | mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE; | 2125 | mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE; |
2149 | 2126 | ||
2150 | tw32_f(MAC_MODE, mac_mode); | 2127 | tw32_f(MAC_MODE, mac_mode); |
@@ -2236,9 +2213,11 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
2236 | 2213 | ||
2237 | tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); | 2214 | tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); |
2238 | 2215 | ||
2216 | if (tp->tg3_flags & TG3_FLAG_WOL_ENABLE) | ||
2217 | pci_enable_wake(tp->pdev, state, true); | ||
2218 | |||
2239 | /* Finally, set the new power state. */ | 2219 | /* Finally, set the new power state. */ |
2240 | pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); | 2220 | pci_set_power_state(tp->pdev, state); |
2241 | udelay(100); /* Delay after power state change */ | ||
2242 | 2221 | ||
2243 | return 0; | 2222 | return 0; |
2244 | } | 2223 | } |
@@ -7708,21 +7687,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7708 | */ | 7687 | */ |
7709 | static int tg3_init_hw(struct tg3 *tp, int reset_phy) | 7688 | static int tg3_init_hw(struct tg3 *tp, int reset_phy) |
7710 | { | 7689 | { |
7711 | int err; | ||
7712 | |||
7713 | /* Force the chip into D0. */ | ||
7714 | err = tg3_set_power_state(tp, PCI_D0); | ||
7715 | if (err) | ||
7716 | goto out; | ||
7717 | |||
7718 | tg3_switch_clocks(tp); | 7690 | tg3_switch_clocks(tp); |
7719 | 7691 | ||
7720 | tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0); | 7692 | tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0); |
7721 | 7693 | ||
7722 | err = tg3_reset_hw(tp, reset_phy); | 7694 | return tg3_reset_hw(tp, reset_phy); |
7723 | |||
7724 | out: | ||
7725 | return err; | ||
7726 | } | 7695 | } |
7727 | 7696 | ||
7728 | #define TG3_STAT_ADD32(PSTAT, REG) \ | 7697 | #define TG3_STAT_ADD32(PSTAT, REG) \ |
@@ -8037,13 +8006,11 @@ static int tg3_open(struct net_device *dev) | |||
8037 | 8006 | ||
8038 | netif_carrier_off(tp->dev); | 8007 | netif_carrier_off(tp->dev); |
8039 | 8008 | ||
8040 | tg3_full_lock(tp, 0); | ||
8041 | |||
8042 | err = tg3_set_power_state(tp, PCI_D0); | 8009 | err = tg3_set_power_state(tp, PCI_D0); |
8043 | if (err) { | 8010 | if (err) |
8044 | tg3_full_unlock(tp); | ||
8045 | return err; | 8011 | return err; |
8046 | } | 8012 | |
8013 | tg3_full_lock(tp, 0); | ||
8047 | 8014 | ||
8048 | tg3_disable_ints(tp); | 8015 | tg3_disable_ints(tp); |
8049 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | 8016 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; |
@@ -9065,7 +9032,8 @@ static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
9065 | { | 9032 | { |
9066 | struct tg3 *tp = netdev_priv(dev); | 9033 | struct tg3 *tp = netdev_priv(dev); |
9067 | 9034 | ||
9068 | if (tp->tg3_flags & TG3_FLAG_WOL_CAP) | 9035 | if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) && |
9036 | device_can_wakeup(&tp->pdev->dev)) | ||
9069 | wol->supported = WAKE_MAGIC; | 9037 | wol->supported = WAKE_MAGIC; |
9070 | else | 9038 | else |
9071 | wol->supported = 0; | 9039 | wol->supported = 0; |
@@ -9078,18 +9046,22 @@ static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
9078 | static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 9046 | static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
9079 | { | 9047 | { |
9080 | struct tg3 *tp = netdev_priv(dev); | 9048 | struct tg3 *tp = netdev_priv(dev); |
9049 | struct device *dp = &tp->pdev->dev; | ||
9081 | 9050 | ||
9082 | if (wol->wolopts & ~WAKE_MAGIC) | 9051 | if (wol->wolopts & ~WAKE_MAGIC) |
9083 | return -EINVAL; | 9052 | return -EINVAL; |
9084 | if ((wol->wolopts & WAKE_MAGIC) && | 9053 | if ((wol->wolopts & WAKE_MAGIC) && |
9085 | !(tp->tg3_flags & TG3_FLAG_WOL_CAP)) | 9054 | !((tp->tg3_flags & TG3_FLAG_WOL_CAP) && device_can_wakeup(dp))) |
9086 | return -EINVAL; | 9055 | return -EINVAL; |
9087 | 9056 | ||
9088 | spin_lock_bh(&tp->lock); | 9057 | spin_lock_bh(&tp->lock); |
9089 | if (wol->wolopts & WAKE_MAGIC) | 9058 | if (wol->wolopts & WAKE_MAGIC) { |
9090 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 9059 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
9091 | else | 9060 | device_set_wakeup_enable(dp, true); |
9061 | } else { | ||
9092 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; | 9062 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; |
9063 | device_set_wakeup_enable(dp, false); | ||
9064 | } | ||
9093 | spin_unlock_bh(&tp->lock); | 9065 | spin_unlock_bh(&tp->lock); |
9094 | 9066 | ||
9095 | return 0; | 9067 | return 0; |
@@ -11296,7 +11268,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
11296 | if (val & VCPU_CFGSHDW_ASPM_DBNC) | 11268 | if (val & VCPU_CFGSHDW_ASPM_DBNC) |
11297 | tp->tg3_flags |= TG3_FLAG_ASPM_WORKAROUND; | 11269 | tp->tg3_flags |= TG3_FLAG_ASPM_WORKAROUND; |
11298 | if ((val & VCPU_CFGSHDW_WOL_ENABLE) && | 11270 | if ((val & VCPU_CFGSHDW_WOL_ENABLE) && |
11299 | (val & VCPU_CFGSHDW_WOL_MAGPKT)) | 11271 | (val & VCPU_CFGSHDW_WOL_MAGPKT) && |
11272 | device_may_wakeup(&tp->pdev->dev)) | ||
11300 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 11273 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
11301 | return; | 11274 | return; |
11302 | } | 11275 | } |
@@ -11426,8 +11399,9 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
11426 | !(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)) | 11399 | !(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)) |
11427 | tp->tg3_flags &= ~TG3_FLAG_WOL_CAP; | 11400 | tp->tg3_flags &= ~TG3_FLAG_WOL_CAP; |
11428 | 11401 | ||
11429 | if (tp->tg3_flags & TG3_FLAG_WOL_CAP && | 11402 | if ((tp->tg3_flags & TG3_FLAG_WOL_CAP) && |
11430 | nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE) | 11403 | (nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE) && |
11404 | device_may_wakeup(&tp->pdev->dev)) | ||
11431 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 11405 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
11432 | 11406 | ||
11433 | if (cfg2 & (1 << 17)) | 11407 | if (cfg2 & (1 << 17)) |
@@ -13613,6 +13587,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
13613 | { | 13587 | { |
13614 | struct net_device *dev = pci_get_drvdata(pdev); | 13588 | struct net_device *dev = pci_get_drvdata(pdev); |
13615 | struct tg3 *tp = netdev_priv(dev); | 13589 | struct tg3 *tp = netdev_priv(dev); |
13590 | pci_power_t target_state; | ||
13616 | int err; | 13591 | int err; |
13617 | 13592 | ||
13618 | /* PCI register 4 needs to be saved whether netif_running() or not. | 13593 | /* PCI register 4 needs to be saved whether netif_running() or not. |
@@ -13641,7 +13616,9 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
13641 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | 13616 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; |
13642 | tg3_full_unlock(tp); | 13617 | tg3_full_unlock(tp); |
13643 | 13618 | ||
13644 | err = tg3_set_power_state(tp, pci_choose_state(pdev, state)); | 13619 | target_state = pdev->pm_cap ? pci_target_state(pdev) : PCI_D3hot; |
13620 | |||
13621 | err = tg3_set_power_state(tp, target_state); | ||
13645 | if (err) { | 13622 | if (err) { |
13646 | int err2; | 13623 | int err2; |
13647 | 13624 | ||
diff --git a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c index 7766cde0d63d..bf621328b601 100644 --- a/drivers/net/tokenring/3c359.c +++ b/drivers/net/tokenring/3c359.c | |||
@@ -95,20 +95,20 @@ MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ; | |||
95 | static int ringspeed[XL_MAX_ADAPTERS] = {0,} ; | 95 | static int ringspeed[XL_MAX_ADAPTERS] = {0,} ; |
96 | 96 | ||
97 | module_param_array(ringspeed, int, NULL, 0); | 97 | module_param_array(ringspeed, int, NULL, 0); |
98 | MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ; | 98 | MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ; |
99 | 99 | ||
100 | /* Packet buffer size */ | 100 | /* Packet buffer size */ |
101 | 101 | ||
102 | static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ; | 102 | static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ; |
103 | 103 | ||
104 | module_param_array(pkt_buf_sz, int, NULL, 0) ; | 104 | module_param_array(pkt_buf_sz, int, NULL, 0) ; |
105 | MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ; | 105 | MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ; |
106 | /* Message Level */ | 106 | /* Message Level */ |
107 | 107 | ||
108 | static int message_level[XL_MAX_ADAPTERS] = {0,} ; | 108 | static int message_level[XL_MAX_ADAPTERS] = {0,} ; |
109 | 109 | ||
110 | module_param_array(message_level, int, NULL, 0) ; | 110 | module_param_array(message_level, int, NULL, 0) ; |
111 | MODULE_PARM_DESC(message_level, "3c359: Level of reported messages \n") ; | 111 | MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ; |
112 | /* | 112 | /* |
113 | * This is a real nasty way of doing this, but otherwise you | 113 | * This is a real nasty way of doing this, but otherwise you |
114 | * will be stuck with 1555 lines of hex #'s in the code. | 114 | * will be stuck with 1555 lines of hex #'s in the code. |
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c index f7319d326912..78df2be8a728 100644 --- a/drivers/net/usb/dm9601.c +++ b/drivers/net/usb/dm9601.c | |||
@@ -55,12 +55,28 @@ | |||
55 | 55 | ||
56 | static int dm_read(struct usbnet *dev, u8 reg, u16 length, void *data) | 56 | static int dm_read(struct usbnet *dev, u8 reg, u16 length, void *data) |
57 | { | 57 | { |
58 | void *buf; | ||
59 | int err = -ENOMEM; | ||
60 | |||
58 | devdbg(dev, "dm_read() reg=0x%02x length=%d", reg, length); | 61 | devdbg(dev, "dm_read() reg=0x%02x length=%d", reg, length); |
59 | return usb_control_msg(dev->udev, | 62 | |
60 | usb_rcvctrlpipe(dev->udev, 0), | 63 | buf = kmalloc(length, GFP_KERNEL); |
61 | DM_READ_REGS, | 64 | if (!buf) |
62 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | 65 | goto out; |
63 | 0, reg, data, length, USB_CTRL_SET_TIMEOUT); | 66 | |
67 | err = usb_control_msg(dev->udev, | ||
68 | usb_rcvctrlpipe(dev->udev, 0), | ||
69 | DM_READ_REGS, | ||
70 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
71 | 0, reg, buf, length, USB_CTRL_SET_TIMEOUT); | ||
72 | if (err == length) | ||
73 | memcpy(data, buf, length); | ||
74 | else if (err >= 0) | ||
75 | err = -EINVAL; | ||
76 | kfree(buf); | ||
77 | |||
78 | out: | ||
79 | return err; | ||
64 | } | 80 | } |
65 | 81 | ||
66 | static int dm_read_reg(struct usbnet *dev, u8 reg, u8 *value) | 82 | static int dm_read_reg(struct usbnet *dev, u8 reg, u8 *value) |
@@ -70,12 +86,28 @@ static int dm_read_reg(struct usbnet *dev, u8 reg, u8 *value) | |||
70 | 86 | ||
71 | static int dm_write(struct usbnet *dev, u8 reg, u16 length, void *data) | 87 | static int dm_write(struct usbnet *dev, u8 reg, u16 length, void *data) |
72 | { | 88 | { |
89 | void *buf = NULL; | ||
90 | int err = -ENOMEM; | ||
91 | |||
73 | devdbg(dev, "dm_write() reg=0x%02x, length=%d", reg, length); | 92 | devdbg(dev, "dm_write() reg=0x%02x, length=%d", reg, length); |
74 | return usb_control_msg(dev->udev, | 93 | |
75 | usb_sndctrlpipe(dev->udev, 0), | 94 | if (data) { |
76 | DM_WRITE_REGS, | 95 | buf = kmalloc(length, GFP_KERNEL); |
77 | USB_DIR_OUT | USB_TYPE_VENDOR |USB_RECIP_DEVICE, | 96 | if (!buf) |
78 | 0, reg, data, length, USB_CTRL_SET_TIMEOUT); | 97 | goto out; |
98 | memcpy(buf, data, length); | ||
99 | } | ||
100 | |||
101 | err = usb_control_msg(dev->udev, | ||
102 | usb_sndctrlpipe(dev->udev, 0), | ||
103 | DM_WRITE_REGS, | ||
104 | USB_DIR_OUT | USB_TYPE_VENDOR |USB_RECIP_DEVICE, | ||
105 | 0, reg, buf, length, USB_CTRL_SET_TIMEOUT); | ||
106 | kfree(buf); | ||
107 | if (err >= 0 && err < length) | ||
108 | err = -EINVAL; | ||
109 | out: | ||
110 | return err; | ||
79 | } | 111 | } |
80 | 112 | ||
81 | static int dm_write_reg(struct usbnet *dev, u8 reg, u8 value) | 113 | static int dm_write_reg(struct usbnet *dev, u8 reg, u8 value) |
diff --git a/drivers/net/wd.c b/drivers/net/wd.c index fa14255282af..6f9aa1643743 100644 --- a/drivers/net/wd.c +++ b/drivers/net/wd.c | |||
@@ -337,7 +337,7 @@ static int __init wd_probe1(struct net_device *dev, int ioaddr) | |||
337 | #ifdef CONFIG_NET_POLL_CONTROLLER | 337 | #ifdef CONFIG_NET_POLL_CONTROLLER |
338 | dev->poll_controller = ei_poll; | 338 | dev->poll_controller = ei_poll; |
339 | #endif | 339 | #endif |
340 | NS8390_init(dev, 0); | 340 | NS8390p_init(dev, 0); |
341 | 341 | ||
342 | #if 1 | 342 | #if 1 |
343 | /* Enable interrupt generation on softconfig cards -- M.U */ | 343 | /* Enable interrupt generation on softconfig cards -- M.U */ |
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig index 91fc2c765d90..4c7ff61a1a9c 100644 --- a/drivers/net/wireless/Kconfig +++ b/drivers/net/wireless/Kconfig | |||
@@ -649,6 +649,7 @@ config RTL8187 | |||
649 | Trendnet TEW-424UB | 649 | Trendnet TEW-424UB |
650 | ASUS P5B Deluxe | 650 | ASUS P5B Deluxe |
651 | Toshiba Satellite Pro series of laptops | 651 | Toshiba Satellite Pro series of laptops |
652 | Asus Wireless Link | ||
652 | 653 | ||
653 | Thanks to Realtek for their support! | 654 | Thanks to Realtek for their support! |
654 | 655 | ||
diff --git a/drivers/net/wireless/ath5k/ath5k.h b/drivers/net/wireless/ath5k/ath5k.h index ba35c30d203c..9102eea3c8bf 100644 --- a/drivers/net/wireless/ath5k/ath5k.h +++ b/drivers/net/wireless/ath5k/ath5k.h | |||
@@ -186,11 +186,13 @@ struct ath5k_srev_name { | |||
186 | #define AR5K_SREV_RAD_2111 0x20 | 186 | #define AR5K_SREV_RAD_2111 0x20 |
187 | #define AR5K_SREV_RAD_5112 0x30 | 187 | #define AR5K_SREV_RAD_5112 0x30 |
188 | #define AR5K_SREV_RAD_5112A 0x35 | 188 | #define AR5K_SREV_RAD_5112A 0x35 |
189 | #define AR5K_SREV_RAD_5112B 0x36 | ||
189 | #define AR5K_SREV_RAD_2112 0x40 | 190 | #define AR5K_SREV_RAD_2112 0x40 |
190 | #define AR5K_SREV_RAD_2112A 0x45 | 191 | #define AR5K_SREV_RAD_2112A 0x45 |
191 | #define AR5K_SREV_RAD_SC0 0x56 /* Found on 2413/2414 */ | 192 | #define AR5K_SREV_RAD_2112B 0x46 |
192 | #define AR5K_SREV_RAD_SC1 0x63 /* Found on 5413/5414 */ | 193 | #define AR5K_SREV_RAD_SC0 0x50 /* Found on 2413/2414 */ |
193 | #define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424-5/5424 */ | 194 | #define AR5K_SREV_RAD_SC1 0x60 /* Found on 5413/5414 */ |
195 | #define AR5K_SREV_RAD_SC2 0xa0 /* Found on 2424-5/5424 */ | ||
194 | #define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */ | 196 | #define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */ |
195 | 197 | ||
196 | /* IEEE defs */ | 198 | /* IEEE defs */ |
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c index d9769c527346..ebf19bc11f5b 100644 --- a/drivers/net/wireless/ath5k/base.c +++ b/drivers/net/wireless/ath5k/base.c | |||
@@ -43,7 +43,9 @@ | |||
43 | #include <linux/version.h> | 43 | #include <linux/version.h> |
44 | #include <linux/module.h> | 44 | #include <linux/module.h> |
45 | #include <linux/delay.h> | 45 | #include <linux/delay.h> |
46 | #include <linux/hardirq.h> | ||
46 | #include <linux/if.h> | 47 | #include <linux/if.h> |
48 | #include <linux/io.h> | ||
47 | #include <linux/netdevice.h> | 49 | #include <linux/netdevice.h> |
48 | #include <linux/cache.h> | 50 | #include <linux/cache.h> |
49 | #include <linux/pci.h> | 51 | #include <linux/pci.h> |
@@ -471,9 +473,6 @@ ath5k_pci_probe(struct pci_dev *pdev, | |||
471 | /* Set private data */ | 473 | /* Set private data */ |
472 | pci_set_drvdata(pdev, hw); | 474 | pci_set_drvdata(pdev, hw); |
473 | 475 | ||
474 | /* Enable msi for devices that support it */ | ||
475 | pci_enable_msi(pdev); | ||
476 | |||
477 | /* Setup interrupt handler */ | 476 | /* Setup interrupt handler */ |
478 | ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); | 477 | ret = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); |
479 | if (ret) { | 478 | if (ret) { |
@@ -551,7 +550,6 @@ err_ah: | |||
551 | err_irq: | 550 | err_irq: |
552 | free_irq(pdev->irq, sc); | 551 | free_irq(pdev->irq, sc); |
553 | err_free: | 552 | err_free: |
554 | pci_disable_msi(pdev); | ||
555 | ieee80211_free_hw(hw); | 553 | ieee80211_free_hw(hw); |
556 | err_map: | 554 | err_map: |
557 | pci_iounmap(pdev, mem); | 555 | pci_iounmap(pdev, mem); |
@@ -573,7 +571,6 @@ ath5k_pci_remove(struct pci_dev *pdev) | |||
573 | ath5k_detach(pdev, hw); | 571 | ath5k_detach(pdev, hw); |
574 | ath5k_hw_detach(sc->ah); | 572 | ath5k_hw_detach(sc->ah); |
575 | free_irq(pdev->irq, sc); | 573 | free_irq(pdev->irq, sc); |
576 | pci_disable_msi(pdev); | ||
577 | pci_iounmap(pdev, sc->iobase); | 574 | pci_iounmap(pdev, sc->iobase); |
578 | pci_release_region(pdev, 0); | 575 | pci_release_region(pdev, 0); |
579 | pci_disable_device(pdev); | 576 | pci_disable_device(pdev); |
@@ -590,6 +587,9 @@ ath5k_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
590 | ath5k_led_off(sc); | 587 | ath5k_led_off(sc); |
591 | 588 | ||
592 | ath5k_stop_hw(sc); | 589 | ath5k_stop_hw(sc); |
590 | |||
591 | free_irq(pdev->irq, sc); | ||
592 | pci_disable_msi(pdev); | ||
593 | pci_save_state(pdev); | 593 | pci_save_state(pdev); |
594 | pci_disable_device(pdev); | 594 | pci_disable_device(pdev); |
595 | pci_set_power_state(pdev, PCI_D3hot); | 595 | pci_set_power_state(pdev, PCI_D3hot); |
@@ -605,15 +605,12 @@ ath5k_pci_resume(struct pci_dev *pdev) | |||
605 | struct ath5k_hw *ah = sc->ah; | 605 | struct ath5k_hw *ah = sc->ah; |
606 | int i, err; | 606 | int i, err; |
607 | 607 | ||
608 | err = pci_set_power_state(pdev, PCI_D0); | 608 | pci_restore_state(pdev); |
609 | if (err) | ||
610 | return err; | ||
611 | 609 | ||
612 | err = pci_enable_device(pdev); | 610 | err = pci_enable_device(pdev); |
613 | if (err) | 611 | if (err) |
614 | return err; | 612 | return err; |
615 | 613 | ||
616 | pci_restore_state(pdev); | ||
617 | /* | 614 | /* |
618 | * Suspend/Resume resets the PCI configuration space, so we have to | 615 | * Suspend/Resume resets the PCI configuration space, so we have to |
619 | * re-disable the RETRY_TIMEOUT register (0x41) to keep | 616 | * re-disable the RETRY_TIMEOUT register (0x41) to keep |
@@ -621,7 +618,17 @@ ath5k_pci_resume(struct pci_dev *pdev) | |||
621 | */ | 618 | */ |
622 | pci_write_config_byte(pdev, 0x41, 0); | 619 | pci_write_config_byte(pdev, 0x41, 0); |
623 | 620 | ||
624 | ath5k_init(sc); | 621 | pci_enable_msi(pdev); |
622 | |||
623 | err = request_irq(pdev->irq, ath5k_intr, IRQF_SHARED, "ath", sc); | ||
624 | if (err) { | ||
625 | ATH5K_ERR(sc, "request_irq failed\n"); | ||
626 | goto err_msi; | ||
627 | } | ||
628 | |||
629 | err = ath5k_init(sc); | ||
630 | if (err) | ||
631 | goto err_irq; | ||
625 | ath5k_led_enable(sc); | 632 | ath5k_led_enable(sc); |
626 | 633 | ||
627 | /* | 634 | /* |
@@ -635,6 +642,12 @@ ath5k_pci_resume(struct pci_dev *pdev) | |||
635 | ath5k_hw_reset_key(ah, i); | 642 | ath5k_hw_reset_key(ah, i); |
636 | 643 | ||
637 | return 0; | 644 | return 0; |
645 | err_irq: | ||
646 | free_irq(pdev->irq, sc); | ||
647 | err_msi: | ||
648 | pci_disable_msi(pdev); | ||
649 | pci_disable_device(pdev); | ||
650 | return err; | ||
638 | } | 651 | } |
639 | #endif /* CONFIG_PM */ | 652 | #endif /* CONFIG_PM */ |
640 | 653 | ||
@@ -1224,7 +1237,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) | |||
1224 | 1237 | ||
1225 | pktlen = skb->len; | 1238 | pktlen = skb->len; |
1226 | 1239 | ||
1227 | if (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT)) { | 1240 | if (info->control.hw_key) { |
1228 | keyidx = info->control.hw_key->hw_key_idx; | 1241 | keyidx = info->control.hw_key->hw_key_idx; |
1229 | pktlen += info->control.icv_len; | 1242 | pktlen += info->control.icv_len; |
1230 | } | 1243 | } |
@@ -1249,6 +1262,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) | |||
1249 | 1262 | ||
1250 | txq->link = &ds->ds_link; | 1263 | txq->link = &ds->ds_link; |
1251 | ath5k_hw_tx_start(ah, txq->qnum); | 1264 | ath5k_hw_tx_start(ah, txq->qnum); |
1265 | mmiowb(); | ||
1252 | spin_unlock_bh(&txq->lock); | 1266 | spin_unlock_bh(&txq->lock); |
1253 | 1267 | ||
1254 | return 0; | 1268 | return 0; |
@@ -1583,7 +1597,6 @@ ath5k_rx_stop(struct ath5k_softc *sc) | |||
1583 | ath5k_hw_stop_pcu_recv(ah); /* disable PCU */ | 1597 | ath5k_hw_stop_pcu_recv(ah); /* disable PCU */ |
1584 | ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ | 1598 | ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ |
1585 | ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */ | 1599 | ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */ |
1586 | mdelay(3); /* 3ms is long enough for 1 frame */ | ||
1587 | 1600 | ||
1588 | ath5k_debug_printrxbuffs(sc, ah); | 1601 | ath5k_debug_printrxbuffs(sc, ah); |
1589 | 1602 | ||
@@ -1682,31 +1695,44 @@ ath5k_tasklet_rx(unsigned long data) | |||
1682 | struct ath5k_rx_status rs = {}; | 1695 | struct ath5k_rx_status rs = {}; |
1683 | struct sk_buff *skb; | 1696 | struct sk_buff *skb; |
1684 | struct ath5k_softc *sc = (void *)data; | 1697 | struct ath5k_softc *sc = (void *)data; |
1685 | struct ath5k_buf *bf; | 1698 | struct ath5k_buf *bf, *bf_last; |
1686 | struct ath5k_desc *ds; | 1699 | struct ath5k_desc *ds; |
1687 | int ret; | 1700 | int ret; |
1688 | int hdrlen; | 1701 | int hdrlen; |
1689 | int pad; | 1702 | int pad; |
1690 | 1703 | ||
1691 | spin_lock(&sc->rxbuflock); | 1704 | spin_lock(&sc->rxbuflock); |
1705 | if (list_empty(&sc->rxbuf)) { | ||
1706 | ATH5K_WARN(sc, "empty rx buf pool\n"); | ||
1707 | goto unlock; | ||
1708 | } | ||
1709 | bf_last = list_entry(sc->rxbuf.prev, struct ath5k_buf, list); | ||
1692 | do { | 1710 | do { |
1693 | rxs.flag = 0; | 1711 | rxs.flag = 0; |
1694 | 1712 | ||
1695 | if (unlikely(list_empty(&sc->rxbuf))) { | ||
1696 | ATH5K_WARN(sc, "empty rx buf pool\n"); | ||
1697 | break; | ||
1698 | } | ||
1699 | bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); | 1713 | bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); |
1700 | BUG_ON(bf->skb == NULL); | 1714 | BUG_ON(bf->skb == NULL); |
1701 | skb = bf->skb; | 1715 | skb = bf->skb; |
1702 | ds = bf->desc; | 1716 | ds = bf->desc; |
1703 | 1717 | ||
1704 | /* TODO only one segment */ | 1718 | /* |
1705 | pci_dma_sync_single_for_cpu(sc->pdev, sc->desc_daddr, | 1719 | * last buffer must not be freed to ensure proper hardware |
1706 | sc->desc_len, PCI_DMA_FROMDEVICE); | 1720 | * function. When the hardware finishes also a packet next to |
1707 | 1721 | * it, we are sure, it doesn't use it anymore and we can go on. | |
1708 | if (unlikely(ds->ds_link == bf->daddr)) /* this is the end */ | 1722 | */ |
1709 | break; | 1723 | if (bf_last == bf) |
1724 | bf->flags |= 1; | ||
1725 | if (bf->flags) { | ||
1726 | struct ath5k_buf *bf_next = list_entry(bf->list.next, | ||
1727 | struct ath5k_buf, list); | ||
1728 | ret = sc->ah->ah_proc_rx_desc(sc->ah, bf_next->desc, | ||
1729 | &rs); | ||
1730 | if (ret) | ||
1731 | break; | ||
1732 | bf->flags &= ~1; | ||
1733 | /* skip the overwritten one (even status is martian) */ | ||
1734 | goto next; | ||
1735 | } | ||
1710 | 1736 | ||
1711 | ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); | 1737 | ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); |
1712 | if (unlikely(ret == -EINPROGRESS)) | 1738 | if (unlikely(ret == -EINPROGRESS)) |
@@ -1752,8 +1778,6 @@ ath5k_tasklet_rx(unsigned long data) | |||
1752 | goto next; | 1778 | goto next; |
1753 | } | 1779 | } |
1754 | accept: | 1780 | accept: |
1755 | pci_dma_sync_single_for_cpu(sc->pdev, bf->skbaddr, | ||
1756 | rs.rs_datalen, PCI_DMA_FROMDEVICE); | ||
1757 | pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize, | 1781 | pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize, |
1758 | PCI_DMA_FROMDEVICE); | 1782 | PCI_DMA_FROMDEVICE); |
1759 | bf->skb = NULL; | 1783 | bf->skb = NULL; |
@@ -1816,6 +1840,7 @@ accept: | |||
1816 | next: | 1840 | next: |
1817 | list_move_tail(&bf->list, &sc->rxbuf); | 1841 | list_move_tail(&bf->list, &sc->rxbuf); |
1818 | } while (ath5k_rxbuf_setup(sc, bf) == 0); | 1842 | } while (ath5k_rxbuf_setup(sc, bf) == 0); |
1843 | unlock: | ||
1819 | spin_unlock(&sc->rxbuflock); | 1844 | spin_unlock(&sc->rxbuflock); |
1820 | } | 1845 | } |
1821 | 1846 | ||
@@ -1840,9 +1865,6 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq) | |||
1840 | list_for_each_entry_safe(bf, bf0, &txq->q, list) { | 1865 | list_for_each_entry_safe(bf, bf0, &txq->q, list) { |
1841 | ds = bf->desc; | 1866 | ds = bf->desc; |
1842 | 1867 | ||
1843 | /* TODO only one segment */ | ||
1844 | pci_dma_sync_single_for_cpu(sc->pdev, sc->desc_daddr, | ||
1845 | sc->desc_len, PCI_DMA_FROMDEVICE); | ||
1846 | ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts); | 1868 | ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts); |
1847 | if (unlikely(ret == -EINPROGRESS)) | 1869 | if (unlikely(ret == -EINPROGRESS)) |
1848 | break; | 1870 | break; |
@@ -2015,8 +2037,6 @@ ath5k_beacon_send(struct ath5k_softc *sc) | |||
2015 | ATH5K_WARN(sc, "beacon queue %u didn't stop?\n", sc->bhalq); | 2037 | ATH5K_WARN(sc, "beacon queue %u didn't stop?\n", sc->bhalq); |
2016 | /* NB: hw still stops DMA, so proceed */ | 2038 | /* NB: hw still stops DMA, so proceed */ |
2017 | } | 2039 | } |
2018 | pci_dma_sync_single_for_cpu(sc->pdev, bf->skbaddr, bf->skb->len, | ||
2019 | PCI_DMA_TODEVICE); | ||
2020 | 2040 | ||
2021 | ath5k_hw_put_tx_buf(ah, sc->bhalq, bf->daddr); | 2041 | ath5k_hw_put_tx_buf(ah, sc->bhalq, bf->daddr); |
2022 | ath5k_hw_tx_start(ah, sc->bhalq); | 2042 | ath5k_hw_tx_start(ah, sc->bhalq); |
@@ -2150,6 +2170,7 @@ ath5k_beacon_config(struct ath5k_softc *sc) | |||
2150 | 2170 | ||
2151 | ath5k_hw_set_intr(ah, 0); | 2171 | ath5k_hw_set_intr(ah, 0); |
2152 | sc->bmisscount = 0; | 2172 | sc->bmisscount = 0; |
2173 | sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); | ||
2153 | 2174 | ||
2154 | if (sc->opmode == IEEE80211_IF_TYPE_STA) { | 2175 | if (sc->opmode == IEEE80211_IF_TYPE_STA) { |
2155 | sc->imask |= AR5K_INT_BMISS; | 2176 | sc->imask |= AR5K_INT_BMISS; |
@@ -2240,6 +2261,7 @@ ath5k_init(struct ath5k_softc *sc) | |||
2240 | 2261 | ||
2241 | ret = 0; | 2262 | ret = 0; |
2242 | done: | 2263 | done: |
2264 | mmiowb(); | ||
2243 | mutex_unlock(&sc->lock); | 2265 | mutex_unlock(&sc->lock); |
2244 | return ret; | 2266 | return ret; |
2245 | } | 2267 | } |
@@ -2272,6 +2294,7 @@ ath5k_stop_locked(struct ath5k_softc *sc) | |||
2272 | if (!test_bit(ATH_STAT_INVALID, sc->status)) { | 2294 | if (!test_bit(ATH_STAT_INVALID, sc->status)) { |
2273 | ath5k_led_off(sc); | 2295 | ath5k_led_off(sc); |
2274 | ath5k_hw_set_intr(ah, 0); | 2296 | ath5k_hw_set_intr(ah, 0); |
2297 | synchronize_irq(sc->pdev->irq); | ||
2275 | } | 2298 | } |
2276 | ath5k_txq_cleanup(sc); | 2299 | ath5k_txq_cleanup(sc); |
2277 | if (!test_bit(ATH_STAT_INVALID, sc->status)) { | 2300 | if (!test_bit(ATH_STAT_INVALID, sc->status)) { |
@@ -2321,9 +2344,13 @@ ath5k_stop_hw(struct ath5k_softc *sc) | |||
2321 | } | 2344 | } |
2322 | } | 2345 | } |
2323 | ath5k_txbuf_free(sc, sc->bbuf); | 2346 | ath5k_txbuf_free(sc, sc->bbuf); |
2347 | mmiowb(); | ||
2324 | mutex_unlock(&sc->lock); | 2348 | mutex_unlock(&sc->lock); |
2325 | 2349 | ||
2326 | del_timer_sync(&sc->calib_tim); | 2350 | del_timer_sync(&sc->calib_tim); |
2351 | tasklet_kill(&sc->rxtq); | ||
2352 | tasklet_kill(&sc->txtq); | ||
2353 | tasklet_kill(&sc->restq); | ||
2327 | 2354 | ||
2328 | return ret; | 2355 | return ret; |
2329 | } | 2356 | } |
@@ -2550,8 +2577,6 @@ ath5k_init_leds(struct ath5k_softc *sc) | |||
2550 | struct pci_dev *pdev = sc->pdev; | 2577 | struct pci_dev *pdev = sc->pdev; |
2551 | char name[ATH5K_LED_MAX_NAME_LEN + 1]; | 2578 | char name[ATH5K_LED_MAX_NAME_LEN + 1]; |
2552 | 2579 | ||
2553 | sc->led_on = 0; /* active low */ | ||
2554 | |||
2555 | /* | 2580 | /* |
2556 | * Auto-enable soft led processing for IBM cards and for | 2581 | * Auto-enable soft led processing for IBM cards and for |
2557 | * 5211 minipci cards. | 2582 | * 5211 minipci cards. |
@@ -2560,11 +2585,13 @@ ath5k_init_leds(struct ath5k_softc *sc) | |||
2560 | pdev->device == PCI_DEVICE_ID_ATHEROS_AR5211) { | 2585 | pdev->device == PCI_DEVICE_ID_ATHEROS_AR5211) { |
2561 | __set_bit(ATH_STAT_LEDSOFT, sc->status); | 2586 | __set_bit(ATH_STAT_LEDSOFT, sc->status); |
2562 | sc->led_pin = 0; | 2587 | sc->led_pin = 0; |
2588 | sc->led_on = 0; /* active low */ | ||
2563 | } | 2589 | } |
2564 | /* Enable softled on PIN1 on HP Compaq nc6xx, nc4000 & nx5000 laptops */ | 2590 | /* Enable softled on PIN1 on HP Compaq nc6xx, nc4000 & nx5000 laptops */ |
2565 | if (pdev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ) { | 2591 | if (pdev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ) { |
2566 | __set_bit(ATH_STAT_LEDSOFT, sc->status); | 2592 | __set_bit(ATH_STAT_LEDSOFT, sc->status); |
2567 | sc->led_pin = 1; | 2593 | sc->led_pin = 1; |
2594 | sc->led_on = 1; /* active high */ | ||
2568 | } | 2595 | } |
2569 | if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) | 2596 | if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) |
2570 | goto out; | 2597 | goto out; |
@@ -2783,6 +2810,7 @@ ath5k_config_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |||
2783 | /* XXX: assoc id is set to 0 for now, mac80211 doesn't have | 2810 | /* XXX: assoc id is set to 0 for now, mac80211 doesn't have |
2784 | * a clean way of letting us retrieve this yet. */ | 2811 | * a clean way of letting us retrieve this yet. */ |
2785 | ath5k_hw_set_associd(ah, ah->ah_bssid, 0); | 2812 | ath5k_hw_set_associd(ah, ah->ah_bssid, 0); |
2813 | mmiowb(); | ||
2786 | } | 2814 | } |
2787 | 2815 | ||
2788 | if (conf->changed & IEEE80211_IFCC_BEACON && | 2816 | if (conf->changed & IEEE80211_IFCC_BEACON && |
@@ -2971,6 +2999,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
2971 | } | 2999 | } |
2972 | 3000 | ||
2973 | unlock: | 3001 | unlock: |
3002 | mmiowb(); | ||
2974 | mutex_unlock(&sc->lock); | 3003 | mutex_unlock(&sc->lock); |
2975 | return ret; | 3004 | return ret; |
2976 | } | 3005 | } |
@@ -3032,8 +3061,6 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
3032 | 3061 | ||
3033 | ath5k_debug_dump_skb(sc, skb, "BC ", 1); | 3062 | ath5k_debug_dump_skb(sc, skb, "BC ", 1); |
3034 | 3063 | ||
3035 | mutex_lock(&sc->lock); | ||
3036 | |||
3037 | if (sc->opmode != IEEE80211_IF_TYPE_IBSS) { | 3064 | if (sc->opmode != IEEE80211_IF_TYPE_IBSS) { |
3038 | ret = -EIO; | 3065 | ret = -EIO; |
3039 | goto end; | 3066 | goto end; |
@@ -3044,11 +3071,12 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
3044 | ret = ath5k_beacon_setup(sc, sc->bbuf); | 3071 | ret = ath5k_beacon_setup(sc, sc->bbuf); |
3045 | if (ret) | 3072 | if (ret) |
3046 | sc->bbuf->skb = NULL; | 3073 | sc->bbuf->skb = NULL; |
3047 | else | 3074 | else { |
3048 | ath5k_beacon_config(sc); | 3075 | ath5k_beacon_config(sc); |
3076 | mmiowb(); | ||
3077 | } | ||
3049 | 3078 | ||
3050 | end: | 3079 | end: |
3051 | mutex_unlock(&sc->lock); | ||
3052 | return ret; | 3080 | return ret; |
3053 | } | 3081 | } |
3054 | 3082 | ||
diff --git a/drivers/net/wireless/ath5k/base.h b/drivers/net/wireless/ath5k/base.h index 47f414b09e67..d7e03e6b8271 100644 --- a/drivers/net/wireless/ath5k/base.h +++ b/drivers/net/wireless/ath5k/base.h | |||
@@ -56,7 +56,7 @@ | |||
56 | 56 | ||
57 | struct ath5k_buf { | 57 | struct ath5k_buf { |
58 | struct list_head list; | 58 | struct list_head list; |
59 | unsigned int flags; /* tx descriptor flags */ | 59 | unsigned int flags; /* rx descriptor flags */ |
60 | struct ath5k_desc *desc; /* virtual addr of desc */ | 60 | struct ath5k_desc *desc; /* virtual addr of desc */ |
61 | dma_addr_t daddr; /* physical addr of desc */ | 61 | dma_addr_t daddr; /* physical addr of desc */ |
62 | struct sk_buff *skb; /* skbuff for buf */ | 62 | struct sk_buff *skb; /* skbuff for buf */ |
diff --git a/drivers/net/wireless/ath5k/debug.c b/drivers/net/wireless/ath5k/debug.c index 41d5fa34b544..6fa6c8e04ff0 100644 --- a/drivers/net/wireless/ath5k/debug.c +++ b/drivers/net/wireless/ath5k/debug.c | |||
@@ -129,7 +129,7 @@ static struct reg regs[] = { | |||
129 | REG_STRUCT_INIT(AR5K_CPC1), | 129 | REG_STRUCT_INIT(AR5K_CPC1), |
130 | REG_STRUCT_INIT(AR5K_CPC2), | 130 | REG_STRUCT_INIT(AR5K_CPC2), |
131 | REG_STRUCT_INIT(AR5K_CPC3), | 131 | REG_STRUCT_INIT(AR5K_CPC3), |
132 | REG_STRUCT_INIT(AR5K_CPCORN), | 132 | REG_STRUCT_INIT(AR5K_CPCOVF), |
133 | REG_STRUCT_INIT(AR5K_RESET_CTL), | 133 | REG_STRUCT_INIT(AR5K_RESET_CTL), |
134 | REG_STRUCT_INIT(AR5K_SLEEP_CTL), | 134 | REG_STRUCT_INIT(AR5K_SLEEP_CTL), |
135 | REG_STRUCT_INIT(AR5K_INTPEND), | 135 | REG_STRUCT_INIT(AR5K_INTPEND), |
diff --git a/drivers/net/wireless/ath5k/debug.h b/drivers/net/wireless/ath5k/debug.h index 2cf8d18b10e3..ffc529393306 100644 --- a/drivers/net/wireless/ath5k/debug.h +++ b/drivers/net/wireless/ath5k/debug.h | |||
@@ -63,7 +63,6 @@ | |||
63 | 63 | ||
64 | struct ath5k_softc; | 64 | struct ath5k_softc; |
65 | struct ath5k_hw; | 65 | struct ath5k_hw; |
66 | struct ieee80211_hw_mode; | ||
67 | struct sk_buff; | 66 | struct sk_buff; |
68 | struct ath5k_buf; | 67 | struct ath5k_buf; |
69 | 68 | ||
diff --git a/drivers/net/wireless/ath5k/hw.c b/drivers/net/wireless/ath5k/hw.c index c6d12c53bda4..ad1a5b422c8c 100644 --- a/drivers/net/wireless/ath5k/hw.c +++ b/drivers/net/wireless/ath5k/hw.c | |||
@@ -139,6 +139,8 @@ static int ath5k_hw_post(struct ath5k_hw *ah) | |||
139 | for (c = 0; c < 2; c++) { | 139 | for (c = 0; c < 2; c++) { |
140 | 140 | ||
141 | cur_reg = regs[c]; | 141 | cur_reg = regs[c]; |
142 | |||
143 | /* Save previous value */ | ||
142 | init_val = ath5k_hw_reg_read(ah, cur_reg); | 144 | init_val = ath5k_hw_reg_read(ah, cur_reg); |
143 | 145 | ||
144 | for (i = 0; i < 256; i++) { | 146 | for (i = 0; i < 256; i++) { |
@@ -170,6 +172,10 @@ static int ath5k_hw_post(struct ath5k_hw *ah) | |||
170 | var_pattern = 0x003b080f; | 172 | var_pattern = 0x003b080f; |
171 | ath5k_hw_reg_write(ah, var_pattern, cur_reg); | 173 | ath5k_hw_reg_write(ah, var_pattern, cur_reg); |
172 | } | 174 | } |
175 | |||
176 | /* Restore previous value */ | ||
177 | ath5k_hw_reg_write(ah, init_val, cur_reg); | ||
178 | |||
173 | } | 179 | } |
174 | 180 | ||
175 | return 0; | 181 | return 0; |
@@ -287,67 +293,42 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version) | |||
287 | /* Identify the radio chip*/ | 293 | /* Identify the radio chip*/ |
288 | if (ah->ah_version == AR5K_AR5210) { | 294 | if (ah->ah_version == AR5K_AR5210) { |
289 | ah->ah_radio = AR5K_RF5110; | 295 | ah->ah_radio = AR5K_RF5110; |
296 | /* | ||
297 | * Register returns 0x0/0x04 for radio revision | ||
298 | * so ath5k_hw_radio_revision doesn't parse the value | ||
299 | * correctly. For now we are based on mac's srev to | ||
300 | * identify RF2425 radio. | ||
301 | */ | ||
302 | } else if (srev == AR5K_SREV_VER_AR2425) { | ||
303 | ah->ah_radio = AR5K_RF2425; | ||
304 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2425; | ||
290 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112) { | 305 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112) { |
291 | ah->ah_radio = AR5K_RF5111; | 306 | ah->ah_radio = AR5K_RF5111; |
292 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5111; | 307 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5111; |
293 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC0) { | 308 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC0) { |
294 | |||
295 | ah->ah_radio = AR5K_RF5112; | 309 | ah->ah_radio = AR5K_RF5112; |
296 | 310 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112; | |
297 | if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112A) { | ||
298 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112; | ||
299 | } else { | ||
300 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; | ||
301 | } | ||
302 | |||
303 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) { | 311 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) { |
304 | ah->ah_radio = AR5K_RF2413; | 312 | ah->ah_radio = AR5K_RF2413; |
305 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; | 313 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2413; |
306 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC2) { | 314 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC2) { |
307 | ah->ah_radio = AR5K_RF5413; | 315 | ah->ah_radio = AR5K_RF5413; |
308 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; | 316 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5413; |
309 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5133) { | 317 | } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5133) { |
310 | |||
311 | /* AR5424 */ | 318 | /* AR5424 */ |
312 | if (srev >= AR5K_SREV_VER_AR5424) { | 319 | if (srev >= AR5K_SREV_VER_AR5424) { |
313 | ah->ah_radio = AR5K_RF5413; | 320 | ah->ah_radio = AR5K_RF5413; |
314 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5424; | 321 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5413; |
315 | /* AR2424 */ | 322 | /* AR2424 */ |
316 | } else { | 323 | } else { |
317 | ah->ah_radio = AR5K_RF2413; /* For testing */ | 324 | ah->ah_radio = AR5K_RF2413; /* For testing */ |
318 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; | 325 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2413; |
319 | } | 326 | } |
320 | |||
321 | /* | ||
322 | * Register returns 0x4 for radio revision | ||
323 | * so ath5k_hw_radio_revision doesn't parse the value | ||
324 | * correctly. For now we are based on mac's srev to | ||
325 | * identify RF2425 radio. | ||
326 | */ | ||
327 | } else if (srev == AR5K_SREV_VER_AR2425) { | ||
328 | ah->ah_radio = AR5K_RF2425; | ||
329 | ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112; | ||
330 | } | 327 | } |
331 | |||
332 | ah->ah_phy = AR5K_PHY(0); | 328 | ah->ah_phy = AR5K_PHY(0); |
333 | 329 | ||
334 | /* | 330 | /* |
335 | * Identify AR5212-based PCI-E cards | 331 | * Write PCI-E power save settings |
336 | * And write some initial settings. | ||
337 | * | ||
338 | * (doing a "strings" on ndis driver | ||
339 | * -ar5211.sys- reveals the following | ||
340 | * pci-e related functions: | ||
341 | * | ||
342 | * pcieClockReq | ||
343 | * pcieRxErrNotify | ||
344 | * pcieL1SKPEnable | ||
345 | * pcieAspm | ||
346 | * pcieDisableAspmOnRfWake | ||
347 | * pciePowerSaveEnable | ||
348 | * | ||
349 | * I guess these point to ClockReq but | ||
350 | * i'm not sure.) | ||
351 | */ | 332 | */ |
352 | if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) { | 333 | if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) { |
353 | ath5k_hw_reg_write(ah, 0x9248fc00, 0x4080); | 334 | ath5k_hw_reg_write(ah, 0x9248fc00, 0x4080); |
@@ -369,10 +350,15 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version) | |||
369 | if (ret) | 350 | if (ret) |
370 | goto err_free; | 351 | goto err_free; |
371 | 352 | ||
353 | /* Write AR5K_PCICFG_UNK on 2112B and later chips */ | ||
354 | if (ah->ah_radio_5ghz_revision > AR5K_SREV_RAD_2112B || | ||
355 | srev > AR5K_SREV_VER_AR2413) { | ||
356 | ath5k_hw_reg_write(ah, AR5K_PCICFG_UNK, AR5K_PCICFG); | ||
357 | } | ||
358 | |||
372 | /* | 359 | /* |
373 | * Get card capabilities, values, ... | 360 | * Get card capabilities, values, ... |
374 | */ | 361 | */ |
375 | |||
376 | ret = ath5k_eeprom_init(ah); | 362 | ret = ath5k_eeprom_init(ah); |
377 | if (ret) { | 363 | if (ret) { |
378 | ATH5K_ERR(sc, "unable to init EEPROM\n"); | 364 | ATH5K_ERR(sc, "unable to init EEPROM\n"); |
@@ -843,27 +829,41 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
843 | * Write some more initial register settings | 829 | * Write some more initial register settings |
844 | */ | 830 | */ |
845 | if (ah->ah_version == AR5K_AR5212) { | 831 | if (ah->ah_version == AR5K_AR5212) { |
846 | ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11)); | 832 | ath5k_hw_reg_write(ah, 0x0002a002, 0x982c); |
847 | 833 | ||
848 | if (channel->hw_value == CHANNEL_G) | 834 | if (channel->hw_value == CHANNEL_G) |
849 | if (ah->ah_mac_srev < AR5K_SREV_VER_AR2413) | 835 | if (ah->ah_mac_srev < AR5K_SREV_VER_AR2413) |
850 | ath5k_hw_reg_write(ah, 0x00f80d80, | 836 | ath5k_hw_reg_write(ah, 0x00f80d80, |
851 | AR5K_PHY(83)); | 837 | 0x994c); |
852 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2424) | 838 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2424) |
853 | ath5k_hw_reg_write(ah, 0x00380140, | 839 | ath5k_hw_reg_write(ah, 0x00380140, |
854 | AR5K_PHY(83)); | 840 | 0x994c); |
855 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2425) | 841 | else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2425) |
856 | ath5k_hw_reg_write(ah, 0x00fc0ec0, | 842 | ath5k_hw_reg_write(ah, 0x00fc0ec0, |
857 | AR5K_PHY(83)); | 843 | 0x994c); |
858 | else /* 2425 */ | 844 | else /* 2425 */ |
859 | ath5k_hw_reg_write(ah, 0x00fc0fc0, | 845 | ath5k_hw_reg_write(ah, 0x00fc0fc0, |
860 | AR5K_PHY(83)); | 846 | 0x994c); |
861 | else | 847 | else |
862 | ath5k_hw_reg_write(ah, 0x00000000, | 848 | ath5k_hw_reg_write(ah, 0x00000000, 0x994c); |
863 | AR5K_PHY(83)); | 849 | |
864 | 850 | /* Some bits are disabled here, we know nothing about | |
865 | ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); | 851 | * register 0xa228 yet, most of the times this ends up |
866 | ath5k_hw_reg_write(ah, 0x0000000f, 0x8060); | 852 | * with a value 0x9b5 -haven't seen any dump with |
853 | * a different value- */ | ||
854 | /* Got this from decompiling binary HAL */ | ||
855 | data = ath5k_hw_reg_read(ah, 0xa228); | ||
856 | data &= 0xfffffdff; | ||
857 | ath5k_hw_reg_write(ah, data, 0xa228); | ||
858 | |||
859 | data = ath5k_hw_reg_read(ah, 0xa228); | ||
860 | data &= 0xfffe03ff; | ||
861 | ath5k_hw_reg_write(ah, data, 0xa228); | ||
862 | data = 0; | ||
863 | |||
864 | /* Just write 0x9b5 ? */ | ||
865 | /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */ | ||
866 | ath5k_hw_reg_write(ah, 0x0000000f, AR5K_SEQ_MASK); | ||
867 | ath5k_hw_reg_write(ah, 0x00000000, 0xa254); | 867 | ath5k_hw_reg_write(ah, 0x00000000, 0xa254); |
868 | ath5k_hw_reg_write(ah, 0x0000000e, AR5K_PHY_SCAL); | 868 | ath5k_hw_reg_write(ah, 0x0000000e, AR5K_PHY_SCAL); |
869 | } | 869 | } |
@@ -879,6 +879,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
879 | else | 879 | else |
880 | data = 0xffb80d20; | 880 | data = 0xffb80d20; |
881 | ath5k_hw_reg_write(ah, data, AR5K_PHY_FRAME_CTL); | 881 | ath5k_hw_reg_write(ah, data, AR5K_PHY_FRAME_CTL); |
882 | data = 0; | ||
882 | } | 883 | } |
883 | 884 | ||
884 | /* | 885 | /* |
@@ -898,7 +899,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
898 | 899 | ||
899 | /* | 900 | /* |
900 | * Write RF registers | 901 | * Write RF registers |
901 | * TODO:Does this work on 5211 (5111) ? | ||
902 | */ | 902 | */ |
903 | ret = ath5k_hw_rfregs(ah, channel, mode); | 903 | ret = ath5k_hw_rfregs(ah, channel, mode); |
904 | if (ret) | 904 | if (ret) |
@@ -935,7 +935,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
935 | return ret; | 935 | return ret; |
936 | 936 | ||
937 | /* Set antenna mode */ | 937 | /* Set antenna mode */ |
938 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x44), | 938 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_ANT_CTL, |
939 | ah->ah_antenna[ee_mode][0], 0xfffffc06); | 939 | ah->ah_antenna[ee_mode][0], 0xfffffc06); |
940 | 940 | ||
941 | /* | 941 | /* |
@@ -965,15 +965,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
965 | 965 | ||
966 | ath5k_hw_reg_write(ah, | 966 | ath5k_hw_reg_write(ah, |
967 | AR5K_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]), | 967 | AR5K_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]), |
968 | AR5K_PHY(0x5a)); | 968 | AR5K_PHY_NFTHRES); |
969 | 969 | ||
970 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x11), | 970 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_SETTLING, |
971 | (ee->ee_switch_settling[ee_mode] << 7) & 0x3f80, | 971 | (ee->ee_switch_settling[ee_mode] << 7) & 0x3f80, |
972 | 0xffffc07f); | 972 | 0xffffc07f); |
973 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x12), | 973 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_GAIN, |
974 | (ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000, | 974 | (ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000, |
975 | 0xfffc0fff); | 975 | 0xfffc0fff); |
976 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x14), | 976 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_DESIRED_SIZE, |
977 | (ee->ee_adc_desired_size[ee_mode] & 0x00ff) | | 977 | (ee->ee_adc_desired_size[ee_mode] & 0x00ff) | |
978 | ((ee->ee_pga_desired_size[ee_mode] << 8) & 0xff00), | 978 | ((ee->ee_pga_desired_size[ee_mode] << 8) & 0xff00), |
979 | 0xffff0000); | 979 | 0xffff0000); |
@@ -982,13 +982,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
982 | (ee->ee_tx_end2xpa_disable[ee_mode] << 24) | | 982 | (ee->ee_tx_end2xpa_disable[ee_mode] << 24) | |
983 | (ee->ee_tx_end2xpa_disable[ee_mode] << 16) | | 983 | (ee->ee_tx_end2xpa_disable[ee_mode] << 16) | |
984 | (ee->ee_tx_frm2xpa_enable[ee_mode] << 8) | | 984 | (ee->ee_tx_frm2xpa_enable[ee_mode] << 8) | |
985 | (ee->ee_tx_frm2xpa_enable[ee_mode]), AR5K_PHY(0x0d)); | 985 | (ee->ee_tx_frm2xpa_enable[ee_mode]), AR5K_PHY_RF_CTL4); |
986 | 986 | ||
987 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x0a), | 987 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_RF_CTL3, |
988 | ee->ee_tx_end2xlna_enable[ee_mode] << 8, 0xffff00ff); | 988 | ee->ee_tx_end2xlna_enable[ee_mode] << 8, 0xffff00ff); |
989 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x19), | 989 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_NF, |
990 | (ee->ee_thr_62[ee_mode] << 12) & 0x7f000, 0xfff80fff); | 990 | (ee->ee_thr_62[ee_mode] << 12) & 0x7f000, 0xfff80fff); |
991 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x49), 4, 0xffffff01); | 991 | AR5K_REG_MASKED_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 4, 0xffffff01); |
992 | 992 | ||
993 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, | 993 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, |
994 | AR5K_PHY_IQ_CORR_ENABLE | | 994 | AR5K_PHY_IQ_CORR_ENABLE | |
@@ -1063,7 +1063,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
1063 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); | 1063 | ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT); |
1064 | 1064 | ||
1065 | /* | 1065 | /* |
1066 | * 5111/5112 Specific | 1066 | * On 5211+ read activation -> rx delay |
1067 | * and use it. | ||
1067 | */ | 1068 | */ |
1068 | if (ah->ah_version != AR5K_AR5210) { | 1069 | if (ah->ah_version != AR5K_AR5210) { |
1069 | data = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & | 1070 | data = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & |
@@ -1071,40 +1072,77 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
1071 | data = (channel->hw_value & CHANNEL_CCK) ? | 1072 | data = (channel->hw_value & CHANNEL_CCK) ? |
1072 | ((data << 2) / 22) : (data / 10); | 1073 | ((data << 2) / 22) : (data / 10); |
1073 | 1074 | ||
1074 | udelay(100 + data); | 1075 | udelay(100 + (2 * data)); |
1076 | data = 0; | ||
1075 | } else { | 1077 | } else { |
1076 | mdelay(1); | 1078 | mdelay(1); |
1077 | } | 1079 | } |
1078 | 1080 | ||
1079 | /* | 1081 | /* |
1080 | * Enable calibration and wait until completion | 1082 | * Perform ADC test (?) |
1083 | */ | ||
1084 | data = ath5k_hw_reg_read(ah, AR5K_PHY_TST1); | ||
1085 | ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1); | ||
1086 | for (i = 0; i <= 20; i++) { | ||
1087 | if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10)) | ||
1088 | break; | ||
1089 | udelay(200); | ||
1090 | } | ||
1091 | ath5k_hw_reg_write(ah, data, AR5K_PHY_TST1); | ||
1092 | data = 0; | ||
1093 | |||
1094 | /* | ||
1095 | * Start automatic gain calibration | ||
1096 | * | ||
1097 | * During AGC calibration RX path is re-routed to | ||
1098 | * a signal detector so we don't receive anything. | ||
1099 | * | ||
1100 | * This method is used to calibrate some static offsets | ||
1101 | * used together with on-the fly I/Q calibration (the | ||
1102 | * one performed via ath5k_hw_phy_calibrate), that doesn't | ||
1103 | * interrupt rx path. | ||
1104 | * | ||
1105 | * If we are in a noisy environment AGC calibration may time | ||
1106 | * out. | ||
1081 | */ | 1107 | */ |
1082 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, | 1108 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, |
1083 | AR5K_PHY_AGCCTL_CAL); | 1109 | AR5K_PHY_AGCCTL_CAL); |
1084 | 1110 | ||
1111 | /* At the same time start I/Q calibration for QAM constellation | ||
1112 | * -no need for CCK- */ | ||
1113 | ah->ah_calibration = false; | ||
1114 | if (!(mode == AR5K_MODE_11B)) { | ||
1115 | ah->ah_calibration = true; | ||
1116 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, | ||
1117 | AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15); | ||
1118 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, | ||
1119 | AR5K_PHY_IQ_RUN); | ||
1120 | } | ||
1121 | |||
1122 | /* Wait for gain calibration to finish (we check for I/Q calibration | ||
1123 | * during ath5k_phy_calibrate) */ | ||
1085 | if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, | 1124 | if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, |
1086 | AR5K_PHY_AGCCTL_CAL, 0, false)) { | 1125 | AR5K_PHY_AGCCTL_CAL, 0, false)) { |
1087 | ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", | 1126 | ATH5K_ERR(ah->ah_sc, "gain calibration timeout (%uMHz)\n", |
1088 | channel->center_freq); | 1127 | channel->center_freq); |
1089 | return -EAGAIN; | 1128 | return -EAGAIN; |
1090 | } | 1129 | } |
1091 | 1130 | ||
1131 | /* | ||
1132 | * Start noise floor calibration | ||
1133 | * | ||
1134 | * If we run NF calibration before AGC, it always times out. | ||
1135 | * Binary HAL starts NF and AGC calibration at the same time | ||
1136 | * and only waits for AGC to finish. I believe that's wrong because | ||
1137 | * during NF calibration, rx path is also routed to a detector, so if | ||
1138 | * it doesn't finish we won't have RX. | ||
1139 | * | ||
1140 | * XXX: Find an interval that's OK for all cards... | ||
1141 | */ | ||
1092 | ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq); | 1142 | ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq); |
1093 | if (ret) | 1143 | if (ret) |
1094 | return ret; | 1144 | return ret; |
1095 | 1145 | ||
1096 | ah->ah_calibration = false; | ||
1097 | |||
1098 | /* A and G modes can use QAM modulation which requires enabling | ||
1099 | * I and Q calibration. Don't bother in B mode. */ | ||
1100 | if (!(mode == AR5K_MODE_11B)) { | ||
1101 | ah->ah_calibration = true; | ||
1102 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, | ||
1103 | AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15); | ||
1104 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, | ||
1105 | AR5K_PHY_IQ_RUN); | ||
1106 | } | ||
1107 | |||
1108 | /* | 1146 | /* |
1109 | * Reset queues and start beacon timers at the end of the reset routine | 1147 | * Reset queues and start beacon timers at the end of the reset routine |
1110 | */ | 1148 | */ |
@@ -1154,6 +1192,12 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, | |||
1154 | ath5k_hw_reg_write(ah, AR5K_PHY_SCLOCK_32MHZ, AR5K_PHY_SCLOCK); | 1192 | ath5k_hw_reg_write(ah, AR5K_PHY_SCLOCK_32MHZ, AR5K_PHY_SCLOCK); |
1155 | ath5k_hw_reg_write(ah, AR5K_PHY_SDELAY_32MHZ, AR5K_PHY_SDELAY); | 1193 | ath5k_hw_reg_write(ah, AR5K_PHY_SDELAY_32MHZ, AR5K_PHY_SDELAY); |
1156 | ath5k_hw_reg_write(ah, ah->ah_phy_spending, AR5K_PHY_SPENDING); | 1194 | ath5k_hw_reg_write(ah, ah->ah_phy_spending, AR5K_PHY_SPENDING); |
1195 | |||
1196 | data = ath5k_hw_reg_read(ah, AR5K_USEC_5211) & 0xffffc07f ; | ||
1197 | data |= (ah->ah_phy_spending == AR5K_PHY_SPENDING_18) ? | ||
1198 | 0x00000f80 : 0x00001380 ; | ||
1199 | ath5k_hw_reg_write(ah, data, AR5K_USEC_5211); | ||
1200 | data = 0; | ||
1157 | } | 1201 | } |
1158 | 1202 | ||
1159 | if (ah->ah_version == AR5K_AR5212) { | 1203 | if (ah->ah_version == AR5K_AR5212) { |
@@ -1226,7 +1270,7 @@ int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, | |||
1226 | bool set_chip, u16 sleep_duration) | 1270 | bool set_chip, u16 sleep_duration) |
1227 | { | 1271 | { |
1228 | unsigned int i; | 1272 | unsigned int i; |
1229 | u32 staid; | 1273 | u32 staid, data; |
1230 | 1274 | ||
1231 | ATH5K_TRACE(ah->ah_sc); | 1275 | ATH5K_TRACE(ah->ah_sc); |
1232 | staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1); | 1276 | staid = ath5k_hw_reg_read(ah, AR5K_STA_ID1); |
@@ -1238,7 +1282,8 @@ int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, | |||
1238 | case AR5K_PM_NETWORK_SLEEP: | 1282 | case AR5K_PM_NETWORK_SLEEP: |
1239 | if (set_chip) | 1283 | if (set_chip) |
1240 | ath5k_hw_reg_write(ah, | 1284 | ath5k_hw_reg_write(ah, |
1241 | AR5K_SLEEP_CTL_SLE | sleep_duration, | 1285 | AR5K_SLEEP_CTL_SLE_ALLOW | |
1286 | sleep_duration, | ||
1242 | AR5K_SLEEP_CTL); | 1287 | AR5K_SLEEP_CTL); |
1243 | 1288 | ||
1244 | staid |= AR5K_STA_ID1_PWR_SV; | 1289 | staid |= AR5K_STA_ID1_PWR_SV; |
@@ -1253,13 +1298,24 @@ int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, | |||
1253 | break; | 1298 | break; |
1254 | 1299 | ||
1255 | case AR5K_PM_AWAKE: | 1300 | case AR5K_PM_AWAKE: |
1301 | |||
1302 | staid &= ~AR5K_STA_ID1_PWR_SV; | ||
1303 | |||
1256 | if (!set_chip) | 1304 | if (!set_chip) |
1257 | goto commit; | 1305 | goto commit; |
1258 | 1306 | ||
1259 | ath5k_hw_reg_write(ah, AR5K_SLEEP_CTL_SLE_WAKE, | 1307 | /* Preserve sleep duration */ |
1260 | AR5K_SLEEP_CTL); | 1308 | data = ath5k_hw_reg_read(ah, AR5K_SLEEP_CTL); |
1309 | if( data & 0xffc00000 ){ | ||
1310 | data = 0; | ||
1311 | } else { | ||
1312 | data = data & 0xfffcffff; | ||
1313 | } | ||
1261 | 1314 | ||
1262 | for (i = 5000; i > 0; i--) { | 1315 | ath5k_hw_reg_write(ah, data, AR5K_SLEEP_CTL); |
1316 | udelay(15); | ||
1317 | |||
1318 | for (i = 50; i > 0; i--) { | ||
1263 | /* Check if the chip did wake up */ | 1319 | /* Check if the chip did wake up */ |
1264 | if ((ath5k_hw_reg_read(ah, AR5K_PCICFG) & | 1320 | if ((ath5k_hw_reg_read(ah, AR5K_PCICFG) & |
1265 | AR5K_PCICFG_SPWR_DN) == 0) | 1321 | AR5K_PCICFG_SPWR_DN) == 0) |
@@ -1267,15 +1323,13 @@ int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, | |||
1267 | 1323 | ||
1268 | /* Wait a bit and retry */ | 1324 | /* Wait a bit and retry */ |
1269 | udelay(200); | 1325 | udelay(200); |
1270 | ath5k_hw_reg_write(ah, AR5K_SLEEP_CTL_SLE_WAKE, | 1326 | ath5k_hw_reg_write(ah, data, AR5K_SLEEP_CTL); |
1271 | AR5K_SLEEP_CTL); | ||
1272 | } | 1327 | } |
1273 | 1328 | ||
1274 | /* Fail if the chip didn't wake up */ | 1329 | /* Fail if the chip didn't wake up */ |
1275 | if (i <= 0) | 1330 | if (i <= 0) |
1276 | return -EIO; | 1331 | return -EIO; |
1277 | 1332 | ||
1278 | staid &= ~AR5K_STA_ID1_PWR_SV; | ||
1279 | break; | 1333 | break; |
1280 | 1334 | ||
1281 | default: | 1335 | default: |
@@ -1304,6 +1358,7 @@ void ath5k_hw_start_rx(struct ath5k_hw *ah) | |||
1304 | { | 1358 | { |
1305 | ATH5K_TRACE(ah->ah_sc); | 1359 | ATH5K_TRACE(ah->ah_sc); |
1306 | ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR); | 1360 | ath5k_hw_reg_write(ah, AR5K_CR_RXE, AR5K_CR); |
1361 | ath5k_hw_reg_read(ah, AR5K_CR); | ||
1307 | } | 1362 | } |
1308 | 1363 | ||
1309 | /* | 1364 | /* |
@@ -1390,6 +1445,7 @@ int ath5k_hw_tx_start(struct ath5k_hw *ah, unsigned int queue) | |||
1390 | } | 1445 | } |
1391 | /* Start queue */ | 1446 | /* Start queue */ |
1392 | ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); | 1447 | ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); |
1448 | ath5k_hw_reg_read(ah, AR5K_CR); | ||
1393 | } else { | 1449 | } else { |
1394 | /* Return if queue is disabled */ | 1450 | /* Return if queue is disabled */ |
1395 | if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXD, queue)) | 1451 | if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXD, queue)) |
@@ -1440,6 +1496,7 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) | |||
1440 | 1496 | ||
1441 | /* Stop queue */ | 1497 | /* Stop queue */ |
1442 | ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); | 1498 | ath5k_hw_reg_write(ah, tx_queue, AR5K_CR); |
1499 | ath5k_hw_reg_read(ah, AR5K_CR); | ||
1443 | } else { | 1500 | } else { |
1444 | /* | 1501 | /* |
1445 | * Schedule TX disable and wait until queue is empty | 1502 | * Schedule TX disable and wait until queue is empty |
@@ -1456,6 +1513,8 @@ int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue) | |||
1456 | 1513 | ||
1457 | /* Clear register */ | 1514 | /* Clear register */ |
1458 | ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); | 1515 | ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); |
1516 | if (pending) | ||
1517 | return -EBUSY; | ||
1459 | } | 1518 | } |
1460 | 1519 | ||
1461 | /* TODO: Check for success else return error */ | 1520 | /* TODO: Check for success else return error */ |
@@ -1684,6 +1743,7 @@ enum ath5k_int ath5k_hw_set_intr(struct ath5k_hw *ah, enum ath5k_int new_mask) | |||
1684 | * (they will be re-enabled afterwards). | 1743 | * (they will be re-enabled afterwards). |
1685 | */ | 1744 | */ |
1686 | ath5k_hw_reg_write(ah, AR5K_IER_DISABLE, AR5K_IER); | 1745 | ath5k_hw_reg_write(ah, AR5K_IER_DISABLE, AR5K_IER); |
1746 | ath5k_hw_reg_read(ah, AR5K_IER); | ||
1687 | 1747 | ||
1688 | old_mask = ah->ah_imr; | 1748 | old_mask = ah->ah_imr; |
1689 | 1749 | ||
@@ -1716,6 +1776,7 @@ enum ath5k_int ath5k_hw_set_intr(struct ath5k_hw *ah, enum ath5k_int new_mask) | |||
1716 | 1776 | ||
1717 | /* ..re-enable interrupts */ | 1777 | /* ..re-enable interrupts */ |
1718 | ath5k_hw_reg_write(ah, AR5K_IER_ENABLE, AR5K_IER); | 1778 | ath5k_hw_reg_write(ah, AR5K_IER_ENABLE, AR5K_IER); |
1779 | ath5k_hw_reg_read(ah, AR5K_IER); | ||
1719 | 1780 | ||
1720 | return old_mask; | 1781 | return old_mask; |
1721 | } | 1782 | } |
@@ -3359,11 +3420,13 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) | |||
3359 | ath5k_hw_reg_write(ah, ah->ah_turbo ? | 3420 | ath5k_hw_reg_write(ah, ah->ah_turbo ? |
3360 | AR5K_INIT_PROTO_TIME_CNTRL_TURBO : | 3421 | AR5K_INIT_PROTO_TIME_CNTRL_TURBO : |
3361 | AR5K_INIT_PROTO_TIME_CNTRL, AR5K_IFS1); | 3422 | AR5K_INIT_PROTO_TIME_CNTRL, AR5K_IFS1); |
3362 | /* Set PHY register 0x9844 (??) */ | 3423 | /* Set AR5K_PHY_SETTLING */ |
3363 | ath5k_hw_reg_write(ah, ah->ah_turbo ? | 3424 | ath5k_hw_reg_write(ah, ah->ah_turbo ? |
3364 | (ath5k_hw_reg_read(ah, AR5K_PHY(17)) & ~0x7F) | 0x38 : | 3425 | (ath5k_hw_reg_read(ah, AR5K_PHY_SETTLING) & ~0x7F) |
3365 | (ath5k_hw_reg_read(ah, AR5K_PHY(17)) & ~0x7F) | 0x1C, | 3426 | | 0x38 : |
3366 | AR5K_PHY(17)); | 3427 | (ath5k_hw_reg_read(ah, AR5K_PHY_SETTLING) & ~0x7F) |
3428 | | 0x1C, | ||
3429 | AR5K_PHY_SETTLING); | ||
3367 | /* Set Frame Control Register */ | 3430 | /* Set Frame Control Register */ |
3368 | ath5k_hw_reg_write(ah, ah->ah_turbo ? | 3431 | ath5k_hw_reg_write(ah, ah->ah_turbo ? |
3369 | (AR5K_PHY_FRAME_CTL_INI | AR5K_PHY_TURBO_MODE | | 3432 | (AR5K_PHY_FRAME_CTL_INI | AR5K_PHY_TURBO_MODE | |
@@ -3484,7 +3547,7 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) | |||
3484 | if (tq->tqi_flags & AR5K_TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE) | 3547 | if (tq->tqi_flags & AR5K_TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE) |
3485 | AR5K_REG_ENABLE_BITS(ah, | 3548 | AR5K_REG_ENABLE_BITS(ah, |
3486 | AR5K_QUEUE_MISC(queue), | 3549 | AR5K_QUEUE_MISC(queue), |
3487 | AR5K_QCU_MISC_TXE); | 3550 | AR5K_QCU_MISC_RDY_VEOL_POLICY); |
3488 | } | 3551 | } |
3489 | 3552 | ||
3490 | if (tq->tqi_flags & AR5K_TXQ_FLAG_BACKOFF_DISABLE) | 3553 | if (tq->tqi_flags & AR5K_TXQ_FLAG_BACKOFF_DISABLE) |
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c index 04c84e9da89d..2806b21bf90b 100644 --- a/drivers/net/wireless/ath5k/initvals.c +++ b/drivers/net/wireless/ath5k/initvals.c | |||
@@ -489,7 +489,7 @@ static const struct ath5k_ini ar5212_ini[] = { | |||
489 | { AR5K_QUEUE_TXDP(9), 0x00000000 }, | 489 | { AR5K_QUEUE_TXDP(9), 0x00000000 }, |
490 | { AR5K_DCU_FP, 0x00000000 }, | 490 | { AR5K_DCU_FP, 0x00000000 }, |
491 | { AR5K_DCU_TXP, 0x00000000 }, | 491 | { AR5K_DCU_TXP, 0x00000000 }, |
492 | { AR5K_DCU_TX_FILTER, 0x00000000 }, | 492 | { AR5K_DCU_TX_FILTER_0_BASE, 0x00000000 }, |
493 | /* Unknown table */ | 493 | /* Unknown table */ |
494 | { 0x1078, 0x00000000 }, | 494 | { 0x1078, 0x00000000 }, |
495 | { 0x10b8, 0x00000000 }, | 495 | { 0x10b8, 0x00000000 }, |
@@ -679,7 +679,7 @@ static const struct ath5k_ini ar5212_ini[] = { | |||
679 | { AR5K_PHY(645), 0x00106c10 }, | 679 | { AR5K_PHY(645), 0x00106c10 }, |
680 | { AR5K_PHY(646), 0x009c4060 }, | 680 | { AR5K_PHY(646), 0x009c4060 }, |
681 | { AR5K_PHY(647), 0x1483800a }, | 681 | { AR5K_PHY(647), 0x1483800a }, |
682 | /* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413 */ | 682 | /* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413/2425 */ |
683 | { AR5K_PHY(648), 0x01831061 }, | 683 | { AR5K_PHY(648), 0x01831061 }, |
684 | { AR5K_PHY(649), 0x00000400 }, | 684 | { AR5K_PHY(649), 0x00000400 }, |
685 | /*{ AR5K_PHY(650), 0x000001b5 },*/ | 685 | /*{ AR5K_PHY(650), 0x000001b5 },*/ |
diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath5k/phy.c index afd8689e5c03..fa0d47faf574 100644 --- a/drivers/net/wireless/ath5k/phy.c +++ b/drivers/net/wireless/ath5k/phy.c | |||
@@ -1020,6 +1020,74 @@ static const struct ath5k_ini_rfgain rfgain_2413[] = { | |||
1020 | { AR5K_RF_GAIN(63), { 0x000000f9 } }, | 1020 | { AR5K_RF_GAIN(63), { 0x000000f9 } }, |
1021 | }; | 1021 | }; |
1022 | 1022 | ||
1023 | /* Initial RF Gain settings for RF2425 */ | ||
1024 | static const struct ath5k_ini_rfgain rfgain_2425[] = { | ||
1025 | { AR5K_RF_GAIN(0), { 0x00000000 } }, | ||
1026 | { AR5K_RF_GAIN(1), { 0x00000040 } }, | ||
1027 | { AR5K_RF_GAIN(2), { 0x00000080 } }, | ||
1028 | { AR5K_RF_GAIN(3), { 0x00000181 } }, | ||
1029 | { AR5K_RF_GAIN(4), { 0x000001c1 } }, | ||
1030 | { AR5K_RF_GAIN(5), { 0x00000001 } }, | ||
1031 | { AR5K_RF_GAIN(6), { 0x00000041 } }, | ||
1032 | { AR5K_RF_GAIN(7), { 0x00000081 } }, | ||
1033 | { AR5K_RF_GAIN(8), { 0x00000188 } }, | ||
1034 | { AR5K_RF_GAIN(9), { 0x000001c8 } }, | ||
1035 | { AR5K_RF_GAIN(10), { 0x00000008 } }, | ||
1036 | { AR5K_RF_GAIN(11), { 0x00000048 } }, | ||
1037 | { AR5K_RF_GAIN(12), { 0x00000088 } }, | ||
1038 | { AR5K_RF_GAIN(13), { 0x00000189 } }, | ||
1039 | { AR5K_RF_GAIN(14), { 0x000001c9 } }, | ||
1040 | { AR5K_RF_GAIN(15), { 0x00000009 } }, | ||
1041 | { AR5K_RF_GAIN(16), { 0x00000049 } }, | ||
1042 | { AR5K_RF_GAIN(17), { 0x00000089 } }, | ||
1043 | { AR5K_RF_GAIN(18), { 0x000001b0 } }, | ||
1044 | { AR5K_RF_GAIN(19), { 0x000001f0 } }, | ||
1045 | { AR5K_RF_GAIN(20), { 0x00000030 } }, | ||
1046 | { AR5K_RF_GAIN(21), { 0x00000070 } }, | ||
1047 | { AR5K_RF_GAIN(22), { 0x00000171 } }, | ||
1048 | { AR5K_RF_GAIN(23), { 0x000001b1 } }, | ||
1049 | { AR5K_RF_GAIN(24), { 0x000001f1 } }, | ||
1050 | { AR5K_RF_GAIN(25), { 0x00000031 } }, | ||
1051 | { AR5K_RF_GAIN(26), { 0x00000071 } }, | ||
1052 | { AR5K_RF_GAIN(27), { 0x000001b8 } }, | ||
1053 | { AR5K_RF_GAIN(28), { 0x000001f8 } }, | ||
1054 | { AR5K_RF_GAIN(29), { 0x00000038 } }, | ||
1055 | { AR5K_RF_GAIN(30), { 0x00000078 } }, | ||
1056 | { AR5K_RF_GAIN(31), { 0x000000b8 } }, | ||
1057 | { AR5K_RF_GAIN(32), { 0x000001b9 } }, | ||
1058 | { AR5K_RF_GAIN(33), { 0x000001f9 } }, | ||
1059 | { AR5K_RF_GAIN(34), { 0x00000039 } }, | ||
1060 | { AR5K_RF_GAIN(35), { 0x00000079 } }, | ||
1061 | { AR5K_RF_GAIN(36), { 0x000000b9 } }, | ||
1062 | { AR5K_RF_GAIN(37), { 0x000000f9 } }, | ||
1063 | { AR5K_RF_GAIN(38), { 0x000000f9 } }, | ||
1064 | { AR5K_RF_GAIN(39), { 0x000000f9 } }, | ||
1065 | { AR5K_RF_GAIN(40), { 0x000000f9 } }, | ||
1066 | { AR5K_RF_GAIN(41), { 0x000000f9 } }, | ||
1067 | { AR5K_RF_GAIN(42), { 0x000000f9 } }, | ||
1068 | { AR5K_RF_GAIN(43), { 0x000000f9 } }, | ||
1069 | { AR5K_RF_GAIN(44), { 0x000000f9 } }, | ||
1070 | { AR5K_RF_GAIN(45), { 0x000000f9 } }, | ||
1071 | { AR5K_RF_GAIN(46), { 0x000000f9 } }, | ||
1072 | { AR5K_RF_GAIN(47), { 0x000000f9 } }, | ||
1073 | { AR5K_RF_GAIN(48), { 0x000000f9 } }, | ||
1074 | { AR5K_RF_GAIN(49), { 0x000000f9 } }, | ||
1075 | { AR5K_RF_GAIN(50), { 0x000000f9 } }, | ||
1076 | { AR5K_RF_GAIN(51), { 0x000000f9 } }, | ||
1077 | { AR5K_RF_GAIN(52), { 0x000000f9 } }, | ||
1078 | { AR5K_RF_GAIN(53), { 0x000000f9 } }, | ||
1079 | { AR5K_RF_GAIN(54), { 0x000000f9 } }, | ||
1080 | { AR5K_RF_GAIN(55), { 0x000000f9 } }, | ||
1081 | { AR5K_RF_GAIN(56), { 0x000000f9 } }, | ||
1082 | { AR5K_RF_GAIN(57), { 0x000000f9 } }, | ||
1083 | { AR5K_RF_GAIN(58), { 0x000000f9 } }, | ||
1084 | { AR5K_RF_GAIN(59), { 0x000000f9 } }, | ||
1085 | { AR5K_RF_GAIN(60), { 0x000000f9 } }, | ||
1086 | { AR5K_RF_GAIN(61), { 0x000000f9 } }, | ||
1087 | { AR5K_RF_GAIN(62), { 0x000000f9 } }, | ||
1088 | { AR5K_RF_GAIN(63), { 0x000000f9 } }, | ||
1089 | }; | ||
1090 | |||
1023 | static const struct ath5k_gain_opt rfgain_opt_5112 = { | 1091 | static const struct ath5k_gain_opt rfgain_opt_5112 = { |
1024 | 1, | 1092 | 1, |
1025 | 8, | 1093 | 8, |
@@ -1588,8 +1656,8 @@ int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq) | |||
1588 | freq = 0; /* only 2Ghz */ | 1656 | freq = 0; /* only 2Ghz */ |
1589 | break; | 1657 | break; |
1590 | case AR5K_RF2425: | 1658 | case AR5K_RF2425: |
1591 | ath5k_rfg = rfgain_2413; | 1659 | ath5k_rfg = rfgain_2425; |
1592 | size = ARRAY_SIZE(rfgain_2413); | 1660 | size = ARRAY_SIZE(rfgain_2425); |
1593 | freq = 0; /* only 2Ghz */ | 1661 | freq = 0; /* only 2Ghz */ |
1594 | break; | 1662 | break; |
1595 | default: | 1663 | default: |
@@ -1830,9 +1898,6 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, | |||
1830 | data = data0 = data1 = data2 = 0; | 1898 | data = data0 = data1 = data2 = 0; |
1831 | c = channel->center_freq; | 1899 | c = channel->center_freq; |
1832 | 1900 | ||
1833 | /* | ||
1834 | * Set the channel on the RF5112 or newer | ||
1835 | */ | ||
1836 | if (c < 4800) { | 1901 | if (c < 4800) { |
1837 | if (!((c - 2224) % 5)) { | 1902 | if (!((c - 2224) % 5)) { |
1838 | data0 = ((2 * (c - 704)) - 3040) / 10; | 1903 | data0 = ((2 * (c - 704)) - 3040) / 10; |
@@ -1844,7 +1909,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, | |||
1844 | return -EINVAL; | 1909 | return -EINVAL; |
1845 | 1910 | ||
1846 | data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8); | 1911 | data0 = ath5k_hw_bitswap((data0 << 2) & 0xff, 8); |
1847 | } else { | 1912 | } else if ((c - (c % 5)) != 2 || c > 5435) { |
1848 | if (!(c % 20) && c >= 5120) { | 1913 | if (!(c % 20) && c >= 5120) { |
1849 | data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); | 1914 | data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); |
1850 | data2 = ath5k_hw_bitswap(3, 2); | 1915 | data2 = ath5k_hw_bitswap(3, 2); |
@@ -1856,6 +1921,9 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, | |||
1856 | data2 = ath5k_hw_bitswap(1, 2); | 1921 | data2 = ath5k_hw_bitswap(1, 2); |
1857 | } else | 1922 | } else |
1858 | return -EINVAL; | 1923 | return -EINVAL; |
1924 | } else { | ||
1925 | data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); | ||
1926 | data2 = ath5k_hw_bitswap(0, 2); | ||
1859 | } | 1927 | } |
1860 | 1928 | ||
1861 | data = (data0 << 4) | (data1 << 1) | (data2 << 2) | 0x1001; | 1929 | data = (data0 << 4) | (data1 << 1) | (data2 << 2) | 0x1001; |
@@ -1867,6 +1935,45 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, | |||
1867 | } | 1935 | } |
1868 | 1936 | ||
1869 | /* | 1937 | /* |
1938 | * Set the channel on the RF2425 | ||
1939 | */ | ||
1940 | static int ath5k_hw_rf2425_channel(struct ath5k_hw *ah, | ||
1941 | struct ieee80211_channel *channel) | ||
1942 | { | ||
1943 | u32 data, data0, data2; | ||
1944 | u16 c; | ||
1945 | |||
1946 | data = data0 = data2 = 0; | ||
1947 | c = channel->center_freq; | ||
1948 | |||
1949 | if (c < 4800) { | ||
1950 | data0 = ath5k_hw_bitswap((c - 2272), 8); | ||
1951 | data2 = 0; | ||
1952 | /* ? 5GHz ? */ | ||
1953 | } else if ((c - (c % 5)) != 2 || c > 5435) { | ||
1954 | if (!(c % 20) && c < 5120) | ||
1955 | data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); | ||
1956 | else if (!(c % 10)) | ||
1957 | data0 = ath5k_hw_bitswap(((c - 4800) / 10 << 1), 8); | ||
1958 | else if (!(c % 5)) | ||
1959 | data0 = ath5k_hw_bitswap((c - 4800) / 5, 8); | ||
1960 | else | ||
1961 | return -EINVAL; | ||
1962 | data2 = ath5k_hw_bitswap(1, 2); | ||
1963 | } else { | ||
1964 | data0 = ath5k_hw_bitswap((10 * (c - 2) - 4800) / 25 + 1, 8); | ||
1965 | data2 = ath5k_hw_bitswap(0, 2); | ||
1966 | } | ||
1967 | |||
1968 | data = (data0 << 4) | data2 << 2 | 0x1001; | ||
1969 | |||
1970 | ath5k_hw_reg_write(ah, data & 0xff, AR5K_RF_BUFFER); | ||
1971 | ath5k_hw_reg_write(ah, (data >> 8) & 0x7f, AR5K_RF_BUFFER_CONTROL_5); | ||
1972 | |||
1973 | return 0; | ||
1974 | } | ||
1975 | |||
1976 | /* | ||
1870 | * Set a channel on the radio chip | 1977 | * Set a channel on the radio chip |
1871 | */ | 1978 | */ |
1872 | int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | 1979 | int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) |
@@ -1895,6 +2002,9 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1895 | case AR5K_RF5111: | 2002 | case AR5K_RF5111: |
1896 | ret = ath5k_hw_rf5111_channel(ah, channel); | 2003 | ret = ath5k_hw_rf5111_channel(ah, channel); |
1897 | break; | 2004 | break; |
2005 | case AR5K_RF2425: | ||
2006 | ret = ath5k_hw_rf2425_channel(ah, channel); | ||
2007 | break; | ||
1898 | default: | 2008 | default: |
1899 | ret = ath5k_hw_rf5112_channel(ah, channel); | 2009 | ret = ath5k_hw_rf5112_channel(ah, channel); |
1900 | break; | 2010 | break; |
@@ -1903,6 +2013,15 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1903 | if (ret) | 2013 | if (ret) |
1904 | return ret; | 2014 | return ret; |
1905 | 2015 | ||
2016 | /* Set JAPAN setting for channel 14 */ | ||
2017 | if (channel->center_freq == 2484) { | ||
2018 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_CCKTXCTL, | ||
2019 | AR5K_PHY_CCKTXCTL_JAPAN); | ||
2020 | } else { | ||
2021 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_CCKTXCTL, | ||
2022 | AR5K_PHY_CCKTXCTL_WORLD); | ||
2023 | } | ||
2024 | |||
1906 | ah->ah_current_channel.center_freq = channel->center_freq; | 2025 | ah->ah_current_channel.center_freq = channel->center_freq; |
1907 | ah->ah_current_channel.hw_value = channel->hw_value; | 2026 | ah->ah_current_channel.hw_value = channel->hw_value; |
1908 | ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false; | 2027 | ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false; |
@@ -1933,6 +2052,8 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) | |||
1933 | * http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL \ | 2052 | * http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL \ |
1934 | * &p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7245893.PN.&OS=PN/7 | 2053 | * &p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7245893.PN.&OS=PN/7 |
1935 | * | 2054 | * |
2055 | * XXX: Since during noise floor calibration antennas are detached according to | ||
2056 | * the patent, we should stop tx queues here. | ||
1936 | */ | 2057 | */ |
1937 | int | 2058 | int |
1938 | ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq) | 2059 | ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq) |
@@ -1942,7 +2063,7 @@ ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq) | |||
1942 | s32 noise_floor; | 2063 | s32 noise_floor; |
1943 | 2064 | ||
1944 | /* | 2065 | /* |
1945 | * Enable noise floor calibration and wait until completion | 2066 | * Enable noise floor calibration |
1946 | */ | 2067 | */ |
1947 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, | 2068 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, |
1948 | AR5K_PHY_AGCCTL_NF); | 2069 | AR5K_PHY_AGCCTL_NF); |
@@ -1952,7 +2073,7 @@ ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq) | |||
1952 | if (ret) { | 2073 | if (ret) { |
1953 | ATH5K_ERR(ah->ah_sc, | 2074 | ATH5K_ERR(ah->ah_sc, |
1954 | "noise floor calibration timeout (%uMHz)\n", freq); | 2075 | "noise floor calibration timeout (%uMHz)\n", freq); |
1955 | return ret; | 2076 | return -EAGAIN; |
1956 | } | 2077 | } |
1957 | 2078 | ||
1958 | /* Wait until the noise floor is calibrated and read the value */ | 2079 | /* Wait until the noise floor is calibrated and read the value */ |
@@ -1974,7 +2095,7 @@ ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq) | |||
1974 | if (noise_floor > AR5K_TUNE_NOISE_FLOOR) { | 2095 | if (noise_floor > AR5K_TUNE_NOISE_FLOOR) { |
1975 | ATH5K_ERR(ah->ah_sc, | 2096 | ATH5K_ERR(ah->ah_sc, |
1976 | "noise floor calibration failed (%uMHz)\n", freq); | 2097 | "noise floor calibration failed (%uMHz)\n", freq); |
1977 | return -EIO; | 2098 | return -EAGAIN; |
1978 | } | 2099 | } |
1979 | 2100 | ||
1980 | ah->ah_noise_floor = noise_floor; | 2101 | ah->ah_noise_floor = noise_floor; |
@@ -2087,38 +2208,66 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, | |||
2087 | } | 2208 | } |
2088 | 2209 | ||
2089 | /* | 2210 | /* |
2090 | * Perform a PHY calibration on RF5111/5112 | 2211 | * Perform a PHY calibration on RF5111/5112 and newer chips |
2091 | */ | 2212 | */ |
2092 | static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, | 2213 | static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, |
2093 | struct ieee80211_channel *channel) | 2214 | struct ieee80211_channel *channel) |
2094 | { | 2215 | { |
2095 | u32 i_pwr, q_pwr; | 2216 | u32 i_pwr, q_pwr; |
2096 | s32 iq_corr, i_coff, i_coffd, q_coff, q_coffd; | 2217 | s32 iq_corr, i_coff, i_coffd, q_coff, q_coffd; |
2218 | int i; | ||
2097 | ATH5K_TRACE(ah->ah_sc); | 2219 | ATH5K_TRACE(ah->ah_sc); |
2098 | 2220 | ||
2099 | if (!ah->ah_calibration || | 2221 | if (!ah->ah_calibration || |
2100 | ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & AR5K_PHY_IQ_RUN) | 2222 | ath5k_hw_reg_read(ah, AR5K_PHY_IQ) & AR5K_PHY_IQ_RUN) |
2101 | goto done; | 2223 | goto done; |
2102 | 2224 | ||
2103 | ah->ah_calibration = false; | 2225 | /* Calibration has finished, get the results and re-run */ |
2226 | for (i = 0; i <= 10; i++) { | ||
2227 | iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); | ||
2228 | i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); | ||
2229 | q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); | ||
2230 | } | ||
2104 | 2231 | ||
2105 | iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); | ||
2106 | i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); | ||
2107 | q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); | ||
2108 | i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; | 2232 | i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; |
2109 | q_coffd = q_pwr >> 6; | 2233 | q_coffd = q_pwr >> 7; |
2110 | 2234 | ||
2235 | /* No correction */ | ||
2111 | if (i_coffd == 0 || q_coffd == 0) | 2236 | if (i_coffd == 0 || q_coffd == 0) |
2112 | goto done; | 2237 | goto done; |
2113 | 2238 | ||
2114 | i_coff = ((-iq_corr) / i_coffd) & 0x3f; | 2239 | i_coff = ((-iq_corr) / i_coffd) & 0x3f; |
2115 | q_coff = (((s32)i_pwr / q_coffd) - 64) & 0x1f; | ||
2116 | 2240 | ||
2117 | /* Commit new IQ value */ | 2241 | /* Boundary check */ |
2242 | if (i_coff > 31) | ||
2243 | i_coff = 31; | ||
2244 | if (i_coff < -32) | ||
2245 | i_coff = -32; | ||
2246 | |||
2247 | q_coff = (((s32)i_pwr / q_coffd) - 128) & 0x1f; | ||
2248 | |||
2249 | /* Boundary check */ | ||
2250 | if (q_coff > 15) | ||
2251 | q_coff = 15; | ||
2252 | if (q_coff < -16) | ||
2253 | q_coff = -16; | ||
2254 | |||
2255 | /* Commit new I/Q value */ | ||
2118 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE | | 2256 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE | |
2119 | ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); | 2257 | ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); |
2120 | 2258 | ||
2259 | /* Re-enable calibration -if we don't we'll commit | ||
2260 | * the same values again and again */ | ||
2261 | AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, | ||
2262 | AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15); | ||
2263 | AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_RUN); | ||
2264 | |||
2121 | done: | 2265 | done: |
2266 | |||
2267 | /* TODO: Separate noise floor calibration from I/Q calibration | ||
2268 | * since noise floor calibration interrupts rx path while I/Q | ||
2269 | * calibration doesn't. We don't need to run noise floor calibration | ||
2270 | * as often as I/Q calibration.*/ | ||
2122 | ath5k_hw_noise_floor_calibration(ah, channel->center_freq); | 2271 | ath5k_hw_noise_floor_calibration(ah, channel->center_freq); |
2123 | 2272 | ||
2124 | /* Request RF gain */ | 2273 | /* Request RF gain */ |
diff --git a/drivers/net/wireless/ath5k/reg.h b/drivers/net/wireless/ath5k/reg.h index 30629b3e37c2..7562bf173d3e 100644 --- a/drivers/net/wireless/ath5k/reg.h +++ b/drivers/net/wireless/ath5k/reg.h | |||
@@ -53,7 +53,7 @@ | |||
53 | #define AR5K_CR_TXD0 0x00000008 /* TX Disable for queue 0 on 5210 */ | 53 | #define AR5K_CR_TXD0 0x00000008 /* TX Disable for queue 0 on 5210 */ |
54 | #define AR5K_CR_TXD1 0x00000010 /* TX Disable for queue 1 on 5210 */ | 54 | #define AR5K_CR_TXD1 0x00000010 /* TX Disable for queue 1 on 5210 */ |
55 | #define AR5K_CR_RXD 0x00000020 /* RX Disable */ | 55 | #define AR5K_CR_RXD 0x00000020 /* RX Disable */ |
56 | #define AR5K_CR_SWI 0x00000040 | 56 | #define AR5K_CR_SWI 0x00000040 /* Software Interrupt */ |
57 | 57 | ||
58 | /* | 58 | /* |
59 | * RX Descriptor Pointer register | 59 | * RX Descriptor Pointer register |
@@ -65,19 +65,19 @@ | |||
65 | */ | 65 | */ |
66 | #define AR5K_CFG 0x0014 /* Register Address */ | 66 | #define AR5K_CFG 0x0014 /* Register Address */ |
67 | #define AR5K_CFG_SWTD 0x00000001 /* Byte-swap TX descriptor (for big endian archs) */ | 67 | #define AR5K_CFG_SWTD 0x00000001 /* Byte-swap TX descriptor (for big endian archs) */ |
68 | #define AR5K_CFG_SWTB 0x00000002 /* Byte-swap TX buffer (?) */ | 68 | #define AR5K_CFG_SWTB 0x00000002 /* Byte-swap TX buffer */ |
69 | #define AR5K_CFG_SWRD 0x00000004 /* Byte-swap RX descriptor */ | 69 | #define AR5K_CFG_SWRD 0x00000004 /* Byte-swap RX descriptor */ |
70 | #define AR5K_CFG_SWRB 0x00000008 /* Byte-swap RX buffer (?) */ | 70 | #define AR5K_CFG_SWRB 0x00000008 /* Byte-swap RX buffer */ |
71 | #define AR5K_CFG_SWRG 0x00000010 /* Byte-swap Register values (?) */ | 71 | #define AR5K_CFG_SWRG 0x00000010 /* Byte-swap Register access */ |
72 | #define AR5K_CFG_ADHOC 0x00000020 /* [5211+] */ | 72 | #define AR5K_CFG_ADHOC 0x00000020 /* AP/Adhoc indication [5211+] */ |
73 | #define AR5K_CFG_PHY_OK 0x00000100 /* [5211+] */ | 73 | #define AR5K_CFG_PHY_OK 0x00000100 /* [5211+] */ |
74 | #define AR5K_CFG_EEBS 0x00000200 /* EEPROM is busy */ | 74 | #define AR5K_CFG_EEBS 0x00000200 /* EEPROM is busy */ |
75 | #define AR5K_CFG_CLKGD 0x00000400 /* Clock gated (?) */ | 75 | #define AR5K_CFG_CLKGD 0x00000400 /* Clock gated (Disable dynamic clock) */ |
76 | #define AR5K_CFG_TXCNT 0x00007800 /* Tx frame count (?) [5210] */ | 76 | #define AR5K_CFG_TXCNT 0x00007800 /* Tx frame count (?) [5210] */ |
77 | #define AR5K_CFG_TXCNT_S 11 | 77 | #define AR5K_CFG_TXCNT_S 11 |
78 | #define AR5K_CFG_TXFSTAT 0x00008000 /* Tx frame status (?) [5210] */ | 78 | #define AR5K_CFG_TXFSTAT 0x00008000 /* Tx frame status (?) [5210] */ |
79 | #define AR5K_CFG_TXFSTRT 0x00010000 /* [5210] */ | 79 | #define AR5K_CFG_TXFSTRT 0x00010000 /* [5210] */ |
80 | #define AR5K_CFG_PCI_THRES 0x00060000 /* [5211+] */ | 80 | #define AR5K_CFG_PCI_THRES 0x00060000 /* PCI Master req q threshold [5211+] */ |
81 | #define AR5K_CFG_PCI_THRES_S 17 | 81 | #define AR5K_CFG_PCI_THRES_S 17 |
82 | 82 | ||
83 | /* | 83 | /* |
@@ -162,35 +162,40 @@ | |||
162 | /* | 162 | /* |
163 | * Transmit configuration register | 163 | * Transmit configuration register |
164 | */ | 164 | */ |
165 | #define AR5K_TXCFG 0x0030 /* Register Address */ | 165 | #define AR5K_TXCFG 0x0030 /* Register Address */ |
166 | #define AR5K_TXCFG_SDMAMR 0x00000007 /* DMA size */ | 166 | #define AR5K_TXCFG_SDMAMR 0x00000007 /* DMA size (read) */ |
167 | #define AR5K_TXCFG_SDMAMR_S 0 | 167 | #define AR5K_TXCFG_SDMAMR_S 0 |
168 | #define AR5K_TXCFG_B_MODE 0x00000008 /* Set b mode for 5111 (enable 2111) */ | 168 | #define AR5K_TXCFG_B_MODE 0x00000008 /* Set b mode for 5111 (enable 2111) */ |
169 | #define AR5K_TXCFG_TXFSTP 0x00000008 /* TX DMA full Stop [5210] */ | 169 | #define AR5K_TXCFG_TXFSTP 0x00000008 /* TX DMA full Stop [5210] */ |
170 | #define AR5K_TXCFG_TXFULL 0x000003f0 /* TX Triger level mask */ | 170 | #define AR5K_TXCFG_TXFULL 0x000003f0 /* TX Triger level mask */ |
171 | #define AR5K_TXCFG_TXFULL_S 4 | 171 | #define AR5K_TXCFG_TXFULL_S 4 |
172 | #define AR5K_TXCFG_TXFULL_0B 0x00000000 | 172 | #define AR5K_TXCFG_TXFULL_0B 0x00000000 |
173 | #define AR5K_TXCFG_TXFULL_64B 0x00000010 | 173 | #define AR5K_TXCFG_TXFULL_64B 0x00000010 |
174 | #define AR5K_TXCFG_TXFULL_128B 0x00000020 | 174 | #define AR5K_TXCFG_TXFULL_128B 0x00000020 |
175 | #define AR5K_TXCFG_TXFULL_192B 0x00000030 | 175 | #define AR5K_TXCFG_TXFULL_192B 0x00000030 |
176 | #define AR5K_TXCFG_TXFULL_256B 0x00000040 | 176 | #define AR5K_TXCFG_TXFULL_256B 0x00000040 |
177 | #define AR5K_TXCFG_TXCONT_EN 0x00000080 | 177 | #define AR5K_TXCFG_TXCONT_EN 0x00000080 |
178 | #define AR5K_TXCFG_DMASIZE 0x00000100 /* Flag for passing DMA size [5210] */ | 178 | #define AR5K_TXCFG_DMASIZE 0x00000100 /* Flag for passing DMA size [5210] */ |
179 | #define AR5K_TXCFG_JUMBO_TXE 0x00000400 /* Enable jumbo frames transmition (?) [5211+] */ | 179 | #define AR5K_TXCFG_JUMBO_DESC_EN 0x00000400 /* Enable jumbo tx descriptors [5211+] */ |
180 | #define AR5K_TXCFG_RTSRND 0x00001000 /* [5211+] */ | 180 | #define AR5K_TXCFG_ADHOC_BCN_ATIM 0x00000800 /* Adhoc Beacon ATIM Policy */ |
181 | #define AR5K_TXCFG_FRMPAD_DIS 0x00002000 /* [5211+] */ | 181 | #define AR5K_TXCFG_ATIM_WINDOW_DEF_DIS 0x00001000 /* Disable ATIM window defer [5211+] */ |
182 | #define AR5K_TXCFG_RDY_DIS 0x00004000 /* [5211+] */ | 182 | #define AR5K_TXCFG_RTSRND 0x00001000 /* [5211+] */ |
183 | #define AR5K_TXCFG_FRMPAD_DIS 0x00002000 /* [5211+] */ | ||
184 | #define AR5K_TXCFG_RDY_CBR_DIS 0x00004000 /* Ready time CBR disable [5211+] */ | ||
185 | #define AR5K_TXCFG_JUMBO_FRM_MODE 0x00008000 /* Jumbo frame mode [5211+] */ | ||
186 | #define AR5K_TXCFG_DCU_CACHING_DIS 0x00010000 /* Disable DCU caching */ | ||
183 | 187 | ||
184 | /* | 188 | /* |
185 | * Receive configuration register | 189 | * Receive configuration register |
186 | */ | 190 | */ |
187 | #define AR5K_RXCFG 0x0034 /* Register Address */ | 191 | #define AR5K_RXCFG 0x0034 /* Register Address */ |
188 | #define AR5K_RXCFG_SDMAMW 0x00000007 /* DMA size */ | 192 | #define AR5K_RXCFG_SDMAMW 0x00000007 /* DMA size (write) */ |
189 | #define AR5K_RXCFG_SDMAMW_S 0 | 193 | #define AR5K_RXCFG_SDMAMW_S 0 |
190 | #define AR5K_RXCFG_DEF_ANTENNA 0x00000008 /* Default antenna */ | 194 | #define AR5K_RXCFG_ZLFDMA 0x00000008 /* Enable Zero-length frame DMA */ |
191 | #define AR5K_RXCFG_ZLFDMA 0x00000010 /* Zero-length DMA */ | 195 | #define AR5K_RXCFG_DEF_ANTENNA 0x00000010 /* Default antenna (?) */ |
192 | #define AR5K_RXCFG_JUMBO_RXE 0x00000020 /* Enable jumbo frames reception (?) [5211+] */ | 196 | #define AR5K_RXCFG_JUMBO_RXE 0x00000020 /* Enable jumbo rx descriptors [5211+] */ |
193 | #define AR5K_RXCFG_JUMBO_WRAP 0x00000040 /* Wrap jumbo frames (?) [5211+] */ | 197 | #define AR5K_RXCFG_JUMBO_WRAP 0x00000040 /* Wrap jumbo frames [5211+] */ |
198 | #define AR5K_RXCFG_SLE_ENTRY 0x00000080 /* Sleep entry policy */ | ||
194 | 199 | ||
195 | /* | 200 | /* |
196 | * Receive jumbo descriptor last address register | 201 | * Receive jumbo descriptor last address register |
@@ -202,35 +207,35 @@ | |||
202 | * MIB control register | 207 | * MIB control register |
203 | */ | 208 | */ |
204 | #define AR5K_MIBC 0x0040 /* Register Address */ | 209 | #define AR5K_MIBC 0x0040 /* Register Address */ |
205 | #define AR5K_MIBC_COW 0x00000001 | 210 | #define AR5K_MIBC_COW 0x00000001 /* Warn test indicator */ |
206 | #define AR5K_MIBC_FMC 0x00000002 /* Freeze Mib Counters (?) */ | 211 | #define AR5K_MIBC_FMC 0x00000002 /* Freeze MIB Counters */ |
207 | #define AR5K_MIBC_CMC 0x00000004 /* Clean Mib Counters (?) */ | 212 | #define AR5K_MIBC_CMC 0x00000004 /* Clean MIB Counters */ |
208 | #define AR5K_MIBC_MCS 0x00000008 | 213 | #define AR5K_MIBC_MCS 0x00000008 /* MIB counter strobe */ |
209 | 214 | ||
210 | /* | 215 | /* |
211 | * Timeout prescale register | 216 | * Timeout prescale register |
212 | */ | 217 | */ |
213 | #define AR5K_TOPS 0x0044 | 218 | #define AR5K_TOPS 0x0044 |
214 | #define AR5K_TOPS_M 0x0000ffff /* [5211+] (?) */ | 219 | #define AR5K_TOPS_M 0x0000ffff |
215 | 220 | ||
216 | /* | 221 | /* |
217 | * Receive timeout register (no frame received) | 222 | * Receive timeout register (no frame received) |
218 | */ | 223 | */ |
219 | #define AR5K_RXNOFRM 0x0048 | 224 | #define AR5K_RXNOFRM 0x0048 |
220 | #define AR5K_RXNOFRM_M 0x000003ff /* [5211+] (?) */ | 225 | #define AR5K_RXNOFRM_M 0x000003ff |
221 | 226 | ||
222 | /* | 227 | /* |
223 | * Transmit timeout register (no frame sent) | 228 | * Transmit timeout register (no frame sent) |
224 | */ | 229 | */ |
225 | #define AR5K_TXNOFRM 0x004c | 230 | #define AR5K_TXNOFRM 0x004c |
226 | #define AR5K_TXNOFRM_M 0x000003ff /* [5211+] (?) */ | 231 | #define AR5K_TXNOFRM_M 0x000003ff |
227 | #define AR5K_TXNOFRM_QCU 0x000ffc00 /* [5211+] (?) */ | 232 | #define AR5K_TXNOFRM_QCU 0x000ffc00 |
228 | 233 | ||
229 | /* | 234 | /* |
230 | * Receive frame gap timeout register | 235 | * Receive frame gap timeout register |
231 | */ | 236 | */ |
232 | #define AR5K_RPGTO 0x0050 | 237 | #define AR5K_RPGTO 0x0050 |
233 | #define AR5K_RPGTO_M 0x000003ff /* [5211+] (?) */ | 238 | #define AR5K_RPGTO_M 0x000003ff |
234 | 239 | ||
235 | /* | 240 | /* |
236 | * Receive frame count limit register | 241 | * Receive frame count limit register |
@@ -241,6 +246,7 @@ | |||
241 | 246 | ||
242 | /* | 247 | /* |
243 | * Misc settings register | 248 | * Misc settings register |
249 | * (reserved0-3) | ||
244 | */ | 250 | */ |
245 | #define AR5K_MISC 0x0058 /* Register Address */ | 251 | #define AR5K_MISC 0x0058 /* Register Address */ |
246 | #define AR5K_MISC_DMA_OBS_M 0x000001e0 | 252 | #define AR5K_MISC_DMA_OBS_M 0x000001e0 |
@@ -256,6 +262,7 @@ | |||
256 | 262 | ||
257 | /* | 263 | /* |
258 | * QCU/DCU clock gating register (5311) | 264 | * QCU/DCU clock gating register (5311) |
265 | * (reserved4-5) | ||
259 | */ | 266 | */ |
260 | #define AR5K_QCUDCU_CLKGT 0x005c /* Register Address (?) */ | 267 | #define AR5K_QCUDCU_CLKGT 0x005c /* Register Address (?) */ |
261 | #define AR5K_QCUDCU_CLKGT_QCU 0x0000ffff /* Mask for QCU clock */ | 268 | #define AR5K_QCUDCU_CLKGT_QCU 0x0000ffff /* Mask for QCU clock */ |
@@ -284,18 +291,18 @@ | |||
284 | #define AR5K_ISR_TXEOL 0x00000400 /* Empty TX descriptor */ | 291 | #define AR5K_ISR_TXEOL 0x00000400 /* Empty TX descriptor */ |
285 | #define AR5K_ISR_TXURN 0x00000800 /* Transmit FIFO underrun */ | 292 | #define AR5K_ISR_TXURN 0x00000800 /* Transmit FIFO underrun */ |
286 | #define AR5K_ISR_MIB 0x00001000 /* Update MIB counters */ | 293 | #define AR5K_ISR_MIB 0x00001000 /* Update MIB counters */ |
287 | #define AR5K_ISR_SWI 0x00002000 /* Software interrupt (?) */ | 294 | #define AR5K_ISR_SWI 0x00002000 /* Software interrupt */ |
288 | #define AR5K_ISR_RXPHY 0x00004000 /* PHY error */ | 295 | #define AR5K_ISR_RXPHY 0x00004000 /* PHY error */ |
289 | #define AR5K_ISR_RXKCM 0x00008000 | 296 | #define AR5K_ISR_RXKCM 0x00008000 /* RX Key cache miss */ |
290 | #define AR5K_ISR_SWBA 0x00010000 /* Software beacon alert */ | 297 | #define AR5K_ISR_SWBA 0x00010000 /* Software beacon alert */ |
291 | #define AR5K_ISR_BRSSI 0x00020000 | 298 | #define AR5K_ISR_BRSSI 0x00020000 |
292 | #define AR5K_ISR_BMISS 0x00040000 /* Beacon missed */ | 299 | #define AR5K_ISR_BMISS 0x00040000 /* Beacon missed */ |
293 | #define AR5K_ISR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ | 300 | #define AR5K_ISR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ |
294 | #define AR5K_ISR_BNR 0x00100000 /* Beacon not ready [5211+] */ | 301 | #define AR5K_ISR_BNR 0x00100000 /* Beacon not ready [5211+] */ |
295 | #define AR5K_ISR_MCABT 0x00100000 /* [5210] */ | 302 | #define AR5K_ISR_MCABT 0x00100000 /* Master Cycle Abort [5210] */ |
296 | #define AR5K_ISR_RXCHIRP 0x00200000 /* [5212+] */ | 303 | #define AR5K_ISR_RXCHIRP 0x00200000 /* CHIRP Received [5212+] */ |
297 | #define AR5K_ISR_SSERR 0x00200000 /* [5210] */ | 304 | #define AR5K_ISR_SSERR 0x00200000 /* Signaled System Error [5210] */ |
298 | #define AR5K_ISR_DPERR 0x00400000 /* [5210] */ | 305 | #define AR5K_ISR_DPERR 0x00400000 /* Det par Error (?) [5210] */ |
299 | #define AR5K_ISR_TIM 0x00800000 /* [5210] */ | 306 | #define AR5K_ISR_TIM 0x00800000 /* [5210] */ |
300 | #define AR5K_ISR_BCNMISC 0x00800000 /* [5212+] */ | 307 | #define AR5K_ISR_BCNMISC 0x00800000 /* [5212+] */ |
301 | #define AR5K_ISR_GPIO 0x01000000 /* GPIO (rf kill)*/ | 308 | #define AR5K_ISR_GPIO 0x01000000 /* GPIO (rf kill)*/ |
@@ -320,14 +327,14 @@ | |||
320 | 327 | ||
321 | #define AR5K_SISR2 0x008c /* Register Address [5211+] */ | 328 | #define AR5K_SISR2 0x008c /* Register Address [5211+] */ |
322 | #define AR5K_SISR2_QCU_TXURN 0x000003ff /* Mask for QCU_TXURN */ | 329 | #define AR5K_SISR2_QCU_TXURN 0x000003ff /* Mask for QCU_TXURN */ |
323 | #define AR5K_SISR2_MCABT 0x00100000 | 330 | #define AR5K_SISR2_MCABT 0x00100000 /* Master Cycle Abort */ |
324 | #define AR5K_SISR2_SSERR 0x00200000 | 331 | #define AR5K_SISR2_SSERR 0x00200000 /* Signaled System Error */ |
325 | #define AR5K_SISR2_DPERR 0x00400000 | 332 | #define AR5K_SISR2_DPERR 0x00400000 /* Det par Error (?) */ |
326 | #define AR5K_SISR2_TIM 0x01000000 /* [5212+] */ | 333 | #define AR5K_SISR2_TIM 0x01000000 /* [5212+] */ |
327 | #define AR5K_SISR2_CAB_END 0x02000000 /* [5212+] */ | 334 | #define AR5K_SISR2_CAB_END 0x02000000 /* [5212+] */ |
328 | #define AR5K_SISR2_DTIM_SYNC 0x04000000 /* [5212+] */ | 335 | #define AR5K_SISR2_DTIM_SYNC 0x04000000 /* DTIM sync lost [5212+] */ |
329 | #define AR5K_SISR2_BCN_TIMEOUT 0x08000000 /* [5212+] */ | 336 | #define AR5K_SISR2_BCN_TIMEOUT 0x08000000 /* Beacon Timeout [5212+] */ |
330 | #define AR5K_SISR2_CAB_TIMEOUT 0x10000000 /* [5212+] */ | 337 | #define AR5K_SISR2_CAB_TIMEOUT 0x10000000 /* CAB Timeout [5212+] */ |
331 | #define AR5K_SISR2_DTIM 0x20000000 /* [5212+] */ | 338 | #define AR5K_SISR2_DTIM 0x20000000 /* [5212+] */ |
332 | 339 | ||
333 | #define AR5K_SISR3 0x0090 /* Register Address [5211+] */ | 340 | #define AR5K_SISR3 0x0090 /* Register Address [5211+] */ |
@@ -368,18 +375,18 @@ | |||
368 | #define AR5K_IMR_TXEOL 0x00000400 /* Empty TX descriptor*/ | 375 | #define AR5K_IMR_TXEOL 0x00000400 /* Empty TX descriptor*/ |
369 | #define AR5K_IMR_TXURN 0x00000800 /* Transmit FIFO underrun*/ | 376 | #define AR5K_IMR_TXURN 0x00000800 /* Transmit FIFO underrun*/ |
370 | #define AR5K_IMR_MIB 0x00001000 /* Update MIB counters*/ | 377 | #define AR5K_IMR_MIB 0x00001000 /* Update MIB counters*/ |
371 | #define AR5K_IMR_SWI 0x00002000 | 378 | #define AR5K_IMR_SWI 0x00002000 /* Software interrupt */ |
372 | #define AR5K_IMR_RXPHY 0x00004000 /* PHY error*/ | 379 | #define AR5K_IMR_RXPHY 0x00004000 /* PHY error*/ |
373 | #define AR5K_IMR_RXKCM 0x00008000 | 380 | #define AR5K_IMR_RXKCM 0x00008000 /* RX Key cache miss */ |
374 | #define AR5K_IMR_SWBA 0x00010000 /* Software beacon alert*/ | 381 | #define AR5K_IMR_SWBA 0x00010000 /* Software beacon alert*/ |
375 | #define AR5K_IMR_BRSSI 0x00020000 | 382 | #define AR5K_IMR_BRSSI 0x00020000 |
376 | #define AR5K_IMR_BMISS 0x00040000 /* Beacon missed*/ | 383 | #define AR5K_IMR_BMISS 0x00040000 /* Beacon missed*/ |
377 | #define AR5K_IMR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ | 384 | #define AR5K_IMR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ |
378 | #define AR5K_IMR_BNR 0x00100000 /* Beacon not ready [5211+] */ | 385 | #define AR5K_IMR_BNR 0x00100000 /* Beacon not ready [5211+] */ |
379 | #define AR5K_IMR_MCABT 0x00100000 /* [5210] */ | 386 | #define AR5K_IMR_MCABT 0x00100000 /* Master Cycle Abort [5210] */ |
380 | #define AR5K_IMR_RXCHIRP 0x00200000 /* [5212+]*/ | 387 | #define AR5K_IMR_RXCHIRP 0x00200000 /* CHIRP Received [5212+]*/ |
381 | #define AR5K_IMR_SSERR 0x00200000 /* [5210] */ | 388 | #define AR5K_IMR_SSERR 0x00200000 /* Signaled System Error [5210] */ |
382 | #define AR5K_IMR_DPERR 0x00400000 /* [5210] */ | 389 | #define AR5K_IMR_DPERR 0x00400000 /* Det par Error (?) [5210] */ |
383 | #define AR5K_IMR_TIM 0x00800000 /* [5211+] */ | 390 | #define AR5K_IMR_TIM 0x00800000 /* [5211+] */ |
384 | #define AR5K_IMR_BCNMISC 0x00800000 /* [5212+] */ | 391 | #define AR5K_IMR_BCNMISC 0x00800000 /* [5212+] */ |
385 | #define AR5K_IMR_GPIO 0x01000000 /* GPIO (rf kill)*/ | 392 | #define AR5K_IMR_GPIO 0x01000000 /* GPIO (rf kill)*/ |
@@ -405,14 +412,14 @@ | |||
405 | #define AR5K_SIMR2 0x00ac /* Register Address [5211+] */ | 412 | #define AR5K_SIMR2 0x00ac /* Register Address [5211+] */ |
406 | #define AR5K_SIMR2_QCU_TXURN 0x000003ff /* Mask for QCU_TXURN */ | 413 | #define AR5K_SIMR2_QCU_TXURN 0x000003ff /* Mask for QCU_TXURN */ |
407 | #define AR5K_SIMR2_QCU_TXURN_S 0 | 414 | #define AR5K_SIMR2_QCU_TXURN_S 0 |
408 | #define AR5K_SIMR2_MCABT 0x00100000 | 415 | #define AR5K_SIMR2_MCABT 0x00100000 /* Master Cycle Abort */ |
409 | #define AR5K_SIMR2_SSERR 0x00200000 | 416 | #define AR5K_SIMR2_SSERR 0x00200000 /* Signaled System Error */ |
410 | #define AR5K_SIMR2_DPERR 0x00400000 | 417 | #define AR5K_SIMR2_DPERR 0x00400000 /* Det par Error (?) */ |
411 | #define AR5K_SIMR2_TIM 0x01000000 /* [5212+] */ | 418 | #define AR5K_SIMR2_TIM 0x01000000 /* [5212+] */ |
412 | #define AR5K_SIMR2_CAB_END 0x02000000 /* [5212+] */ | 419 | #define AR5K_SIMR2_CAB_END 0x02000000 /* [5212+] */ |
413 | #define AR5K_SIMR2_DTIM_SYNC 0x04000000 /* [5212+] */ | 420 | #define AR5K_SIMR2_DTIM_SYNC 0x04000000 /* DTIM Sync lost [5212+] */ |
414 | #define AR5K_SIMR2_BCN_TIMEOUT 0x08000000 /* [5212+] */ | 421 | #define AR5K_SIMR2_BCN_TIMEOUT 0x08000000 /* Beacon Timeout [5212+] */ |
415 | #define AR5K_SIMR2_CAB_TIMEOUT 0x10000000 /* [5212+] */ | 422 | #define AR5K_SIMR2_CAB_TIMEOUT 0x10000000 /* CAB Timeout [5212+] */ |
416 | #define AR5K_SIMR2_DTIM 0x20000000 /* [5212+] */ | 423 | #define AR5K_SIMR2_DTIM 0x20000000 /* [5212+] */ |
417 | 424 | ||
418 | #define AR5K_SIMR3 0x00b0 /* Register Address [5211+] */ | 425 | #define AR5K_SIMR3 0x00b0 /* Register Address [5211+] */ |
@@ -425,23 +432,69 @@ | |||
425 | #define AR5K_SIMR4_QTRIG 0x000003ff /* Mask for QTRIG */ | 432 | #define AR5K_SIMR4_QTRIG 0x000003ff /* Mask for QTRIG */ |
426 | #define AR5K_SIMR4_QTRIG_S 0 | 433 | #define AR5K_SIMR4_QTRIG_S 0 |
427 | 434 | ||
435 | /* | ||
436 | * DMA Debug registers 0-7 | ||
437 | * 0xe0 - 0xfc | ||
438 | */ | ||
428 | 439 | ||
429 | /* | 440 | /* |
430 | * Decompression mask registers [5212+] | 441 | * Decompression mask registers [5212+] |
431 | */ | 442 | */ |
432 | #define AR5K_DCM_ADDR 0x0400 /*Decompression mask address (?)*/ | 443 | #define AR5K_DCM_ADDR 0x0400 /*Decompression mask address (index) */ |
433 | #define AR5K_DCM_DATA 0x0404 /*Decompression mask data (?)*/ | 444 | #define AR5K_DCM_DATA 0x0404 /*Decompression mask data */ |
445 | |||
446 | /* | ||
447 | * Wake On Wireless pattern control register [5212+] | ||
448 | */ | ||
449 | #define AR5K_WOW_PCFG 0x0410 /* Register Address */ | ||
450 | #define AR5K_WOW_PCFG_PAT_MATCH_EN 0x00000001 /* Pattern match enable */ | ||
451 | #define AR5K_WOW_PCFG_LONG_FRAME_POL 0x00000002 /* Long frame policy */ | ||
452 | #define AR5K_WOW_PCFG_WOBMISS 0x00000004 /* Wake on bea(con) miss (?) */ | ||
453 | #define AR5K_WOW_PCFG_PAT_0_EN 0x00000100 /* Enable pattern 0 */ | ||
454 | #define AR5K_WOW_PCFG_PAT_1_EN 0x00000200 /* Enable pattern 1 */ | ||
455 | #define AR5K_WOW_PCFG_PAT_2_EN 0x00000400 /* Enable pattern 2 */ | ||
456 | #define AR5K_WOW_PCFG_PAT_3_EN 0x00000800 /* Enable pattern 3 */ | ||
457 | #define AR5K_WOW_PCFG_PAT_4_EN 0x00001000 /* Enable pattern 4 */ | ||
458 | #define AR5K_WOW_PCFG_PAT_5_EN 0x00002000 /* Enable pattern 5 */ | ||
459 | |||
460 | /* | ||
461 | * Wake On Wireless pattern index register (?) [5212+] | ||
462 | */ | ||
463 | #define AR5K_WOW_PAT_IDX 0x0414 | ||
464 | |||
465 | /* | ||
466 | * Wake On Wireless pattern data register [5212+] | ||
467 | */ | ||
468 | #define AR5K_WOW_PAT_DATA 0x0418 /* Register Address */ | ||
469 | #define AR5K_WOW_PAT_DATA_0_3_V 0x00000001 /* Pattern 0, 3 value */ | ||
470 | #define AR5K_WOW_PAT_DATA_1_4_V 0x00000100 /* Pattern 1, 4 value */ | ||
471 | #define AR5K_WOW_PAT_DATA_2_5_V 0x00010000 /* Pattern 2, 5 value */ | ||
472 | #define AR5K_WOW_PAT_DATA_0_3_M 0x01000000 /* Pattern 0, 3 mask */ | ||
473 | #define AR5K_WOW_PAT_DATA_1_4_M 0x04000000 /* Pattern 1, 4 mask */ | ||
474 | #define AR5K_WOW_PAT_DATA_2_5_M 0x10000000 /* Pattern 2, 5 mask */ | ||
434 | 475 | ||
435 | /* | 476 | /* |
436 | * Decompression configuration registers [5212+] | 477 | * Decompression configuration registers [5212+] |
437 | */ | 478 | */ |
438 | #define AR5K_DCCFG 0x0420 | 479 | #define AR5K_DCCFG 0x0420 /* Register Address */ |
480 | #define AR5K_DCCFG_GLOBAL_EN 0x00000001 /* Enable decompression on all queues */ | ||
481 | #define AR5K_DCCFG_BYPASS_EN 0x00000002 /* Bypass decompression */ | ||
482 | #define AR5K_DCCFG_BCAST_EN 0x00000004 /* Enable decompression for bcast frames */ | ||
483 | #define AR5K_DCCFG_MCAST_EN 0x00000008 /* Enable decompression for mcast frames */ | ||
439 | 484 | ||
440 | /* | 485 | /* |
441 | * Compression configuration registers [5212+] | 486 | * Compression configuration registers [5212+] |
442 | */ | 487 | */ |
443 | #define AR5K_CCFG 0x0600 | 488 | #define AR5K_CCFG 0x0600 /* Register Address */ |
444 | #define AR5K_CCFG_CUP 0x0604 | 489 | #define AR5K_CCFG_WINDOW_SIZE 0x00000007 /* Compression window size */ |
490 | #define AR5K_CCFG_CPC_EN 0x00000008 /* Enable performance counters */ | ||
491 | |||
492 | #define AR5K_CCFG_CCU 0x0604 /* Register Address */ | ||
493 | #define AR5K_CCFG_CCU_CUP_EN 0x00000001 /* CCU Catchup enable */ | ||
494 | #define AR5K_CCFG_CCU_CREDIT 0x00000002 /* CCU Credit (field) */ | ||
495 | #define AR5K_CCFG_CCU_CD_THRES 0x00000080 /* CCU Cyc(lic?) debt threshold (field) */ | ||
496 | #define AR5K_CCFG_CCU_CUP_LCNT 0x00010000 /* CCU Catchup lit(?) count */ | ||
497 | #define AR5K_CCFG_CCU_INIT 0x00100200 /* Initial value during reset */ | ||
445 | 498 | ||
446 | /* | 499 | /* |
447 | * Compression performance counter registers [5212+] | 500 | * Compression performance counter registers [5212+] |
@@ -450,7 +503,7 @@ | |||
450 | #define AR5K_CPC1 0x0614 /* Compression performance counter 1*/ | 503 | #define AR5K_CPC1 0x0614 /* Compression performance counter 1*/ |
451 | #define AR5K_CPC2 0x0618 /* Compression performance counter 2 */ | 504 | #define AR5K_CPC2 0x0618 /* Compression performance counter 2 */ |
452 | #define AR5K_CPC3 0x061c /* Compression performance counter 3 */ | 505 | #define AR5K_CPC3 0x061c /* Compression performance counter 3 */ |
453 | #define AR5K_CPCORN 0x0620 /* Compression performance overrun (?) */ | 506 | #define AR5K_CPCOVF 0x0620 /* Compression performance overflow */ |
454 | 507 | ||
455 | 508 | ||
456 | /* | 509 | /* |
@@ -466,8 +519,6 @@ | |||
466 | * set/clear, which contain status for all queues (we shift by 1 for each | 519 | * set/clear, which contain status for all queues (we shift by 1 for each |
467 | * queue). To access these registers easily we define some macros here | 520 | * queue). To access these registers easily we define some macros here |
468 | * that are used inside HAL. For more infos check out *_tx_queue functs. | 521 | * that are used inside HAL. For more infos check out *_tx_queue functs. |
469 | * | ||
470 | * TODO: Boundary checking on macros (here?) | ||
471 | */ | 522 | */ |
472 | 523 | ||
473 | /* | 524 | /* |
@@ -513,7 +564,6 @@ | |||
513 | #define AR5K_QCU_RDYTIMECFG_BASE 0x0900 /* Register Address - Queue0 RDYTIMECFG */ | 564 | #define AR5K_QCU_RDYTIMECFG_BASE 0x0900 /* Register Address - Queue0 RDYTIMECFG */ |
514 | #define AR5K_QCU_RDYTIMECFG_INTVAL 0x00ffffff /* Ready time interval mask */ | 565 | #define AR5K_QCU_RDYTIMECFG_INTVAL 0x00ffffff /* Ready time interval mask */ |
515 | #define AR5K_QCU_RDYTIMECFG_INTVAL_S 0 | 566 | #define AR5K_QCU_RDYTIMECFG_INTVAL_S 0 |
516 | #define AR5K_QCU_RDYTIMECFG_DURATION 0x00ffffff /* Ready time duration mask */ | ||
517 | #define AR5K_QCU_RDYTIMECFG_ENABLE 0x01000000 /* Ready time enable mask */ | 567 | #define AR5K_QCU_RDYTIMECFG_ENABLE 0x01000000 /* Ready time enable mask */ |
518 | #define AR5K_QUEUE_RDYTIMECFG(_q) AR5K_QUEUE_REG(AR5K_QCU_RDYTIMECFG_BASE, _q) | 568 | #define AR5K_QUEUE_RDYTIMECFG(_q) AR5K_QUEUE_REG(AR5K_QCU_RDYTIMECFG_BASE, _q) |
519 | 569 | ||
@@ -534,19 +584,20 @@ | |||
534 | */ | 584 | */ |
535 | #define AR5K_QCU_MISC_BASE 0x09c0 /* Register Address -Queue0 MISC */ | 585 | #define AR5K_QCU_MISC_BASE 0x09c0 /* Register Address -Queue0 MISC */ |
536 | #define AR5K_QCU_MISC_FRSHED_M 0x0000000f /* Frame sheduling mask */ | 586 | #define AR5K_QCU_MISC_FRSHED_M 0x0000000f /* Frame sheduling mask */ |
537 | #define AR5K_QCU_MISC_FRSHED_ASAP 0 /* ASAP */ | 587 | #define AR5K_QCU_MISC_FRSHED_ASAP 0 /* ASAP */ |
538 | #define AR5K_QCU_MISC_FRSHED_CBR 1 /* Constant Bit Rate */ | 588 | #define AR5K_QCU_MISC_FRSHED_CBR 1 /* Constant Bit Rate */ |
539 | #define AR5K_QCU_MISC_FRSHED_DBA_GT 2 /* DMA Beacon alert gated (?) */ | 589 | #define AR5K_QCU_MISC_FRSHED_DBA_GT 2 /* DMA Beacon alert gated (?) */ |
540 | #define AR5K_QCU_MISC_FRSHED_TIM_GT 3 /* Time gated (?) */ | 590 | #define AR5K_QCU_MISC_FRSHED_TIM_GT 3 /* Time gated (?) */ |
541 | #define AR5K_QCU_MISC_FRSHED_BCN_SENT_GT 4 /* Beacon sent gated (?) */ | 591 | #define AR5K_QCU_MISC_FRSHED_BCN_SENT_GT 4 /* Beacon sent gated (?) */ |
542 | #define AR5K_QCU_MISC_ONESHOT_ENABLE 0x00000010 /* Oneshot enable */ | 592 | #define AR5K_QCU_MISC_ONESHOT_ENABLE 0x00000010 /* Oneshot enable */ |
543 | #define AR5K_QCU_MISC_CBREXP 0x00000020 /* CBR expired (normal queue) */ | 593 | #define AR5K_QCU_MISC_CBREXP 0x00000020 /* CBR expired (normal queue) */ |
544 | #define AR5K_QCU_MISC_CBREXP_BCN 0x00000040 /* CBR expired (beacon queue) */ | 594 | #define AR5K_QCU_MISC_CBREXP_BCN 0x00000040 /* CBR expired (beacon queue) */ |
545 | #define AR5K_QCU_MISC_BCN_ENABLE 0x00000080 /* Beacons enabled */ | 595 | #define AR5K_QCU_MISC_BCN_ENABLE 0x00000080 /* Enable Beacon use */ |
546 | #define AR5K_QCU_MISC_CBR_THRES_ENABLE 0x00000100 /* CBR threshold enabled (?) */ | 596 | #define AR5K_QCU_MISC_CBR_THRES_ENABLE 0x00000100 /* CBR threshold enabled */ |
547 | #define AR5K_QCU_MISC_TXE 0x00000200 /* TXE reset when RDYTIME enalbed (?) */ | 597 | #define AR5K_QCU_MISC_RDY_VEOL_POLICY 0x00000200 /* TXE reset when RDYTIME enalbed */ |
548 | #define AR5K_QCU_MISC_CBR 0x00000400 /* CBR threshold reset (?) */ | 598 | #define AR5K_QCU_MISC_CBR_RESET_CNT 0x00000400 /* CBR threshold (counter) reset */ |
549 | #define AR5K_QCU_MISC_DCU_EARLY 0x00000800 /* DCU reset (?) */ | 599 | #define AR5K_QCU_MISC_DCU_EARLY 0x00000800 /* DCU early termination */ |
600 | #define AR5K_QCU_MISC_DCU_CMP_EN 0x00001000 /* Enable frame compression */ | ||
550 | #define AR5K_QUEUE_MISC(_q) AR5K_QUEUE_REG(AR5K_QCU_MISC_BASE, _q) | 601 | #define AR5K_QUEUE_MISC(_q) AR5K_QUEUE_REG(AR5K_QCU_MISC_BASE, _q) |
551 | 602 | ||
552 | 603 | ||
@@ -555,7 +606,7 @@ | |||
555 | */ | 606 | */ |
556 | #define AR5K_QCU_STS_BASE 0x0a00 /* Register Address - Queue0 STS */ | 607 | #define AR5K_QCU_STS_BASE 0x0a00 /* Register Address - Queue0 STS */ |
557 | #define AR5K_QCU_STS_FRMPENDCNT 0x00000003 /* Frames pending counter */ | 608 | #define AR5K_QCU_STS_FRMPENDCNT 0x00000003 /* Frames pending counter */ |
558 | #define AR5K_QCU_STS_CBREXPCNT 0x0000ff00 /* CBR expired counter (?) */ | 609 | #define AR5K_QCU_STS_CBREXPCNT 0x0000ff00 /* CBR expired counter */ |
559 | #define AR5K_QUEUE_STATUS(_q) AR5K_QUEUE_REG(AR5K_QCU_STS_BASE, _q) | 610 | #define AR5K_QUEUE_STATUS(_q) AR5K_QUEUE_REG(AR5K_QCU_STS_BASE, _q) |
560 | 611 | ||
561 | /* | 612 | /* |
@@ -569,9 +620,11 @@ | |||
569 | */ | 620 | */ |
570 | #define AR5K_QCU_CBB_SELECT 0x0b00 | 621 | #define AR5K_QCU_CBB_SELECT 0x0b00 |
571 | #define AR5K_QCU_CBB_ADDR 0x0b04 | 622 | #define AR5K_QCU_CBB_ADDR 0x0b04 |
623 | #define AR5K_QCU_CBB_ADDR_S 9 | ||
572 | 624 | ||
573 | /* | 625 | /* |
574 | * QCU compression buffer configuration register [5212+] | 626 | * QCU compression buffer configuration register [5212+] |
627 | * (buffer size) | ||
575 | */ | 628 | */ |
576 | #define AR5K_QCU_CBCFG 0x0b08 | 629 | #define AR5K_QCU_CBCFG 0x0b08 |
577 | 630 | ||
@@ -652,80 +705,100 @@ | |||
652 | * No lockout means there is no special handling. | 705 | * No lockout means there is no special handling. |
653 | */ | 706 | */ |
654 | #define AR5K_DCU_MISC_BASE 0x1100 /* Register Address -Queue0 DCU_MISC */ | 707 | #define AR5K_DCU_MISC_BASE 0x1100 /* Register Address -Queue0 DCU_MISC */ |
655 | #define AR5K_DCU_MISC_BACKOFF 0x000007ff /* Mask for backoff setting (?) */ | 708 | #define AR5K_DCU_MISC_BACKOFF 0x000007ff /* Mask for backoff threshold */ |
656 | #define AR5K_DCU_MISC_BACKOFF_FRAG 0x00000200 /* Enable backoff while bursting */ | 709 | #define AR5K_DCU_MISC_BACKOFF_FRAG 0x00000200 /* Enable backoff while bursting */ |
657 | #define AR5K_DCU_MISC_HCFPOLL_ENABLE 0x00000800 /* CF - Poll (?) */ | 710 | #define AR5K_DCU_MISC_HCFPOLL_ENABLE 0x00000800 /* CF - Poll enable */ |
658 | #define AR5K_DCU_MISC_BACKOFF_PERSIST 0x00001000 /* Persistent backoff (?) */ | 711 | #define AR5K_DCU_MISC_BACKOFF_PERSIST 0x00001000 /* Persistent backoff */ |
659 | #define AR5K_DCU_MISC_FRMPRFTCH_ENABLE 0x00002000 /* Enable frame pre-fetch (?) */ | 712 | #define AR5K_DCU_MISC_FRMPRFTCH_ENABLE 0x00002000 /* Enable frame pre-fetch */ |
660 | #define AR5K_DCU_MISC_VIRTCOL 0x0000c000 /* Mask for Virtual Collision (?) */ | 713 | #define AR5K_DCU_MISC_VIRTCOL 0x0000c000 /* Mask for Virtual Collision (?) */ |
661 | #define AR5K_DCU_MISC_VIRTCOL_NORMAL 0 | 714 | #define AR5K_DCU_MISC_VIRTCOL_NORMAL 0 |
662 | #define AR5K_DCU_MISC_VIRTCOL_MODIFIED 1 | 715 | #define AR5K_DCU_MISC_VIRTCOL_MODIFIED 1 |
663 | #define AR5K_DCU_MISC_VIRTCOL_IGNORE 2 | 716 | #define AR5K_DCU_MISC_VIRTCOL_IGNORE 2 |
664 | #define AR5K_DCU_MISC_BCN_ENABLE 0x00010000 /* Beacon enable (?) */ | 717 | #define AR5K_DCU_MISC_BCN_ENABLE 0x00010000 /* Enable Beacon use */ |
665 | #define AR5K_DCU_MISC_ARBLOCK_CTL 0x00060000 /* Arbiter lockout control mask */ | 718 | #define AR5K_DCU_MISC_ARBLOCK_CTL 0x00060000 /* Arbiter lockout control mask */ |
666 | #define AR5K_DCU_MISC_ARBLOCK_CTL_S 17 | 719 | #define AR5K_DCU_MISC_ARBLOCK_CTL_S 17 |
667 | #define AR5K_DCU_MISC_ARBLOCK_CTL_NONE 0 /* No arbiter lockout */ | 720 | #define AR5K_DCU_MISC_ARBLOCK_CTL_NONE 0 /* No arbiter lockout */ |
668 | #define AR5K_DCU_MISC_ARBLOCK_CTL_INTFRM 1 /* Intra-frame lockout */ | 721 | #define AR5K_DCU_MISC_ARBLOCK_CTL_INTFRM 1 /* Intra-frame lockout */ |
669 | #define AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL 2 /* Global lockout */ | 722 | #define AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL 2 /* Global lockout */ |
670 | #define AR5K_DCU_MISC_ARBLOCK_IGNORE 0x00080000 | 723 | #define AR5K_DCU_MISC_ARBLOCK_IGNORE 0x00080000 /* Ignore Arbiter lockout */ |
671 | #define AR5K_DCU_MISC_SEQ_NUM_INCR_DIS 0x00100000 /* Disable sequence number increment (?) */ | 724 | #define AR5K_DCU_MISC_SEQ_NUM_INCR_DIS 0x00100000 /* Disable sequence number increment */ |
672 | #define AR5K_DCU_MISC_POST_FR_BKOFF_DIS 0x00200000 /* Disable post-frame backoff (?) */ | 725 | #define AR5K_DCU_MISC_POST_FR_BKOFF_DIS 0x00200000 /* Disable post-frame backoff */ |
673 | #define AR5K_DCU_MISC_VIRT_COLL_POLICY 0x00400000 /* Virtual Collision policy (?) */ | 726 | #define AR5K_DCU_MISC_VIRT_COLL_POLICY 0x00400000 /* Virtual Collision cw policy */ |
674 | #define AR5K_DCU_MISC_BLOWN_IFS_POLICY 0x00800000 | 727 | #define AR5K_DCU_MISC_BLOWN_IFS_POLICY 0x00800000 /* Blown IFS policy (?) */ |
675 | #define AR5K_DCU_MISC_SEQNUM_CTL 0x01000000 /* Sequence number control (?) */ | 728 | #define AR5K_DCU_MISC_SEQNUM_CTL 0x01000000 /* Sequence number control (?) */ |
676 | #define AR5K_QUEUE_DFS_MISC(_q) AR5K_QUEUE_REG(AR5K_DCU_MISC_BASE, _q) | 729 | #define AR5K_QUEUE_DFS_MISC(_q) AR5K_QUEUE_REG(AR5K_DCU_MISC_BASE, _q) |
677 | 730 | ||
678 | /* | 731 | /* |
679 | * DCU frame sequence number registers | 732 | * DCU frame sequence number registers |
680 | */ | 733 | */ |
681 | #define AR5K_DCU_SEQNUM_BASE 0x1140 | 734 | #define AR5K_DCU_SEQNUM_BASE 0x1140 |
682 | #define AR5K_DCU_SEQNUM_M 0x00000fff | 735 | #define AR5K_DCU_SEQNUM_M 0x00000fff |
683 | #define AR5K_QUEUE_DFS_SEQNUM(_q) AR5K_QUEUE_REG(AR5K_DCU_SEQNUM_BASE, _q) | 736 | #define AR5K_QUEUE_DFS_SEQNUM(_q) AR5K_QUEUE_REG(AR5K_DCU_SEQNUM_BASE, _q) |
684 | 737 | ||
685 | /* | 738 | /* |
686 | * DCU global IFS SIFS registers | 739 | * DCU global IFS SIFS register |
687 | */ | 740 | */ |
688 | #define AR5K_DCU_GBL_IFS_SIFS 0x1030 | 741 | #define AR5K_DCU_GBL_IFS_SIFS 0x1030 |
689 | #define AR5K_DCU_GBL_IFS_SIFS_M 0x0000ffff | 742 | #define AR5K_DCU_GBL_IFS_SIFS_M 0x0000ffff |
690 | 743 | ||
691 | /* | 744 | /* |
692 | * DCU global IFS slot interval registers | 745 | * DCU global IFS slot interval register |
693 | */ | 746 | */ |
694 | #define AR5K_DCU_GBL_IFS_SLOT 0x1070 | 747 | #define AR5K_DCU_GBL_IFS_SLOT 0x1070 |
695 | #define AR5K_DCU_GBL_IFS_SLOT_M 0x0000ffff | 748 | #define AR5K_DCU_GBL_IFS_SLOT_M 0x0000ffff |
696 | 749 | ||
697 | /* | 750 | /* |
698 | * DCU global IFS EIFS registers | 751 | * DCU global IFS EIFS register |
699 | */ | 752 | */ |
700 | #define AR5K_DCU_GBL_IFS_EIFS 0x10b0 | 753 | #define AR5K_DCU_GBL_IFS_EIFS 0x10b0 |
701 | #define AR5K_DCU_GBL_IFS_EIFS_M 0x0000ffff | 754 | #define AR5K_DCU_GBL_IFS_EIFS_M 0x0000ffff |
702 | 755 | ||
703 | /* | 756 | /* |
704 | * DCU global IFS misc registers | 757 | * DCU global IFS misc register |
758 | * | ||
759 | * LFSR stands for Linear Feedback Shift Register | ||
760 | * and it's used for generating pseudo-random | ||
761 | * number sequences. | ||
762 | * | ||
763 | * (If i understand corectly, random numbers are | ||
764 | * used for idle sensing -multiplied with cwmin/max etc-) | ||
705 | */ | 765 | */ |
706 | #define AR5K_DCU_GBL_IFS_MISC 0x10f0 /* Register Address */ | 766 | #define AR5K_DCU_GBL_IFS_MISC 0x10f0 /* Register Address */ |
707 | #define AR5K_DCU_GBL_IFS_MISC_LFSR_SLICE 0x00000007 | 767 | #define AR5K_DCU_GBL_IFS_MISC_LFSR_SLICE 0x00000007 /* LFSR Slice Select */ |
708 | #define AR5K_DCU_GBL_IFS_MISC_TURBO_MODE 0x00000008 /* Turbo mode (?) */ | 768 | #define AR5K_DCU_GBL_IFS_MISC_TURBO_MODE 0x00000008 /* Turbo mode */ |
709 | #define AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC 0x000003f0 /* SIFS Duration mask (?) */ | 769 | #define AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC 0x000003f0 /* SIFS Duration mask */ |
710 | #define AR5K_DCU_GBL_IFS_MISC_USEC_DUR 0x000ffc00 | 770 | #define AR5K_DCU_GBL_IFS_MISC_USEC_DUR 0x000ffc00 /* USEC Duration mask */ |
711 | #define AR5K_DCU_GBL_IFS_MISC_DCU_ARB_DELAY 0x00300000 | 771 | #define AR5K_DCU_GBL_IFS_MISC_DCU_ARB_DELAY 0x00300000 /* DCU Arbiter delay mask */ |
772 | #define AR5K_DCU_GBL_IFS_MISC_SIFS_CNT_RST 0x00400000 /* SIFC cnt reset policy (?) */ | ||
773 | #define AR5K_DCU_GBL_IFS_MISC_AIFS_CNT_RST 0x00800000 /* AIFS cnt reset policy (?) */ | ||
774 | #define AR5K_DCU_GBL_IFS_MISC_RND_LFSR_SL_DIS 0x01000000 /* Disable random LFSR slice */ | ||
712 | 775 | ||
713 | /* | 776 | /* |
714 | * DCU frame prefetch control register | 777 | * DCU frame prefetch control register |
715 | */ | 778 | */ |
716 | #define AR5K_DCU_FP 0x1230 | 779 | #define AR5K_DCU_FP 0x1230 /* Register Address */ |
780 | #define AR5K_DCU_FP_NOBURST_DCU_EN 0x00000001 /* Enable non-burst prefetch on DCU (?) */ | ||
781 | #define AR5K_DCU_FP_NOBURST_EN 0x00000010 /* Enable non-burst prefetch (?) */ | ||
782 | #define AR5K_DCU_FP_BURST_DCU_EN 0x00000020 /* Enable burst prefetch on DCU (?) */ | ||
717 | 783 | ||
718 | /* | 784 | /* |
719 | * DCU transmit pause control/status register | 785 | * DCU transmit pause control/status register |
720 | */ | 786 | */ |
721 | #define AR5K_DCU_TXP 0x1270 /* Register Address */ | 787 | #define AR5K_DCU_TXP 0x1270 /* Register Address */ |
722 | #define AR5K_DCU_TXP_M 0x000003ff /* Tx pause mask (?) */ | 788 | #define AR5K_DCU_TXP_M 0x000003ff /* Tx pause mask */ |
723 | #define AR5K_DCU_TXP_STATUS 0x00010000 /* Tx pause status (?) */ | 789 | #define AR5K_DCU_TXP_STATUS 0x00010000 /* Tx pause status */ |
790 | |||
791 | /* | ||
792 | * DCU transmit filter table 0 (32 entries) | ||
793 | */ | ||
794 | #define AR5K_DCU_TX_FILTER_0_BASE 0x1038 | ||
795 | #define AR5K_DCU_TX_FILTER_0(_n) (AR5K_DCU_TX_FILTER_0_BASE + (_n * 64)) | ||
724 | 796 | ||
725 | /* | 797 | /* |
726 | * DCU transmit filter register | 798 | * DCU transmit filter table 1 (16 entries) |
727 | */ | 799 | */ |
728 | #define AR5K_DCU_TX_FILTER 0x1038 | 800 | #define AR5K_DCU_TX_FILTER_1_BASE 0x103c |
801 | #define AR5K_DCU_TX_FILTER_1(_n) (AR5K_DCU_TX_FILTER_1_BASE + ((_n - 32) * 64)) | ||
729 | 802 | ||
730 | /* | 803 | /* |
731 | * DCU clear transmit filter register | 804 | * DCU clear transmit filter register |
@@ -739,9 +812,6 @@ | |||
739 | 812 | ||
740 | /* | 813 | /* |
741 | * Reset control register | 814 | * Reset control register |
742 | * | ||
743 | * 4 and 8 are not used in 5211/5212 and | ||
744 | * 2 means "baseband reset" on 5211/5212. | ||
745 | */ | 815 | */ |
746 | #define AR5K_RESET_CTL 0x4000 /* Register Address */ | 816 | #define AR5K_RESET_CTL 0x4000 /* Register Address */ |
747 | #define AR5K_RESET_CTL_PCU 0x00000001 /* Protocol Control Unit reset */ | 817 | #define AR5K_RESET_CTL_PCU 0x00000001 /* Protocol Control Unit reset */ |
@@ -765,6 +835,7 @@ | |||
765 | #define AR5K_SLEEP_CTL_SLE_SLP 0x00010000 /* Force chip sleep */ | 835 | #define AR5K_SLEEP_CTL_SLE_SLP 0x00010000 /* Force chip sleep */ |
766 | #define AR5K_SLEEP_CTL_SLE_ALLOW 0x00020000 | 836 | #define AR5K_SLEEP_CTL_SLE_ALLOW 0x00020000 |
767 | #define AR5K_SLEEP_CTL_SLE_UNITS 0x00000008 /* [5211+] */ | 837 | #define AR5K_SLEEP_CTL_SLE_UNITS 0x00000008 /* [5211+] */ |
838 | /* more bits */ | ||
768 | 839 | ||
769 | /* | 840 | /* |
770 | * Interrupt pending register | 841 | * Interrupt pending register |
@@ -776,13 +847,14 @@ | |||
776 | * Sleep force register | 847 | * Sleep force register |
777 | */ | 848 | */ |
778 | #define AR5K_SFR 0x400c | 849 | #define AR5K_SFR 0x400c |
779 | #define AR5K_SFR_M 0x00000001 | 850 | #define AR5K_SFR_EN 0x00000001 |
780 | 851 | ||
781 | /* | 852 | /* |
782 | * PCI configuration register | 853 | * PCI configuration register |
783 | */ | 854 | */ |
784 | #define AR5K_PCICFG 0x4010 /* Register Address */ | 855 | #define AR5K_PCICFG 0x4010 /* Register Address */ |
785 | #define AR5K_PCICFG_EEAE 0x00000001 /* Eeprom access enable [5210] */ | 856 | #define AR5K_PCICFG_EEAE 0x00000001 /* Eeprom access enable [5210] */ |
857 | #define AR5K_PCICFG_SLEEP_CLOCK_EN 0x00000002 /* Enable sleep clock (?) */ | ||
786 | #define AR5K_PCICFG_CLKRUNEN 0x00000004 /* CLKRUN enable [5211+] */ | 858 | #define AR5K_PCICFG_CLKRUNEN 0x00000004 /* CLKRUN enable [5211+] */ |
787 | #define AR5K_PCICFG_EESIZE 0x00000018 /* Mask for EEPROM size [5211+] */ | 859 | #define AR5K_PCICFG_EESIZE 0x00000018 /* Mask for EEPROM size [5211+] */ |
788 | #define AR5K_PCICFG_EESIZE_S 3 | 860 | #define AR5K_PCICFG_EESIZE_S 3 |
@@ -798,19 +870,21 @@ | |||
798 | #define AR5K_PCICFG_CBEFIX_DIS 0x00000400 /* Disable CBE fix (?) */ | 870 | #define AR5K_PCICFG_CBEFIX_DIS 0x00000400 /* Disable CBE fix (?) */ |
799 | #define AR5K_PCICFG_SL_INTEN 0x00000800 /* Enable interrupts when asleep (?) */ | 871 | #define AR5K_PCICFG_SL_INTEN 0x00000800 /* Enable interrupts when asleep (?) */ |
800 | #define AR5K_PCICFG_LED_BCTL 0x00001000 /* Led blink (?) [5210] */ | 872 | #define AR5K_PCICFG_LED_BCTL 0x00001000 /* Led blink (?) [5210] */ |
801 | #define AR5K_PCICFG_SL_INPEN 0x00002800 /* Sleep even whith pending interrupts (?) */ | 873 | #define AR5K_PCICFG_UNK 0x00001000 /* Passed on some parts durring attach (?) */ |
874 | #define AR5K_PCICFG_SL_INPEN 0x00002000 /* Sleep even whith pending interrupts (?) */ | ||
802 | #define AR5K_PCICFG_SPWR_DN 0x00010000 /* Mask for power status */ | 875 | #define AR5K_PCICFG_SPWR_DN 0x00010000 /* Mask for power status */ |
803 | #define AR5K_PCICFG_LEDMODE 0x000e0000 /* Ledmode [5211+] */ | 876 | #define AR5K_PCICFG_LEDMODE 0x000e0000 /* Ledmode [5211+] */ |
804 | #define AR5K_PCICFG_LEDMODE_PROP 0x00000000 /* Blink on standard traffic [5211+] */ | 877 | #define AR5K_PCICFG_LEDMODE_PROP 0x00000000 /* Blink on standard traffic [5211+] */ |
805 | #define AR5K_PCICFG_LEDMODE_PROM 0x00020000 /* Default mode (blink on any traffic) [5211+] */ | 878 | #define AR5K_PCICFG_LEDMODE_PROM 0x00020000 /* Default mode (blink on any traffic) [5211+] */ |
806 | #define AR5K_PCICFG_LEDMODE_PWR 0x00040000 /* Some other blinking mode (?) [5211+] */ | 879 | #define AR5K_PCICFG_LEDMODE_PWR 0x00040000 /* Some other blinking mode (?) [5211+] */ |
807 | #define AR5K_PCICFG_LEDMODE_RAND 0x00060000 /* Random blinking (?) [5211+] */ | 880 | #define AR5K_PCICFG_LEDMODE_RAND 0x00060000 /* Random blinking (?) [5211+] */ |
808 | #define AR5K_PCICFG_LEDBLINK 0x00700000 | 881 | #define AR5K_PCICFG_LEDBLINK 0x00700000 /* Led blink rate */ |
809 | #define AR5K_PCICFG_LEDBLINK_S 20 | 882 | #define AR5K_PCICFG_LEDBLINK_S 20 |
810 | #define AR5K_PCICFG_LEDSLOW 0x00800000 /* Slow led blink rate (?) [5211+] */ | 883 | #define AR5K_PCICFG_LEDSLOW 0x00800000 /* Slowest led blink rate [5211+] */ |
811 | #define AR5K_PCICFG_LEDSTATE \ | 884 | #define AR5K_PCICFG_LEDSTATE \ |
812 | (AR5K_PCICFG_LED | AR5K_PCICFG_LEDMODE | \ | 885 | (AR5K_PCICFG_LED | AR5K_PCICFG_LEDMODE | \ |
813 | AR5K_PCICFG_LEDBLINK | AR5K_PCICFG_LEDSLOW) | 886 | AR5K_PCICFG_LEDBLINK | AR5K_PCICFG_LEDSLOW) |
887 | #define AR5K_PCICFG_SLEEP_CLOCK_RATE 0x03000000 /* Sleep clock rate (field) */ | ||
814 | 888 | ||
815 | /* | 889 | /* |
816 | * "General Purpose Input/Output" (GPIO) control register | 890 | * "General Purpose Input/Output" (GPIO) control register |
@@ -947,7 +1021,7 @@ | |||
947 | #define AR5K_EEPROM_VERSION_4_4 0x4004 | 1021 | #define AR5K_EEPROM_VERSION_4_4 0x4004 |
948 | #define AR5K_EEPROM_VERSION_4_5 0x4005 | 1022 | #define AR5K_EEPROM_VERSION_4_5 0x4005 |
949 | #define AR5K_EEPROM_VERSION_4_6 0x4006 /* has ee_scaled_cck_delta */ | 1023 | #define AR5K_EEPROM_VERSION_4_6 0x4006 /* has ee_scaled_cck_delta */ |
950 | #define AR5K_EEPROM_VERSION_4_7 0x3007 | 1024 | #define AR5K_EEPROM_VERSION_4_7 0x4007 |
951 | 1025 | ||
952 | #define AR5K_EEPROM_MODE_11A 0 | 1026 | #define AR5K_EEPROM_MODE_11A 0 |
953 | #define AR5K_EEPROM_MODE_11B 1 | 1027 | #define AR5K_EEPROM_MODE_11B 1 |
@@ -1023,10 +1097,14 @@ | |||
1023 | #define AR5K_EEPROM_STAT_WRDONE 0x00000008 /* EEPROM write successful */ | 1097 | #define AR5K_EEPROM_STAT_WRDONE 0x00000008 /* EEPROM write successful */ |
1024 | 1098 | ||
1025 | /* | 1099 | /* |
1026 | * EEPROM config register (?) | 1100 | * EEPROM config register |
1027 | */ | 1101 | */ |
1028 | #define AR5K_EEPROM_CFG 0x6010 | 1102 | #define AR5K_EEPROM_CFG 0x6010 /* Register Addres */ |
1029 | 1103 | #define AR5K_EEPROM_CFG_SIZE_OVR 0x00000001 | |
1104 | #define AR5K_EEPROM_CFG_WR_WAIT_DIS 0x00000004 /* Disable write wait */ | ||
1105 | #define AR5K_EEPROM_CFG_CLK_RATE 0x00000018 /* Clock rate */ | ||
1106 | #define AR5K_EEPROM_CFG_PROT_KEY 0x00ffff00 /* Protectio key */ | ||
1107 | #define AR5K_EEPROM_CFG_LIND_EN 0x01000000 /* Enable length indicator (?) */ | ||
1030 | 1108 | ||
1031 | 1109 | ||
1032 | /* | 1110 | /* |
@@ -1050,7 +1128,7 @@ | |||
1050 | #define AR5K_STA_ID1 0x8004 /* Register Address */ | 1128 | #define AR5K_STA_ID1 0x8004 /* Register Address */ |
1051 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ | 1129 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ |
1052 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ | 1130 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ |
1053 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting (?) */ | 1131 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ |
1054 | #define AR5K_STA_ID1_NO_KEYSRCH 0x00080000 /* No key search */ | 1132 | #define AR5K_STA_ID1_NO_KEYSRCH 0x00080000 /* No key search */ |
1055 | #define AR5K_STA_ID1_NO_PSPOLL 0x00100000 /* No power save polling [5210] */ | 1133 | #define AR5K_STA_ID1_NO_PSPOLL 0x00100000 /* No power save polling [5210] */ |
1056 | #define AR5K_STA_ID1_PCF_5211 0x00100000 /* Enable PCF on [5211+] */ | 1134 | #define AR5K_STA_ID1_PCF_5211 0x00100000 /* Enable PCF on [5211+] */ |
@@ -1059,9 +1137,13 @@ | |||
1059 | AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211) | 1137 | AR5K_STA_ID1_PCF_5210 : AR5K_STA_ID1_PCF_5211) |
1060 | #define AR5K_STA_ID1_DEFAULT_ANTENNA 0x00200000 /* Use default antenna */ | 1138 | #define AR5K_STA_ID1_DEFAULT_ANTENNA 0x00200000 /* Use default antenna */ |
1061 | #define AR5K_STA_ID1_DESC_ANTENNA 0x00400000 /* Update antenna from descriptor */ | 1139 | #define AR5K_STA_ID1_DESC_ANTENNA 0x00400000 /* Update antenna from descriptor */ |
1062 | #define AR5K_STA_ID1_RTS_DEF_ANTENNA 0x00800000 /* Use default antenna for RTS (?) */ | 1140 | #define AR5K_STA_ID1_RTS_DEF_ANTENNA 0x00800000 /* Use default antenna for RTS */ |
1063 | #define AR5K_STA_ID1_ACKCTS_6MB 0x01000000 /* Use 6Mbit/s for ACK/CTS (?) */ | 1141 | #define AR5K_STA_ID1_ACKCTS_6MB 0x01000000 /* Use 6Mbit/s for ACK/CTS */ |
1064 | #define AR5K_STA_ID1_BASE_RATE_11B 0x02000000 /* Use 11b base rate (for ACK/CTS ?) [5211+] */ | 1142 | #define AR5K_STA_ID1_BASE_RATE_11B 0x02000000 /* Use 11b base rate (for ACK/CTS ?) [5211+] */ |
1143 | #define AR5K_STA_ID1_SELF_GEN_SECTORE 0x04000000 /* Self generate sectore (?) */ | ||
1144 | #define AR5K_STA_ID1_CRYPT_MIC_EN 0x08000000 /* Enable MIC */ | ||
1145 | #define AR5K_STA_ID1_KEYSRCH_MODE 0x10000000 /* Keysearch mode (?) */ | ||
1146 | #define AR5K_STA_ID1_PRESERVE_SEQ_NUM 0x20000000 /* Preserve sequence number */ | ||
1065 | 1147 | ||
1066 | /* | 1148 | /* |
1067 | * First BSSID register (MAC address, lower 32bits) | 1149 | * First BSSID register (MAC address, lower 32bits) |
@@ -1117,7 +1199,7 @@ | |||
1117 | * | 1199 | * |
1118 | * Retry limit register for 5210 (no QCU/DCU so it's done in PCU) | 1200 | * Retry limit register for 5210 (no QCU/DCU so it's done in PCU) |
1119 | */ | 1201 | */ |
1120 | #define AR5K_NODCU_RETRY_LMT 0x801c /*Register Address */ | 1202 | #define AR5K_NODCU_RETRY_LMT 0x801c /* Register Address */ |
1121 | #define AR5K_NODCU_RETRY_LMT_SH_RETRY 0x0000000f /* Short retry limit mask */ | 1203 | #define AR5K_NODCU_RETRY_LMT_SH_RETRY 0x0000000f /* Short retry limit mask */ |
1122 | #define AR5K_NODCU_RETRY_LMT_SH_RETRY_S 0 | 1204 | #define AR5K_NODCU_RETRY_LMT_SH_RETRY_S 0 |
1123 | #define AR5K_NODCU_RETRY_LMT_LG_RETRY 0x000000f0 /* Long retry mask */ | 1205 | #define AR5K_NODCU_RETRY_LMT_LG_RETRY 0x000000f0 /* Long retry mask */ |
@@ -1136,9 +1218,9 @@ | |||
1136 | #define AR5K_USEC_5211 0x801c /* Register Address [5211+] */ | 1218 | #define AR5K_USEC_5211 0x801c /* Register Address [5211+] */ |
1137 | #define AR5K_USEC (ah->ah_version == AR5K_AR5210 ? \ | 1219 | #define AR5K_USEC (ah->ah_version == AR5K_AR5210 ? \ |
1138 | AR5K_USEC_5210 : AR5K_USEC_5211) | 1220 | AR5K_USEC_5210 : AR5K_USEC_5211) |
1139 | #define AR5K_USEC_1 0x0000007f | 1221 | #define AR5K_USEC_1 0x0000007f /* clock cycles for 1us */ |
1140 | #define AR5K_USEC_1_S 0 | 1222 | #define AR5K_USEC_1_S 0 |
1141 | #define AR5K_USEC_32 0x00003f80 | 1223 | #define AR5K_USEC_32 0x00003f80 /* clock cycles for 1us while on 32Mhz clock */ |
1142 | #define AR5K_USEC_32_S 7 | 1224 | #define AR5K_USEC_32_S 7 |
1143 | #define AR5K_USEC_TX_LATENCY_5211 0x007fc000 | 1225 | #define AR5K_USEC_TX_LATENCY_5211 0x007fc000 |
1144 | #define AR5K_USEC_TX_LATENCY_5211_S 14 | 1226 | #define AR5K_USEC_TX_LATENCY_5211_S 14 |
@@ -1152,16 +1234,16 @@ | |||
1152 | /* | 1234 | /* |
1153 | * PCU beacon control register | 1235 | * PCU beacon control register |
1154 | */ | 1236 | */ |
1155 | #define AR5K_BEACON_5210 0x8024 | 1237 | #define AR5K_BEACON_5210 0x8024 /*Register Address [5210] */ |
1156 | #define AR5K_BEACON_5211 0x8020 | 1238 | #define AR5K_BEACON_5211 0x8020 /*Register Address [5211+] */ |
1157 | #define AR5K_BEACON (ah->ah_version == AR5K_AR5210 ? \ | 1239 | #define AR5K_BEACON (ah->ah_version == AR5K_AR5210 ? \ |
1158 | AR5K_BEACON_5210 : AR5K_BEACON_5211) | 1240 | AR5K_BEACON_5210 : AR5K_BEACON_5211) |
1159 | #define AR5K_BEACON_PERIOD 0x0000ffff | 1241 | #define AR5K_BEACON_PERIOD 0x0000ffff /* Mask for beacon period */ |
1160 | #define AR5K_BEACON_PERIOD_S 0 | 1242 | #define AR5K_BEACON_PERIOD_S 0 |
1161 | #define AR5K_BEACON_TIM 0x007f0000 | 1243 | #define AR5K_BEACON_TIM 0x007f0000 /* Mask for TIM offset */ |
1162 | #define AR5K_BEACON_TIM_S 16 | 1244 | #define AR5K_BEACON_TIM_S 16 |
1163 | #define AR5K_BEACON_ENABLE 0x00800000 | 1245 | #define AR5K_BEACON_ENABLE 0x00800000 /* Enable beacons */ |
1164 | #define AR5K_BEACON_RESET_TSF 0x01000000 | 1246 | #define AR5K_BEACON_RESET_TSF 0x01000000 /* Force TSF reset */ |
1165 | 1247 | ||
1166 | /* | 1248 | /* |
1167 | * CFP period register | 1249 | * CFP period register |
@@ -1234,7 +1316,6 @@ | |||
1234 | 1316 | ||
1235 | /* | 1317 | /* |
1236 | * Receive filter register | 1318 | * Receive filter register |
1237 | * TODO: Get these out of ar5xxx.h on ath5k | ||
1238 | */ | 1319 | */ |
1239 | #define AR5K_RX_FILTER_5210 0x804c /* Register Address [5210] */ | 1320 | #define AR5K_RX_FILTER_5210 0x804c /* Register Address [5210] */ |
1240 | #define AR5K_RX_FILTER_5211 0x803c /* Register Address [5211+] */ | 1321 | #define AR5K_RX_FILTER_5211 0x803c /* Register Address [5211+] */ |
@@ -1307,11 +1388,11 @@ | |||
1307 | #define AR5K_DIAG_SW_5211 0x8048 /* Register Address [5211+] */ | 1388 | #define AR5K_DIAG_SW_5211 0x8048 /* Register Address [5211+] */ |
1308 | #define AR5K_DIAG_SW (ah->ah_version == AR5K_AR5210 ? \ | 1389 | #define AR5K_DIAG_SW (ah->ah_version == AR5K_AR5210 ? \ |
1309 | AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211) | 1390 | AR5K_DIAG_SW_5210 : AR5K_DIAG_SW_5211) |
1310 | #define AR5K_DIAG_SW_DIS_WEP_ACK 0x00000001 | 1391 | #define AR5K_DIAG_SW_DIS_WEP_ACK 0x00000001 /* Disable ACKs if WEP key is invalid */ |
1311 | #define AR5K_DIAG_SW_DIS_ACK 0x00000002 /* Disable ACKs (?) */ | 1392 | #define AR5K_DIAG_SW_DIS_ACK 0x00000002 /* Disable ACKs */ |
1312 | #define AR5K_DIAG_SW_DIS_CTS 0x00000004 /* Disable CTSs (?) */ | 1393 | #define AR5K_DIAG_SW_DIS_CTS 0x00000004 /* Disable CTSs */ |
1313 | #define AR5K_DIAG_SW_DIS_ENC 0x00000008 /* Disable encryption (?) */ | 1394 | #define AR5K_DIAG_SW_DIS_ENC 0x00000008 /* Disable encryption */ |
1314 | #define AR5K_DIAG_SW_DIS_DEC 0x00000010 /* Disable decryption (?) */ | 1395 | #define AR5K_DIAG_SW_DIS_DEC 0x00000010 /* Disable decryption */ |
1315 | #define AR5K_DIAG_SW_DIS_TX 0x00000020 /* Disable transmit [5210] */ | 1396 | #define AR5K_DIAG_SW_DIS_TX 0x00000020 /* Disable transmit [5210] */ |
1316 | #define AR5K_DIAG_SW_DIS_RX_5210 0x00000040 /* Disable recieve */ | 1397 | #define AR5K_DIAG_SW_DIS_RX_5210 0x00000040 /* Disable recieve */ |
1317 | #define AR5K_DIAG_SW_DIS_RX_5211 0x00000020 | 1398 | #define AR5K_DIAG_SW_DIS_RX_5211 0x00000020 |
@@ -1329,13 +1410,13 @@ | |||
1329 | #define AR5K_DIAG_SW_CHAN_INFO_5211 0x00000100 | 1410 | #define AR5K_DIAG_SW_CHAN_INFO_5211 0x00000100 |
1330 | #define AR5K_DIAG_SW_CHAN_INFO (ah->ah_version == AR5K_AR5210 ? \ | 1411 | #define AR5K_DIAG_SW_CHAN_INFO (ah->ah_version == AR5K_AR5210 ? \ |
1331 | AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211) | 1412 | AR5K_DIAG_SW_CHAN_INFO_5210 : AR5K_DIAG_SW_CHAN_INFO_5211) |
1332 | #define AR5K_DIAG_SW_EN_SCRAM_SEED_5211 0x00000200 /* Scrambler seed (?) */ | 1413 | #define AR5K_DIAG_SW_EN_SCRAM_SEED_5211 0x00000200 /* Enable scrambler seed */ |
1333 | #define AR5K_DIAG_SW_EN_SCRAM_SEED_5210 0x00000400 | 1414 | #define AR5K_DIAG_SW_EN_SCRAM_SEED_5210 0x00000400 |
1334 | #define AR5K_DIAG_SW_EN_SCRAM_SEED (ah->ah_version == AR5K_AR5210 ? \ | 1415 | #define AR5K_DIAG_SW_EN_SCRAM_SEED (ah->ah_version == AR5K_AR5210 ? \ |
1335 | AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211) | 1416 | AR5K_DIAG_SW_EN_SCRAM_SEED_5210 : AR5K_DIAG_SW_EN_SCRAM_SEED_5211) |
1336 | #define AR5K_DIAG_SW_ECO_ENABLE 0x00000400 /* [5211+] */ | 1417 | #define AR5K_DIAG_SW_ECO_ENABLE 0x00000400 /* [5211+] */ |
1337 | #define AR5K_DIAG_SW_SCVRAM_SEED 0x0003f800 /* [5210] */ | 1418 | #define AR5K_DIAG_SW_SCVRAM_SEED 0x0003f800 /* [5210] */ |
1338 | #define AR5K_DIAG_SW_SCRAM_SEED_M 0x0001fc00 /* Scrambler seed mask (?) */ | 1419 | #define AR5K_DIAG_SW_SCRAM_SEED_M 0x0001fc00 /* Scrambler seed mask */ |
1339 | #define AR5K_DIAG_SW_SCRAM_SEED_S 10 | 1420 | #define AR5K_DIAG_SW_SCRAM_SEED_S 10 |
1340 | #define AR5K_DIAG_SW_DIS_SEQ_INC 0x00040000 /* Disable seqnum increment (?)[5210] */ | 1421 | #define AR5K_DIAG_SW_DIS_SEQ_INC 0x00040000 /* Disable seqnum increment (?)[5210] */ |
1341 | #define AR5K_DIAG_SW_FRAME_NV0_5210 0x00080000 | 1422 | #define AR5K_DIAG_SW_FRAME_NV0_5210 0x00080000 |
@@ -1344,6 +1425,7 @@ | |||
1344 | AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211) | 1425 | AR5K_DIAG_SW_FRAME_NV0_5210 : AR5K_DIAG_SW_FRAME_NV0_5211) |
1345 | #define AR5K_DIAG_SW_OBSPT_M 0x000c0000 | 1426 | #define AR5K_DIAG_SW_OBSPT_M 0x000c0000 |
1346 | #define AR5K_DIAG_SW_OBSPT_S 18 | 1427 | #define AR5K_DIAG_SW_OBSPT_S 18 |
1428 | /* more bits */ | ||
1347 | 1429 | ||
1348 | /* | 1430 | /* |
1349 | * TSF (clock) register (lower 32 bits) | 1431 | * TSF (clock) register (lower 32 bits) |
@@ -1369,15 +1451,34 @@ | |||
1369 | /* | 1451 | /* |
1370 | * ADDAC test register [5211+] | 1452 | * ADDAC test register [5211+] |
1371 | */ | 1453 | */ |
1372 | #define AR5K_ADDAC_TEST 0x8054 | 1454 | #define AR5K_ADDAC_TEST 0x8054 /* Register Address */ |
1373 | #define AR5K_ADDAC_TEST_TXCONT 0x00000001 | 1455 | #define AR5K_ADDAC_TEST_TXCONT 0x00000001 /* Test continuous tx */ |
1456 | #define AR5K_ADDAC_TEST_TST_MODE 0x00000002 /* Test mode */ | ||
1457 | #define AR5K_ADDAC_TEST_LOOP_EN 0x00000004 /* Enable loop */ | ||
1458 | #define AR5K_ADDAC_TEST_LOOP_LEN 0x00000008 /* Loop length (field) */ | ||
1459 | #define AR5K_ADDAC_TEST_USE_U8 0x00004000 /* Use upper 8 bits */ | ||
1460 | #define AR5K_ADDAC_TEST_MSB 0x00008000 /* State of MSB */ | ||
1461 | #define AR5K_ADDAC_TEST_TRIG_SEL 0x00010000 /* Trigger select */ | ||
1462 | #define AR5K_ADDAC_TEST_TRIG_PTY 0x00020000 /* Trigger polarity */ | ||
1463 | #define AR5K_ADDAC_TEST_RXCONT 0x00040000 /* Continuous capture */ | ||
1464 | #define AR5K_ADDAC_TEST_CAPTURE 0x00080000 /* Begin capture */ | ||
1465 | #define AR5K_ADDAC_TEST_TST_ARM 0x00100000 /* Test ARM (Adaptive Radio Mode ?) */ | ||
1374 | 1466 | ||
1375 | /* | 1467 | /* |
1376 | * Default antenna register [5211+] | 1468 | * Default antenna register [5211+] |
1377 | */ | 1469 | */ |
1378 | #define AR5K_DEFAULT_ANTENNA 0x8058 | 1470 | #define AR5K_DEFAULT_ANTENNA 0x8058 |
1379 | 1471 | ||
1472 | /* | ||
1473 | * Frame control QoS mask register (?) [5211+] | ||
1474 | * (FC_QOS_MASK) | ||
1475 | */ | ||
1476 | #define AR5K_FRAME_CTL_QOSM 0x805c | ||
1380 | 1477 | ||
1478 | /* | ||
1479 | * Seq mask register (?) [5211+] | ||
1480 | */ | ||
1481 | #define AR5K_SEQ_MASK 0x8060 | ||
1381 | 1482 | ||
1382 | /* | 1483 | /* |
1383 | * Retry count register [5210] | 1484 | * Retry count register [5210] |
@@ -1449,124 +1550,242 @@ | |||
1449 | /* | 1550 | /* |
1450 | * XR (eXtended Range) mode register | 1551 | * XR (eXtended Range) mode register |
1451 | */ | 1552 | */ |
1452 | #define AR5K_XRMODE 0x80c0 | 1553 | #define AR5K_XRMODE 0x80c0 /* Register Address */ |
1453 | #define AR5K_XRMODE_POLL_TYPE_M 0x0000003f | 1554 | #define AR5K_XRMODE_POLL_TYPE_M 0x0000003f /* Mask for Poll type (?) */ |
1454 | #define AR5K_XRMODE_POLL_TYPE_S 0 | 1555 | #define AR5K_XRMODE_POLL_TYPE_S 0 |
1455 | #define AR5K_XRMODE_POLL_SUBTYPE_M 0x0000003c | 1556 | #define AR5K_XRMODE_POLL_SUBTYPE_M 0x0000003c /* Mask for Poll subtype (?) */ |
1456 | #define AR5K_XRMODE_POLL_SUBTYPE_S 2 | 1557 | #define AR5K_XRMODE_POLL_SUBTYPE_S 2 |
1457 | #define AR5K_XRMODE_POLL_WAIT_ALL 0x00000080 | 1558 | #define AR5K_XRMODE_POLL_WAIT_ALL 0x00000080 /* Wait for poll */ |
1458 | #define AR5K_XRMODE_SIFS_DELAY 0x000fff00 | 1559 | #define AR5K_XRMODE_SIFS_DELAY 0x000fff00 /* Mask for SIFS delay */ |
1459 | #define AR5K_XRMODE_FRAME_HOLD_M 0xfff00000 | 1560 | #define AR5K_XRMODE_FRAME_HOLD_M 0xfff00000 /* Mask for frame hold (?) */ |
1460 | #define AR5K_XRMODE_FRAME_HOLD_S 20 | 1561 | #define AR5K_XRMODE_FRAME_HOLD_S 20 |
1461 | 1562 | ||
1462 | /* | 1563 | /* |
1463 | * XR delay register | 1564 | * XR delay register |
1464 | */ | 1565 | */ |
1465 | #define AR5K_XRDELAY 0x80c4 | 1566 | #define AR5K_XRDELAY 0x80c4 /* Register Address */ |
1466 | #define AR5K_XRDELAY_SLOT_DELAY_M 0x0000ffff | 1567 | #define AR5K_XRDELAY_SLOT_DELAY_M 0x0000ffff /* Mask for slot delay */ |
1467 | #define AR5K_XRDELAY_SLOT_DELAY_S 0 | 1568 | #define AR5K_XRDELAY_SLOT_DELAY_S 0 |
1468 | #define AR5K_XRDELAY_CHIRP_DELAY_M 0xffff0000 | 1569 | #define AR5K_XRDELAY_CHIRP_DELAY_M 0xffff0000 /* Mask for CHIRP data delay */ |
1469 | #define AR5K_XRDELAY_CHIRP_DELAY_S 16 | 1570 | #define AR5K_XRDELAY_CHIRP_DELAY_S 16 |
1470 | 1571 | ||
1471 | /* | 1572 | /* |
1472 | * XR timeout register | 1573 | * XR timeout register |
1473 | */ | 1574 | */ |
1474 | #define AR5K_XRTIMEOUT 0x80c8 | 1575 | #define AR5K_XRTIMEOUT 0x80c8 /* Register Address */ |
1475 | #define AR5K_XRTIMEOUT_CHIRP_M 0x0000ffff | 1576 | #define AR5K_XRTIMEOUT_CHIRP_M 0x0000ffff /* Mask for CHIRP timeout */ |
1476 | #define AR5K_XRTIMEOUT_CHIRP_S 0 | 1577 | #define AR5K_XRTIMEOUT_CHIRP_S 0 |
1477 | #define AR5K_XRTIMEOUT_POLL_M 0xffff0000 | 1578 | #define AR5K_XRTIMEOUT_POLL_M 0xffff0000 /* Mask for Poll timeout */ |
1478 | #define AR5K_XRTIMEOUT_POLL_S 16 | 1579 | #define AR5K_XRTIMEOUT_POLL_S 16 |
1479 | 1580 | ||
1480 | /* | 1581 | /* |
1481 | * XR chirp register | 1582 | * XR chirp register |
1482 | */ | 1583 | */ |
1483 | #define AR5K_XRCHIRP 0x80cc | 1584 | #define AR5K_XRCHIRP 0x80cc /* Register Address */ |
1484 | #define AR5K_XRCHIRP_SEND 0x00000001 | 1585 | #define AR5K_XRCHIRP_SEND 0x00000001 /* Send CHIRP */ |
1485 | #define AR5K_XRCHIRP_GAP 0xffff0000 | 1586 | #define AR5K_XRCHIRP_GAP 0xffff0000 /* Mask for CHIRP gap (?) */ |
1486 | 1587 | ||
1487 | /* | 1588 | /* |
1488 | * XR stomp register | 1589 | * XR stomp register |
1489 | */ | 1590 | */ |
1490 | #define AR5K_XRSTOMP 0x80d0 | 1591 | #define AR5K_XRSTOMP 0x80d0 /* Register Address */ |
1491 | #define AR5K_XRSTOMP_TX 0x00000001 | 1592 | #define AR5K_XRSTOMP_TX 0x00000001 /* Stomp Tx (?) */ |
1492 | #define AR5K_XRSTOMP_RX_ABORT 0x00000002 | 1593 | #define AR5K_XRSTOMP_RX 0x00000002 /* Stomp Rx (?) */ |
1493 | #define AR5K_XRSTOMP_RSSI_THRES 0x0000ff00 | 1594 | #define AR5K_XRSTOMP_TX_RSSI 0x00000004 /* Stomp Tx RSSI (?) */ |
1595 | #define AR5K_XRSTOMP_TX_BSSID 0x00000008 /* Stomp Tx BSSID (?) */ | ||
1596 | #define AR5K_XRSTOMP_DATA 0x00000010 /* Stomp data (?)*/ | ||
1597 | #define AR5K_XRSTOMP_RSSI_THRES 0x0000ff00 /* Mask for XR RSSI threshold */ | ||
1494 | 1598 | ||
1495 | /* | 1599 | /* |
1496 | * First enhanced sleep register | 1600 | * First enhanced sleep register |
1497 | */ | 1601 | */ |
1498 | #define AR5K_SLEEP0 0x80d4 | 1602 | #define AR5K_SLEEP0 0x80d4 /* Register Address */ |
1499 | #define AR5K_SLEEP0_NEXT_DTIM 0x0007ffff | 1603 | #define AR5K_SLEEP0_NEXT_DTIM 0x0007ffff /* Mask for next DTIM (?) */ |
1500 | #define AR5K_SLEEP0_NEXT_DTIM_S 0 | 1604 | #define AR5K_SLEEP0_NEXT_DTIM_S 0 |
1501 | #define AR5K_SLEEP0_ASSUME_DTIM 0x00080000 | 1605 | #define AR5K_SLEEP0_ASSUME_DTIM 0x00080000 /* Assume DTIM */ |
1502 | #define AR5K_SLEEP0_ENH_SLEEP_EN 0x00100000 | 1606 | #define AR5K_SLEEP0_ENH_SLEEP_EN 0x00100000 /* Enable enchanced sleep control */ |
1503 | #define AR5K_SLEEP0_CABTO 0xff000000 | 1607 | #define AR5K_SLEEP0_CABTO 0xff000000 /* Mask for CAB Time Out */ |
1504 | #define AR5K_SLEEP0_CABTO_S 24 | 1608 | #define AR5K_SLEEP0_CABTO_S 24 |
1505 | 1609 | ||
1506 | /* | 1610 | /* |
1507 | * Second enhanced sleep register | 1611 | * Second enhanced sleep register |
1508 | */ | 1612 | */ |
1509 | #define AR5K_SLEEP1 0x80d8 | 1613 | #define AR5K_SLEEP1 0x80d8 /* Register Address */ |
1510 | #define AR5K_SLEEP1_NEXT_TIM 0x0007ffff | 1614 | #define AR5K_SLEEP1_NEXT_TIM 0x0007ffff /* Mask for next TIM (?) */ |
1511 | #define AR5K_SLEEP1_NEXT_TIM_S 0 | 1615 | #define AR5K_SLEEP1_NEXT_TIM_S 0 |
1512 | #define AR5K_SLEEP1_BEACON_TO 0xff000000 | 1616 | #define AR5K_SLEEP1_BEACON_TO 0xff000000 /* Mask for Beacon Time Out */ |
1513 | #define AR5K_SLEEP1_BEACON_TO_S 24 | 1617 | #define AR5K_SLEEP1_BEACON_TO_S 24 |
1514 | 1618 | ||
1515 | /* | 1619 | /* |
1516 | * Third enhanced sleep register | 1620 | * Third enhanced sleep register |
1517 | */ | 1621 | */ |
1518 | #define AR5K_SLEEP2 0x80dc | 1622 | #define AR5K_SLEEP2 0x80dc /* Register Address */ |
1519 | #define AR5K_SLEEP2_TIM_PER 0x0000ffff | 1623 | #define AR5K_SLEEP2_TIM_PER 0x0000ffff /* Mask for TIM period (?) */ |
1520 | #define AR5K_SLEEP2_TIM_PER_S 0 | 1624 | #define AR5K_SLEEP2_TIM_PER_S 0 |
1521 | #define AR5K_SLEEP2_DTIM_PER 0xffff0000 | 1625 | #define AR5K_SLEEP2_DTIM_PER 0xffff0000 /* Mask for DTIM period (?) */ |
1522 | #define AR5K_SLEEP2_DTIM_PER_S 16 | 1626 | #define AR5K_SLEEP2_DTIM_PER_S 16 |
1523 | 1627 | ||
1524 | /* | 1628 | /* |
1525 | * BSSID mask registers | 1629 | * BSSID mask registers |
1526 | */ | 1630 | */ |
1527 | #define AR5K_BSS_IDM0 0x80e0 | 1631 | #define AR5K_BSS_IDM0 0x80e0 /* Upper bits */ |
1528 | #define AR5K_BSS_IDM1 0x80e4 | 1632 | #define AR5K_BSS_IDM1 0x80e4 /* Lower bits */ |
1529 | 1633 | ||
1530 | /* | 1634 | /* |
1531 | * TX power control (TPC) register | 1635 | * TX power control (TPC) register |
1636 | * | ||
1637 | * XXX: PCDAC steps (0.5dbm) or DBM ? | ||
1638 | * | ||
1639 | * XXX: Mask changes for newer chips to 7f | ||
1640 | * like tx power table ? | ||
1532 | */ | 1641 | */ |
1533 | #define AR5K_TXPC 0x80e8 | 1642 | #define AR5K_TXPC 0x80e8 /* Register Address */ |
1534 | #define AR5K_TXPC_ACK_M 0x0000003f | 1643 | #define AR5K_TXPC_ACK_M 0x0000003f /* Mask for ACK tx power */ |
1535 | #define AR5K_TXPC_ACK_S 0 | 1644 | #define AR5K_TXPC_ACK_S 0 |
1536 | #define AR5K_TXPC_CTS_M 0x00003f00 | 1645 | #define AR5K_TXPC_CTS_M 0x00003f00 /* Mask for CTS tx power */ |
1537 | #define AR5K_TXPC_CTS_S 8 | 1646 | #define AR5K_TXPC_CTS_S 8 |
1538 | #define AR5K_TXPC_CHIRP_M 0x003f0000 | 1647 | #define AR5K_TXPC_CHIRP_M 0x003f0000 /* Mask for CHIRP tx power */ |
1539 | #define AR5K_TXPC_CHIRP_S 22 | 1648 | #define AR5K_TXPC_CHIRP_S 22 |
1540 | 1649 | ||
1541 | /* | 1650 | /* |
1542 | * Profile count registers | 1651 | * Profile count registers |
1543 | */ | 1652 | */ |
1544 | #define AR5K_PROFCNT_TX 0x80ec | 1653 | #define AR5K_PROFCNT_TX 0x80ec /* Tx count */ |
1545 | #define AR5K_PROFCNT_RX 0x80f0 | 1654 | #define AR5K_PROFCNT_RX 0x80f0 /* Rx count */ |
1546 | #define AR5K_PROFCNT_RXCLR 0x80f4 | 1655 | #define AR5K_PROFCNT_RXCLR 0x80f4 /* Clear Rx count */ |
1547 | #define AR5K_PROFCNT_CYCLE 0x80f8 | 1656 | #define AR5K_PROFCNT_CYCLE 0x80f8 /* Cycle count (?) */ |
1657 | |||
1658 | /* | ||
1659 | * Quiet (period) control registers (?) | ||
1660 | */ | ||
1661 | #define AR5K_QUIET_CTL1 0x80fc /* Register Address */ | ||
1662 | #define AR5K_QUIET_CTL1_NEXT_QT 0x0000ffff /* Mask for next quiet (period?) (?) */ | ||
1663 | #define AR5K_QUIET_CTL1_QT_EN 0x00010000 /* Enable quiet (period?) */ | ||
1664 | #define AR5K_QUIET_CTL2 0x8100 /* Register Address */ | ||
1665 | #define AR5K_QUIET_CTL2_QT_PER 0x0000ffff /* Mask for quiet period (?) */ | ||
1666 | #define AR5K_QUIET_CTL2_QT_DUR 0xffff0000 /* Mask for quiet duration (?) */ | ||
1548 | 1667 | ||
1549 | /* | 1668 | /* |
1550 | * TSF parameter register | 1669 | * TSF parameter register |
1551 | */ | 1670 | */ |
1552 | #define AR5K_TSF_PARM 0x8104 | 1671 | #define AR5K_TSF_PARM 0x8104 /* Register Address */ |
1553 | #define AR5K_TSF_PARM_INC_M 0x000000ff | 1672 | #define AR5K_TSF_PARM_INC_M 0x000000ff /* Mask for TSF increment */ |
1554 | #define AR5K_TSF_PARM_INC_S 0 | 1673 | #define AR5K_TSF_PARM_INC_S 0 |
1555 | 1674 | ||
1556 | /* | 1675 | /* |
1676 | * QoS register (?) | ||
1677 | */ | ||
1678 | #define AR5K_QOS 0x8108 /* Register Address */ | ||
1679 | #define AR5K_QOS_NOACK_2BIT_VALUES 0x00000000 /* (field) */ | ||
1680 | #define AR5K_QOS_NOACK_BIT_OFFSET 0x00000020 /* (field) */ | ||
1681 | #define AR5K_QOS_NOACK_BYTE_OFFSET 0x00000080 /* (field) */ | ||
1682 | |||
1683 | /* | ||
1557 | * PHY error filter register | 1684 | * PHY error filter register |
1558 | */ | 1685 | */ |
1559 | #define AR5K_PHY_ERR_FIL 0x810c | 1686 | #define AR5K_PHY_ERR_FIL 0x810c |
1560 | #define AR5K_PHY_ERR_FIL_RADAR 0x00000020 | 1687 | #define AR5K_PHY_ERR_FIL_RADAR 0x00000020 /* Radar signal */ |
1561 | #define AR5K_PHY_ERR_FIL_OFDM 0x00020000 | 1688 | #define AR5K_PHY_ERR_FIL_OFDM 0x00020000 /* OFDM false detect (ANI) */ |
1562 | #define AR5K_PHY_ERR_FIL_CCK 0x02000000 | 1689 | #define AR5K_PHY_ERR_FIL_CCK 0x02000000 /* CCK false detect (ANI) */ |
1690 | |||
1691 | /* | ||
1692 | * XR latency register | ||
1693 | */ | ||
1694 | #define AR5K_XRLAT_TX 0x8110 | ||
1563 | 1695 | ||
1564 | /* | 1696 | /* |
1565 | * Rate duration register | 1697 | * ACK SIFS register |
1698 | */ | ||
1699 | #define AR5K_ACKSIFS 0x8114 /* Register Address */ | ||
1700 | #define AR5K_ACKSIFS_INC 0x00000000 /* ACK SIFS Increment (field) */ | ||
1701 | |||
1702 | /* | ||
1703 | * MIC QoS control register (?) | ||
1704 | */ | ||
1705 | #define AR5K_MIC_QOS_CTL 0x8118 /* Register Address */ | ||
1706 | #define AR5K_MIC_QOS_CTL_0 0x00000001 /* MIC QoS control 0 (?) */ | ||
1707 | #define AR5K_MIC_QOS_CTL_1 0x00000004 /* MIC QoS control 1 (?) */ | ||
1708 | #define AR5K_MIC_QOS_CTL_2 0x00000010 /* MIC QoS control 2 (?) */ | ||
1709 | #define AR5K_MIC_QOS_CTL_3 0x00000040 /* MIC QoS control 3 (?) */ | ||
1710 | #define AR5K_MIC_QOS_CTL_4 0x00000100 /* MIC QoS control 4 (?) */ | ||
1711 | #define AR5K_MIC_QOS_CTL_5 0x00000400 /* MIC QoS control 5 (?) */ | ||
1712 | #define AR5K_MIC_QOS_CTL_6 0x00001000 /* MIC QoS control 6 (?) */ | ||
1713 | #define AR5K_MIC_QOS_CTL_7 0x00004000 /* MIC QoS control 7 (?) */ | ||
1714 | #define AR5K_MIC_QOS_CTL_MQ_EN 0x00010000 /* Enable MIC QoS */ | ||
1715 | |||
1716 | /* | ||
1717 | * MIC QoS select register (?) | ||
1718 | */ | ||
1719 | #define AR5K_MIC_QOS_SEL 0x811c | ||
1720 | #define AR5K_MIC_QOS_SEL_0 0x00000001 | ||
1721 | #define AR5K_MIC_QOS_SEL_1 0x00000010 | ||
1722 | #define AR5K_MIC_QOS_SEL_2 0x00000100 | ||
1723 | #define AR5K_MIC_QOS_SEL_3 0x00001000 | ||
1724 | #define AR5K_MIC_QOS_SEL_4 0x00010000 | ||
1725 | #define AR5K_MIC_QOS_SEL_5 0x00100000 | ||
1726 | #define AR5K_MIC_QOS_SEL_6 0x01000000 | ||
1727 | #define AR5K_MIC_QOS_SEL_7 0x10000000 | ||
1728 | |||
1729 | /* | ||
1730 | * Misc mode control register (?) | ||
1731 | */ | ||
1732 | #define AR5K_MISC_MODE 0x8120 /* Register Address */ | ||
1733 | #define AR5K_MISC_MODE_FBSSID_MATCH 0x00000001 /* Force BSSID match */ | ||
1734 | #define AR5K_MISC_MODE_ACKSIFS_MEM 0x00000002 /* ACK SIFS memory (?) */ | ||
1735 | /* more bits */ | ||
1736 | |||
1737 | /* | ||
1738 | * OFDM Filter counter | ||
1739 | */ | ||
1740 | #define AR5K_OFDM_FIL_CNT 0x8124 | ||
1741 | |||
1742 | /* | ||
1743 | * CCK Filter counter | ||
1744 | */ | ||
1745 | #define AR5K_CCK_FIL_CNT 0x8128 | ||
1746 | |||
1747 | /* | ||
1748 | * PHY Error Counters (?) | ||
1749 | */ | ||
1750 | #define AR5K_PHYERR_CNT1 0x812c | ||
1751 | #define AR5K_PHYERR_CNT1_MASK 0x8130 | ||
1752 | |||
1753 | #define AR5K_PHYERR_CNT2 0x8134 | ||
1754 | #define AR5K_PHYERR_CNT2_MASK 0x8138 | ||
1755 | |||
1756 | /* | ||
1757 | * TSF Threshold register (?) | ||
1758 | */ | ||
1759 | #define AR5K_TSF_THRES 0x813c | ||
1760 | |||
1761 | /* | ||
1762 | * Rate -> ACK SIFS mapping table (32 entries) | ||
1763 | */ | ||
1764 | #define AR5K_RATE_ACKSIFS_BASE 0x8680 /* Register Address */ | ||
1765 | #define AR5K_RATE_ACKSIFS(_n) (AR5K_RATE_ACKSIFS_BSE + ((_n) << 2)) | ||
1766 | #define AR5K_RATE_ACKSIFS_NORMAL 0x00000001 /* Normal SIFS (field) */ | ||
1767 | #define AR5K_RATE_ACKSIFS_TURBO 0x00000400 /* Turbo SIFS (field) */ | ||
1768 | |||
1769 | /* | ||
1770 | * Rate -> duration mapping table (32 entries) | ||
1566 | */ | 1771 | */ |
1567 | #define AR5K_RATE_DUR_BASE 0x8700 | 1772 | #define AR5K_RATE_DUR_BASE 0x8700 |
1568 | #define AR5K_RATE_DUR(_n) (AR5K_RATE_DUR_BASE + ((_n) << 2)) | 1773 | #define AR5K_RATE_DUR(_n) (AR5K_RATE_DUR_BASE + ((_n) << 2)) |
1569 | 1774 | ||
1775 | /* | ||
1776 | * Rate -> db mapping table | ||
1777 | * (8 entries, each one has 4 8bit fields) | ||
1778 | */ | ||
1779 | #define AR5K_RATE2DB_BASE 0x87c0 | ||
1780 | #define AR5K_RATE2DB(_n) (AR5K_RATE2DB_BASE + ((_n) << 2)) | ||
1781 | |||
1782 | /* | ||
1783 | * db -> Rate mapping table | ||
1784 | * (8 entries, each one has 4 8bit fields) | ||
1785 | */ | ||
1786 | #define AR5K_DB2RATE_BASE 0x87e0 | ||
1787 | #define AR5K_DB2RATE(_n) (AR5K_DB2RATE_BASE + ((_n) << 2)) | ||
1788 | |||
1570 | /*===5212 end===*/ | 1789 | /*===5212 end===*/ |
1571 | 1790 | ||
1572 | /* | 1791 | /* |
@@ -1613,12 +1832,34 @@ | |||
1613 | /*===PHY REGISTERS===*/ | 1832 | /*===PHY REGISTERS===*/ |
1614 | 1833 | ||
1615 | /* | 1834 | /* |
1616 | * PHY register | 1835 | * PHY registers start |
1617 | */ | 1836 | */ |
1618 | #define AR5K_PHY_BASE 0x9800 | 1837 | #define AR5K_PHY_BASE 0x9800 |
1619 | #define AR5K_PHY(_n) (AR5K_PHY_BASE + ((_n) << 2)) | 1838 | #define AR5K_PHY(_n) (AR5K_PHY_BASE + ((_n) << 2)) |
1620 | #define AR5K_PHY_SHIFT_2GHZ 0x00004007 | 1839 | |
1621 | #define AR5K_PHY_SHIFT_5GHZ 0x00000007 | 1840 | /* |
1841 | * TST_2 (Misc config parameters) | ||
1842 | */ | ||
1843 | #define AR5K_PHY_TST2 0x9800 /* Register Address */ | ||
1844 | #define AR5K_PHY_TST2_TRIG_SEL 0x00000001 /* Trigger select (?) (field ?) */ | ||
1845 | #define AR5K_PHY_TST2_TRIG 0x00000010 /* Trigger (?) (field ?) */ | ||
1846 | #define AR5K_PHY_TST2_CBUS_MODE 0x00000100 /* Cardbus mode (?) */ | ||
1847 | /* bit reserved */ | ||
1848 | #define AR5K_PHY_TST2_CLK32 0x00000400 /* CLK_OUT is CLK32 (32Khz external) */ | ||
1849 | #define AR5K_PHY_TST2_CHANCOR_DUMP_EN 0x00000800 /* Enable Chancor dump (?) */ | ||
1850 | #define AR5K_PHY_TST2_EVEN_CHANCOR_DUMP 0x00001000 /* Even Chancor dump (?) */ | ||
1851 | #define AR5K_PHY_TST2_RFSILENT_EN 0x00002000 /* Enable RFSILENT */ | ||
1852 | #define AR5K_PHY_TST2_ALT_RFDATA 0x00004000 /* Alternate RFDATA (5-2GHz switch) */ | ||
1853 | #define AR5K_PHY_TST2_MINI_OBS_EN 0x00008000 /* Enable mini OBS (?) */ | ||
1854 | #define AR5K_PHY_TST2_RX2_IS_RX5_INV 0x00010000 /* 2GHz rx path is the 5GHz path inverted (?) */ | ||
1855 | #define AR5K_PHY_TST2_SLOW_CLK160 0x00020000 /* Slow CLK160 (?) */ | ||
1856 | #define AR5K_PHY_TST2_AGC_OBS_SEL_3 0x00040000 /* AGC OBS Select 3 (?) */ | ||
1857 | #define AR5K_PHY_TST2_BBB_OBS_SEL 0x00080000 /* BB OBS Select (field ?) */ | ||
1858 | #define AR5K_PHY_TST2_ADC_OBS_SEL 0x00800000 /* ADC OBS Select (field ?) */ | ||
1859 | #define AR5K_PHY_TST2_RX_CLR_SEL 0x08000000 /* RX Clear Select (?) */ | ||
1860 | #define AR5K_PHY_TST2_FORCE_AGC_CLR 0x10000000 /* Force AGC clear (?) */ | ||
1861 | #define AR5K_PHY_SHIFT_2GHZ 0x00004007 /* Used to access 2GHz radios */ | ||
1862 | #define AR5K_PHY_SHIFT_5GHZ 0x00000007 /* Used to access 5GHz radios (default) */ | ||
1622 | 1863 | ||
1623 | /* | 1864 | /* |
1624 | * PHY frame control register [5110] /turbo mode register [5111+] | 1865 | * PHY frame control register [5110] /turbo mode register [5111+] |
@@ -1630,18 +1871,21 @@ | |||
1630 | * a "turbo mode register" for 5110. We treat this one as | 1871 | * a "turbo mode register" for 5110. We treat this one as |
1631 | * a frame control register for 5110 below. | 1872 | * a frame control register for 5110 below. |
1632 | */ | 1873 | */ |
1633 | #define AR5K_PHY_TURBO 0x9804 | 1874 | #define AR5K_PHY_TURBO 0x9804 /* Register Address */ |
1634 | #define AR5K_PHY_TURBO_MODE 0x00000001 | 1875 | #define AR5K_PHY_TURBO_MODE 0x00000001 /* Enable turbo mode */ |
1635 | #define AR5K_PHY_TURBO_SHORT 0x00000002 | 1876 | #define AR5K_PHY_TURBO_SHORT 0x00000002 /* Short mode (20Mhz channels) (?) */ |
1636 | 1877 | ||
1637 | /* | 1878 | /* |
1638 | * PHY agility command register | 1879 | * PHY agility command register |
1880 | * (aka TST_1) | ||
1639 | */ | 1881 | */ |
1640 | #define AR5K_PHY_AGC 0x9808 | 1882 | #define AR5K_PHY_AGC 0x9808 /* Register Address */ |
1641 | #define AR5K_PHY_AGC_DISABLE 0x08000000 | 1883 | #define AR5K_PHY_TST1 0x9808 |
1884 | #define AR5K_PHY_AGC_DISABLE 0x08000000 /* Disable AGC to A2 (?)*/ | ||
1885 | #define AR5K_PHY_TST1_TXHOLD 0x00003800 /* Set tx hold (?) */ | ||
1642 | 1886 | ||
1643 | /* | 1887 | /* |
1644 | * PHY timing register [5112+] | 1888 | * PHY timing register 3 [5112+] |
1645 | */ | 1889 | */ |
1646 | #define AR5K_PHY_TIMING_3 0x9814 | 1890 | #define AR5K_PHY_TIMING_3 0x9814 |
1647 | #define AR5K_PHY_TIMING_3_DSC_MAN 0xfffe0000 | 1891 | #define AR5K_PHY_TIMING_3_DSC_MAN 0xfffe0000 |
@@ -1657,26 +1901,81 @@ | |||
1657 | /* | 1901 | /* |
1658 | * PHY activation register | 1902 | * PHY activation register |
1659 | */ | 1903 | */ |
1660 | #define AR5K_PHY_ACT 0x981c | 1904 | #define AR5K_PHY_ACT 0x981c /* Register Address */ |
1661 | #define AR5K_PHY_ACT_ENABLE 0x00000001 | 1905 | #define AR5K_PHY_ACT_ENABLE 0x00000001 /* Activate PHY */ |
1662 | #define AR5K_PHY_ACT_DISABLE 0x00000002 | 1906 | #define AR5K_PHY_ACT_DISABLE 0x00000002 /* Deactivate PHY */ |
1907 | |||
1908 | /* | ||
1909 | * PHY RF control registers | ||
1910 | * (i think these are delay times, | ||
1911 | * these calibration values exist | ||
1912 | * in EEPROM) | ||
1913 | */ | ||
1914 | #define AR5K_PHY_RF_CTL2 0x9824 /* Register Address */ | ||
1915 | #define AR5K_PHY_RF_CTL2_TXF2TXD_START 0x0000000f /* Mask for TX frame to TX d(esc?) start */ | ||
1916 | |||
1917 | #define AR5K_PHY_RF_CTL3 0x9828 /* Register Address */ | ||
1918 | #define AR5K_PHY_RF_CTL3_TXE2XLNA_ON 0x0000000f /* Mask for TX end to XLNA on */ | ||
1919 | |||
1920 | #define AR5K_PHY_RF_CTL4 0x9834 /* Register Address */ | ||
1921 | #define AR5K_PHY_RF_CTL4_TXF2XPA_A_ON 0x00000001 /* TX frame to XPA A on (field) */ | ||
1922 | #define AR5K_PHY_RF_CTL4_TXF2XPA_B_ON 0x00000100 /* TX frame to XPA B on (field) */ | ||
1923 | #define AR5K_PHY_RF_CTL4_TXE2XPA_A_OFF 0x00010000 /* TX end to XPA A off (field) */ | ||
1924 | #define AR5K_PHY_RF_CTL4_TXE2XPA_B_OFF 0x01000000 /* TX end to XPA B off (field) */ | ||
1925 | |||
1926 | /* | ||
1927 | * Pre-Amplifier control register | ||
1928 | * (XPA -> external pre-amplifier) | ||
1929 | */ | ||
1930 | #define AR5K_PHY_PA_CTL 0x9838 /* Register Address */ | ||
1931 | #define AR5K_PHY_PA_CTL_XPA_A_HI 0x00000001 /* XPA A high (?) */ | ||
1932 | #define AR5K_PHY_PA_CTL_XPA_B_HI 0x00000002 /* XPA B high (?) */ | ||
1933 | #define AR5K_PHY_PA_CTL_XPA_A_EN 0x00000004 /* Enable XPA A */ | ||
1934 | #define AR5K_PHY_PA_CTL_XPA_B_EN 0x00000008 /* Enable XPA B */ | ||
1935 | |||
1936 | /* | ||
1937 | * PHY settling register | ||
1938 | */ | ||
1939 | #define AR5K_PHY_SETTLING 0x9844 /* Register Address */ | ||
1940 | #define AR5K_PHY_SETTLING_AGC 0x0000007f /* Mask for AGC settling time */ | ||
1941 | #define AR5K_PHY_SETTLING_SWITCH 0x00003f80 /* Mask for Switch settlig time */ | ||
1942 | |||
1943 | /* | ||
1944 | * PHY Gain registers | ||
1945 | */ | ||
1946 | #define AR5K_PHY_GAIN 0x9848 /* Register Address */ | ||
1947 | #define AR5K_PHY_GAIN_TXRX_ATTEN 0x0003f000 /* Mask for TX-RX Attenuation */ | ||
1948 | |||
1949 | #define AR5K_PHY_GAIN_OFFSET 0x984c /* Register Address */ | ||
1950 | #define AR5K_PHY_GAIN_OFFSET_RXTX_FLAG 0x00020000 /* RX-TX flag (?) */ | ||
1951 | |||
1952 | /* | ||
1953 | * Desired size register | ||
1954 | * (for more infos read ANI patent) | ||
1955 | */ | ||
1956 | #define AR5K_PHY_DESIRED_SIZE 0x9850 /* Register Address */ | ||
1957 | #define AR5K_PHY_DESIRED_SIZE_ADC 0x000000ff /* Mask for ADC desired size */ | ||
1958 | #define AR5K_PHY_DESIRED_SIZE_PGA 0x0000ff00 /* Mask for PGA desired size */ | ||
1959 | #define AR5K_PHY_DESIRED_SIZE_TOT 0x0ff00000 /* Mask for Total desired size (?) */ | ||
1663 | 1960 | ||
1664 | /* | 1961 | /* |
1665 | * PHY signal register | 1962 | * PHY signal register |
1963 | * (for more infos read ANI patent) | ||
1666 | */ | 1964 | */ |
1667 | #define AR5K_PHY_SIG 0x9858 | 1965 | #define AR5K_PHY_SIG 0x9858 /* Register Address */ |
1668 | #define AR5K_PHY_SIG_FIRSTEP 0x0003f000 | 1966 | #define AR5K_PHY_SIG_FIRSTEP 0x0003f000 /* Mask for FIRSTEP */ |
1669 | #define AR5K_PHY_SIG_FIRSTEP_S 12 | 1967 | #define AR5K_PHY_SIG_FIRSTEP_S 12 |
1670 | #define AR5K_PHY_SIG_FIRPWR 0x03fc0000 | 1968 | #define AR5K_PHY_SIG_FIRPWR 0x03fc0000 /* Mask for FIPWR */ |
1671 | #define AR5K_PHY_SIG_FIRPWR_S 18 | 1969 | #define AR5K_PHY_SIG_FIRPWR_S 18 |
1672 | 1970 | ||
1673 | /* | 1971 | /* |
1674 | * PHY coarse agility control register | 1972 | * PHY coarse agility control register |
1973 | * (for more infos read ANI patent) | ||
1675 | */ | 1974 | */ |
1676 | #define AR5K_PHY_AGCCOARSE 0x985c | 1975 | #define AR5K_PHY_AGCCOARSE 0x985c /* Register Address */ |
1677 | #define AR5K_PHY_AGCCOARSE_LO 0x00007f80 | 1976 | #define AR5K_PHY_AGCCOARSE_LO 0x00007f80 /* Mask for AGC Coarse low */ |
1678 | #define AR5K_PHY_AGCCOARSE_LO_S 7 | 1977 | #define AR5K_PHY_AGCCOARSE_LO_S 7 |
1679 | #define AR5K_PHY_AGCCOARSE_HI 0x003f8000 | 1978 | #define AR5K_PHY_AGCCOARSE_HI 0x003f8000 /* Mask for AGC Coarse high */ |
1680 | #define AR5K_PHY_AGCCOARSE_HI_S 15 | 1979 | #define AR5K_PHY_AGCCOARSE_HI_S 15 |
1681 | 1980 | ||
1682 | /* | 1981 | /* |
@@ -1689,12 +1988,13 @@ | |||
1689 | /* | 1988 | /* |
1690 | * PHY noise floor status register | 1989 | * PHY noise floor status register |
1691 | */ | 1990 | */ |
1692 | #define AR5K_PHY_NF 0x9864 | 1991 | #define AR5K_PHY_NF 0x9864 /* Register address */ |
1693 | #define AR5K_PHY_NF_M 0x000001ff | 1992 | #define AR5K_PHY_NF_M 0x000001ff /* Noise floor mask */ |
1694 | #define AR5K_PHY_NF_ACTIVE 0x00000100 | 1993 | #define AR5K_PHY_NF_ACTIVE 0x00000100 /* Noise floor calibration still active */ |
1695 | #define AR5K_PHY_NF_RVAL(_n) (((_n) >> 19) & AR5K_PHY_NF_M) | 1994 | #define AR5K_PHY_NF_RVAL(_n) (((_n) >> 19) & AR5K_PHY_NF_M) |
1696 | #define AR5K_PHY_NF_AVAL(_n) (-((_n) ^ AR5K_PHY_NF_M) + 1) | 1995 | #define AR5K_PHY_NF_AVAL(_n) (-((_n) ^ AR5K_PHY_NF_M) + 1) |
1697 | #define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9)) | 1996 | #define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9)) |
1997 | #define AR5K_PHY_NF_THRESH62 0x00001000 /* Thresh62 -check ANI patent- (field) */ | ||
1698 | 1998 | ||
1699 | /* | 1999 | /* |
1700 | * PHY ADC saturation register [5110] | 2000 | * PHY ADC saturation register [5110] |
@@ -1706,6 +2006,30 @@ | |||
1706 | #define AR5K_PHY_ADCSAT_THR_S 5 | 2006 | #define AR5K_PHY_ADCSAT_THR_S 5 |
1707 | 2007 | ||
1708 | /* | 2008 | /* |
2009 | * PHY Weak ofdm signal detection threshold registers (ANI) [5212+] | ||
2010 | */ | ||
2011 | |||
2012 | /* High thresholds */ | ||
2013 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR 0x9868 | ||
2014 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_COUNT 0x0000001f | ||
2015 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_COUNT_S 0 | ||
2016 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M1 0x00fe0000 | ||
2017 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M1_S 17 | ||
2018 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2 0x7f000000 | ||
2019 | #define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_S 24 | ||
2020 | |||
2021 | /* Low thresholds */ | ||
2022 | #define AR5K_PHY_WEAK_OFDM_LOW_THR 0x986c | ||
2023 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN 0x00000001 | ||
2024 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT 0x00003f00 | ||
2025 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT_S 8 | ||
2026 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M1 0x001fc000 | ||
2027 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M1_S 14 | ||
2028 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M2 0x0fe00000 | ||
2029 | #define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_S 21 | ||
2030 | |||
2031 | |||
2032 | /* | ||
1709 | * PHY sleep registers [5112+] | 2033 | * PHY sleep registers [5112+] |
1710 | */ | 2034 | */ |
1711 | #define AR5K_PHY_SCR 0x9870 | 2035 | #define AR5K_PHY_SCR 0x9870 |
@@ -1730,6 +2054,8 @@ | |||
1730 | AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212) | 2054 | AR5K_PHY_PLL_44MHZ_5211 : AR5K_PHY_PLL_44MHZ_5212) |
1731 | #define AR5K_PHY_PLL_RF5111 0x00000000 | 2055 | #define AR5K_PHY_PLL_RF5111 0x00000000 |
1732 | #define AR5K_PHY_PLL_RF5112 0x00000040 | 2056 | #define AR5K_PHY_PLL_RF5112 0x00000040 |
2057 | #define AR5K_PHY_PLL_HALF_RATE 0x00000100 | ||
2058 | #define AR5K_PHY_PLL_QUARTER_RATE 0x00000200 | ||
1733 | 2059 | ||
1734 | /* | 2060 | /* |
1735 | * RF Buffer register | 2061 | * RF Buffer register |
@@ -1792,23 +2118,74 @@ | |||
1792 | #define AR5K_PHY_RFSTG_DISABLE 0x00000021 | 2118 | #define AR5K_PHY_RFSTG_DISABLE 0x00000021 |
1793 | 2119 | ||
1794 | /* | 2120 | /* |
2121 | * PHY Antenna control register | ||
2122 | */ | ||
2123 | #define AR5K_PHY_ANT_CTL 0x9910 /* Register Address */ | ||
2124 | #define AR5K_PHY_ANT_CTL_TXRX_EN 0x00000001 /* Enable TX/RX (?) */ | ||
2125 | #define AR5K_PHY_ANT_CTL_SECTORED_ANT 0x00000004 /* Sectored Antenna */ | ||
2126 | #define AR5K_PHY_ANT_CTL_HITUNE5 0x00000008 /* Hitune5 (?) */ | ||
2127 | #define AR5K_PHY_ANT_CTL_SWTABLE_IDLE 0x00000010 /* Switch table idle (?) */ | ||
2128 | |||
2129 | /* | ||
1795 | * PHY receiver delay register [5111+] | 2130 | * PHY receiver delay register [5111+] |
1796 | */ | 2131 | */ |
1797 | #define AR5K_PHY_RX_DELAY 0x9914 | 2132 | #define AR5K_PHY_RX_DELAY 0x9914 /* Register Address */ |
1798 | #define AR5K_PHY_RX_DELAY_M 0x00003fff | 2133 | #define AR5K_PHY_RX_DELAY_M 0x00003fff /* Mask for RX activate to receive delay (/100ns) */ |
2134 | |||
2135 | /* | ||
2136 | * PHY max rx length register (?) [5111] | ||
2137 | */ | ||
2138 | #define AR5K_PHY_MAX_RX_LEN 0x991c | ||
1799 | 2139 | ||
1800 | /* | 2140 | /* |
1801 | * PHY timing I(nphase) Q(adrature) control register [5111+] | 2141 | * PHY timing register 4 |
2142 | * I(nphase)/Q(adrature) calibration register [5111+] | ||
1802 | */ | 2143 | */ |
1803 | #define AR5K_PHY_IQ 0x9920 /* Register address */ | 2144 | #define AR5K_PHY_IQ 0x9920 /* Register Address */ |
1804 | #define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */ | 2145 | #define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */ |
1805 | #define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */ | 2146 | #define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */ |
1806 | #define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5 | 2147 | #define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5 |
1807 | #define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */ | 2148 | #define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */ |
1808 | #define AR5K_PHY_IQ_CAL_NUM_LOG_MAX 0x0000f000 | 2149 | #define AR5K_PHY_IQ_CAL_NUM_LOG_MAX 0x0000f000 /* Mask for max number of samples in log scale */ |
1809 | #define AR5K_PHY_IQ_CAL_NUM_LOG_MAX_S 12 | 2150 | #define AR5K_PHY_IQ_CAL_NUM_LOG_MAX_S 12 |
1810 | #define AR5K_PHY_IQ_RUN 0x00010000 /* Run i/q calibration */ | 2151 | #define AR5K_PHY_IQ_RUN 0x00010000 /* Run i/q calibration */ |
2152 | #define AR5K_PHY_IQ_USE_PT_DF 0x00020000 /* Use pilot track df (?) */ | ||
2153 | #define AR5K_PHY_IQ_EARLY_TRIG_THR 0x00200000 /* Early trigger threshold (?) (field) */ | ||
2154 | #define AR5K_PHY_IQ_PILOT_MASK_EN 0x10000000 /* Enable pilot mask (?) */ | ||
2155 | #define AR5K_PHY_IQ_CHAN_MASK_EN 0x20000000 /* Enable channel mask (?) */ | ||
2156 | #define AR5K_PHY_IQ_SPUR_FILT_EN 0x40000000 /* Enable spur filter */ | ||
2157 | #define AR5K_PHY_IQ_SPUR_RSSI_EN 0x80000000 /* Enable spur rssi */ | ||
1811 | 2158 | ||
2159 | /* | ||
2160 | * PHY timing register 5 | ||
2161 | * OFDM Self-correlator Cyclic RSSI threshold params | ||
2162 | * (Check out bb_cycpwr_thr1 on ANI patent) | ||
2163 | */ | ||
2164 | #define AR5K_PHY_OFDM_SELFCORR 0x9924 /* Register Address */ | ||
2165 | #define AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1_EN 0x00000001 /* Enable cyclic RSSI thr 1 */ | ||
2166 | #define AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1 0x000000fe /* Mask for Cyclic RSSI threshold 1 */ | ||
2167 | #define AR5K_PHY_OFDM_SELFCORR_CYPWR_THR3 0x00000100 /* Cyclic RSSI threshold 3 (field) (?) */ | ||
2168 | #define AR5K_PHY_OFDM_SELFCORR_RSSI_1ATHR_EN 0x00008000 /* Enable 1A RSSI threshold (?) */ | ||
2169 | #define AR5K_PHY_OFDM_SELFCORR_RSSI_1ATHR 0x00010000 /* 1A RSSI threshold (field) (?) */ | ||
2170 | #define AR5K_PHY_OFDM_SELFCORR_LSCTHR_HIRSSI 0x00800000 /* Long sc threshold hi rssi (?) */ | ||
2171 | |||
2172 | /* | ||
2173 | * PHY-only warm reset register | ||
2174 | */ | ||
2175 | #define AR5K_PHY_WARM_RESET 0x9928 | ||
2176 | |||
2177 | /* | ||
2178 | * PHY-only control register | ||
2179 | */ | ||
2180 | #define AR5K_PHY_CTL 0x992c /* Register Address */ | ||
2181 | #define AR5K_PHY_CTL_RX_DRAIN_RATE 0x00000001 /* RX drain rate (?) */ | ||
2182 | #define AR5K_PHY_CTL_LATE_TX_SIG_SYM 0x00000002 /* Late tx signal symbol (?) */ | ||
2183 | #define AR5K_PHY_CTL_GEN_SCRAMBLER 0x00000004 /* Generate scrambler */ | ||
2184 | #define AR5K_PHY_CTL_TX_ANT_SEL 0x00000008 /* TX antenna select */ | ||
2185 | #define AR5K_PHY_CTL_TX_ANT_STATIC 0x00000010 /* Static TX antenna */ | ||
2186 | #define AR5K_PHY_CTL_RX_ANT_SEL 0x00000020 /* RX antenna select */ | ||
2187 | #define AR5K_PHY_CTL_RX_ANT_STATIC 0x00000040 /* Static RX antenna */ | ||
2188 | #define AR5K_PHY_CTL_LOW_FREQ_SLE_EN 0x00000080 /* Enable low freq sleep */ | ||
1812 | 2189 | ||
1813 | /* | 2190 | /* |
1814 | * PHY PAPD probe register [5111+ (?)] | 2191 | * PHY PAPD probe register [5111+ (?)] |
@@ -1816,9 +2193,13 @@ | |||
1816 | * Because it's always 0 in 5211 initialization code | 2193 | * Because it's always 0 in 5211 initialization code |
1817 | */ | 2194 | */ |
1818 | #define AR5K_PHY_PAPD_PROBE 0x9930 | 2195 | #define AR5K_PHY_PAPD_PROBE 0x9930 |
2196 | #define AR5K_PHY_PAPD_PROBE_SH_HI_PAR 0x00000001 | ||
2197 | #define AR5K_PHY_PAPD_PROBE_PCDAC_BIAS 0x00000002 | ||
2198 | #define AR5K_PHY_PAPD_PROBE_COMP_GAIN 0x00000040 | ||
1819 | #define AR5K_PHY_PAPD_PROBE_TXPOWER 0x00007e00 | 2199 | #define AR5K_PHY_PAPD_PROBE_TXPOWER 0x00007e00 |
1820 | #define AR5K_PHY_PAPD_PROBE_TXPOWER_S 9 | 2200 | #define AR5K_PHY_PAPD_PROBE_TXPOWER_S 9 |
1821 | #define AR5K_PHY_PAPD_PROBE_TX_NEXT 0x00008000 | 2201 | #define AR5K_PHY_PAPD_PROBE_TX_NEXT 0x00008000 |
2202 | #define AR5K_PHY_PAPD_PROBE_PREDIST_EN 0x00010000 | ||
1822 | #define AR5K_PHY_PAPD_PROBE_TYPE 0x01800000 /* [5112+] */ | 2203 | #define AR5K_PHY_PAPD_PROBE_TYPE 0x01800000 /* [5112+] */ |
1823 | #define AR5K_PHY_PAPD_PROBE_TYPE_S 23 | 2204 | #define AR5K_PHY_PAPD_PROBE_TYPE_S 23 |
1824 | #define AR5K_PHY_PAPD_PROBE_TYPE_OFDM 0 | 2205 | #define AR5K_PHY_PAPD_PROBE_TYPE_OFDM 0 |
@@ -1848,15 +2229,16 @@ | |||
1848 | #define AR5K_PHY_FRAME_CTL (ah->ah_version == AR5K_AR5210 ? \ | 2229 | #define AR5K_PHY_FRAME_CTL (ah->ah_version == AR5K_AR5210 ? \ |
1849 | AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211) | 2230 | AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211) |
1850 | /*---[5111+]---*/ | 2231 | /*---[5111+]---*/ |
1851 | #define AR5K_PHY_FRAME_CTL_TX_CLIP 0x00000038 | 2232 | #define AR5K_PHY_FRAME_CTL_TX_CLIP 0x00000038 /* Mask for tx clip (?) */ |
1852 | #define AR5K_PHY_FRAME_CTL_TX_CLIP_S 3 | 2233 | #define AR5K_PHY_FRAME_CTL_TX_CLIP_S 3 |
2234 | #define AR5K_PHY_FRAME_CTL_PREP_CHINFO 0x00010000 /* Prepend chan info */ | ||
1853 | /*---[5110/5111]---*/ | 2235 | /*---[5110/5111]---*/ |
1854 | #define AR5K_PHY_FRAME_CTL_TIMING_ERR 0x01000000 | 2236 | #define AR5K_PHY_FRAME_CTL_TIMING_ERR 0x01000000 /* PHY timing error */ |
1855 | #define AR5K_PHY_FRAME_CTL_PARITY_ERR 0x02000000 | 2237 | #define AR5K_PHY_FRAME_CTL_PARITY_ERR 0x02000000 /* Parity error */ |
1856 | #define AR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000 /* illegal rate */ | 2238 | #define AR5K_PHY_FRAME_CTL_ILLRATE_ERR 0x04000000 /* Illegal rate */ |
1857 | #define AR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000 /* illegal length */ | 2239 | #define AR5K_PHY_FRAME_CTL_ILLLEN_ERR 0x08000000 /* Illegal length */ |
1858 | #define AR5K_PHY_FRAME_CTL_SERVICE_ERR 0x20000000 | 2240 | #define AR5K_PHY_FRAME_CTL_SERVICE_ERR 0x20000000 |
1859 | #define AR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000 /* tx underrun */ | 2241 | #define AR5K_PHY_FRAME_CTL_TXURN_ERR 0x40000000 /* TX underrun */ |
1860 | #define AR5K_PHY_FRAME_CTL_INI AR5K_PHY_FRAME_CTL_SERVICE_ERR | \ | 2242 | #define AR5K_PHY_FRAME_CTL_INI AR5K_PHY_FRAME_CTL_SERVICE_ERR | \ |
1861 | AR5K_PHY_FRAME_CTL_TXURN_ERR | \ | 2243 | AR5K_PHY_FRAME_CTL_TXURN_ERR | \ |
1862 | AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \ | 2244 | AR5K_PHY_FRAME_CTL_ILLLEN_ERR | \ |
@@ -1915,6 +2297,11 @@ after DFS is enabled */ | |||
1915 | #define AR5K_PHY_ANT_SWITCH_TABLE_1 0x9964 | 2297 | #define AR5K_PHY_ANT_SWITCH_TABLE_1 0x9964 |
1916 | 2298 | ||
1917 | /* | 2299 | /* |
2300 | * PHY Noise floor threshold | ||
2301 | */ | ||
2302 | #define AR5K_PHY_NFTHRES 0x9968 | ||
2303 | |||
2304 | /* | ||
1918 | * PHY clock sleep registers [5112+] | 2305 | * PHY clock sleep registers [5112+] |
1919 | */ | 2306 | */ |
1920 | #define AR5K_PHY_SCLOCK 0x99f0 | 2307 | #define AR5K_PHY_SCLOCK 0x99f0 |
@@ -1922,56 +2309,116 @@ after DFS is enabled */ | |||
1922 | #define AR5K_PHY_SDELAY 0x99f4 | 2309 | #define AR5K_PHY_SDELAY 0x99f4 |
1923 | #define AR5K_PHY_SDELAY_32MHZ 0x000000ff | 2310 | #define AR5K_PHY_SDELAY_32MHZ 0x000000ff |
1924 | #define AR5K_PHY_SPENDING 0x99f8 | 2311 | #define AR5K_PHY_SPENDING 0x99f8 |
2312 | #define AR5K_PHY_SPENDING_14 0x00000014 | ||
2313 | #define AR5K_PHY_SPENDING_18 0x00000018 | ||
1925 | #define AR5K_PHY_SPENDING_RF5111 0x00000018 | 2314 | #define AR5K_PHY_SPENDING_RF5111 0x00000018 |
1926 | #define AR5K_PHY_SPENDING_RF5112 0x00000014 /* <- i 've only seen this on 2425 dumps ! */ | 2315 | #define AR5K_PHY_SPENDING_RF5112 0x00000014 |
1927 | #define AR5K_PHY_SPENDING_RF5112A 0x0000000e /* but since i only have 5112A-based chips */ | 2316 | /* #define AR5K_PHY_SPENDING_RF5112A 0x0000000e */ |
1928 | #define AR5K_PHY_SPENDING_RF5424 0x00000012 /* to test it might be also for old 5112. */ | 2317 | /* #define AR5K_PHY_SPENDING_RF5424 0x00000012 */ |
2318 | #define AR5K_PHY_SPENDING_RF5413 0x00000014 | ||
2319 | #define AR5K_PHY_SPENDING_RF2413 0x00000014 | ||
2320 | #define AR5K_PHY_SPENDING_RF2425 0x00000018 | ||
1929 | 2321 | ||
1930 | /* | 2322 | /* |
1931 | * Misc PHY/radio registers [5110 - 5111] | 2323 | * Misc PHY/radio registers [5110 - 5111] |
1932 | */ | 2324 | */ |
1933 | #define AR5K_BB_GAIN_BASE 0x9b00 /* BaseBand Amplifier Gain table base address */ | 2325 | #define AR5K_BB_GAIN_BASE 0x9b00 /* BaseBand Amplifier Gain table base address */ |
1934 | #define AR5K_BB_GAIN(_n) (AR5K_BB_GAIN_BASE + ((_n) << 2)) | 2326 | #define AR5K_BB_GAIN(_n) (AR5K_BB_GAIN_BASE + ((_n) << 2)) |
1935 | #define AR5K_RF_GAIN_BASE 0x9a00 /* RF Amplrifier Gain table base address */ | 2327 | #define AR5K_RF_GAIN_BASE 0x9a00 /* RF Amplrifier Gain table base address */ |
1936 | #define AR5K_RF_GAIN(_n) (AR5K_RF_GAIN_BASE + ((_n) << 2)) | 2328 | #define AR5K_RF_GAIN(_n) (AR5K_RF_GAIN_BASE + ((_n) << 2)) |
1937 | 2329 | ||
1938 | /* | 2330 | /* |
1939 | * PHY timing IQ calibration result register [5111+] | 2331 | * PHY timing IQ calibration result register [5111+] |
1940 | */ | 2332 | */ |
1941 | #define AR5K_PHY_IQRES_CAL_PWR_I 0x9c10 /* I (Inphase) power value */ | 2333 | #define AR5K_PHY_IQRES_CAL_PWR_I 0x9c10 /* I (Inphase) power value */ |
1942 | #define AR5K_PHY_IQRES_CAL_PWR_Q 0x9c14 /* Q (Quadrature) power value */ | 2334 | #define AR5K_PHY_IQRES_CAL_PWR_Q 0x9c14 /* Q (Quadrature) power value */ |
1943 | #define AR5K_PHY_IQRES_CAL_CORR 0x9c18 /* I/Q Correlation */ | 2335 | #define AR5K_PHY_IQRES_CAL_CORR 0x9c18 /* I/Q Correlation */ |
1944 | 2336 | ||
1945 | /* | 2337 | /* |
1946 | * PHY current RSSI register [5111+] | 2338 | * PHY current RSSI register [5111+] |
1947 | */ | 2339 | */ |
1948 | #define AR5K_PHY_CURRENT_RSSI 0x9c1c | 2340 | #define AR5K_PHY_CURRENT_RSSI 0x9c1c |
2341 | |||
2342 | /* | ||
2343 | * PHY RF Bus grant register (?) | ||
2344 | */ | ||
2345 | #define AR5K_PHY_RFBUS_GRANT 0x9c20 | ||
2346 | |||
2347 | /* | ||
2348 | * PHY ADC test register | ||
2349 | */ | ||
2350 | #define AR5K_PHY_ADC_TEST 0x9c24 | ||
2351 | #define AR5K_PHY_ADC_TEST_I 0x00000001 | ||
2352 | #define AR5K_PHY_ADC_TEST_Q 0x00000200 | ||
2353 | |||
2354 | /* | ||
2355 | * PHY DAC test register | ||
2356 | */ | ||
2357 | #define AR5K_PHY_DAC_TEST 0x9c28 | ||
2358 | #define AR5K_PHY_DAC_TEST_I 0x00000001 | ||
2359 | #define AR5K_PHY_DAC_TEST_Q 0x00000200 | ||
2360 | |||
2361 | /* | ||
2362 | * PHY PTAT register (?) | ||
2363 | */ | ||
2364 | #define AR5K_PHY_PTAT 0x9c2c | ||
2365 | |||
2366 | /* | ||
2367 | * PHY Illegal TX rate register [5112+] | ||
2368 | */ | ||
2369 | #define AR5K_PHY_BAD_TX_RATE 0x9c30 | ||
2370 | |||
2371 | /* | ||
2372 | * PHY SPUR Power register [5112+] | ||
2373 | */ | ||
2374 | #define AR5K_PHY_SPUR_PWR 0x9c34 /* Register Address */ | ||
2375 | #define AR5K_PHY_SPUR_PWR_I 0x00000001 /* SPUR Power estimate for I (field) */ | ||
2376 | #define AR5K_PHY_SPUR_PWR_Q 0x00000100 /* SPUR Power estimate for Q (field) */ | ||
2377 | #define AR5K_PHY_SPUR_PWR_FILT 0x00010000 /* Power with SPUR removed (field) */ | ||
2378 | |||
2379 | /* | ||
2380 | * PHY Channel status register [5112+] (?) | ||
2381 | */ | ||
2382 | #define AR5K_PHY_CHAN_STATUS 0x9c38 | ||
2383 | #define AR5K_PHY_CHAN_STATUS_BT_ACT 0x00000001 | ||
2384 | #define AR5K_PHY_CHAN_STATUS_RX_CLR_RAW 0x00000002 | ||
2385 | #define AR5K_PHY_CHAN_STATUS_RX_CLR_MAC 0x00000004 | ||
2386 | #define AR5K_PHY_CHAN_STATUS_RX_CLR_PAP 0x00000008 | ||
2387 | |||
2388 | /* | ||
2389 | * PHY PAPD I (power?) table (?) | ||
2390 | * (92! entries) | ||
2391 | */ | ||
2392 | #define AR5K_PHY_PAPD_I_BASE 0xa000 | ||
2393 | #define AR5K_PHY_PAPD_I(_n) (AR5K_PHY_PAPD_I_BASE + ((_n) << 2)) | ||
1949 | 2394 | ||
1950 | /* | 2395 | /* |
1951 | * PHY PCDAC TX power table | 2396 | * PHY PCDAC TX power table |
1952 | */ | 2397 | */ |
1953 | #define AR5K_PHY_PCDAC_TXPOWER_BASE_5211 0xa180 | 2398 | #define AR5K_PHY_PCDAC_TXPOWER_BASE_5211 0xa180 |
1954 | #define AR5K_PHY_PCDAC_TXPOWER_BASE_5413 0xa280 | 2399 | #define AR5K_PHY_PCDAC_TXPOWER_BASE_2413 0xa280 |
1955 | #define AR5K_PHY_PCDAC_TXPOWER_BASE (ah->ah_radio >= AR5K_RF5413 ? \ | 2400 | #define AR5K_PHY_PCDAC_TXPOWER_BASE (ah->ah_radio >= AR5K_RF2413 ? \ |
1956 | AR5K_PHY_PCDAC_TXPOWER_BASE_5413 :\ | 2401 | AR5K_PHY_PCDAC_TXPOWER_BASE_2413 :\ |
1957 | AR5K_PHY_PCDAC_TXPOWER_BASE_5211) | 2402 | AR5K_PHY_PCDAC_TXPOWER_BASE_5211) |
1958 | #define AR5K_PHY_PCDAC_TXPOWER(_n) (AR5K_PHY_PCDAC_TXPOWER_BASE + ((_n) << 2)) | 2403 | #define AR5K_PHY_PCDAC_TXPOWER(_n) (AR5K_PHY_PCDAC_TXPOWER_BASE + ((_n) << 2)) |
1959 | 2404 | ||
1960 | /* | 2405 | /* |
1961 | * PHY mode register [5111+] | 2406 | * PHY mode register [5111+] |
1962 | */ | 2407 | */ |
1963 | #define AR5K_PHY_MODE 0x0a200 /* Register address */ | 2408 | #define AR5K_PHY_MODE 0x0a200 /* Register Address */ |
1964 | #define AR5K_PHY_MODE_MOD 0x00000001 /* PHY Modulation mask*/ | 2409 | #define AR5K_PHY_MODE_MOD 0x00000001 /* PHY Modulation bit */ |
1965 | #define AR5K_PHY_MODE_MOD_OFDM 0 | 2410 | #define AR5K_PHY_MODE_MOD_OFDM 0 |
1966 | #define AR5K_PHY_MODE_MOD_CCK 1 | 2411 | #define AR5K_PHY_MODE_MOD_CCK 1 |
1967 | #define AR5K_PHY_MODE_FREQ 0x00000002 /* Freq mode mask */ | 2412 | #define AR5K_PHY_MODE_FREQ 0x00000002 /* Freq mode bit */ |
1968 | #define AR5K_PHY_MODE_FREQ_5GHZ 0 | 2413 | #define AR5K_PHY_MODE_FREQ_5GHZ 0 |
1969 | #define AR5K_PHY_MODE_FREQ_2GHZ 2 | 2414 | #define AR5K_PHY_MODE_FREQ_2GHZ 2 |
1970 | #define AR5K_PHY_MODE_MOD_DYN 0x00000004 /* Dynamic OFDM/CCK mode mask [5112+] */ | 2415 | #define AR5K_PHY_MODE_MOD_DYN 0x00000004 /* Enable Dynamic OFDM/CCK mode [5112+] */ |
1971 | #define AR5K_PHY_MODE_RAD 0x00000008 /* [5212+] */ | 2416 | #define AR5K_PHY_MODE_RAD 0x00000008 /* [5212+] */ |
1972 | #define AR5K_PHY_MODE_RAD_RF5111 0 | 2417 | #define AR5K_PHY_MODE_RAD_RF5111 0 |
1973 | #define AR5K_PHY_MODE_RAD_RF5112 8 | 2418 | #define AR5K_PHY_MODE_RAD_RF5112 8 |
1974 | #define AR5K_PHY_MODE_XR 0x00000010 /* [5112+] */ | 2419 | #define AR5K_PHY_MODE_XR 0x00000010 /* Enable XR mode [5112+] */ |
2420 | #define AR5K_PHY_MODE_HALF_RATE 0x00000020 /* Enable Half rate (test) */ | ||
2421 | #define AR5K_PHY_MODE_QUARTER_RATE 0x00000040 /* Enable Quarter rat (test) */ | ||
1975 | 2422 | ||
1976 | /* | 2423 | /* |
1977 | * PHY CCK transmit control register [5111+ (?)] | 2424 | * PHY CCK transmit control register [5111+ (?)] |
@@ -1979,6 +2426,15 @@ after DFS is enabled */ | |||
1979 | #define AR5K_PHY_CCKTXCTL 0xa204 | 2426 | #define AR5K_PHY_CCKTXCTL 0xa204 |
1980 | #define AR5K_PHY_CCKTXCTL_WORLD 0x00000000 | 2427 | #define AR5K_PHY_CCKTXCTL_WORLD 0x00000000 |
1981 | #define AR5K_PHY_CCKTXCTL_JAPAN 0x00000010 | 2428 | #define AR5K_PHY_CCKTXCTL_JAPAN 0x00000010 |
2429 | #define AR5K_PHY_CCKTXCTL_SCRAMBLER_DIS 0x00000001 | ||
2430 | #define AR5K_PHY_CCKTXCTK_DAC_SCALE 0x00000004 | ||
2431 | |||
2432 | /* | ||
2433 | * PHY CCK Cross-correlator Barker RSSI threshold register [5212+] | ||
2434 | */ | ||
2435 | #define AR5K_PHY_CCK_CROSSCORR 0xa208 | ||
2436 | #define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR 0x0000000f | ||
2437 | #define AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR_S 0 | ||
1982 | 2438 | ||
1983 | /* | 2439 | /* |
1984 | * PHY 2GHz gain register [5111+] | 2440 | * PHY 2GHz gain register [5111+] |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index e78319aa47c1..3bf3a869361f 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -4645,8 +4645,7 @@ static int b43_wireless_init(struct ssb_device *dev) | |||
4645 | } | 4645 | } |
4646 | 4646 | ||
4647 | /* fill hw info */ | 4647 | /* fill hw info */ |
4648 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 4648 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
4649 | IEEE80211_HW_RX_INCLUDES_FCS | | ||
4650 | IEEE80211_HW_SIGNAL_DBM | | 4649 | IEEE80211_HW_SIGNAL_DBM | |
4651 | IEEE80211_HW_NOISE_DBM; | 4650 | IEEE80211_HW_NOISE_DBM; |
4652 | 4651 | ||
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c index 8d54502222a6..9dda8169f7cc 100644 --- a/drivers/net/wireless/b43/xmit.c +++ b/drivers/net/wireless/b43/xmit.c | |||
@@ -192,7 +192,7 @@ int b43_generate_txhdr(struct b43_wldev *dev, | |||
192 | const struct b43_phy *phy = &dev->phy; | 192 | const struct b43_phy *phy = &dev->phy; |
193 | const struct ieee80211_hdr *wlhdr = | 193 | const struct ieee80211_hdr *wlhdr = |
194 | (const struct ieee80211_hdr *)fragment_data; | 194 | (const struct ieee80211_hdr *)fragment_data; |
195 | int use_encryption = (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT)); | 195 | int use_encryption = !!info->control.hw_key; |
196 | __le16 fctl = wlhdr->frame_control; | 196 | __le16 fctl = wlhdr->frame_control; |
197 | struct ieee80211_rate *fbrate; | 197 | struct ieee80211_rate *fbrate; |
198 | u8 rate, rate_fb; | 198 | u8 rate, rate_fb; |
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c index a1b8bf3ee732..2541c81932f0 100644 --- a/drivers/net/wireless/b43legacy/main.c +++ b/drivers/net/wireless/b43legacy/main.c | |||
@@ -3702,8 +3702,7 @@ static int b43legacy_wireless_init(struct ssb_device *dev) | |||
3702 | } | 3702 | } |
3703 | 3703 | ||
3704 | /* fill hw info */ | 3704 | /* fill hw info */ |
3705 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 3705 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
3706 | IEEE80211_HW_RX_INCLUDES_FCS | | ||
3707 | IEEE80211_HW_SIGNAL_DBM | | 3706 | IEEE80211_HW_SIGNAL_DBM | |
3708 | IEEE80211_HW_NOISE_DBM; | 3707 | IEEE80211_HW_NOISE_DBM; |
3709 | hw->queues = 1; /* FIXME: hardware has more queues */ | 3708 | hw->queues = 1; /* FIXME: hardware has more queues */ |
@@ -3846,10 +3845,10 @@ static int b43legacy_resume(struct ssb_device *dev) | |||
3846 | goto out; | 3845 | goto out; |
3847 | } | 3846 | } |
3848 | } | 3847 | } |
3849 | mutex_unlock(&wl->mutex); | ||
3850 | 3848 | ||
3851 | b43legacydbg(wl, "Device resumed.\n"); | 3849 | b43legacydbg(wl, "Device resumed.\n"); |
3852 | out: | 3850 | out: |
3851 | mutex_unlock(&wl->mutex); | ||
3853 | return err; | 3852 | return err; |
3854 | } | 3853 | } |
3855 | 3854 | ||
diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c index e969ed8d412d..68e1f8c78727 100644 --- a/drivers/net/wireless/b43legacy/xmit.c +++ b/drivers/net/wireless/b43legacy/xmit.c | |||
@@ -192,7 +192,7 @@ static int generate_txhdr_fw3(struct b43legacy_wldev *dev, | |||
192 | u16 cookie) | 192 | u16 cookie) |
193 | { | 193 | { |
194 | const struct ieee80211_hdr *wlhdr; | 194 | const struct ieee80211_hdr *wlhdr; |
195 | int use_encryption = (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT)); | 195 | int use_encryption = !!info->control.hw_key; |
196 | u16 fctl; | 196 | u16 fctl; |
197 | u8 rate; | 197 | u8 rate; |
198 | struct ieee80211_rate *rate_fb; | 198 | struct ieee80211_rate *rate_fb; |
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c index 5bf9e00b070c..c6f886ec08a3 100644 --- a/drivers/net/wireless/ipw2100.c +++ b/drivers/net/wireless/ipw2100.c | |||
@@ -6442,6 +6442,7 @@ static int ipw2100_resume(struct pci_dev *pci_dev) | |||
6442 | if (err) { | 6442 | if (err) { |
6443 | printk(KERN_ERR "%s: pci_enable_device failed on resume\n", | 6443 | printk(KERN_ERR "%s: pci_enable_device failed on resume\n", |
6444 | dev->name); | 6444 | dev->name); |
6445 | mutex_unlock(&priv->action_mutex); | ||
6445 | return err; | 6446 | return err; |
6446 | } | 6447 | } |
6447 | pci_restore_state(pci_dev); | 6448 | pci_restore_state(pci_dev); |
@@ -7146,7 +7147,7 @@ static int ipw2100_wx_get_rate(struct net_device *dev, | |||
7146 | err = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, &val, &len); | 7147 | err = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, &val, &len); |
7147 | if (err) { | 7148 | if (err) { |
7148 | IPW_DEBUG_WX("failed querying ordinals.\n"); | 7149 | IPW_DEBUG_WX("failed querying ordinals.\n"); |
7149 | return err; | 7150 | goto done; |
7150 | } | 7151 | } |
7151 | 7152 | ||
7152 | switch (val & TX_RATE_MASK) { | 7153 | switch (val & TX_RATE_MASK) { |
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c index 1acfbcd3703c..36e8d2f6e7b4 100644 --- a/drivers/net/wireless/ipw2200.c +++ b/drivers/net/wireless/ipw2200.c | |||
@@ -305,9 +305,10 @@ static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) | |||
305 | #define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs)) | 305 | #define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs)) |
306 | 306 | ||
307 | /* 8-bit direct write (for low 4K of SRAM/regs), with debug wrapper */ | 307 | /* 8-bit direct write (for low 4K of SRAM/regs), with debug wrapper */ |
308 | #define ipw_write8(ipw, ofs, val) \ | 308 | #define ipw_write8(ipw, ofs, val) do { \ |
309 | IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | 309 | IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ |
310 | _ipw_write8(ipw, ofs, val) | 310 | _ipw_write8(ipw, ofs, val); \ |
311 | } while (0) | ||
311 | 312 | ||
312 | /* 16-bit direct write (low 4K) */ | 313 | /* 16-bit direct write (low 4K) */ |
313 | #define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs)) | 314 | #define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs)) |
@@ -11946,7 +11947,7 @@ module_param(auto_create, int, 0444); | |||
11946 | MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)"); | 11947 | MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)"); |
11947 | 11948 | ||
11948 | module_param(led, int, 0444); | 11949 | module_param(led, int, 0444); |
11949 | MODULE_PARM_DESC(led, "enable led control on some systems (default 0 off)\n"); | 11950 | MODULE_PARM_DESC(led, "enable led control on some systems (default 0 off)"); |
11950 | 11951 | ||
11951 | module_param(debug, int, 0444); | 11952 | module_param(debug, int, 0444); |
11952 | MODULE_PARM_DESC(debug, "debug output mask"); | 11953 | MODULE_PARM_DESC(debug, "debug output mask"); |
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig index 82b66a3d3a5d..b0ac0ce3fb9f 100644 --- a/drivers/net/wireless/iwlwifi/Kconfig +++ b/drivers/net/wireless/iwlwifi/Kconfig | |||
@@ -14,18 +14,49 @@ config IWLWIFI_LEDS | |||
14 | default n | 14 | default n |
15 | 15 | ||
16 | config IWLWIFI_RFKILL | 16 | config IWLWIFI_RFKILL |
17 | boolean "IWLWIFI RF kill support" | 17 | boolean "Iwlwifi RF kill support" |
18 | depends on IWLCORE | 18 | depends on IWLCORE |
19 | 19 | ||
20 | config IWL4965 | 20 | config IWLWIFI_DEBUG |
21 | tristate "Intel Wireless WiFi 4965AGN" | 21 | bool "Enable full debugging output in iwlagn driver" |
22 | depends on IWLCORE | ||
23 | ---help--- | ||
24 | This option will enable debug tracing output for the iwlwifi drivers | ||
25 | |||
26 | This will result in the kernel module being ~100k larger. You can | ||
27 | control which debug output is sent to the kernel log by setting the | ||
28 | value in | ||
29 | |||
30 | /sys/class/net/wlan0/device/debug_level | ||
31 | |||
32 | This entry will only exist if this option is enabled. | ||
33 | |||
34 | To set a value, simply echo an 8-byte hex value to the same file: | ||
35 | |||
36 | % echo 0x43fff > /sys/class/net/wlan0/device/debug_level | ||
37 | |||
38 | You can find the list of debug mask values in: | ||
39 | drivers/net/wireless/iwlwifi/iwl-debug.h | ||
40 | |||
41 | If this is your first time using this driver, you should say Y here | ||
42 | as the debug information can assist others in helping you resolve | ||
43 | any problems you may encounter. | ||
44 | |||
45 | config IWLWIFI_DEBUGFS | ||
46 | bool "Iwlwifi debugfs support" | ||
47 | depends on IWLCORE && IWLWIFI_DEBUG && MAC80211_DEBUGFS | ||
48 | ---help--- | ||
49 | Enable creation of debugfs files for the iwlwifi drivers. | ||
50 | |||
51 | config IWLAGN | ||
52 | tristate "Intel Wireless WiFi Next Gen AGN" | ||
22 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL | 53 | depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL |
23 | select FW_LOADER | 54 | select FW_LOADER |
24 | select IWLCORE | 55 | select IWLCORE |
25 | ---help--- | 56 | ---help--- |
26 | Select to build the driver supporting the: | 57 | Select to build the driver supporting the: |
27 | 58 | ||
28 | Intel Wireless WiFi Link 4965AGN | 59 | Intel Wireless WiFi Link Next-Gen AGN |
29 | 60 | ||
30 | This driver uses the kernel's mac80211 subsystem. | 61 | This driver uses the kernel's mac80211 subsystem. |
31 | 62 | ||
@@ -42,60 +73,33 @@ config IWL4965 | |||
42 | If you want to compile the driver as a module ( = code which can be | 73 | If you want to compile the driver as a module ( = code which can be |
43 | inserted in and removed from the running kernel whenever you want), | 74 | inserted in and removed from the running kernel whenever you want), |
44 | say M here and read <file:Documentation/kbuild/modules.txt>. The | 75 | say M here and read <file:Documentation/kbuild/modules.txt>. The |
45 | module will be called iwl4965.ko. | 76 | module will be called iwlagn.ko. |
46 | |||
47 | config IWL4965_LEDS | ||
48 | bool "Enable LEDS features in iwl4965 driver" | ||
49 | depends on IWL4965 | ||
50 | select IWLWIFI_LEDS | ||
51 | ---help--- | ||
52 | This option enables LEDS for the iwlwifi drivers | ||
53 | 77 | ||
54 | 78 | config IWLAGN_SPECTRUM_MEASUREMENT | |
55 | config IWL4965_SPECTRUM_MEASUREMENT | 79 | bool "Enable Spectrum Measurement in iwlagn driver" |
56 | bool "Enable Spectrum Measurement in iwl4965 driver" | 80 | depends on IWLAGN |
57 | depends on IWL4965 | ||
58 | ---help--- | 81 | ---help--- |
59 | This option will enable spectrum measurement for the iwl4965 driver. | 82 | This option will enable spectrum measurement for the iwlagn driver. |
60 | 83 | ||
61 | config IWLWIFI_DEBUG | 84 | config IWLAGN_LEDS |
62 | bool "Enable full debugging output in iwl4965 driver" | 85 | bool "Enable LEDS features in iwlagn driver" |
63 | depends on IWL4965 | 86 | depends on IWLAGN |
87 | select IWLWIFI_LEDS | ||
64 | ---help--- | 88 | ---help--- |
65 | This option will enable debug tracing output for the iwl4965 | 89 | This option enables LEDS for the iwlagn drivers |
66 | driver. | ||
67 | |||
68 | This will result in the kernel module being ~100k larger. You can | ||
69 | control which debug output is sent to the kernel log by setting the | ||
70 | value in | ||
71 | |||
72 | /sys/class/net/wlan0/device/debug_level | ||
73 | |||
74 | This entry will only exist if this option is enabled. | ||
75 | |||
76 | To set a value, simply echo an 8-byte hex value to the same file: | ||
77 | |||
78 | % echo 0x43fff > /sys/class/net/wlan0/device/debug_level | ||
79 | 90 | ||
80 | You can find the list of debug mask values in: | ||
81 | drivers/net/wireless/iwlwifi/iwl-4965-debug.h | ||
82 | 91 | ||
83 | If this is your first time using this driver, you should say Y here | 92 | config IWL4965 |
84 | as the debug information can assist others in helping you resolve | 93 | bool "Intel Wireless WiFi 4965AGN" |
85 | any problems you may encounter. | 94 | depends on IWLAGN |
95 | ---help--- | ||
96 | This option enables support for Intel Wireless WiFi Link 4965AGN | ||
86 | 97 | ||
87 | config IWL5000 | 98 | config IWL5000 |
88 | bool "Intel Wireless WiFi 5000AGN" | 99 | bool "Intel Wireless WiFi 5000AGN" |
89 | depends on IWL4965 | 100 | depends on IWLAGN |
90 | ---help--- | 101 | ---help--- |
91 | This option enables support for Intel Wireless WiFi Link 5000AGN Family | 102 | This option enables support for Intel Wireless WiFi Link 5000AGN Family |
92 | Dependency on 4965 is temporary | ||
93 | |||
94 | config IWLWIFI_DEBUGFS | ||
95 | bool "Iwlwifi debugfs support" | ||
96 | depends on IWLCORE && IWLWIFI_DEBUG && MAC80211_DEBUGFS | ||
97 | ---help--- | ||
98 | Enable creation of debugfs files for the iwlwifi drivers. | ||
99 | 103 | ||
100 | config IWL3945 | 104 | config IWL3945 |
101 | tristate "Intel PRO/Wireless 3945ABG/BG Network Connection" | 105 | tristate "Intel PRO/Wireless 3945ABG/BG Network Connection" |
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile index 1f52b92f08b5..47aa28f6a513 100644 --- a/drivers/net/wireless/iwlwifi/Makefile +++ b/drivers/net/wireless/iwlwifi/Makefile | |||
@@ -6,15 +6,14 @@ iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o | |||
6 | iwlcore-$(CONFIG_IWLWIFI_LEDS) += iwl-led.o | 6 | iwlcore-$(CONFIG_IWLWIFI_LEDS) += iwl-led.o |
7 | iwlcore-$(CONFIG_IWLWIFI_RFKILL) += iwl-rfkill.o | 7 | iwlcore-$(CONFIG_IWLWIFI_RFKILL) += iwl-rfkill.o |
8 | 8 | ||
9 | obj-$(CONFIG_IWLAGN) += iwlagn.o | ||
10 | iwlagn-objs := iwl-agn.o iwl-agn-rs.o | ||
11 | |||
12 | iwlagn-$(CONFIG_IWL4965) += iwl-4965.o | ||
13 | iwlagn-$(CONFIG_IWL5000) += iwl-5000.o | ||
14 | |||
9 | obj-$(CONFIG_IWL3945) += iwl3945.o | 15 | obj-$(CONFIG_IWL3945) += iwl3945.o |
10 | iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o | 16 | iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o |
11 | iwl3945-$(CONFIG_IWL3945_LEDS) += iwl-3945-led.o | 17 | iwl3945-$(CONFIG_IWL3945_LEDS) += iwl-3945-led.o |
12 | 18 | ||
13 | obj-$(CONFIG_IWL4965) += iwl4965.o | ||
14 | iwl4965-objs := iwl4965-base.o iwl-4965.o iwl-4965-rs.o | ||
15 | |||
16 | ifeq ($(CONFIG_IWL5000),y) | ||
17 | iwl4965-objs += iwl-5000.o | ||
18 | endif | ||
19 | |||
20 | 19 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.c b/drivers/net/wireless/iwlwifi/iwl-3945-led.c index 6be1fe13fa57..d3336966b6b5 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.c | |||
@@ -206,12 +206,12 @@ static void iwl3945_led_brightness_set(struct led_classdev *led_cdev, | |||
206 | static int iwl3945_led_register_led(struct iwl3945_priv *priv, | 206 | static int iwl3945_led_register_led(struct iwl3945_priv *priv, |
207 | struct iwl3945_led *led, | 207 | struct iwl3945_led *led, |
208 | enum led_type type, u8 set_led, | 208 | enum led_type type, u8 set_led, |
209 | const char *name, char *trigger) | 209 | char *trigger) |
210 | { | 210 | { |
211 | struct device *device = wiphy_dev(priv->hw->wiphy); | 211 | struct device *device = wiphy_dev(priv->hw->wiphy); |
212 | int ret; | 212 | int ret; |
213 | 213 | ||
214 | led->led_dev.name = name; | 214 | led->led_dev.name = led->name; |
215 | led->led_dev.brightness_set = iwl3945_led_brightness_set; | 215 | led->led_dev.brightness_set = iwl3945_led_brightness_set; |
216 | led->led_dev.default_trigger = trigger; | 216 | led->led_dev.default_trigger = trigger; |
217 | 217 | ||
@@ -308,7 +308,6 @@ void iwl3945_led_background(struct iwl3945_priv *priv) | |||
308 | int iwl3945_led_register(struct iwl3945_priv *priv) | 308 | int iwl3945_led_register(struct iwl3945_priv *priv) |
309 | { | 309 | { |
310 | char *trigger; | 310 | char *trigger; |
311 | char name[32]; | ||
312 | int ret; | 311 | int ret; |
313 | 312 | ||
314 | priv->last_blink_rate = 0; | 313 | priv->last_blink_rate = 0; |
@@ -318,7 +317,8 @@ int iwl3945_led_register(struct iwl3945_priv *priv) | |||
318 | priv->allow_blinking = 0; | 317 | priv->allow_blinking = 0; |
319 | 318 | ||
320 | trigger = ieee80211_get_radio_led_name(priv->hw); | 319 | trigger = ieee80211_get_radio_led_name(priv->hw); |
321 | snprintf(name, sizeof(name), "iwl-%s:radio", | 320 | snprintf(priv->led[IWL_LED_TRG_RADIO].name, |
321 | sizeof(priv->led[IWL_LED_TRG_RADIO].name), "iwl-%s:radio", | ||
322 | wiphy_name(priv->hw->wiphy)); | 322 | wiphy_name(priv->hw->wiphy)); |
323 | 323 | ||
324 | priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on; | 324 | priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on; |
@@ -327,19 +327,20 @@ int iwl3945_led_register(struct iwl3945_priv *priv) | |||
327 | 327 | ||
328 | ret = iwl3945_led_register_led(priv, | 328 | ret = iwl3945_led_register_led(priv, |
329 | &priv->led[IWL_LED_TRG_RADIO], | 329 | &priv->led[IWL_LED_TRG_RADIO], |
330 | IWL_LED_TRG_RADIO, 1, | 330 | IWL_LED_TRG_RADIO, 1, trigger); |
331 | name, trigger); | 331 | |
332 | if (ret) | 332 | if (ret) |
333 | goto exit_fail; | 333 | goto exit_fail; |
334 | 334 | ||
335 | trigger = ieee80211_get_assoc_led_name(priv->hw); | 335 | trigger = ieee80211_get_assoc_led_name(priv->hw); |
336 | snprintf(name, sizeof(name), "iwl-%s:assoc", | 336 | snprintf(priv->led[IWL_LED_TRG_ASSOC].name, |
337 | sizeof(priv->led[IWL_LED_TRG_ASSOC].name), "iwl-%s:assoc", | ||
337 | wiphy_name(priv->hw->wiphy)); | 338 | wiphy_name(priv->hw->wiphy)); |
338 | 339 | ||
339 | ret = iwl3945_led_register_led(priv, | 340 | ret = iwl3945_led_register_led(priv, |
340 | &priv->led[IWL_LED_TRG_ASSOC], | 341 | &priv->led[IWL_LED_TRG_ASSOC], |
341 | IWL_LED_TRG_ASSOC, 0, | 342 | IWL_LED_TRG_ASSOC, 0, trigger); |
342 | name, trigger); | 343 | |
343 | /* for assoc always turn led on */ | 344 | /* for assoc always turn led on */ |
344 | priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on; | 345 | priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on; |
345 | priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on; | 346 | priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on; |
@@ -349,14 +350,13 @@ int iwl3945_led_register(struct iwl3945_priv *priv) | |||
349 | goto exit_fail; | 350 | goto exit_fail; |
350 | 351 | ||
351 | trigger = ieee80211_get_rx_led_name(priv->hw); | 352 | trigger = ieee80211_get_rx_led_name(priv->hw); |
352 | snprintf(name, sizeof(name), "iwl-%s:RX", | 353 | snprintf(priv->led[IWL_LED_TRG_RX].name, |
354 | sizeof(priv->led[IWL_LED_TRG_RX].name), "iwl-%s:RX", | ||
353 | wiphy_name(priv->hw->wiphy)); | 355 | wiphy_name(priv->hw->wiphy)); |
354 | 356 | ||
355 | |||
356 | ret = iwl3945_led_register_led(priv, | 357 | ret = iwl3945_led_register_led(priv, |
357 | &priv->led[IWL_LED_TRG_RX], | 358 | &priv->led[IWL_LED_TRG_RX], |
358 | IWL_LED_TRG_RX, 0, | 359 | IWL_LED_TRG_RX, 0, trigger); |
359 | name, trigger); | ||
360 | 360 | ||
361 | priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated; | 361 | priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated; |
362 | priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated; | 362 | priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated; |
@@ -366,13 +366,14 @@ int iwl3945_led_register(struct iwl3945_priv *priv) | |||
366 | goto exit_fail; | 366 | goto exit_fail; |
367 | 367 | ||
368 | trigger = ieee80211_get_tx_led_name(priv->hw); | 368 | trigger = ieee80211_get_tx_led_name(priv->hw); |
369 | snprintf(name, sizeof(name), "iwl-%s:TX", | 369 | snprintf(priv->led[IWL_LED_TRG_TX].name, |
370 | sizeof(priv->led[IWL_LED_TRG_TX].name), "iwl-%s:TX", | ||
370 | wiphy_name(priv->hw->wiphy)); | 371 | wiphy_name(priv->hw->wiphy)); |
371 | 372 | ||
372 | ret = iwl3945_led_register_led(priv, | 373 | ret = iwl3945_led_register_led(priv, |
373 | &priv->led[IWL_LED_TRG_TX], | 374 | &priv->led[IWL_LED_TRG_TX], |
374 | IWL_LED_TRG_TX, 0, | 375 | IWL_LED_TRG_TX, 0, trigger); |
375 | name, trigger); | 376 | |
376 | priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated; | 377 | priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated; |
377 | priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated; | 378 | priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated; |
378 | priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern; | 379 | priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.h b/drivers/net/wireless/iwlwifi/iwl-3945-led.h index 47b7e0bac802..2fbd126c1347 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.h | |||
@@ -50,6 +50,7 @@ enum led_type { | |||
50 | struct iwl3945_led { | 50 | struct iwl3945_led { |
51 | struct iwl3945_priv *priv; | 51 | struct iwl3945_priv *priv; |
52 | struct led_classdev led_dev; | 52 | struct led_classdev led_dev; |
53 | char name[32]; | ||
53 | 54 | ||
54 | int (*led_on) (struct iwl3945_priv *priv, int led_id); | 55 | int (*led_on) (struct iwl3945_priv *priv, int led_id); |
55 | int (*led_off) (struct iwl3945_priv *priv, int led_id); | 56 | int (*led_off) (struct iwl3945_priv *priv, int led_id); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index c2a76785b665..b3931f6135a4 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -630,7 +630,9 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv, | |||
630 | struct ieee80211_rx_status *stats) | 630 | struct ieee80211_rx_status *stats) |
631 | { | 631 | { |
632 | struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data; | 632 | struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data; |
633 | #ifdef CONFIG_IWL3945_LEDS | ||
633 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); | 634 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); |
635 | #endif | ||
634 | struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); | 636 | struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); |
635 | struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); | 637 | struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); |
636 | short len = le16_to_cpu(rx_hdr->len); | 638 | short len = le16_to_cpu(rx_hdr->len); |
@@ -708,10 +710,7 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
708 | return; | 710 | return; |
709 | } | 711 | } |
710 | 712 | ||
711 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | 713 | |
712 | iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status); | ||
713 | return; | ||
714 | } | ||
715 | 714 | ||
716 | /* Convert 3945's rssi indicator to dBm */ | 715 | /* Convert 3945's rssi indicator to dBm */ |
717 | rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET; | 716 | rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET; |
@@ -773,6 +772,11 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
773 | priv->last_rx_noise = rx_status.noise; | 772 | priv->last_rx_noise = rx_status.noise; |
774 | } | 773 | } |
775 | 774 | ||
775 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | ||
776 | iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status); | ||
777 | return; | ||
778 | } | ||
779 | |||
776 | switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) { | 780 | switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) { |
777 | case IEEE80211_FTYPE_MGMT: | 781 | case IEEE80211_FTYPE_MGMT: |
778 | switch (le16_to_cpu(header->frame_control) & | 782 | switch (le16_to_cpu(header->frame_control) & |
@@ -791,8 +795,7 @@ static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv, | |||
791 | struct ieee80211_mgmt *mgmt = | 795 | struct ieee80211_mgmt *mgmt = |
792 | (struct ieee80211_mgmt *)header; | 796 | (struct ieee80211_mgmt *)header; |
793 | __le32 *pos; | 797 | __le32 *pos; |
794 | pos = | 798 | pos = (__le32 *)&mgmt->u.beacon. |
795 | (__le32 *) & mgmt->u.beacon. | ||
796 | timestamp; | 799 | timestamp; |
797 | priv->timestamp0 = le32_to_cpu(pos[0]); | 800 | priv->timestamp0 = le32_to_cpu(pos[0]); |
798 | priv->timestamp1 = le32_to_cpu(pos[1]); | 801 | priv->timestamp1 = le32_to_cpu(pos[1]); |
@@ -1505,7 +1508,7 @@ static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading) | |||
1505 | */ | 1508 | */ |
1506 | static inline int iwl3945_hw_reg_temp_out_of_range(int temperature) | 1509 | static inline int iwl3945_hw_reg_temp_out_of_range(int temperature) |
1507 | { | 1510 | { |
1508 | return (((temperature < -260) || (temperature > 25)) ? 1 : 0); | 1511 | return ((temperature < -260) || (temperature > 25)) ? 1 : 0; |
1509 | } | 1512 | } |
1510 | 1513 | ||
1511 | int iwl3945_hw_get_temperature(struct iwl3945_priv *priv) | 1514 | int iwl3945_hw_get_temperature(struct iwl3945_priv *priv) |
@@ -2626,7 +2629,7 @@ unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv, | |||
2626 | tx_beacon_cmd->tx.supp_rates[1] = | 2629 | tx_beacon_cmd->tx.supp_rates[1] = |
2627 | (IWL_CCK_BASIC_RATES_MASK & 0xF); | 2630 | (IWL_CCK_BASIC_RATES_MASK & 0xF); |
2628 | 2631 | ||
2629 | return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size); | 2632 | return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size; |
2630 | } | 2633 | } |
2631 | 2634 | ||
2632 | void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv) | 2635 | void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 9afecb813716..22bb26985c2e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -341,39 +341,6 @@ err: | |||
341 | return -EINVAL; | 341 | return -EINVAL; |
342 | 342 | ||
343 | } | 343 | } |
344 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) | ||
345 | { | ||
346 | int ret; | ||
347 | unsigned long flags; | ||
348 | |||
349 | spin_lock_irqsave(&priv->lock, flags); | ||
350 | ret = iwl_grab_nic_access(priv); | ||
351 | if (ret) { | ||
352 | spin_unlock_irqrestore(&priv->lock, flags); | ||
353 | return ret; | ||
354 | } | ||
355 | |||
356 | if (src == IWL_PWR_SRC_VAUX) { | ||
357 | u32 val; | ||
358 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, | ||
359 | &val); | ||
360 | |||
361 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) { | ||
362 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
363 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | ||
364 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
365 | } | ||
366 | } else { | ||
367 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
368 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | ||
369 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
370 | } | ||
371 | |||
372 | iwl_release_nic_access(priv); | ||
373 | spin_unlock_irqrestore(&priv->lock, flags); | ||
374 | |||
375 | return ret; | ||
376 | } | ||
377 | 344 | ||
378 | /* | 345 | /* |
379 | * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask | 346 | * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask |
@@ -875,18 +842,6 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) | |||
875 | return 0; | 842 | return 0; |
876 | } | 843 | } |
877 | 844 | ||
878 | /* set card power command */ | ||
879 | static int iwl4965_set_power(struct iwl_priv *priv, | ||
880 | void *cmd) | ||
881 | { | ||
882 | int ret = 0; | ||
883 | |||
884 | ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD, | ||
885 | sizeof(struct iwl4965_powertable_cmd), | ||
886 | cmd, NULL); | ||
887 | return ret; | ||
888 | } | ||
889 | |||
890 | static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res) | 845 | static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res) |
891 | { | 846 | { |
892 | s32 sign = 1; | 847 | s32 sign = 1; |
@@ -1560,11 +1515,11 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, | |||
1560 | c, atten_value, power_index, | 1515 | c, atten_value, power_index, |
1561 | tx_power.s.radio_tx_gain[c], | 1516 | tx_power.s.radio_tx_gain[c], |
1562 | tx_power.s.dsp_predis_atten[c]); | 1517 | tx_power.s.dsp_predis_atten[c]); |
1563 | }/* for each chain */ | 1518 | } /* for each chain */ |
1564 | 1519 | ||
1565 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); | 1520 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); |
1566 | 1521 | ||
1567 | }/* for each rate */ | 1522 | } /* for each rate */ |
1568 | 1523 | ||
1569 | return 0; | 1524 | return 0; |
1570 | } | 1525 | } |
@@ -1701,38 +1656,6 @@ static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv) | |||
1701 | return le32_to_cpu(s->rb_closed) & 0xFFF; | 1656 | return le32_to_cpu(s->rb_closed) & 0xFFF; |
1702 | } | 1657 | } |
1703 | 1658 | ||
1704 | unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, | ||
1705 | struct iwl_frame *frame, u8 rate) | ||
1706 | { | ||
1707 | struct iwl4965_tx_beacon_cmd *tx_beacon_cmd; | ||
1708 | unsigned int frame_size; | ||
1709 | |||
1710 | tx_beacon_cmd = &frame->u.beacon; | ||
1711 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | ||
1712 | |||
1713 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | ||
1714 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | ||
1715 | |||
1716 | frame_size = iwl4965_fill_beacon_frame(priv, | ||
1717 | tx_beacon_cmd->frame, | ||
1718 | iwl_bcast_addr, | ||
1719 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | ||
1720 | |||
1721 | BUG_ON(frame_size > MAX_MPDU_SIZE); | ||
1722 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | ||
1723 | |||
1724 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | ||
1725 | tx_beacon_cmd->tx.rate_n_flags = | ||
1726 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | ||
1727 | else | ||
1728 | tx_beacon_cmd->tx.rate_n_flags = | ||
1729 | iwl_hw_set_rate_n_flags(rate, 0); | ||
1730 | |||
1731 | tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK | | ||
1732 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK); | ||
1733 | return (sizeof(*tx_beacon_cmd) + frame_size); | ||
1734 | } | ||
1735 | |||
1736 | static int iwl4965_alloc_shared_mem(struct iwl_priv *priv) | 1659 | static int iwl4965_alloc_shared_mem(struct iwl_priv *priv) |
1737 | { | 1660 | { |
1738 | priv->shared_virt = pci_alloc_consistent(priv->pci_dev, | 1661 | priv->shared_virt = pci_alloc_consistent(priv->pci_dev, |
@@ -2079,39 +2002,6 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id, | |||
2079 | return 0; | 2002 | return 0; |
2080 | } | 2003 | } |
2081 | 2004 | ||
2082 | int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, | ||
2083 | enum ieee80211_ampdu_mlme_action action, | ||
2084 | const u8 *addr, u16 tid, u16 *ssn) | ||
2085 | { | ||
2086 | struct iwl_priv *priv = hw->priv; | ||
2087 | DECLARE_MAC_BUF(mac); | ||
2088 | |||
2089 | IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n", | ||
2090 | print_mac(mac, addr), tid); | ||
2091 | |||
2092 | if (!(priv->cfg->sku & IWL_SKU_N)) | ||
2093 | return -EACCES; | ||
2094 | |||
2095 | switch (action) { | ||
2096 | case IEEE80211_AMPDU_RX_START: | ||
2097 | IWL_DEBUG_HT("start Rx\n"); | ||
2098 | return iwl_rx_agg_start(priv, addr, tid, *ssn); | ||
2099 | case IEEE80211_AMPDU_RX_STOP: | ||
2100 | IWL_DEBUG_HT("stop Rx\n"); | ||
2101 | return iwl_rx_agg_stop(priv, addr, tid); | ||
2102 | case IEEE80211_AMPDU_TX_START: | ||
2103 | IWL_DEBUG_HT("start Tx\n"); | ||
2104 | return iwl_tx_agg_start(priv, addr, tid, ssn); | ||
2105 | case IEEE80211_AMPDU_TX_STOP: | ||
2106 | IWL_DEBUG_HT("stop Tx\n"); | ||
2107 | return iwl_tx_agg_stop(priv, addr, tid); | ||
2108 | default: | ||
2109 | IWL_DEBUG_HT("unknown\n"); | ||
2110 | return -EINVAL; | ||
2111 | break; | ||
2112 | } | ||
2113 | return 0; | ||
2114 | } | ||
2115 | 2005 | ||
2116 | static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len) | 2006 | static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len) |
2117 | { | 2007 | { |
@@ -2240,9 +2130,9 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, | |||
2240 | bitmap = bitmap << sh; | 2130 | bitmap = bitmap << sh; |
2241 | sh = 0; | 2131 | sh = 0; |
2242 | } | 2132 | } |
2243 | bitmap |= (1 << sh); | 2133 | bitmap |= 1ULL << sh; |
2244 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | 2134 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n", |
2245 | start, (u32)(bitmap & 0xFFFFFFFF)); | 2135 | start, (unsigned long long)bitmap); |
2246 | } | 2136 | } |
2247 | 2137 | ||
2248 | agg->bitmap = bitmap; | 2138 | agg->bitmap = bitmap; |
@@ -2368,6 +2258,40 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2368 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | 2258 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); |
2369 | } | 2259 | } |
2370 | 2260 | ||
2261 | static int iwl4965_calc_rssi(struct iwl_priv *priv, | ||
2262 | struct iwl_rx_phy_res *rx_resp) | ||
2263 | { | ||
2264 | /* data from PHY/DSP regarding signal strength, etc., | ||
2265 | * contents are always there, not configurable by host. */ | ||
2266 | struct iwl4965_rx_non_cfg_phy *ncphy = | ||
2267 | (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf; | ||
2268 | u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK) | ||
2269 | >> IWL49_AGC_DB_POS; | ||
2270 | |||
2271 | u32 valid_antennae = | ||
2272 | (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK) | ||
2273 | >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET; | ||
2274 | u8 max_rssi = 0; | ||
2275 | u32 i; | ||
2276 | |||
2277 | /* Find max rssi among 3 possible receivers. | ||
2278 | * These values are measured by the digital signal processor (DSP). | ||
2279 | * They should stay fairly constant even as the signal strength varies, | ||
2280 | * if the radio's automatic gain control (AGC) is working right. | ||
2281 | * AGC value (see below) will provide the "interesting" info. */ | ||
2282 | for (i = 0; i < 3; i++) | ||
2283 | if (valid_antennae & (1 << i)) | ||
2284 | max_rssi = max(ncphy->rssi_info[i << 1], max_rssi); | ||
2285 | |||
2286 | IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n", | ||
2287 | ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4], | ||
2288 | max_rssi, agc); | ||
2289 | |||
2290 | /* dBm = max_rssi dB - agc dB - constant. | ||
2291 | * Higher AGC (higher radio gain) means lower signal. */ | ||
2292 | return max_rssi - agc - IWL_RSSI_OFFSET; | ||
2293 | } | ||
2294 | |||
2371 | 2295 | ||
2372 | /* Set up 4965-specific Rx frame reply handlers */ | 2296 | /* Set up 4965-specific Rx frame reply handlers */ |
2373 | static void iwl4965_rx_handler_setup(struct iwl_priv *priv) | 2297 | static void iwl4965_rx_handler_setup(struct iwl_priv *priv) |
@@ -2399,6 +2323,7 @@ static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = { | |||
2399 | .chain_noise_reset = iwl4965_chain_noise_reset, | 2323 | .chain_noise_reset = iwl4965_chain_noise_reset, |
2400 | .gain_computation = iwl4965_gain_computation, | 2324 | .gain_computation = iwl4965_gain_computation, |
2401 | .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag, | 2325 | .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag, |
2326 | .calc_rssi = iwl4965_calc_rssi, | ||
2402 | }; | 2327 | }; |
2403 | 2328 | ||
2404 | static struct iwl_lib_ops iwl4965_lib = { | 2329 | static struct iwl_lib_ops iwl4965_lib = { |
@@ -2440,7 +2365,6 @@ static struct iwl_lib_ops iwl4965_lib = { | |||
2440 | .check_version = iwl4965_eeprom_check_version, | 2365 | .check_version = iwl4965_eeprom_check_version, |
2441 | .query_addr = iwlcore_eeprom_query_addr, | 2366 | .query_addr = iwlcore_eeprom_query_addr, |
2442 | }, | 2367 | }, |
2443 | .set_power = iwl4965_set_power, | ||
2444 | .send_tx_power = iwl4965_send_tx_power, | 2368 | .send_tx_power = iwl4965_send_tx_power, |
2445 | .update_chain_flags = iwl4965_update_chain_flags, | 2369 | .update_chain_flags = iwl4965_update_chain_flags, |
2446 | .temperature = iwl4965_temperature_calib, | 2370 | .temperature = iwl4965_temperature_calib, |
@@ -2469,7 +2393,7 @@ MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); | |||
2469 | module_param_named(disable, iwl4965_mod_params.disable, int, 0444); | 2393 | module_param_named(disable, iwl4965_mod_params.disable, int, 0444); |
2470 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); | 2394 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
2471 | module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444); | 2395 | module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444); |
2472 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n"); | 2396 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); |
2473 | module_param_named(debug, iwl4965_mod_params.debug, int, 0444); | 2397 | module_param_named(debug, iwl4965_mod_params.debug, int, 0444); |
2474 | MODULE_PARM_DESC(debug, "debug output mask"); | 2398 | MODULE_PARM_DESC(debug, "debug output mask"); |
2475 | module_param_named( | 2399 | module_param_named( |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index 878d6193b232..f3d139b663e6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -93,6 +93,13 @@ static int iwl5000_apm_init(struct iwl_priv *priv) | |||
93 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 93 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
94 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | 94 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); |
95 | 95 | ||
96 | /* Set FH wait treshold to maximum (HW error during stress W/A) */ | ||
97 | iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); | ||
98 | |||
99 | /* enable HAP INTA to move device L1a -> L0s */ | ||
100 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, | ||
101 | CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); | ||
102 | |||
96 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); | 103 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); |
97 | 104 | ||
98 | /* set "initialization complete" bit to move adapter | 105 | /* set "initialization complete" bit to move adapter |
@@ -230,6 +237,16 @@ static void iwl5000_nic_config(struct iwl_priv *priv) | |||
230 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | 237 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
231 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | 238 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); |
232 | 239 | ||
240 | /* W/A : NIC is stuck in a reset state after Early PCIe power off | ||
241 | * (PCIe power is lost before PERST# is asserted), | ||
242 | * causing ME FW to lose ownership and not being able to obtain it back. | ||
243 | */ | ||
244 | iwl_grab_nic_access(priv); | ||
245 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
246 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | ||
247 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | ||
248 | iwl_release_nic_access(priv); | ||
249 | |||
233 | spin_unlock_irqrestore(&priv->lock, flags); | 250 | spin_unlock_irqrestore(&priv->lock, flags); |
234 | } | 251 | } |
235 | 252 | ||
@@ -924,8 +941,8 @@ static void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv, | |||
924 | len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; | 941 | len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; |
925 | 942 | ||
926 | if (txq_id != IWL_CMD_QUEUE_NUM) { | 943 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
927 | sta = txq->cmd[txq->q.write_ptr].cmd.tx.sta_id; | 944 | sta = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id; |
928 | sec_ctl = txq->cmd[txq->q.write_ptr].cmd.tx.sec_ctl; | 945 | sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl; |
929 | 946 | ||
930 | switch (sec_ctl & TX_CMD_SEC_MSK) { | 947 | switch (sec_ctl & TX_CMD_SEC_MSK) { |
931 | case TX_CMD_SEC_CCM: | 948 | case TX_CMD_SEC_CCM: |
@@ -964,7 +981,7 @@ static void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv, | |||
964 | u8 sta = 0; | 981 | u8 sta = 0; |
965 | 982 | ||
966 | if (txq_id != IWL_CMD_QUEUE_NUM) | 983 | if (txq_id != IWL_CMD_QUEUE_NUM) |
967 | sta = txq->cmd[txq->q.read_ptr].cmd.tx.sta_id; | 984 | sta = txq->cmd[txq->q.read_ptr]->cmd.tx.sta_id; |
968 | 985 | ||
969 | shared_data->queues_byte_cnt_tbls[txq_id].tfd_offset[txq->q.read_ptr]. | 986 | shared_data->queues_byte_cnt_tbls[txq_id].tfd_offset[txq->q.read_ptr]. |
970 | val = cpu_to_le16(1 | (sta << 12)); | 987 | val = cpu_to_le16(1 | (sta << 12)); |
@@ -1131,7 +1148,7 @@ static void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask) | |||
1131 | 1148 | ||
1132 | static inline u32 iwl5000_get_scd_ssn(struct iwl5000_tx_resp *tx_resp) | 1149 | static inline u32 iwl5000_get_scd_ssn(struct iwl5000_tx_resp *tx_resp) |
1133 | { | 1150 | { |
1134 | return le32_to_cpup((__le32*)&tx_resp->status + | 1151 | return le32_to_cpup((__le32 *)&tx_resp->status + |
1135 | tx_resp->frame_count) & MAX_SN; | 1152 | tx_resp->frame_count) & MAX_SN; |
1136 | } | 1153 | } |
1137 | 1154 | ||
@@ -1228,9 +1245,9 @@ static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv, | |||
1228 | bitmap = bitmap << sh; | 1245 | bitmap = bitmap << sh; |
1229 | sh = 0; | 1246 | sh = 0; |
1230 | } | 1247 | } |
1231 | bitmap |= (1 << sh); | 1248 | bitmap |= 1ULL << sh; |
1232 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | 1249 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n", |
1233 | start, (u32)(bitmap & 0xFFFFFFFF)); | 1250 | start, (unsigned long long)bitmap); |
1234 | } | 1251 | } |
1235 | 1252 | ||
1236 | agg->bitmap = bitmap; | 1253 | agg->bitmap = bitmap; |
@@ -1444,6 +1461,44 @@ static void iwl5000_temperature(struct iwl_priv *priv) | |||
1444 | priv->temperature = le32_to_cpu(priv->statistics.general.temperature); | 1461 | priv->temperature = le32_to_cpu(priv->statistics.general.temperature); |
1445 | } | 1462 | } |
1446 | 1463 | ||
1464 | /* Calc max signal level (dBm) among 3 possible receivers */ | ||
1465 | static int iwl5000_calc_rssi(struct iwl_priv *priv, | ||
1466 | struct iwl_rx_phy_res *rx_resp) | ||
1467 | { | ||
1468 | /* data from PHY/DSP regarding signal strength, etc., | ||
1469 | * contents are always there, not configurable by host | ||
1470 | */ | ||
1471 | struct iwl5000_non_cfg_phy *ncphy = | ||
1472 | (struct iwl5000_non_cfg_phy *)rx_resp->non_cfg_phy_buf; | ||
1473 | u32 val, rssi_a, rssi_b, rssi_c, max_rssi; | ||
1474 | u8 agc; | ||
1475 | |||
1476 | val = le32_to_cpu(ncphy->non_cfg_phy[IWL50_RX_RES_AGC_IDX]); | ||
1477 | agc = (val & IWL50_OFDM_AGC_MSK) >> IWL50_OFDM_AGC_BIT_POS; | ||
1478 | |||
1479 | /* Find max rssi among 3 possible receivers. | ||
1480 | * These values are measured by the digital signal processor (DSP). | ||
1481 | * They should stay fairly constant even as the signal strength varies, | ||
1482 | * if the radio's automatic gain control (AGC) is working right. | ||
1483 | * AGC value (see below) will provide the "interesting" info. | ||
1484 | */ | ||
1485 | val = le32_to_cpu(ncphy->non_cfg_phy[IWL50_RX_RES_RSSI_AB_IDX]); | ||
1486 | rssi_a = (val & IWL50_OFDM_RSSI_A_MSK) >> IWL50_OFDM_RSSI_A_BIT_POS; | ||
1487 | rssi_b = (val & IWL50_OFDM_RSSI_B_MSK) >> IWL50_OFDM_RSSI_B_BIT_POS; | ||
1488 | val = le32_to_cpu(ncphy->non_cfg_phy[IWL50_RX_RES_RSSI_C_IDX]); | ||
1489 | rssi_c = (val & IWL50_OFDM_RSSI_C_MSK) >> IWL50_OFDM_RSSI_C_BIT_POS; | ||
1490 | |||
1491 | max_rssi = max_t(u32, rssi_a, rssi_b); | ||
1492 | max_rssi = max_t(u32, max_rssi, rssi_c); | ||
1493 | |||
1494 | IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n", | ||
1495 | rssi_a, rssi_b, rssi_c, max_rssi, agc); | ||
1496 | |||
1497 | /* dBm = max_rssi dB - agc dB - constant. | ||
1498 | * Higher AGC (higher radio gain) means lower signal. */ | ||
1499 | return max_rssi - agc - IWL_RSSI_OFFSET; | ||
1500 | } | ||
1501 | |||
1447 | static struct iwl_hcmd_ops iwl5000_hcmd = { | 1502 | static struct iwl_hcmd_ops iwl5000_hcmd = { |
1448 | .rxon_assoc = iwl5000_send_rxon_assoc, | 1503 | .rxon_assoc = iwl5000_send_rxon_assoc, |
1449 | }; | 1504 | }; |
@@ -1454,6 +1509,7 @@ static struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = { | |||
1454 | .gain_computation = iwl5000_gain_computation, | 1509 | .gain_computation = iwl5000_gain_computation, |
1455 | .chain_noise_reset = iwl5000_chain_noise_reset, | 1510 | .chain_noise_reset = iwl5000_chain_noise_reset, |
1456 | .rts_tx_cmd_flag = iwl5000_rts_tx_cmd_flag, | 1511 | .rts_tx_cmd_flag = iwl5000_rts_tx_cmd_flag, |
1512 | .calc_rssi = iwl5000_calc_rssi, | ||
1457 | }; | 1513 | }; |
1458 | 1514 | ||
1459 | static struct iwl_lib_ops iwl5000_lib = { | 1515 | static struct iwl_lib_ops iwl5000_lib = { |
@@ -1474,6 +1530,7 @@ static struct iwl_lib_ops iwl5000_lib = { | |||
1474 | .alive_notify = iwl5000_alive_notify, | 1530 | .alive_notify = iwl5000_alive_notify, |
1475 | .send_tx_power = iwl5000_send_tx_power, | 1531 | .send_tx_power = iwl5000_send_tx_power, |
1476 | .temperature = iwl5000_temperature, | 1532 | .temperature = iwl5000_temperature, |
1533 | .update_chain_flags = iwl4965_update_chain_flags, | ||
1477 | .apm_ops = { | 1534 | .apm_ops = { |
1478 | .init = iwl5000_apm_init, | 1535 | .init = iwl5000_apm_init, |
1479 | .reset = iwl5000_apm_reset, | 1536 | .reset = iwl5000_apm_reset, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 3ccb84aa5dbc..754fef5b592f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -42,7 +42,7 @@ | |||
42 | #include "iwl-core.h" | 42 | #include "iwl-core.h" |
43 | #include "iwl-helpers.h" | 43 | #include "iwl-helpers.h" |
44 | 44 | ||
45 | #define RS_NAME "iwl-4965-rs" | 45 | #define RS_NAME "iwl-agn-rs" |
46 | 46 | ||
47 | #define NUM_TRY_BEFORE_ANT_TOGGLE 1 | 47 | #define NUM_TRY_BEFORE_ANT_TOGGLE 1 |
48 | #define IWL_NUMBER_TRY 1 | 48 | #define IWL_NUMBER_TRY 1 |
@@ -77,9 +77,9 @@ static const u8 ant_toggle_lookup[] = { | |||
77 | }; | 77 | }; |
78 | 78 | ||
79 | /** | 79 | /** |
80 | * struct iwl4965_rate_scale_data -- tx success history for one rate | 80 | * struct iwl_rate_scale_data -- tx success history for one rate |
81 | */ | 81 | */ |
82 | struct iwl4965_rate_scale_data { | 82 | struct iwl_rate_scale_data { |
83 | u64 data; /* bitmap of successful frames */ | 83 | u64 data; /* bitmap of successful frames */ |
84 | s32 success_counter; /* number of frames successful */ | 84 | s32 success_counter; /* number of frames successful */ |
85 | s32 success_ratio; /* per-cent * 128 */ | 85 | s32 success_ratio; /* per-cent * 128 */ |
@@ -89,12 +89,12 @@ struct iwl4965_rate_scale_data { | |||
89 | }; | 89 | }; |
90 | 90 | ||
91 | /** | 91 | /** |
92 | * struct iwl4965_scale_tbl_info -- tx params and success history for all rates | 92 | * struct iwl_scale_tbl_info -- tx params and success history for all rates |
93 | * | 93 | * |
94 | * There are two of these in struct iwl4965_lq_sta, | 94 | * There are two of these in struct iwl_lq_sta, |
95 | * one for "active", and one for "search". | 95 | * one for "active", and one for "search". |
96 | */ | 96 | */ |
97 | struct iwl4965_scale_tbl_info { | 97 | struct iwl_scale_tbl_info { |
98 | enum iwl_table_type lq_type; | 98 | enum iwl_table_type lq_type; |
99 | u8 ant_type; | 99 | u8 ant_type; |
100 | u8 is_SGI; /* 1 = short guard interval */ | 100 | u8 is_SGI; /* 1 = short guard interval */ |
@@ -103,10 +103,10 @@ struct iwl4965_scale_tbl_info { | |||
103 | u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */ | 103 | u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */ |
104 | s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ | 104 | s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ |
105 | u32 current_rate; /* rate_n_flags, uCode API format */ | 105 | u32 current_rate; /* rate_n_flags, uCode API format */ |
106 | struct iwl4965_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */ | 106 | struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */ |
107 | }; | 107 | }; |
108 | 108 | ||
109 | struct iwl4965_traffic_load { | 109 | struct iwl_traffic_load { |
110 | unsigned long time_stamp; /* age of the oldest statistics */ | 110 | unsigned long time_stamp; /* age of the oldest statistics */ |
111 | u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time | 111 | u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time |
112 | * slice */ | 112 | * slice */ |
@@ -118,11 +118,11 @@ struct iwl4965_traffic_load { | |||
118 | }; | 118 | }; |
119 | 119 | ||
120 | /** | 120 | /** |
121 | * struct iwl4965_lq_sta -- driver's rate scaling private structure | 121 | * struct iwl_lq_sta -- driver's rate scaling private structure |
122 | * | 122 | * |
123 | * Pointer to this gets passed back and forth between driver and mac80211. | 123 | * Pointer to this gets passed back and forth between driver and mac80211. |
124 | */ | 124 | */ |
125 | struct iwl4965_lq_sta { | 125 | struct iwl_lq_sta { |
126 | u8 active_tbl; /* index of active table, range 0-1 */ | 126 | u8 active_tbl; /* index of active table, range 0-1 */ |
127 | u8 enable_counter; /* indicates HT mode */ | 127 | u8 enable_counter; /* indicates HT mode */ |
128 | u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */ | 128 | u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */ |
@@ -153,8 +153,8 @@ struct iwl4965_lq_sta { | |||
153 | u16 active_rate_basic; | 153 | u16 active_rate_basic; |
154 | 154 | ||
155 | struct iwl_link_quality_cmd lq; | 155 | struct iwl_link_quality_cmd lq; |
156 | struct iwl4965_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ | 156 | struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ |
157 | struct iwl4965_traffic_load load[TID_MAX_LOAD_COUNT]; | 157 | struct iwl_traffic_load load[TID_MAX_LOAD_COUNT]; |
158 | u8 tx_agg_tid_en; | 158 | u8 tx_agg_tid_en; |
159 | #ifdef CONFIG_MAC80211_DEBUGFS | 159 | #ifdef CONFIG_MAC80211_DEBUGFS |
160 | struct dentry *rs_sta_dbgfs_scale_table_file; | 160 | struct dentry *rs_sta_dbgfs_scale_table_file; |
@@ -170,16 +170,15 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
170 | struct ieee80211_hdr *hdr, | 170 | struct ieee80211_hdr *hdr, |
171 | struct sta_info *sta); | 171 | struct sta_info *sta); |
172 | static void rs_fill_link_cmd(const struct iwl_priv *priv, | 172 | static void rs_fill_link_cmd(const struct iwl_priv *priv, |
173 | struct iwl4965_lq_sta *lq_sta, | 173 | struct iwl_lq_sta *lq_sta, u32 rate_n_flags); |
174 | u32 rate_n_flags); | ||
175 | 174 | ||
176 | 175 | ||
177 | #ifdef CONFIG_MAC80211_DEBUGFS | 176 | #ifdef CONFIG_MAC80211_DEBUGFS |
178 | static void rs_dbgfs_set_mcs(struct iwl4965_lq_sta *lq_sta, | 177 | static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta, |
179 | u32 *rate_n_flags, int index); | 178 | u32 *rate_n_flags, int index); |
180 | #else | 179 | #else |
181 | static void rs_dbgfs_set_mcs(struct iwl4965_lq_sta *lq_sta, | 180 | static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta, |
182 | u32 *rate_n_flags, int index) | 181 | u32 *rate_n_flags, int index) |
183 | {} | 182 | {} |
184 | #endif | 183 | #endif |
185 | 184 | ||
@@ -234,7 +233,7 @@ static inline u8 rs_extract_rate(u32 rate_n_flags) | |||
234 | return (u8)(rate_n_flags & 0xFF); | 233 | return (u8)(rate_n_flags & 0xFF); |
235 | } | 234 | } |
236 | 235 | ||
237 | static void rs_rate_scale_clear_window(struct iwl4965_rate_scale_data *window) | 236 | static void rs_rate_scale_clear_window(struct iwl_rate_scale_data *window) |
238 | { | 237 | { |
239 | window->data = 0; | 238 | window->data = 0; |
240 | window->success_counter = 0; | 239 | window->success_counter = 0; |
@@ -246,14 +245,14 @@ static void rs_rate_scale_clear_window(struct iwl4965_rate_scale_data *window) | |||
246 | 245 | ||
247 | static inline u8 rs_is_valid_ant(u8 valid_antenna, u8 ant_type) | 246 | static inline u8 rs_is_valid_ant(u8 valid_antenna, u8 ant_type) |
248 | { | 247 | { |
249 | return ((ant_type & valid_antenna) == ant_type); | 248 | return (ant_type & valid_antenna) == ant_type; |
250 | } | 249 | } |
251 | 250 | ||
252 | /* | 251 | /* |
253 | * removes the old data from the statistics. All data that is older than | 252 | * removes the old data from the statistics. All data that is older than |
254 | * TID_MAX_TIME_DIFF, will be deleted. | 253 | * TID_MAX_TIME_DIFF, will be deleted. |
255 | */ | 254 | */ |
256 | static void rs_tl_rm_old_stats(struct iwl4965_traffic_load *tl, u32 curr_time) | 255 | static void rs_tl_rm_old_stats(struct iwl_traffic_load *tl, u32 curr_time) |
257 | { | 256 | { |
258 | /* The oldest age we want to keep */ | 257 | /* The oldest age we want to keep */ |
259 | u32 oldest_time = curr_time - TID_MAX_TIME_DIFF; | 258 | u32 oldest_time = curr_time - TID_MAX_TIME_DIFF; |
@@ -274,13 +273,13 @@ static void rs_tl_rm_old_stats(struct iwl4965_traffic_load *tl, u32 curr_time) | |||
274 | * increment traffic load value for tid and also remove | 273 | * increment traffic load value for tid and also remove |
275 | * any old values if passed the certain time period | 274 | * any old values if passed the certain time period |
276 | */ | 275 | */ |
277 | static u8 rs_tl_add_packet(struct iwl4965_lq_sta *lq_data, | 276 | static u8 rs_tl_add_packet(struct iwl_lq_sta *lq_data, |
278 | struct ieee80211_hdr *hdr) | 277 | struct ieee80211_hdr *hdr) |
279 | { | 278 | { |
280 | u32 curr_time = jiffies_to_msecs(jiffies); | 279 | u32 curr_time = jiffies_to_msecs(jiffies); |
281 | u32 time_diff; | 280 | u32 time_diff; |
282 | s32 index; | 281 | s32 index; |
283 | struct iwl4965_traffic_load *tl = NULL; | 282 | struct iwl_traffic_load *tl = NULL; |
284 | __le16 fc = hdr->frame_control; | 283 | __le16 fc = hdr->frame_control; |
285 | u8 tid; | 284 | u8 tid; |
286 | 285 | ||
@@ -325,12 +324,12 @@ static u8 rs_tl_add_packet(struct iwl4965_lq_sta *lq_data, | |||
325 | /* | 324 | /* |
326 | get the traffic load value for tid | 325 | get the traffic load value for tid |
327 | */ | 326 | */ |
328 | static u32 rs_tl_get_load(struct iwl4965_lq_sta *lq_data, u8 tid) | 327 | static u32 rs_tl_get_load(struct iwl_lq_sta *lq_data, u8 tid) |
329 | { | 328 | { |
330 | u32 curr_time = jiffies_to_msecs(jiffies); | 329 | u32 curr_time = jiffies_to_msecs(jiffies); |
331 | u32 time_diff; | 330 | u32 time_diff; |
332 | s32 index; | 331 | s32 index; |
333 | struct iwl4965_traffic_load *tl = NULL; | 332 | struct iwl_traffic_load *tl = NULL; |
334 | 333 | ||
335 | if (tid >= TID_MAX_LOAD_COUNT) | 334 | if (tid >= TID_MAX_LOAD_COUNT) |
336 | return 0; | 335 | return 0; |
@@ -354,8 +353,8 @@ static u32 rs_tl_get_load(struct iwl4965_lq_sta *lq_data, u8 tid) | |||
354 | } | 353 | } |
355 | 354 | ||
356 | static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv, | 355 | static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv, |
357 | struct iwl4965_lq_sta *lq_data, u8 tid, | 356 | struct iwl_lq_sta *lq_data, u8 tid, |
358 | struct sta_info *sta) | 357 | struct sta_info *sta) |
359 | { | 358 | { |
360 | unsigned long state; | 359 | unsigned long state; |
361 | DECLARE_MAC_BUF(mac); | 360 | DECLARE_MAC_BUF(mac); |
@@ -373,8 +372,8 @@ static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv, | |||
373 | } | 372 | } |
374 | 373 | ||
375 | static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid, | 374 | static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid, |
376 | struct iwl4965_lq_sta *lq_data, | 375 | struct iwl_lq_sta *lq_data, |
377 | struct sta_info *sta) | 376 | struct sta_info *sta) |
378 | { | 377 | { |
379 | if ((tid < TID_MAX_LOAD_COUNT)) | 378 | if ((tid < TID_MAX_LOAD_COUNT)) |
380 | rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); | 379 | rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); |
@@ -385,9 +384,9 @@ static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid, | |||
385 | 384 | ||
386 | static inline int get_num_of_ant_from_rate(u32 rate_n_flags) | 385 | static inline int get_num_of_ant_from_rate(u32 rate_n_flags) |
387 | { | 386 | { |
388 | return (!!(rate_n_flags & RATE_MCS_ANT_A_MSK) + | 387 | return !!(rate_n_flags & RATE_MCS_ANT_A_MSK) + |
389 | !!(rate_n_flags & RATE_MCS_ANT_B_MSK) + | 388 | !!(rate_n_flags & RATE_MCS_ANT_B_MSK) + |
390 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK)); | 389 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK); |
391 | } | 390 | } |
392 | 391 | ||
393 | /** | 392 | /** |
@@ -397,11 +396,11 @@ static inline int get_num_of_ant_from_rate(u32 rate_n_flags) | |||
397 | * at this rate. window->data contains the bitmask of successful | 396 | * at this rate. window->data contains the bitmask of successful |
398 | * packets. | 397 | * packets. |
399 | */ | 398 | */ |
400 | static int rs_collect_tx_data(struct iwl4965_rate_scale_data *windows, | 399 | static int rs_collect_tx_data(struct iwl_rate_scale_data *windows, |
401 | int scale_index, s32 tpt, int retries, | 400 | int scale_index, s32 tpt, int retries, |
402 | int successes) | 401 | int successes) |
403 | { | 402 | { |
404 | struct iwl4965_rate_scale_data *window = NULL; | 403 | struct iwl_rate_scale_data *window = NULL; |
405 | static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1)); | 404 | static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1)); |
406 | s32 fail_count; | 405 | s32 fail_count; |
407 | 406 | ||
@@ -473,7 +472,7 @@ static int rs_collect_tx_data(struct iwl4965_rate_scale_data *windows, | |||
473 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. | 472 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. |
474 | */ | 473 | */ |
475 | /* FIXME:RS:remove this function and put the flags statically in the table */ | 474 | /* FIXME:RS:remove this function and put the flags statically in the table */ |
476 | static u32 rate_n_flags_from_tbl(struct iwl4965_scale_tbl_info *tbl, | 475 | static u32 rate_n_flags_from_tbl(struct iwl_scale_tbl_info *tbl, |
477 | int index, u8 use_green) | 476 | int index, u8 use_green) |
478 | { | 477 | { |
479 | u32 rate_n_flags = 0; | 478 | u32 rate_n_flags = 0; |
@@ -530,7 +529,7 @@ static u32 rate_n_flags_from_tbl(struct iwl4965_scale_tbl_info *tbl, | |||
530 | */ | 529 | */ |
531 | static int rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | 530 | static int rs_get_tbl_info_from_mcs(const u32 rate_n_flags, |
532 | enum ieee80211_band band, | 531 | enum ieee80211_band band, |
533 | struct iwl4965_scale_tbl_info *tbl, | 532 | struct iwl_scale_tbl_info *tbl, |
534 | int *rate_idx) | 533 | int *rate_idx) |
535 | { | 534 | { |
536 | u32 ant_msk = (rate_n_flags & RATE_MCS_ANT_ABC_MSK); | 535 | u32 ant_msk = (rate_n_flags & RATE_MCS_ANT_ABC_MSK); |
@@ -591,7 +590,7 @@ static int rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | |||
591 | /* switch to another antenna/antennas and return 1 */ | 590 | /* switch to another antenna/antennas and return 1 */ |
592 | /* if no other valid antenna found, return 0 */ | 591 | /* if no other valid antenna found, return 0 */ |
593 | static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags, | 592 | static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags, |
594 | struct iwl4965_scale_tbl_info *tbl) | 593 | struct iwl_scale_tbl_info *tbl) |
595 | { | 594 | { |
596 | u8 new_ant_type; | 595 | u8 new_ant_type; |
597 | 596 | ||
@@ -621,9 +620,9 @@ static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags, | |||
621 | #if 0 | 620 | #if 0 |
622 | static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf) | 621 | static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf) |
623 | { | 622 | { |
624 | return ((conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && | 623 | return (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && |
625 | priv->current_ht_config.is_green_field && | 624 | priv->current_ht_config.is_green_field && |
626 | !priv->current_ht_config.non_GF_STA_present); | 625 | !priv->current_ht_config.non_GF_STA_present; |
627 | } | 626 | } |
628 | #endif | 627 | #endif |
629 | static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf) | 628 | static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf) |
@@ -638,9 +637,9 @@ static inline u8 rs_use_green(struct iwl_priv *priv, struct ieee80211_conf *conf | |||
638 | * basic available rates. | 637 | * basic available rates. |
639 | * | 638 | * |
640 | */ | 639 | */ |
641 | static u16 rs_get_supported_rates(struct iwl4965_lq_sta *lq_sta, | 640 | static u16 rs_get_supported_rates(struct iwl_lq_sta *lq_sta, |
642 | struct ieee80211_hdr *hdr, | 641 | struct ieee80211_hdr *hdr, |
643 | enum iwl_table_type rate_type) | 642 | enum iwl_table_type rate_type) |
644 | { | 643 | { |
645 | if (hdr && is_multicast_ether_addr(hdr->addr1) && | 644 | if (hdr && is_multicast_ether_addr(hdr->addr1) && |
646 | lq_sta->active_rate_basic) | 645 | lq_sta->active_rate_basic) |
@@ -714,9 +713,9 @@ static u16 rs_get_adjacent_rate(struct iwl_priv *priv, u8 index, u16 rate_mask, | |||
714 | return (high << 8) | low; | 713 | return (high << 8) | low; |
715 | } | 714 | } |
716 | 715 | ||
717 | static u32 rs_get_lower_rate(struct iwl4965_lq_sta *lq_sta, | 716 | static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta, |
718 | struct iwl4965_scale_tbl_info *tbl, u8 scale_index, | 717 | struct iwl_scale_tbl_info *tbl, |
719 | u8 ht_possible) | 718 | u8 scale_index, u8 ht_possible) |
720 | { | 719 | { |
721 | s32 low; | 720 | s32 low; |
722 | u16 rate_mask; | 721 | u16 rate_mask; |
@@ -780,7 +779,7 @@ static void rs_tx_status(void *priv_rate, struct net_device *dev, | |||
780 | int status; | 779 | int status; |
781 | u8 retries; | 780 | u8 retries; |
782 | int rs_index, index = 0; | 781 | int rs_index, index = 0; |
783 | struct iwl4965_lq_sta *lq_sta; | 782 | struct iwl_lq_sta *lq_sta; |
784 | struct iwl_link_quality_cmd *table; | 783 | struct iwl_link_quality_cmd *table; |
785 | struct sta_info *sta; | 784 | struct sta_info *sta; |
786 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 785 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
@@ -788,11 +787,11 @@ static void rs_tx_status(void *priv_rate, struct net_device *dev, | |||
788 | struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr); | 787 | struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr); |
789 | struct ieee80211_hw *hw = local_to_hw(local); | 788 | struct ieee80211_hw *hw = local_to_hw(local); |
790 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 789 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
791 | struct iwl4965_rate_scale_data *window = NULL; | 790 | struct iwl_rate_scale_data *window = NULL; |
792 | struct iwl4965_rate_scale_data *search_win = NULL; | 791 | struct iwl_rate_scale_data *search_win = NULL; |
793 | u32 tx_rate; | 792 | u32 tx_rate; |
794 | struct iwl4965_scale_tbl_info tbl_type; | 793 | struct iwl_scale_tbl_info tbl_type; |
795 | struct iwl4965_scale_tbl_info *curr_tbl, *search_tbl; | 794 | struct iwl_scale_tbl_info *curr_tbl, *search_tbl; |
796 | u8 active_index = 0; | 795 | u8 active_index = 0; |
797 | __le16 fc = hdr->frame_control; | 796 | __le16 fc = hdr->frame_control; |
798 | s32 tpt = 0; | 797 | s32 tpt = 0; |
@@ -820,7 +819,7 @@ static void rs_tx_status(void *priv_rate, struct net_device *dev, | |||
820 | goto out; | 819 | goto out; |
821 | 820 | ||
822 | 821 | ||
823 | lq_sta = (struct iwl4965_lq_sta *)sta->rate_ctrl_priv; | 822 | lq_sta = (struct iwl_lq_sta *)sta->rate_ctrl_priv; |
824 | 823 | ||
825 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | 824 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && |
826 | !lq_sta->ibss_sta_added) | 825 | !lq_sta->ibss_sta_added) |
@@ -831,10 +830,8 @@ static void rs_tx_status(void *priv_rate, struct net_device *dev, | |||
831 | 830 | ||
832 | curr_tbl = &(lq_sta->lq_info[active_index]); | 831 | curr_tbl = &(lq_sta->lq_info[active_index]); |
833 | search_tbl = &(lq_sta->lq_info[(1 - active_index)]); | 832 | search_tbl = &(lq_sta->lq_info[(1 - active_index)]); |
834 | window = (struct iwl4965_rate_scale_data *) | 833 | window = (struct iwl_rate_scale_data *)&(curr_tbl->win[0]); |
835 | &(curr_tbl->win[0]); | 834 | search_win = (struct iwl_rate_scale_data *)&(search_tbl->win[0]); |
836 | search_win = (struct iwl4965_rate_scale_data *) | ||
837 | &(search_tbl->win[0]); | ||
838 | 835 | ||
839 | /* | 836 | /* |
840 | * Ignore this Tx frame response if its initial rate doesn't match | 837 | * Ignore this Tx frame response if its initial rate doesn't match |
@@ -983,7 +980,7 @@ out: | |||
983 | * searching for a new mode. | 980 | * searching for a new mode. |
984 | */ | 981 | */ |
985 | static void rs_set_stay_in_table(struct iwl_priv *priv, u8 is_legacy, | 982 | static void rs_set_stay_in_table(struct iwl_priv *priv, u8 is_legacy, |
986 | struct iwl4965_lq_sta *lq_sta) | 983 | struct iwl_lq_sta *lq_sta) |
987 | { | 984 | { |
988 | IWL_DEBUG_RATE("we are staying in the same table\n"); | 985 | IWL_DEBUG_RATE("we are staying in the same table\n"); |
989 | lq_sta->stay_in_tbl = 1; /* only place this gets set */ | 986 | lq_sta->stay_in_tbl = 1; /* only place this gets set */ |
@@ -1004,8 +1001,8 @@ static void rs_set_stay_in_table(struct iwl_priv *priv, u8 is_legacy, | |||
1004 | /* | 1001 | /* |
1005 | * Find correct throughput table for given mode of modulation | 1002 | * Find correct throughput table for given mode of modulation |
1006 | */ | 1003 | */ |
1007 | static void rs_set_expected_tpt_table(struct iwl4965_lq_sta *lq_sta, | 1004 | static void rs_set_expected_tpt_table(struct iwl_lq_sta *lq_sta, |
1008 | struct iwl4965_scale_tbl_info *tbl) | 1005 | struct iwl_scale_tbl_info *tbl) |
1009 | { | 1006 | { |
1010 | if (is_legacy(tbl->lq_type)) { | 1007 | if (is_legacy(tbl->lq_type)) { |
1011 | if (!is_a_band(tbl->lq_type)) | 1008 | if (!is_a_band(tbl->lq_type)) |
@@ -1050,12 +1047,12 @@ static void rs_set_expected_tpt_table(struct iwl4965_lq_sta *lq_sta, | |||
1050 | * bit rate will typically need to increase, but not if performance was bad. | 1047 | * bit rate will typically need to increase, but not if performance was bad. |
1051 | */ | 1048 | */ |
1052 | static s32 rs_get_best_rate(struct iwl_priv *priv, | 1049 | static s32 rs_get_best_rate(struct iwl_priv *priv, |
1053 | struct iwl4965_lq_sta *lq_sta, | 1050 | struct iwl_lq_sta *lq_sta, |
1054 | struct iwl4965_scale_tbl_info *tbl, /* "search" */ | 1051 | struct iwl_scale_tbl_info *tbl, /* "search" */ |
1055 | u16 rate_mask, s8 index) | 1052 | u16 rate_mask, s8 index) |
1056 | { | 1053 | { |
1057 | /* "active" values */ | 1054 | /* "active" values */ |
1058 | struct iwl4965_scale_tbl_info *active_tbl = | 1055 | struct iwl_scale_tbl_info *active_tbl = |
1059 | &(lq_sta->lq_info[lq_sta->active_tbl]); | 1056 | &(lq_sta->lq_info[lq_sta->active_tbl]); |
1060 | s32 active_sr = active_tbl->win[index].success_ratio; | 1057 | s32 active_sr = active_tbl->win[index].success_ratio; |
1061 | s32 active_tpt = active_tbl->expected_tpt[index]; | 1058 | s32 active_tpt = active_tbl->expected_tpt[index]; |
@@ -1143,10 +1140,10 @@ static s32 rs_get_best_rate(struct iwl_priv *priv, | |||
1143 | * Set up search table for MIMO | 1140 | * Set up search table for MIMO |
1144 | */ | 1141 | */ |
1145 | static int rs_switch_to_mimo2(struct iwl_priv *priv, | 1142 | static int rs_switch_to_mimo2(struct iwl_priv *priv, |
1146 | struct iwl4965_lq_sta *lq_sta, | 1143 | struct iwl_lq_sta *lq_sta, |
1147 | struct ieee80211_conf *conf, | 1144 | struct ieee80211_conf *conf, |
1148 | struct sta_info *sta, | 1145 | struct sta_info *sta, |
1149 | struct iwl4965_scale_tbl_info *tbl, int index) | 1146 | struct iwl_scale_tbl_info *tbl, int index) |
1150 | { | 1147 | { |
1151 | u16 rate_mask; | 1148 | u16 rate_mask; |
1152 | s32 rate; | 1149 | s32 rate; |
@@ -1210,10 +1207,10 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv, | |||
1210 | * Set up search table for SISO | 1207 | * Set up search table for SISO |
1211 | */ | 1208 | */ |
1212 | static int rs_switch_to_siso(struct iwl_priv *priv, | 1209 | static int rs_switch_to_siso(struct iwl_priv *priv, |
1213 | struct iwl4965_lq_sta *lq_sta, | 1210 | struct iwl_lq_sta *lq_sta, |
1214 | struct ieee80211_conf *conf, | 1211 | struct ieee80211_conf *conf, |
1215 | struct sta_info *sta, | 1212 | struct sta_info *sta, |
1216 | struct iwl4965_scale_tbl_info *tbl, int index) | 1213 | struct iwl_scale_tbl_info *tbl, int index) |
1217 | { | 1214 | { |
1218 | u16 rate_mask; | 1215 | u16 rate_mask; |
1219 | u8 is_green = lq_sta->is_green; | 1216 | u8 is_green = lq_sta->is_green; |
@@ -1270,18 +1267,17 @@ static int rs_switch_to_siso(struct iwl_priv *priv, | |||
1270 | * Try to switch to new modulation mode from legacy | 1267 | * Try to switch to new modulation mode from legacy |
1271 | */ | 1268 | */ |
1272 | static int rs_move_legacy_other(struct iwl_priv *priv, | 1269 | static int rs_move_legacy_other(struct iwl_priv *priv, |
1273 | struct iwl4965_lq_sta *lq_sta, | 1270 | struct iwl_lq_sta *lq_sta, |
1274 | struct ieee80211_conf *conf, | 1271 | struct ieee80211_conf *conf, |
1275 | struct sta_info *sta, | 1272 | struct sta_info *sta, |
1276 | int index) | 1273 | int index) |
1277 | { | 1274 | { |
1278 | struct iwl4965_scale_tbl_info *tbl = | 1275 | struct iwl_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1279 | &(lq_sta->lq_info[lq_sta->active_tbl]); | 1276 | struct iwl_scale_tbl_info *search_tbl = |
1280 | struct iwl4965_scale_tbl_info *search_tbl = | 1277 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1281 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1278 | struct iwl_rate_scale_data *window = &(tbl->win[index]); |
1282 | struct iwl4965_rate_scale_data *window = &(tbl->win[index]); | 1279 | u32 sz = (sizeof(struct iwl_scale_tbl_info) - |
1283 | u32 sz = (sizeof(struct iwl4965_scale_tbl_info) - | 1280 | (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT)); |
1284 | (sizeof(struct iwl4965_rate_scale_data) * IWL_RATE_COUNT)); | ||
1285 | u8 start_action = tbl->action; | 1281 | u8 start_action = tbl->action; |
1286 | u8 valid_tx_ant = priv->hw_params.valid_tx_ant; | 1282 | u8 valid_tx_ant = priv->hw_params.valid_tx_ant; |
1287 | int ret = 0; | 1283 | int ret = 0; |
@@ -1360,19 +1356,17 @@ static int rs_move_legacy_other(struct iwl_priv *priv, | |||
1360 | * Try to switch to new modulation mode from SISO | 1356 | * Try to switch to new modulation mode from SISO |
1361 | */ | 1357 | */ |
1362 | static int rs_move_siso_to_other(struct iwl_priv *priv, | 1358 | static int rs_move_siso_to_other(struct iwl_priv *priv, |
1363 | struct iwl4965_lq_sta *lq_sta, | 1359 | struct iwl_lq_sta *lq_sta, |
1364 | struct ieee80211_conf *conf, | 1360 | struct ieee80211_conf *conf, |
1365 | struct sta_info *sta, | 1361 | struct sta_info *sta, int index) |
1366 | int index) | ||
1367 | { | 1362 | { |
1368 | u8 is_green = lq_sta->is_green; | 1363 | u8 is_green = lq_sta->is_green; |
1369 | struct iwl4965_scale_tbl_info *tbl = | 1364 | struct iwl_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1370 | &(lq_sta->lq_info[lq_sta->active_tbl]); | 1365 | struct iwl_scale_tbl_info *search_tbl = |
1371 | struct iwl4965_scale_tbl_info *search_tbl = | 1366 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1372 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1367 | struct iwl_rate_scale_data *window = &(tbl->win[index]); |
1373 | struct iwl4965_rate_scale_data *window = &(tbl->win[index]); | 1368 | u32 sz = (sizeof(struct iwl_scale_tbl_info) - |
1374 | u32 sz = (sizeof(struct iwl4965_scale_tbl_info) - | 1369 | (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT)); |
1375 | (sizeof(struct iwl4965_rate_scale_data) * IWL_RATE_COUNT)); | ||
1376 | u8 start_action = tbl->action; | 1370 | u8 start_action = tbl->action; |
1377 | u8 valid_tx_ant = priv->hw_params.valid_tx_ant; | 1371 | u8 valid_tx_ant = priv->hw_params.valid_tx_ant; |
1378 | int ret; | 1372 | int ret; |
@@ -1455,18 +1449,16 @@ static int rs_move_siso_to_other(struct iwl_priv *priv, | |||
1455 | * Try to switch to new modulation mode from MIMO | 1449 | * Try to switch to new modulation mode from MIMO |
1456 | */ | 1450 | */ |
1457 | static int rs_move_mimo_to_other(struct iwl_priv *priv, | 1451 | static int rs_move_mimo_to_other(struct iwl_priv *priv, |
1458 | struct iwl4965_lq_sta *lq_sta, | 1452 | struct iwl_lq_sta *lq_sta, |
1459 | struct ieee80211_conf *conf, | 1453 | struct ieee80211_conf *conf, |
1460 | struct sta_info *sta, | 1454 | struct sta_info *sta, int index) |
1461 | int index) | ||
1462 | { | 1455 | { |
1463 | s8 is_green = lq_sta->is_green; | 1456 | s8 is_green = lq_sta->is_green; |
1464 | struct iwl4965_scale_tbl_info *tbl = | 1457 | struct iwl_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1465 | &(lq_sta->lq_info[lq_sta->active_tbl]); | 1458 | struct iwl_scale_tbl_info *search_tbl = |
1466 | struct iwl4965_scale_tbl_info *search_tbl = | 1459 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1467 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1460 | u32 sz = (sizeof(struct iwl_scale_tbl_info) - |
1468 | u32 sz = (sizeof(struct iwl4965_scale_tbl_info) - | 1461 | (sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT)); |
1469 | (sizeof(struct iwl4965_rate_scale_data) * IWL_RATE_COUNT)); | ||
1470 | u8 start_action = tbl->action; | 1462 | u8 start_action = tbl->action; |
1471 | /*u8 valid_tx_ant = priv->hw_params.valid_tx_ant;*/ | 1463 | /*u8 valid_tx_ant = priv->hw_params.valid_tx_ant;*/ |
1472 | int ret; | 1464 | int ret; |
@@ -1552,9 +1544,9 @@ static int rs_move_mimo_to_other(struct iwl_priv *priv, | |||
1552 | * 2) # times calling this function | 1544 | * 2) # times calling this function |
1553 | * 3) elapsed time in this mode (not used, for now) | 1545 | * 3) elapsed time in this mode (not used, for now) |
1554 | */ | 1546 | */ |
1555 | static void rs_stay_in_table(struct iwl4965_lq_sta *lq_sta) | 1547 | static void rs_stay_in_table(struct iwl_lq_sta *lq_sta) |
1556 | { | 1548 | { |
1557 | struct iwl4965_scale_tbl_info *tbl; | 1549 | struct iwl_scale_tbl_info *tbl; |
1558 | int i; | 1550 | int i; |
1559 | int active_tbl; | 1551 | int active_tbl; |
1560 | int flush_interval_passed = 0; | 1552 | int flush_interval_passed = 0; |
@@ -1642,7 +1634,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1642 | int high = IWL_RATE_INVALID; | 1634 | int high = IWL_RATE_INVALID; |
1643 | int index; | 1635 | int index; |
1644 | int i; | 1636 | int i; |
1645 | struct iwl4965_rate_scale_data *window = NULL; | 1637 | struct iwl_rate_scale_data *window = NULL; |
1646 | int current_tpt = IWL_INVALID_VALUE; | 1638 | int current_tpt = IWL_INVALID_VALUE; |
1647 | int low_tpt = IWL_INVALID_VALUE; | 1639 | int low_tpt = IWL_INVALID_VALUE; |
1648 | int high_tpt = IWL_INVALID_VALUE; | 1640 | int high_tpt = IWL_INVALID_VALUE; |
@@ -1651,8 +1643,8 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1651 | __le16 fc; | 1643 | __le16 fc; |
1652 | u16 rate_mask; | 1644 | u16 rate_mask; |
1653 | u8 update_lq = 0; | 1645 | u8 update_lq = 0; |
1654 | struct iwl4965_lq_sta *lq_sta; | 1646 | struct iwl_lq_sta *lq_sta; |
1655 | struct iwl4965_scale_tbl_info *tbl, *tbl1; | 1647 | struct iwl_scale_tbl_info *tbl, *tbl1; |
1656 | u16 rate_scale_index_msk = 0; | 1648 | u16 rate_scale_index_msk = 0; |
1657 | u32 rate; | 1649 | u32 rate; |
1658 | u8 is_green = 0; | 1650 | u8 is_green = 0; |
@@ -1675,7 +1667,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv, | |||
1675 | if (!sta || !sta->rate_ctrl_priv) | 1667 | if (!sta || !sta->rate_ctrl_priv) |
1676 | return; | 1668 | return; |
1677 | 1669 | ||
1678 | lq_sta = (struct iwl4965_lq_sta *)sta->rate_ctrl_priv; | 1670 | lq_sta = (struct iwl_lq_sta *)sta->rate_ctrl_priv; |
1679 | 1671 | ||
1680 | tid = rs_tl_add_packet(lq_sta, hdr); | 1672 | tid = rs_tl_add_packet(lq_sta, hdr); |
1681 | 1673 | ||
@@ -2030,8 +2022,8 @@ static void rs_initialize_lq(struct iwl_priv *priv, | |||
2030 | struct ieee80211_conf *conf, | 2022 | struct ieee80211_conf *conf, |
2031 | struct sta_info *sta) | 2023 | struct sta_info *sta) |
2032 | { | 2024 | { |
2033 | struct iwl4965_lq_sta *lq_sta; | 2025 | struct iwl_lq_sta *lq_sta; |
2034 | struct iwl4965_scale_tbl_info *tbl; | 2026 | struct iwl_scale_tbl_info *tbl; |
2035 | int rate_idx; | 2027 | int rate_idx; |
2036 | int i; | 2028 | int i; |
2037 | u32 rate; | 2029 | u32 rate; |
@@ -2042,7 +2034,7 @@ static void rs_initialize_lq(struct iwl_priv *priv, | |||
2042 | if (!sta || !sta->rate_ctrl_priv) | 2034 | if (!sta || !sta->rate_ctrl_priv) |
2043 | goto out; | 2035 | goto out; |
2044 | 2036 | ||
2045 | lq_sta = (struct iwl4965_lq_sta *)sta->rate_ctrl_priv; | 2037 | lq_sta = (struct iwl_lq_sta *)sta->rate_ctrl_priv; |
2046 | i = sta->last_txrate_idx; | 2038 | i = sta->last_txrate_idx; |
2047 | 2039 | ||
2048 | if ((lq_sta->lq.sta_id == 0xff) && | 2040 | if ((lq_sta->lq.sta_id == 0xff) && |
@@ -2096,7 +2088,7 @@ static void rs_get_rate(void *priv_rate, struct net_device *dev, | |||
2096 | struct sta_info *sta; | 2088 | struct sta_info *sta; |
2097 | __le16 fc; | 2089 | __le16 fc; |
2098 | struct iwl_priv *priv = (struct iwl_priv *)priv_rate; | 2090 | struct iwl_priv *priv = (struct iwl_priv *)priv_rate; |
2099 | struct iwl4965_lq_sta *lq_sta; | 2091 | struct iwl_lq_sta *lq_sta; |
2100 | 2092 | ||
2101 | IWL_DEBUG_RATE_LIMIT("rate scale calculate new rate for skb\n"); | 2093 | IWL_DEBUG_RATE_LIMIT("rate scale calculate new rate for skb\n"); |
2102 | 2094 | ||
@@ -2113,7 +2105,7 @@ static void rs_get_rate(void *priv_rate, struct net_device *dev, | |||
2113 | goto out; | 2105 | goto out; |
2114 | } | 2106 | } |
2115 | 2107 | ||
2116 | lq_sta = (struct iwl4965_lq_sta *)sta->rate_ctrl_priv; | 2108 | lq_sta = (struct iwl_lq_sta *)sta->rate_ctrl_priv; |
2117 | i = sta->last_txrate_idx; | 2109 | i = sta->last_txrate_idx; |
2118 | 2110 | ||
2119 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | 2111 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && |
@@ -2149,14 +2141,14 @@ out: | |||
2149 | 2141 | ||
2150 | static void *rs_alloc_sta(void *priv_rate, gfp_t gfp) | 2142 | static void *rs_alloc_sta(void *priv_rate, gfp_t gfp) |
2151 | { | 2143 | { |
2152 | struct iwl4965_lq_sta *lq_sta; | 2144 | struct iwl_lq_sta *lq_sta; |
2153 | struct iwl_priv *priv; | 2145 | struct iwl_priv *priv; |
2154 | int i, j; | 2146 | int i, j; |
2155 | 2147 | ||
2156 | priv = (struct iwl_priv *)priv_rate; | 2148 | priv = (struct iwl_priv *)priv_rate; |
2157 | IWL_DEBUG_RATE("create station rate scale window\n"); | 2149 | IWL_DEBUG_RATE("create station rate scale window\n"); |
2158 | 2150 | ||
2159 | lq_sta = kzalloc(sizeof(struct iwl4965_lq_sta), gfp); | 2151 | lq_sta = kzalloc(sizeof(struct iwl_lq_sta), gfp); |
2160 | 2152 | ||
2161 | if (lq_sta == NULL) | 2153 | if (lq_sta == NULL) |
2162 | return NULL; | 2154 | return NULL; |
@@ -2165,7 +2157,7 @@ static void *rs_alloc_sta(void *priv_rate, gfp_t gfp) | |||
2165 | 2157 | ||
2166 | for (j = 0; j < LQ_SIZE; j++) | 2158 | for (j = 0; j < LQ_SIZE; j++) |
2167 | for (i = 0; i < IWL_RATE_COUNT; i++) | 2159 | for (i = 0; i < IWL_RATE_COUNT; i++) |
2168 | rs_rate_scale_clear_window(&(lq_sta->lq_info[j].win[i])); | 2160 | rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]); |
2169 | 2161 | ||
2170 | return lq_sta; | 2162 | return lq_sta; |
2171 | } | 2163 | } |
@@ -2178,7 +2170,7 @@ static void rs_rate_init(void *priv_rate, void *priv_sta, | |||
2178 | struct ieee80211_conf *conf = &local->hw.conf; | 2170 | struct ieee80211_conf *conf = &local->hw.conf; |
2179 | struct ieee80211_supported_band *sband; | 2171 | struct ieee80211_supported_band *sband; |
2180 | struct iwl_priv *priv = (struct iwl_priv *)priv_rate; | 2172 | struct iwl_priv *priv = (struct iwl_priv *)priv_rate; |
2181 | struct iwl4965_lq_sta *lq_sta = priv_sta; | 2173 | struct iwl_lq_sta *lq_sta = priv_sta; |
2182 | 2174 | ||
2183 | sband = local->hw.wiphy->bands[local->hw.conf.channel->band]; | 2175 | sband = local->hw.wiphy->bands[local->hw.conf.channel->band]; |
2184 | 2176 | ||
@@ -2187,7 +2179,7 @@ static void rs_rate_init(void *priv_rate, void *priv_sta, | |||
2187 | sta->txrate_idx = 3; | 2179 | sta->txrate_idx = 3; |
2188 | for (j = 0; j < LQ_SIZE; j++) | 2180 | for (j = 0; j < LQ_SIZE; j++) |
2189 | for (i = 0; i < IWL_RATE_COUNT; i++) | 2181 | for (i = 0; i < IWL_RATE_COUNT; i++) |
2190 | rs_rate_scale_clear_window(&(lq_sta->lq_info[j].win[i])); | 2182 | rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]); |
2191 | 2183 | ||
2192 | IWL_DEBUG_RATE("LQ: *** rate scale global init ***\n"); | 2184 | IWL_DEBUG_RATE("LQ: *** rate scale global init ***\n"); |
2193 | /* TODO: what is a good starting rate for STA? About middle? Maybe not | 2185 | /* TODO: what is a good starting rate for STA? About middle? Maybe not |
@@ -2271,10 +2263,9 @@ static void rs_rate_init(void *priv_rate, void *priv_sta, | |||
2271 | } | 2263 | } |
2272 | 2264 | ||
2273 | static void rs_fill_link_cmd(const struct iwl_priv *priv, | 2265 | static void rs_fill_link_cmd(const struct iwl_priv *priv, |
2274 | struct iwl4965_lq_sta *lq_sta, | 2266 | struct iwl_lq_sta *lq_sta, u32 new_rate) |
2275 | u32 new_rate) | ||
2276 | { | 2267 | { |
2277 | struct iwl4965_scale_tbl_info tbl_type; | 2268 | struct iwl_scale_tbl_info tbl_type; |
2278 | int index = 0; | 2269 | int index = 0; |
2279 | int rate_idx; | 2270 | int rate_idx; |
2280 | int repeat_rate = 0; | 2271 | int repeat_rate = 0; |
@@ -2402,6 +2393,7 @@ static void rs_free(void *priv_rate) | |||
2402 | 2393 | ||
2403 | static void rs_clear(void *priv_rate) | 2394 | static void rs_clear(void *priv_rate) |
2404 | { | 2395 | { |
2396 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
2405 | struct iwl_priv *priv = (struct iwl_priv *) priv_rate; | 2397 | struct iwl_priv *priv = (struct iwl_priv *) priv_rate; |
2406 | 2398 | ||
2407 | IWL_DEBUG_RATE("enter\n"); | 2399 | IWL_DEBUG_RATE("enter\n"); |
@@ -2409,11 +2401,12 @@ static void rs_clear(void *priv_rate) | |||
2409 | /* TODO - add rate scale state reset */ | 2401 | /* TODO - add rate scale state reset */ |
2410 | 2402 | ||
2411 | IWL_DEBUG_RATE("leave\n"); | 2403 | IWL_DEBUG_RATE("leave\n"); |
2404 | #endif /* CONFIG_IWLWIFI_DEBUG */ | ||
2412 | } | 2405 | } |
2413 | 2406 | ||
2414 | static void rs_free_sta(void *priv_rate, void *priv_sta) | 2407 | static void rs_free_sta(void *priv_rate, void *priv_sta) |
2415 | { | 2408 | { |
2416 | struct iwl4965_lq_sta *lq_sta = priv_sta; | 2409 | struct iwl_lq_sta *lq_sta = priv_sta; |
2417 | struct iwl_priv *priv; | 2410 | struct iwl_priv *priv; |
2418 | 2411 | ||
2419 | priv = (struct iwl_priv *)priv_rate; | 2412 | priv = (struct iwl_priv *)priv_rate; |
@@ -2429,8 +2422,8 @@ static int open_file_generic(struct inode *inode, struct file *file) | |||
2429 | file->private_data = inode->i_private; | 2422 | file->private_data = inode->i_private; |
2430 | return 0; | 2423 | return 0; |
2431 | } | 2424 | } |
2432 | static void rs_dbgfs_set_mcs(struct iwl4965_lq_sta *lq_sta, | 2425 | static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta, |
2433 | u32 *rate_n_flags, int index) | 2426 | u32 *rate_n_flags, int index) |
2434 | { | 2427 | { |
2435 | struct iwl_priv *priv; | 2428 | struct iwl_priv *priv; |
2436 | 2429 | ||
@@ -2453,7 +2446,7 @@ static void rs_dbgfs_set_mcs(struct iwl4965_lq_sta *lq_sta, | |||
2453 | static ssize_t rs_sta_dbgfs_scale_table_write(struct file *file, | 2446 | static ssize_t rs_sta_dbgfs_scale_table_write(struct file *file, |
2454 | const char __user *user_buf, size_t count, loff_t *ppos) | 2447 | const char __user *user_buf, size_t count, loff_t *ppos) |
2455 | { | 2448 | { |
2456 | struct iwl4965_lq_sta *lq_sta = file->private_data; | 2449 | struct iwl_lq_sta *lq_sta = file->private_data; |
2457 | struct iwl_priv *priv; | 2450 | struct iwl_priv *priv; |
2458 | char buf[64]; | 2451 | char buf[64]; |
2459 | int buf_size; | 2452 | int buf_size; |
@@ -2493,7 +2486,7 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file, | |||
2493 | int desc = 0; | 2486 | int desc = 0; |
2494 | int i = 0; | 2487 | int i = 0; |
2495 | 2488 | ||
2496 | struct iwl4965_lq_sta *lq_sta = file->private_data; | 2489 | struct iwl_lq_sta *lq_sta = file->private_data; |
2497 | 2490 | ||
2498 | desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id); | 2491 | desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id); |
2499 | desc += sprintf(buff+desc, "failed=%d success=%d rate=0%X\n", | 2492 | desc += sprintf(buff+desc, "failed=%d success=%d rate=0%X\n", |
@@ -2541,7 +2534,7 @@ static ssize_t rs_sta_dbgfs_stats_table_read(struct file *file, | |||
2541 | int desc = 0; | 2534 | int desc = 0; |
2542 | int i, j; | 2535 | int i, j; |
2543 | 2536 | ||
2544 | struct iwl4965_lq_sta *lq_sta = file->private_data; | 2537 | struct iwl_lq_sta *lq_sta = file->private_data; |
2545 | for (i = 0; i < LQ_SIZE; i++) { | 2538 | for (i = 0; i < LQ_SIZE; i++) { |
2546 | desc += sprintf(buff+desc, "%s type=%d SGI=%d FAT=%d DUP=%d\n" | 2539 | desc += sprintf(buff+desc, "%s type=%d SGI=%d FAT=%d DUP=%d\n" |
2547 | "rate=0x%X\n", | 2540 | "rate=0x%X\n", |
@@ -2570,7 +2563,7 @@ static const struct file_operations rs_sta_dbgfs_stats_table_ops = { | |||
2570 | static void rs_add_debugfs(void *priv, void *priv_sta, | 2563 | static void rs_add_debugfs(void *priv, void *priv_sta, |
2571 | struct dentry *dir) | 2564 | struct dentry *dir) |
2572 | { | 2565 | { |
2573 | struct iwl4965_lq_sta *lq_sta = priv_sta; | 2566 | struct iwl_lq_sta *lq_sta = priv_sta; |
2574 | lq_sta->rs_sta_dbgfs_scale_table_file = | 2567 | lq_sta->rs_sta_dbgfs_scale_table_file = |
2575 | debugfs_create_file("rate_scale_table", 0600, dir, | 2568 | debugfs_create_file("rate_scale_table", 0600, dir, |
2576 | lq_sta, &rs_sta_dbgfs_scale_table_ops); | 2569 | lq_sta, &rs_sta_dbgfs_scale_table_ops); |
@@ -2585,7 +2578,7 @@ static void rs_add_debugfs(void *priv, void *priv_sta, | |||
2585 | 2578 | ||
2586 | static void rs_remove_debugfs(void *priv, void *priv_sta) | 2579 | static void rs_remove_debugfs(void *priv, void *priv_sta) |
2587 | { | 2580 | { |
2588 | struct iwl4965_lq_sta *lq_sta = priv_sta; | 2581 | struct iwl_lq_sta *lq_sta = priv_sta; |
2589 | debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file); | 2582 | debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file); |
2590 | debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file); | 2583 | debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file); |
2591 | debugfs_remove(lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file); | 2584 | debugfs_remove(lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file); |
@@ -2609,104 +2602,12 @@ static struct rate_control_ops rs_ops = { | |||
2609 | #endif | 2602 | #endif |
2610 | }; | 2603 | }; |
2611 | 2604 | ||
2612 | int iwl4965_fill_rs_info(struct ieee80211_hw *hw, char *buf, u8 sta_id) | 2605 | int iwlagn_rate_control_register(void) |
2613 | { | ||
2614 | struct ieee80211_local *local = hw_to_local(hw); | ||
2615 | struct iwl_priv *priv = hw->priv; | ||
2616 | struct iwl4965_lq_sta *lq_sta; | ||
2617 | struct sta_info *sta; | ||
2618 | int cnt = 0, i; | ||
2619 | u32 samples = 0, success = 0, good = 0; | ||
2620 | unsigned long now = jiffies; | ||
2621 | u32 max_time = 0; | ||
2622 | u8 lq_type, antenna; | ||
2623 | |||
2624 | rcu_read_lock(); | ||
2625 | |||
2626 | sta = sta_info_get(local, priv->stations[sta_id].sta.sta.addr); | ||
2627 | if (!sta || !sta->rate_ctrl_priv) { | ||
2628 | if (sta) | ||
2629 | IWL_DEBUG_RATE("leave - no private rate data!\n"); | ||
2630 | else | ||
2631 | IWL_DEBUG_RATE("leave - no station!\n"); | ||
2632 | rcu_read_unlock(); | ||
2633 | return sprintf(buf, "station %d not found\n", sta_id); | ||
2634 | } | ||
2635 | |||
2636 | lq_sta = (void *)sta->rate_ctrl_priv; | ||
2637 | |||
2638 | lq_type = lq_sta->lq_info[lq_sta->active_tbl].lq_type; | ||
2639 | antenna = lq_sta->lq_info[lq_sta->active_tbl].ant_type; | ||
2640 | |||
2641 | if (is_legacy(lq_type)) | ||
2642 | i = IWL_RATE_54M_INDEX; | ||
2643 | else | ||
2644 | i = IWL_RATE_60M_INDEX; | ||
2645 | while (1) { | ||
2646 | u64 mask; | ||
2647 | int j; | ||
2648 | int active = lq_sta->active_tbl; | ||
2649 | |||
2650 | cnt += | ||
2651 | sprintf(&buf[cnt], " %2dMbs: ", iwl_rates[i].ieee / 2); | ||
2652 | |||
2653 | mask = (1ULL << (IWL_RATE_MAX_WINDOW - 1)); | ||
2654 | for (j = 0; j < IWL_RATE_MAX_WINDOW; j++, mask >>= 1) | ||
2655 | buf[cnt++] = | ||
2656 | (lq_sta->lq_info[active].win[i].data & mask) | ||
2657 | ? '1' : '0'; | ||
2658 | |||
2659 | samples += lq_sta->lq_info[active].win[i].counter; | ||
2660 | good += lq_sta->lq_info[active].win[i].success_counter; | ||
2661 | success += lq_sta->lq_info[active].win[i].success_counter * | ||
2662 | iwl_rates[i].ieee; | ||
2663 | |||
2664 | if (lq_sta->lq_info[active].win[i].stamp) { | ||
2665 | int delta = | ||
2666 | jiffies_to_msecs(now - | ||
2667 | lq_sta->lq_info[active].win[i].stamp); | ||
2668 | |||
2669 | if (delta > max_time) | ||
2670 | max_time = delta; | ||
2671 | |||
2672 | cnt += sprintf(&buf[cnt], "%5dms\n", delta); | ||
2673 | } else | ||
2674 | buf[cnt++] = '\n'; | ||
2675 | |||
2676 | j = iwl4965_get_prev_ieee_rate(i); | ||
2677 | if (j == i) | ||
2678 | break; | ||
2679 | i = j; | ||
2680 | } | ||
2681 | |||
2682 | /* | ||
2683 | * Display the average rate of all samples taken. | ||
2684 | * NOTE: We multiply # of samples by 2 since the IEEE measurement | ||
2685 | * added from iwl_rates is actually 2X the rate. | ||
2686 | */ | ||
2687 | if (samples) | ||
2688 | cnt += sprintf(&buf[cnt], | ||
2689 | "\nAverage rate is %3d.%02dMbs over last %4dms\n" | ||
2690 | "%3d%% success (%d good packets over %d tries)\n", | ||
2691 | success / (2 * samples), (success * 5 / samples) % 10, | ||
2692 | max_time, good * 100 / samples, good, samples); | ||
2693 | else | ||
2694 | cnt += sprintf(&buf[cnt], "\nAverage rate: 0Mbs\n"); | ||
2695 | |||
2696 | cnt += sprintf(&buf[cnt], "\nrate scale type %d antenna %d " | ||
2697 | "active_search %d rate index %d\n", lq_type, antenna, | ||
2698 | lq_sta->search_better_tbl, sta->last_txrate_idx); | ||
2699 | |||
2700 | rcu_read_unlock(); | ||
2701 | return cnt; | ||
2702 | } | ||
2703 | |||
2704 | int iwl4965_rate_control_register(void) | ||
2705 | { | 2606 | { |
2706 | return ieee80211_rate_control_register(&rs_ops); | 2607 | return ieee80211_rate_control_register(&rs_ops); |
2707 | } | 2608 | } |
2708 | 2609 | ||
2709 | void iwl4965_rate_control_unregister(void) | 2610 | void iwlagn_rate_control_unregister(void) |
2710 | { | 2611 | { |
2711 | ieee80211_rate_control_unregister(&rs_ops); | 2612 | ieee80211_rate_control_unregister(&rs_ops); |
2712 | } | 2613 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h index 9b9972885aa5..84d4d1e33755 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965-rs.h +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h | |||
@@ -24,8 +24,8 @@ | |||
24 | * | 24 | * |
25 | *****************************************************************************/ | 25 | *****************************************************************************/ |
26 | 26 | ||
27 | #ifndef __iwl_4965_rs_h__ | 27 | #ifndef __iwl_agn_rs_h__ |
28 | #define __iwl_4965_rs_h__ | 28 | #define __iwl_agn_rs_h__ |
29 | 29 | ||
30 | #include "iwl-dev.h" | 30 | #include "iwl-dev.h" |
31 | 31 | ||
@@ -88,7 +88,7 @@ enum { | |||
88 | #define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX) | 88 | #define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX) |
89 | #define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX) | 89 | #define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX) |
90 | 90 | ||
91 | /* 4965 uCode API values for legacy bit rates, both OFDM and CCK */ | 91 | /* uCode API values for legacy bit rates, both OFDM and CCK */ |
92 | enum { | 92 | enum { |
93 | IWL_RATE_6M_PLCP = 13, | 93 | IWL_RATE_6M_PLCP = 13, |
94 | IWL_RATE_9M_PLCP = 15, | 94 | IWL_RATE_9M_PLCP = 15, |
@@ -107,7 +107,7 @@ enum { | |||
107 | /*FIXME:RS:add IWL_RATE_LEGACY_INVM_PLCP = 0,*/ | 107 | /*FIXME:RS:add IWL_RATE_LEGACY_INVM_PLCP = 0,*/ |
108 | }; | 108 | }; |
109 | 109 | ||
110 | /* 4965 uCode API values for OFDM high-throughput (HT) bit rates */ | 110 | /* uCode API values for OFDM high-throughput (HT) bit rates */ |
111 | enum { | 111 | enum { |
112 | IWL_RATE_SISO_6M_PLCP = 0, | 112 | IWL_RATE_SISO_6M_PLCP = 0, |
113 | IWL_RATE_SISO_12M_PLCP = 1, | 113 | IWL_RATE_SISO_12M_PLCP = 1, |
@@ -287,15 +287,6 @@ static inline u8 iwl4965_get_prev_ieee_rate(u8 rate_index) | |||
287 | } | 287 | } |
288 | 288 | ||
289 | /** | 289 | /** |
290 | * iwl4965_fill_rs_info - Fill an output text buffer with the rate representation | ||
291 | * | ||
292 | * NOTE: This is provided as a quick mechanism for a user to visualize | ||
293 | * the performance of the rate control algorithm and is not meant to be | ||
294 | * parsed software. | ||
295 | */ | ||
296 | extern int iwl4965_fill_rs_info(struct ieee80211_hw *, char *buf, u8 sta_id); | ||
297 | |||
298 | /** | ||
299 | * iwl4965_rate_control_register - Register the rate control algorithm callbacks | 290 | * iwl4965_rate_control_register - Register the rate control algorithm callbacks |
300 | * | 291 | * |
301 | * Since the rate control algorithm is hardware specific, there is no need | 292 | * Since the rate control algorithm is hardware specific, there is no need |
@@ -305,7 +296,7 @@ extern int iwl4965_fill_rs_info(struct ieee80211_hw *, char *buf, u8 sta_id); | |||
305 | * ieee80211_register_hw | 296 | * ieee80211_register_hw |
306 | * | 297 | * |
307 | */ | 298 | */ |
308 | extern int iwl4965_rate_control_register(void); | 299 | extern int iwlagn_rate_control_register(void); |
309 | 300 | ||
310 | /** | 301 | /** |
311 | * iwl4965_rate_control_unregister - Unregister the rate control callbacks | 302 | * iwl4965_rate_control_unregister - Unregister the rate control callbacks |
@@ -313,6 +304,6 @@ extern int iwl4965_rate_control_register(void); | |||
313 | * This should be called after calling ieee80211_unregister_hw, but before | 304 | * This should be called after calling ieee80211_unregister_hw, but before |
314 | * the driver is unloaded. | 305 | * the driver is unloaded. |
315 | */ | 306 | */ |
316 | extern void iwl4965_rate_control_unregister(void); | 307 | extern void iwlagn_rate_control_unregister(void); |
317 | 308 | ||
318 | #endif | 309 | #endif /* __iwl_agn__rs__ */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 71f5da3fe5c4..b8407d5704a1 100644 --- a/drivers/net/wireless/iwlwifi/iwl4965-base.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -65,7 +65,7 @@ | |||
65 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | 65 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk |
66 | */ | 66 | */ |
67 | 67 | ||
68 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | 68 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" |
69 | 69 | ||
70 | #ifdef CONFIG_IWLWIFI_DEBUG | 70 | #ifdef CONFIG_IWLWIFI_DEBUG |
71 | #define VD "d" | 71 | #define VD "d" |
@@ -73,7 +73,7 @@ | |||
73 | #define VD | 73 | #define VD |
74 | #endif | 74 | #endif |
75 | 75 | ||
76 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 76 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
77 | #define VS "s" | 77 | #define VS "s" |
78 | #else | 78 | #else |
79 | #define VS | 79 | #define VS |
@@ -86,6 +86,7 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION); | |||
86 | MODULE_VERSION(DRV_VERSION); | 86 | MODULE_VERSION(DRV_VERSION); |
87 | MODULE_AUTHOR(DRV_COPYRIGHT); | 87 | MODULE_AUTHOR(DRV_COPYRIGHT); |
88 | MODULE_LICENSE("GPL"); | 88 | MODULE_LICENSE("GPL"); |
89 | MODULE_ALIAS("iwl4965"); | ||
89 | 90 | ||
90 | /*************** STATION TABLE MANAGEMENT **** | 91 | /*************** STATION TABLE MANAGEMENT **** |
91 | * mac80211 should be examined to determine if sta_info is duplicating | 92 | * mac80211 should be examined to determine if sta_info is duplicating |
@@ -444,11 +445,10 @@ static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame) | |||
444 | list_add(&frame->list, &priv->free_frames); | 445 | list_add(&frame->list, &priv->free_frames); |
445 | } | 446 | } |
446 | 447 | ||
447 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, | 448 | static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, |
448 | struct ieee80211_hdr *hdr, | 449 | struct ieee80211_hdr *hdr, |
449 | const u8 *dest, int left) | 450 | const u8 *dest, int left) |
450 | { | 451 | { |
451 | |||
452 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || | 452 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
453 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && | 453 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
454 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | 454 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) |
@@ -487,6 +487,38 @@ static u8 iwl4965_rate_get_lowest_plcp(struct iwl_priv *priv) | |||
487 | return IWL_RATE_6M_PLCP; | 487 | return IWL_RATE_6M_PLCP; |
488 | } | 488 | } |
489 | 489 | ||
490 | unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, | ||
491 | struct iwl_frame *frame, u8 rate) | ||
492 | { | ||
493 | struct iwl_tx_beacon_cmd *tx_beacon_cmd; | ||
494 | unsigned int frame_size; | ||
495 | |||
496 | tx_beacon_cmd = &frame->u.beacon; | ||
497 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | ||
498 | |||
499 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; | ||
500 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | ||
501 | |||
502 | frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, | ||
503 | iwl_bcast_addr, | ||
504 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | ||
505 | |||
506 | BUG_ON(frame_size > MAX_MPDU_SIZE); | ||
507 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | ||
508 | |||
509 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) | ||
510 | tx_beacon_cmd->tx.rate_n_flags = | ||
511 | iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); | ||
512 | else | ||
513 | tx_beacon_cmd->tx.rate_n_flags = | ||
514 | iwl_hw_set_rate_n_flags(rate, 0); | ||
515 | |||
516 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | ||
517 | TX_CMD_FLG_TSF_MSK | | ||
518 | TX_CMD_FLG_STA_RATE_MSK; | ||
519 | |||
520 | return sizeof(*tx_beacon_cmd) + frame_size; | ||
521 | } | ||
490 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) | 522 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
491 | { | 523 | { |
492 | struct iwl_frame *frame; | 524 | struct iwl_frame *frame; |
@@ -608,7 +640,6 @@ static void iwl_activate_qos(struct iwl_priv *priv, u8 force) | |||
608 | } | 640 | } |
609 | 641 | ||
610 | #define MAX_UCODE_BEACON_INTERVAL 4096 | 642 | #define MAX_UCODE_BEACON_INTERVAL 4096 |
611 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | ||
612 | 643 | ||
613 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) | 644 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
614 | { | 645 | { |
@@ -638,7 +669,7 @@ static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) | |||
638 | priv->rxon_timing.timestamp.dw[0] = | 669 | priv->rxon_timing.timestamp.dw[0] = |
639 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | 670 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); |
640 | 671 | ||
641 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | 672 | priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval); |
642 | 673 | ||
643 | tsf = priv->timestamp; | 674 | tsf = priv->timestamp; |
644 | 675 | ||
@@ -853,7 +884,7 @@ static void iwl4965_set_rate(struct iwl_priv *priv) | |||
853 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | 884 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; |
854 | } | 885 | } |
855 | 886 | ||
856 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 887 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
857 | 888 | ||
858 | #include "iwl-spectrum.h" | 889 | #include "iwl-spectrum.h" |
859 | 890 | ||
@@ -1057,7 +1088,7 @@ static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1057 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, | 1088 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
1058 | struct iwl_rx_mem_buffer *rxb) | 1089 | struct iwl_rx_mem_buffer *rxb) |
1059 | { | 1090 | { |
1060 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 1091 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
1061 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | 1092 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
1062 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); | 1093 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); |
1063 | 1094 | ||
@@ -1231,6 +1262,37 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, | |||
1231 | wake_up_interruptible(&priv->wait_command_queue); | 1262 | wake_up_interruptible(&priv->wait_command_queue); |
1232 | } | 1263 | } |
1233 | 1264 | ||
1265 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) | ||
1266 | { | ||
1267 | int ret; | ||
1268 | unsigned long flags; | ||
1269 | |||
1270 | spin_lock_irqsave(&priv->lock, flags); | ||
1271 | ret = iwl_grab_nic_access(priv); | ||
1272 | if (ret) | ||
1273 | goto err; | ||
1274 | |||
1275 | if (src == IWL_PWR_SRC_VAUX) { | ||
1276 | u32 val; | ||
1277 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, | ||
1278 | &val); | ||
1279 | |||
1280 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) | ||
1281 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
1282 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, | ||
1283 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
1284 | } else { | ||
1285 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
1286 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | ||
1287 | ~APMG_PS_CTRL_MSK_PWR_SRC); | ||
1288 | } | ||
1289 | |||
1290 | iwl_release_nic_access(priv); | ||
1291 | err: | ||
1292 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1293 | return ret; | ||
1294 | } | ||
1295 | |||
1234 | /** | 1296 | /** |
1235 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks | 1297 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
1236 | * | 1298 | * |
@@ -2170,17 +2232,16 @@ static int __iwl4965_up(struct iwl_priv *priv) | |||
2170 | } | 2232 | } |
2171 | 2233 | ||
2172 | /* If platform's RF_KILL switch is NOT set to KILL */ | 2234 | /* If platform's RF_KILL switch is NOT set to KILL */ |
2173 | if (iwl_read32(priv, CSR_GP_CNTRL) & | 2235 | if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
2174 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
2175 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | 2236 | clear_bit(STATUS_RF_KILL_HW, &priv->status); |
2176 | else | 2237 | else |
2177 | set_bit(STATUS_RF_KILL_HW, &priv->status); | 2238 | set_bit(STATUS_RF_KILL_HW, &priv->status); |
2178 | 2239 | ||
2179 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status) && | 2240 | if (iwl_is_rfkill(priv)) { |
2180 | iwl_is_rfkill(priv)) { | 2241 | iwl4965_enable_interrupts(priv); |
2181 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", | 2242 | IWL_WARNING("Radio disabled by %s RF Kill switch\n", |
2182 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); | 2243 | test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW"); |
2183 | return -ENODEV; | 2244 | return 0; |
2184 | } | 2245 | } |
2185 | 2246 | ||
2186 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); | 2247 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
@@ -2216,11 +2277,6 @@ static int __iwl4965_up(struct iwl_priv *priv) | |||
2216 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | 2277 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, |
2217 | priv->ucode_data.len); | 2278 | priv->ucode_data.len); |
2218 | 2279 | ||
2219 | /* We return success when we resume from suspend and rf_kill is on. */ | ||
2220 | if (test_bit(STATUS_RF_KILL_HW, &priv->status) || | ||
2221 | test_bit(STATUS_RF_KILL_SW, &priv->status)) | ||
2222 | return 0; | ||
2223 | |||
2224 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | 2280 | for (i = 0; i < MAX_HW_RESTARTS; i++) { |
2225 | 2281 | ||
2226 | iwl_clear_stations_table(priv); | 2282 | iwl_clear_stations_table(priv); |
@@ -2415,7 +2471,7 @@ static void iwl4965_post_associate(struct iwl_priv *priv) | |||
2415 | unsigned long flags; | 2471 | unsigned long flags; |
2416 | 2472 | ||
2417 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | 2473 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { |
2418 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | 2474 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
2419 | return; | 2475 | return; |
2420 | } | 2476 | } |
2421 | 2477 | ||
@@ -2491,7 +2547,7 @@ static void iwl4965_post_associate(struct iwl_priv *priv) | |||
2491 | 2547 | ||
2492 | default: | 2548 | default: |
2493 | IWL_ERROR("%s Should not be called in %d mode\n", | 2549 | IWL_ERROR("%s Should not be called in %d mode\n", |
2494 | __FUNCTION__, priv->iw_mode); | 2550 | __func__, priv->iw_mode); |
2495 | break; | 2551 | break; |
2496 | } | 2552 | } |
2497 | 2553 | ||
@@ -2589,6 +2645,9 @@ static int iwl4965_mac_start(struct ieee80211_hw *hw) | |||
2589 | if (ret) | 2645 | if (ret) |
2590 | goto out_release_irq; | 2646 | goto out_release_irq; |
2591 | 2647 | ||
2648 | if (iwl_is_rfkill(priv)) | ||
2649 | goto out; | ||
2650 | |||
2592 | IWL_DEBUG_INFO("Start UP work done.\n"); | 2651 | IWL_DEBUG_INFO("Start UP work done.\n"); |
2593 | 2652 | ||
2594 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | 2653 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) |
@@ -2608,6 +2667,7 @@ static int iwl4965_mac_start(struct ieee80211_hw *hw) | |||
2608 | } | 2667 | } |
2609 | } | 2668 | } |
2610 | 2669 | ||
2670 | out: | ||
2611 | priv->is_open = 1; | 2671 | priv->is_open = 1; |
2612 | IWL_DEBUG_MAC80211("leave\n"); | 2672 | IWL_DEBUG_MAC80211("leave\n"); |
2613 | return 0; | 2673 | return 0; |
@@ -2773,6 +2833,7 @@ static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *co | |||
2773 | 2833 | ||
2774 | spin_lock_irqsave(&priv->lock, flags); | 2834 | spin_lock_irqsave(&priv->lock, flags); |
2775 | 2835 | ||
2836 | |||
2776 | /* if we are switching from ht to 2.4 clear flags | 2837 | /* if we are switching from ht to 2.4 clear flags |
2777 | * from any ht related info since 2.4 does not | 2838 | * from any ht related info since 2.4 does not |
2778 | * support ht */ | 2839 | * support ht */ |
@@ -3102,6 +3163,7 @@ static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, | |||
3102 | if (bss_conf->assoc) { | 3163 | if (bss_conf->assoc) { |
3103 | priv->assoc_id = bss_conf->aid; | 3164 | priv->assoc_id = bss_conf->aid; |
3104 | priv->beacon_int = bss_conf->beacon_int; | 3165 | priv->beacon_int = bss_conf->beacon_int; |
3166 | priv->power_data.dtim_period = bss_conf->dtim_period; | ||
3105 | priv->timestamp = bss_conf->timestamp; | 3167 | priv->timestamp = bss_conf->timestamp; |
3106 | priv->assoc_capability = bss_conf->assoc_capability; | 3168 | priv->assoc_capability = bss_conf->assoc_capability; |
3107 | priv->next_scan_jiffies = jiffies + | 3169 | priv->next_scan_jiffies = jiffies + |
@@ -3345,6 +3407,39 @@ static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, u16 queue, | |||
3345 | return 0; | 3407 | return 0; |
3346 | } | 3408 | } |
3347 | 3409 | ||
3410 | static int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, | ||
3411 | enum ieee80211_ampdu_mlme_action action, | ||
3412 | const u8 *addr, u16 tid, u16 *ssn) | ||
3413 | { | ||
3414 | struct iwl_priv *priv = hw->priv; | ||
3415 | DECLARE_MAC_BUF(mac); | ||
3416 | |||
3417 | IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n", | ||
3418 | print_mac(mac, addr), tid); | ||
3419 | |||
3420 | if (!(priv->cfg->sku & IWL_SKU_N)) | ||
3421 | return -EACCES; | ||
3422 | |||
3423 | switch (action) { | ||
3424 | case IEEE80211_AMPDU_RX_START: | ||
3425 | IWL_DEBUG_HT("start Rx\n"); | ||
3426 | return iwl_rx_agg_start(priv, addr, tid, *ssn); | ||
3427 | case IEEE80211_AMPDU_RX_STOP: | ||
3428 | IWL_DEBUG_HT("stop Rx\n"); | ||
3429 | return iwl_rx_agg_stop(priv, addr, tid); | ||
3430 | case IEEE80211_AMPDU_TX_START: | ||
3431 | IWL_DEBUG_HT("start Tx\n"); | ||
3432 | return iwl_tx_agg_start(priv, addr, tid, ssn); | ||
3433 | case IEEE80211_AMPDU_TX_STOP: | ||
3434 | IWL_DEBUG_HT("stop Tx\n"); | ||
3435 | return iwl_tx_agg_stop(priv, addr, tid); | ||
3436 | default: | ||
3437 | IWL_DEBUG_HT("unknown\n"); | ||
3438 | return -EINVAL; | ||
3439 | break; | ||
3440 | } | ||
3441 | return 0; | ||
3442 | } | ||
3348 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, | 3443 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
3349 | struct ieee80211_tx_queue_stats *stats) | 3444 | struct ieee80211_tx_queue_stats *stats) |
3350 | { | 3445 | { |
@@ -3592,15 +3687,6 @@ static ssize_t show_temperature(struct device *d, | |||
3592 | 3687 | ||
3593 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | 3688 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); |
3594 | 3689 | ||
3595 | static ssize_t show_rs_window(struct device *d, | ||
3596 | struct device_attribute *attr, | ||
3597 | char *buf) | ||
3598 | { | ||
3599 | struct iwl_priv *priv = d->driver_data; | ||
3600 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); | ||
3601 | } | ||
3602 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | ||
3603 | |||
3604 | static ssize_t show_tx_power(struct device *d, | 3690 | static ssize_t show_tx_power(struct device *d, |
3605 | struct device_attribute *attr, char *buf) | 3691 | struct device_attribute *attr, char *buf) |
3606 | { | 3692 | { |
@@ -3699,7 +3785,7 @@ static ssize_t store_filter_flags(struct device *d, | |||
3699 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | 3785 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, |
3700 | store_filter_flags); | 3786 | store_filter_flags); |
3701 | 3787 | ||
3702 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 3788 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
3703 | 3789 | ||
3704 | static ssize_t show_measurement(struct device *d, | 3790 | static ssize_t show_measurement(struct device *d, |
3705 | struct device_attribute *attr, char *buf) | 3791 | struct device_attribute *attr, char *buf) |
@@ -3707,7 +3793,7 @@ static ssize_t show_measurement(struct device *d, | |||
3707 | struct iwl_priv *priv = dev_get_drvdata(d); | 3793 | struct iwl_priv *priv = dev_get_drvdata(d); |
3708 | struct iwl4965_spectrum_notification measure_report; | 3794 | struct iwl4965_spectrum_notification measure_report; |
3709 | u32 size = sizeof(measure_report), len = 0, ofs = 0; | 3795 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3710 | u8 *data = (u8 *) & measure_report; | 3796 | u8 *data = (u8 *)&measure_report; |
3711 | unsigned long flags; | 3797 | unsigned long flags; |
3712 | 3798 | ||
3713 | spin_lock_irqsave(&priv->lock, flags); | 3799 | spin_lock_irqsave(&priv->lock, flags); |
@@ -3770,7 +3856,7 @@ static ssize_t store_measurement(struct device *d, | |||
3770 | 3856 | ||
3771 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | 3857 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, |
3772 | show_measurement, store_measurement); | 3858 | show_measurement, store_measurement); |
3773 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ | 3859 | #endif /* CONFIG_IWLAGN_SPECTRUM_MEASUREMENT */ |
3774 | 3860 | ||
3775 | static ssize_t store_retry_rate(struct device *d, | 3861 | static ssize_t store_retry_rate(struct device *d, |
3776 | struct device_attribute *attr, | 3862 | struct device_attribute *attr, |
@@ -3800,77 +3886,54 @@ static ssize_t store_power_level(struct device *d, | |||
3800 | const char *buf, size_t count) | 3886 | const char *buf, size_t count) |
3801 | { | 3887 | { |
3802 | struct iwl_priv *priv = dev_get_drvdata(d); | 3888 | struct iwl_priv *priv = dev_get_drvdata(d); |
3803 | int rc; | 3889 | int ret; |
3804 | int mode; | 3890 | int mode; |
3805 | 3891 | ||
3806 | mode = simple_strtoul(buf, NULL, 0); | 3892 | mode = simple_strtoul(buf, NULL, 0); |
3807 | mutex_lock(&priv->mutex); | 3893 | mutex_lock(&priv->mutex); |
3808 | 3894 | ||
3809 | if (!iwl_is_ready(priv)) { | 3895 | if (!iwl_is_ready(priv)) { |
3810 | rc = -EAGAIN; | 3896 | ret = -EAGAIN; |
3811 | goto out; | 3897 | goto out; |
3812 | } | 3898 | } |
3813 | 3899 | ||
3814 | rc = iwl_power_set_user_mode(priv, mode); | 3900 | ret = iwl_power_set_user_mode(priv, mode); |
3815 | if (rc) { | 3901 | if (ret) { |
3816 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | 3902 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); |
3817 | goto out; | 3903 | goto out; |
3818 | } | 3904 | } |
3819 | rc = count; | 3905 | ret = count; |
3820 | 3906 | ||
3821 | out: | 3907 | out: |
3822 | mutex_unlock(&priv->mutex); | 3908 | mutex_unlock(&priv->mutex); |
3823 | return rc; | 3909 | return ret; |
3824 | } | 3910 | } |
3825 | 3911 | ||
3826 | #define MAX_WX_STRING 80 | ||
3827 | |||
3828 | /* Values are in microsecond */ | ||
3829 | static const s32 timeout_duration[] = { | ||
3830 | 350000, | ||
3831 | 250000, | ||
3832 | 75000, | ||
3833 | 37000, | ||
3834 | 25000, | ||
3835 | }; | ||
3836 | static const s32 period_duration[] = { | ||
3837 | 400000, | ||
3838 | 700000, | ||
3839 | 1000000, | ||
3840 | 1000000, | ||
3841 | 1000000 | ||
3842 | }; | ||
3843 | |||
3844 | static ssize_t show_power_level(struct device *d, | 3912 | static ssize_t show_power_level(struct device *d, |
3845 | struct device_attribute *attr, char *buf) | 3913 | struct device_attribute *attr, char *buf) |
3846 | { | 3914 | { |
3847 | struct iwl_priv *priv = dev_get_drvdata(d); | 3915 | struct iwl_priv *priv = dev_get_drvdata(d); |
3916 | int mode = priv->power_data.user_power_setting; | ||
3917 | int system = priv->power_data.system_power_setting; | ||
3848 | int level = priv->power_data.power_mode; | 3918 | int level = priv->power_data.power_mode; |
3849 | char *p = buf; | 3919 | char *p = buf; |
3850 | 3920 | ||
3851 | p += sprintf(p, "%d ", level); | 3921 | switch (system) { |
3852 | switch (level) { | 3922 | case IWL_POWER_SYS_AUTO: |
3853 | case IWL_POWER_MODE_CAM: | 3923 | p += sprintf(p, "SYSTEM:auto"); |
3854 | case IWL_POWER_AC: | ||
3855 | p += sprintf(p, "(AC)"); | ||
3856 | break; | 3924 | break; |
3857 | case IWL_POWER_BATTERY: | 3925 | case IWL_POWER_SYS_AC: |
3858 | p += sprintf(p, "(BATTERY)"); | 3926 | p += sprintf(p, "SYSTEM:ac"); |
3927 | break; | ||
3928 | case IWL_POWER_SYS_BATTERY: | ||
3929 | p += sprintf(p, "SYSTEM:battery"); | ||
3859 | break; | 3930 | break; |
3860 | default: | ||
3861 | p += sprintf(p, | ||
3862 | "(Timeout %dms, Period %dms)", | ||
3863 | timeout_duration[level - 1] / 1000, | ||
3864 | period_duration[level - 1] / 1000); | ||
3865 | } | 3931 | } |
3866 | /* | 3932 | |
3867 | if (!(priv->power_mode & IWL_POWER_ENABLED)) | 3933 | p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO)?"fixed":"auto"); |
3868 | p += sprintf(p, " OFF\n"); | 3934 | p += sprintf(p, "\tINDEX:%d", level); |
3869 | else | 3935 | p += sprintf(p, "\n"); |
3870 | p += sprintf(p, " \n"); | 3936 | return p - buf + 1; |
3871 | */ | ||
3872 | p += sprintf(p, " \n"); | ||
3873 | return (p - buf + 1); | ||
3874 | } | 3937 | } |
3875 | 3938 | ||
3876 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | 3939 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, |
@@ -3945,7 +4008,7 @@ static ssize_t show_statistics(struct device *d, | |||
3945 | struct iwl_priv *priv = dev_get_drvdata(d); | 4008 | struct iwl_priv *priv = dev_get_drvdata(d); |
3946 | u32 size = sizeof(struct iwl_notif_statistics); | 4009 | u32 size = sizeof(struct iwl_notif_statistics); |
3947 | u32 len = 0, ofs = 0; | 4010 | u32 len = 0, ofs = 0; |
3948 | u8 *data = (u8 *) & priv->statistics; | 4011 | u8 *data = (u8 *)&priv->statistics; |
3949 | int rc = 0; | 4012 | int rc = 0; |
3950 | 4013 | ||
3951 | if (!iwl_is_alive(priv)) | 4014 | if (!iwl_is_alive(priv)) |
@@ -4041,12 +4104,11 @@ static struct attribute *iwl4965_sysfs_entries[] = { | |||
4041 | &dev_attr_channels.attr, | 4104 | &dev_attr_channels.attr, |
4042 | &dev_attr_flags.attr, | 4105 | &dev_attr_flags.attr, |
4043 | &dev_attr_filter_flags.attr, | 4106 | &dev_attr_filter_flags.attr, |
4044 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 4107 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
4045 | &dev_attr_measurement.attr, | 4108 | &dev_attr_measurement.attr, |
4046 | #endif | 4109 | #endif |
4047 | &dev_attr_power_level.attr, | 4110 | &dev_attr_power_level.attr, |
4048 | &dev_attr_retry_rate.attr, | 4111 | &dev_attr_retry_rate.attr, |
4049 | &dev_attr_rs_window.attr, | ||
4050 | &dev_attr_statistics.attr, | 4112 | &dev_attr_statistics.attr, |
4051 | &dev_attr_status.attr, | 4113 | &dev_attr_status.attr, |
4052 | &dev_attr_temperature.attr, | 4114 | &dev_attr_temperature.attr, |
@@ -4394,8 +4456,10 @@ static int iwl4965_pci_resume(struct pci_dev *pdev) | |||
4394 | 4456 | ||
4395 | /* Hardware specific file defines the PCI IDs table for that hardware module */ | 4457 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
4396 | static struct pci_device_id iwl_hw_card_ids[] = { | 4458 | static struct pci_device_id iwl_hw_card_ids[] = { |
4459 | #ifdef CONFIG_IWL4965 | ||
4397 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | 4460 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4398 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | 4461 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, |
4462 | #endif /* CONFIG_IWL4965 */ | ||
4399 | #ifdef CONFIG_IWL5000 | 4463 | #ifdef CONFIG_IWL5000 |
4400 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, | 4464 | {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, |
4401 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, | 4465 | {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, |
@@ -4431,7 +4495,7 @@ static int __init iwl4965_init(void) | |||
4431 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | 4495 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); |
4432 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | 4496 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); |
4433 | 4497 | ||
4434 | ret = iwl4965_rate_control_register(); | 4498 | ret = iwlagn_rate_control_register(); |
4435 | if (ret) { | 4499 | if (ret) { |
4436 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | 4500 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); |
4437 | return ret; | 4501 | return ret; |
@@ -4446,14 +4510,14 @@ static int __init iwl4965_init(void) | |||
4446 | return ret; | 4510 | return ret; |
4447 | 4511 | ||
4448 | error_register: | 4512 | error_register: |
4449 | iwl4965_rate_control_unregister(); | 4513 | iwlagn_rate_control_unregister(); |
4450 | return ret; | 4514 | return ret; |
4451 | } | 4515 | } |
4452 | 4516 | ||
4453 | static void __exit iwl4965_exit(void) | 4517 | static void __exit iwl4965_exit(void) |
4454 | { | 4518 | { |
4455 | pci_unregister_driver(&iwl_driver); | 4519 | pci_unregister_driver(&iwl_driver); |
4456 | iwl4965_rate_control_unregister(); | 4520 | iwlagn_rate_control_unregister(); |
4457 | } | 4521 | } |
4458 | 4522 | ||
4459 | module_exit(iwl4965_exit); | 4523 | module_exit(iwl4965_exit); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h index e9bb1de0ce3f..28b5b09996ed 100644 --- a/drivers/net/wireless/iwlwifi/iwl-commands.h +++ b/drivers/net/wireless/iwlwifi/iwl-commands.h | |||
@@ -666,8 +666,7 @@ struct iwl4965_rxon_assoc_cmd { | |||
666 | __le16 reserved; | 666 | __le16 reserved; |
667 | } __attribute__ ((packed)); | 667 | } __attribute__ ((packed)); |
668 | 668 | ||
669 | 669 | #define IWL_CONN_MAX_LISTEN_INTERVAL 10 | |
670 | |||
671 | 670 | ||
672 | /* | 671 | /* |
673 | * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) | 672 | * REPLY_RXON_TIMING = 0x14 (command, has simple generic response) |
@@ -1076,10 +1075,12 @@ struct iwl4965_rx_frame { | |||
1076 | } __attribute__ ((packed)); | 1075 | } __attribute__ ((packed)); |
1077 | 1076 | ||
1078 | /* Fixed (non-configurable) rx data from phy */ | 1077 | /* Fixed (non-configurable) rx data from phy */ |
1079 | #define RX_PHY_FLAGS_ANTENNAE_OFFSET (4) | 1078 | |
1080 | #define RX_PHY_FLAGS_ANTENNAE_MASK (0x70) | 1079 | #define IWL49_RX_RES_PHY_CNT 14 |
1081 | #define IWL_AGC_DB_MASK (0x3f80) /* MASK(7,13) */ | 1080 | #define IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET (4) |
1082 | #define IWL_AGC_DB_POS (7) | 1081 | #define IWL49_RX_PHY_FLAGS_ANTENNAE_MASK (0x70) |
1082 | #define IWL49_AGC_DB_MASK (0x3f80) /* MASK(7,13) */ | ||
1083 | #define IWL49_AGC_DB_POS (7) | ||
1083 | struct iwl4965_rx_non_cfg_phy { | 1084 | struct iwl4965_rx_non_cfg_phy { |
1084 | __le16 ant_selection; /* ant A bit 4, ant B bit 5, ant C bit 6 */ | 1085 | __le16 ant_selection; /* ant A bit 4, ant B bit 5, ant C bit 6 */ |
1085 | __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */ | 1086 | __le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */ |
@@ -1087,12 +1088,30 @@ struct iwl4965_rx_non_cfg_phy { | |||
1087 | u8 pad[0]; | 1088 | u8 pad[0]; |
1088 | } __attribute__ ((packed)); | 1089 | } __attribute__ ((packed)); |
1089 | 1090 | ||
1091 | |||
1092 | #define IWL50_RX_RES_PHY_CNT 8 | ||
1093 | #define IWL50_RX_RES_AGC_IDX 1 | ||
1094 | #define IWL50_RX_RES_RSSI_AB_IDX 2 | ||
1095 | #define IWL50_RX_RES_RSSI_C_IDX 3 | ||
1096 | #define IWL50_OFDM_AGC_MSK 0xfe00 | ||
1097 | #define IWL50_OFDM_AGC_BIT_POS 9 | ||
1098 | #define IWL50_OFDM_RSSI_A_MSK 0x00ff | ||
1099 | #define IWL50_OFDM_RSSI_A_BIT_POS 0 | ||
1100 | #define IWL50_OFDM_RSSI_B_MSK 0xff0000 | ||
1101 | #define IWL50_OFDM_RSSI_B_BIT_POS 16 | ||
1102 | #define IWL50_OFDM_RSSI_C_MSK 0x00ff | ||
1103 | #define IWL50_OFDM_RSSI_C_BIT_POS 0 | ||
1104 | |||
1105 | struct iwl5000_non_cfg_phy { | ||
1106 | __le32 non_cfg_phy[IWL50_RX_RES_PHY_CNT]; /* upto 8 phy entries */ | ||
1107 | } __attribute__ ((packed)); | ||
1108 | |||
1109 | |||
1090 | /* | 1110 | /* |
1091 | * REPLY_RX = 0xc3 (response only, not a command) | 1111 | * REPLY_RX = 0xc3 (response only, not a command) |
1092 | * Used only for legacy (non 11n) frames. | 1112 | * Used only for legacy (non 11n) frames. |
1093 | */ | 1113 | */ |
1094 | #define RX_RES_PHY_CNT 14 | 1114 | struct iwl_rx_phy_res { |
1095 | struct iwl4965_rx_phy_res { | ||
1096 | u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ | 1115 | u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ |
1097 | u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ | 1116 | u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ |
1098 | u8 stat_id; /* configurable DSP phy data set ID */ | 1117 | u8 stat_id; /* configurable DSP phy data set ID */ |
@@ -1101,8 +1120,7 @@ struct iwl4965_rx_phy_res { | |||
1101 | __le32 beacon_time_stamp; /* beacon at on-air rise */ | 1120 | __le32 beacon_time_stamp; /* beacon at on-air rise */ |
1102 | __le16 phy_flags; /* general phy flags: band, modulation, ... */ | 1121 | __le16 phy_flags; /* general phy flags: band, modulation, ... */ |
1103 | __le16 channel; /* channel number */ | 1122 | __le16 channel; /* channel number */ |
1104 | __le16 non_cfg_phy[RX_RES_PHY_CNT]; /* upto 14 phy entries */ | 1123 | u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ |
1105 | __le32 reserved2; | ||
1106 | __le32 rate_n_flags; /* RATE_MCS_* */ | 1124 | __le32 rate_n_flags; /* RATE_MCS_* */ |
1107 | __le16 byte_count; /* frame's byte-count */ | 1125 | __le16 byte_count; /* frame's byte-count */ |
1108 | __le16 reserved3; | 1126 | __le16 reserved3; |
@@ -1993,7 +2011,7 @@ struct iwl4965_spectrum_notification { | |||
1993 | *****************************************************************************/ | 2011 | *****************************************************************************/ |
1994 | 2012 | ||
1995 | /** | 2013 | /** |
1996 | * struct iwl4965_powertable_cmd - Power Table Command | 2014 | * struct iwl_powertable_cmd - Power Table Command |
1997 | * @flags: See below: | 2015 | * @flags: See below: |
1998 | * | 2016 | * |
1999 | * POWER_TABLE_CMD = 0x77 (command, has simple generic response) | 2017 | * POWER_TABLE_CMD = 0x77 (command, has simple generic response) |
@@ -2027,7 +2045,7 @@ struct iwl4965_spectrum_notification { | |||
2027 | #define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1 << 3) | 2045 | #define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1 << 3) |
2028 | #define IWL_POWER_FAST_PD __constant_cpu_to_le16(1 << 4) | 2046 | #define IWL_POWER_FAST_PD __constant_cpu_to_le16(1 << 4) |
2029 | 2047 | ||
2030 | struct iwl4965_powertable_cmd { | 2048 | struct iwl_powertable_cmd { |
2031 | __le16 flags; | 2049 | __le16 flags; |
2032 | u8 keep_alive_seconds; | 2050 | u8 keep_alive_seconds; |
2033 | u8 debug_flags; | 2051 | u8 debug_flags; |
@@ -2324,7 +2342,7 @@ struct iwl4965_beacon_notif { | |||
2324 | /* | 2342 | /* |
2325 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) | 2343 | * REPLY_TX_BEACON = 0x91 (command, has simple generic response) |
2326 | */ | 2344 | */ |
2327 | struct iwl4965_tx_beacon_cmd { | 2345 | struct iwl_tx_beacon_cmd { |
2328 | struct iwl_tx_cmd tx; | 2346 | struct iwl_tx_cmd tx; |
2329 | __le16 tim_idx; | 2347 | __le16 tim_idx; |
2330 | u8 tim_size; | 2348 | u8 tim_size; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index a44188bf4459..9bd61809129f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -383,8 +383,8 @@ void iwl_reset_qos(struct iwl_priv *priv) | |||
383 | } | 383 | } |
384 | EXPORT_SYMBOL(iwl_reset_qos); | 384 | EXPORT_SYMBOL(iwl_reset_qos); |
385 | 385 | ||
386 | #define MAX_BIT_RATE_40_MHZ 0x96; /* 150 Mbps */ | 386 | #define MAX_BIT_RATE_40_MHZ 0x96 /* 150 Mbps */ |
387 | #define MAX_BIT_RATE_20_MHZ 0x48; /* 72 Mbps */ | 387 | #define MAX_BIT_RATE_20_MHZ 0x48 /* 72 Mbps */ |
388 | static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv, | 388 | static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv, |
389 | struct ieee80211_ht_info *ht_info, | 389 | struct ieee80211_ht_info *ht_info, |
390 | enum ieee80211_band band) | 390 | enum ieee80211_band band) |
@@ -815,11 +815,10 @@ int iwl_setup_mac(struct iwl_priv *priv) | |||
815 | { | 815 | { |
816 | int ret; | 816 | int ret; |
817 | struct ieee80211_hw *hw = priv->hw; | 817 | struct ieee80211_hw *hw = priv->hw; |
818 | hw->rate_control_algorithm = "iwl-4965-rs"; | 818 | hw->rate_control_algorithm = "iwl-agn-rs"; |
819 | 819 | ||
820 | /* Tell mac80211 our characteristics */ | 820 | /* Tell mac80211 our characteristics */ |
821 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 821 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
822 | IEEE80211_HW_SIGNAL_DBM | | ||
823 | IEEE80211_HW_NOISE_DBM; | 822 | IEEE80211_HW_NOISE_DBM; |
824 | /* Default value; 4 EDCA QOS priorities */ | 823 | /* Default value; 4 EDCA QOS priorities */ |
825 | hw->queues = 4; | 824 | hw->queues = 4; |
@@ -828,6 +827,7 @@ int iwl_setup_mac(struct iwl_priv *priv) | |||
828 | hw->ampdu_queues = priv->cfg->mod_params->num_of_ampdu_queues; | 827 | hw->ampdu_queues = priv->cfg->mod_params->num_of_ampdu_queues; |
829 | 828 | ||
830 | hw->conf.beacon_int = 100; | 829 | hw->conf.beacon_int = 100; |
830 | hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL; | ||
831 | 831 | ||
832 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) | 832 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) |
833 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 833 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index db66114f1e56..64f139e97444 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -95,6 +95,8 @@ struct iwl_hcmd_utils_ops { | |||
95 | void (*chain_noise_reset)(struct iwl_priv *priv); | 95 | void (*chain_noise_reset)(struct iwl_priv *priv); |
96 | void (*rts_tx_cmd_flag)(struct ieee80211_tx_info *info, | 96 | void (*rts_tx_cmd_flag)(struct ieee80211_tx_info *info, |
97 | __le32 *tx_flags); | 97 | __le32 *tx_flags); |
98 | int (*calc_rssi)(struct iwl_priv *priv, | ||
99 | struct iwl_rx_phy_res *rx_resp); | ||
98 | }; | 100 | }; |
99 | 101 | ||
100 | struct iwl_lib_ops { | 102 | struct iwl_lib_ops { |
@@ -139,7 +141,6 @@ struct iwl_lib_ops { | |||
139 | int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src); | 141 | int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src); |
140 | } apm_ops; | 142 | } apm_ops; |
141 | /* power */ | 143 | /* power */ |
142 | int (*set_power)(struct iwl_priv *priv, void *cmd); | ||
143 | int (*send_tx_power) (struct iwl_priv *priv); | 144 | int (*send_tx_power) (struct iwl_priv *priv); |
144 | void (*update_chain_flags)(struct iwl_priv *priv); | 145 | void (*update_chain_flags)(struct iwl_priv *priv); |
145 | void (*temperature) (struct iwl_priv *priv); | 146 | void (*temperature) (struct iwl_priv *priv); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index 545ed692d889..52629fbd835a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -104,6 +104,7 @@ | |||
104 | * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step | 104 | * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step |
105 | */ | 105 | */ |
106 | #define CSR_HW_REV_WA_REG (CSR_BASE+0x22C) | 106 | #define CSR_HW_REV_WA_REG (CSR_BASE+0x22C) |
107 | #define CSR_DBG_HPET_MEM_REG (CSR_BASE+0x240) | ||
107 | 108 | ||
108 | /* Bits for CSR_HW_IF_CONFIG_REG */ | 109 | /* Bits for CSR_HW_IF_CONFIG_REG */ |
109 | #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) | 110 | #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) |
@@ -118,7 +119,12 @@ | |||
118 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) | 119 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) |
119 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) | 120 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) |
120 | 121 | ||
121 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | 122 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) |
123 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | ||
124 | #define CSR_HW_IF_CONFIG_REG_BIT_PCI_OWN_SEM (0x00400000) | ||
125 | #define CSR_HW_IF_CONFIG_REG_BIT_ME_OWN (0x02000000) | ||
126 | #define CSR_HW_IF_CONFIG_REG_BIT_WAKE_ME (0x08000000) | ||
127 | |||
122 | 128 | ||
123 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), | 129 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), |
124 | * acknowledged (reset) by host writing "1" to flagged bits. */ | 130 | * acknowledged (reset) by host writing "1" to flagged bits. */ |
@@ -236,6 +242,8 @@ | |||
236 | #define CSR39_ANA_PLL_CFG_VAL (0x01000000) | 242 | #define CSR39_ANA_PLL_CFG_VAL (0x01000000) |
237 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) | 243 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) |
238 | 244 | ||
245 | /* HPET MEM debug */ | ||
246 | #define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000) | ||
239 | /*=== HBUS (Host-side Bus) ===*/ | 247 | /*=== HBUS (Host-side Bus) ===*/ |
240 | #define HBUS_BASE (0x400) | 248 | #define HBUS_BASE (0x400) |
241 | /* | 249 | /* |
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h index 58384805a494..b4ffd33ef98c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debug.h +++ b/drivers/net/wireless/iwlwifi/iwl-debug.h | |||
@@ -33,12 +33,12 @@ | |||
33 | #define IWL_DEBUG(level, fmt, args...) \ | 33 | #define IWL_DEBUG(level, fmt, args...) \ |
34 | do { if (priv->debug_level & (level)) \ | 34 | do { if (priv->debug_level & (level)) \ |
35 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ | 35 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ |
36 | in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) | 36 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) |
37 | 37 | ||
38 | #define IWL_DEBUG_LIMIT(level, fmt, args...) \ | 38 | #define IWL_DEBUG_LIMIT(level, fmt, args...) \ |
39 | do { if ((priv->debug_level & (level)) && net_ratelimit()) \ | 39 | do { if ((priv->debug_level & (level)) && net_ratelimit()) \ |
40 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ | 40 | dev_printk(KERN_ERR, &(priv->hw->wiphy->dev), "%c %s " fmt, \ |
41 | in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) | 41 | in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) |
42 | 42 | ||
43 | #ifdef CONFIG_IWLWIFI_DEBUGFS | 43 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
44 | struct iwl_debugfs { | 44 | struct iwl_debugfs { |
@@ -68,12 +68,8 @@ void iwl_dbgfs_unregister(struct iwl_priv *priv); | |||
68 | #endif | 68 | #endif |
69 | 69 | ||
70 | #else | 70 | #else |
71 | static inline void IWL_DEBUG(int level, const char *fmt, ...) | 71 | #define IWL_DEBUG(level, fmt, args...) |
72 | { | 72 | #define IWL_DEBUG_LIMIT(level, fmt, args...) |
73 | } | ||
74 | static inline void IWL_DEBUG_LIMIT(int level, const char *fmt, ...) | ||
75 | { | ||
76 | } | ||
77 | #endif /* CONFIG_IWLWIFI_DEBUG */ | 73 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
78 | 74 | ||
79 | 75 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c index ed948dc59b3d..20db0eb636a8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c +++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c | |||
@@ -231,7 +231,7 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf, | |||
231 | DECLARE_MAC_BUF(mac); | 231 | DECLARE_MAC_BUF(mac); |
232 | 232 | ||
233 | buf = kmalloc(bufsz, GFP_KERNEL); | 233 | buf = kmalloc(bufsz, GFP_KERNEL); |
234 | if(!buf) | 234 | if (!buf) |
235 | return -ENOMEM; | 235 | return -ENOMEM; |
236 | 236 | ||
237 | pos += scnprintf(buf + pos, bufsz - pos, "num of stations: %d\n\n", | 237 | pos += scnprintf(buf + pos, bufsz - pos, "num of stations: %d\n\n", |
@@ -364,16 +364,19 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) | |||
364 | { | 364 | { |
365 | struct iwl_debugfs *dbgfs; | 365 | struct iwl_debugfs *dbgfs; |
366 | struct dentry *phyd = priv->hw->wiphy->debugfsdir; | 366 | struct dentry *phyd = priv->hw->wiphy->debugfsdir; |
367 | int ret = 0; | ||
367 | 368 | ||
368 | dbgfs = kzalloc(sizeof(struct iwl_debugfs), GFP_KERNEL); | 369 | dbgfs = kzalloc(sizeof(struct iwl_debugfs), GFP_KERNEL); |
369 | if (!dbgfs) { | 370 | if (!dbgfs) { |
371 | ret = -ENOMEM; | ||
370 | goto err; | 372 | goto err; |
371 | } | 373 | } |
372 | 374 | ||
373 | priv->dbgfs = dbgfs; | 375 | priv->dbgfs = dbgfs; |
374 | dbgfs->name = name; | 376 | dbgfs->name = name; |
375 | dbgfs->dir_drv = debugfs_create_dir(name, phyd); | 377 | dbgfs->dir_drv = debugfs_create_dir(name, phyd); |
376 | if (!dbgfs->dir_drv || IS_ERR(dbgfs->dir_drv)){ | 378 | if (!dbgfs->dir_drv || IS_ERR(dbgfs->dir_drv)) { |
379 | ret = -ENOENT; | ||
377 | goto err; | 380 | goto err; |
378 | } | 381 | } |
379 | 382 | ||
@@ -394,7 +397,7 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) | |||
394 | err: | 397 | err: |
395 | IWL_ERROR("Can't open the debugfs directory\n"); | 398 | IWL_ERROR("Can't open the debugfs directory\n"); |
396 | iwl_dbgfs_unregister(priv); | 399 | iwl_dbgfs_unregister(priv); |
397 | return -ENOENT; | 400 | return ret; |
398 | } | 401 | } |
399 | EXPORT_SYMBOL(iwl_dbgfs_register); | 402 | EXPORT_SYMBOL(iwl_dbgfs_register); |
400 | 403 | ||
@@ -404,7 +407,7 @@ EXPORT_SYMBOL(iwl_dbgfs_register); | |||
404 | */ | 407 | */ |
405 | void iwl_dbgfs_unregister(struct iwl_priv *priv) | 408 | void iwl_dbgfs_unregister(struct iwl_priv *priv) |
406 | { | 409 | { |
407 | if (!(priv->dbgfs)) | 410 | if (!priv->dbgfs) |
408 | return; | 411 | return; |
409 | 412 | ||
410 | DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_eeprom); | 413 | DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_eeprom); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index 4d789e353e3a..c19db438306c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -36,7 +36,7 @@ | |||
36 | #include <linux/kernel.h> | 36 | #include <linux/kernel.h> |
37 | #include <net/ieee80211_radiotap.h> | 37 | #include <net/ieee80211_radiotap.h> |
38 | 38 | ||
39 | #define DRV_NAME "iwl4965" | 39 | #define DRV_NAME "iwlagn" |
40 | #include "iwl-rfkill.h" | 40 | #include "iwl-rfkill.h" |
41 | #include "iwl-eeprom.h" | 41 | #include "iwl-eeprom.h" |
42 | #include "iwl-4965-hw.h" | 42 | #include "iwl-4965-hw.h" |
@@ -45,6 +45,7 @@ | |||
45 | #include "iwl-debug.h" | 45 | #include "iwl-debug.h" |
46 | #include "iwl-led.h" | 46 | #include "iwl-led.h" |
47 | #include "iwl-power.h" | 47 | #include "iwl-power.h" |
48 | #include "iwl-agn-rs.h" | ||
48 | 49 | ||
49 | /* configuration for the iwl4965 */ | 50 | /* configuration for the iwl4965 */ |
50 | extern struct iwl_cfg iwl4965_agn_cfg; | 51 | extern struct iwl_cfg iwl4965_agn_cfg; |
@@ -134,8 +135,7 @@ struct iwl_tx_info { | |||
134 | struct iwl_tx_queue { | 135 | struct iwl_tx_queue { |
135 | struct iwl_queue q; | 136 | struct iwl_queue q; |
136 | struct iwl_tfd_frame *bd; | 137 | struct iwl_tfd_frame *bd; |
137 | struct iwl_cmd *cmd; | 138 | struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS]; |
138 | dma_addr_t dma_addr_cmd; | ||
139 | struct iwl_tx_info *txb; | 139 | struct iwl_tx_info *txb; |
140 | int need_update; | 140 | int need_update; |
141 | int sched_retry; | 141 | int sched_retry; |
@@ -191,7 +191,6 @@ struct iwl4965_clip_group { | |||
191 | const s8 clip_powers[IWL_MAX_RATES]; | 191 | const s8 clip_powers[IWL_MAX_RATES]; |
192 | }; | 192 | }; |
193 | 193 | ||
194 | #include "iwl-4965-rs.h" | ||
195 | 194 | ||
196 | #define IWL_TX_FIFO_AC0 0 | 195 | #define IWL_TX_FIFO_AC0 0 |
197 | #define IWL_TX_FIFO_AC1 1 | 196 | #define IWL_TX_FIFO_AC1 1 |
@@ -219,7 +218,7 @@ enum iwl_pwr_src { | |||
219 | struct iwl_frame { | 218 | struct iwl_frame { |
220 | union { | 219 | union { |
221 | struct ieee80211_hdr frame; | 220 | struct ieee80211_hdr frame; |
222 | struct iwl4965_tx_beacon_cmd beacon; | 221 | struct iwl_tx_beacon_cmd beacon; |
223 | u8 raw[IEEE80211_FRAME_LEN]; | 222 | u8 raw[IEEE80211_FRAME_LEN]; |
224 | u8 cmd[360]; | 223 | u8 cmd[360]; |
225 | } u; | 224 | } u; |
@@ -283,10 +282,9 @@ struct iwl_cmd { | |||
283 | u32 val32; | 282 | u32 val32; |
284 | struct iwl4965_bt_cmd bt; | 283 | struct iwl4965_bt_cmd bt; |
285 | struct iwl4965_rxon_time_cmd rxon_time; | 284 | struct iwl4965_rxon_time_cmd rxon_time; |
286 | struct iwl4965_powertable_cmd powertable; | 285 | struct iwl_powertable_cmd powertable; |
287 | struct iwl_qosparam_cmd qosparam; | 286 | struct iwl_qosparam_cmd qosparam; |
288 | struct iwl_tx_cmd tx; | 287 | struct iwl_tx_cmd tx; |
289 | struct iwl4965_tx_beacon_cmd tx_beacon; | ||
290 | struct iwl4965_rxon_assoc_cmd rxon_assoc; | 288 | struct iwl4965_rxon_assoc_cmd rxon_assoc; |
291 | struct iwl_rem_sta_cmd rm_sta; | 289 | struct iwl_rem_sta_cmd rm_sta; |
292 | u8 *indirect; | 290 | u8 *indirect; |
@@ -590,6 +588,7 @@ extern unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, | |||
590 | const u8 *dest, int left); | 588 | const u8 *dest, int left); |
591 | extern void iwl4965_update_chain_flags(struct iwl_priv *priv); | 589 | extern void iwl4965_update_chain_flags(struct iwl_priv *priv); |
592 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src); | 590 | int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src); |
591 | extern int iwl4965_set_power(struct iwl_priv *priv, void *cmd); | ||
593 | 592 | ||
594 | extern const u8 iwl_bcast_addr[ETH_ALEN]; | 593 | extern const u8 iwl_bcast_addr[ETH_ALEN]; |
595 | 594 | ||
@@ -642,10 +641,6 @@ struct iwl_priv; | |||
642 | * Forward declare iwl-4965.c functions for iwl-base.c | 641 | * Forward declare iwl-4965.c functions for iwl-base.c |
643 | */ | 642 | */ |
644 | extern void iwl4965_rf_kill_ct_config(struct iwl_priv *priv); | 643 | extern void iwl4965_rf_kill_ct_config(struct iwl_priv *priv); |
645 | |||
646 | int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, | ||
647 | enum ieee80211_ampdu_mlme_action action, | ||
648 | const u8 *addr, u16 tid, u16 *ssn); | ||
649 | int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id, | 644 | int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id, |
650 | u8 tid, int txq_id); | 645 | u8 tid, int txq_id); |
651 | 646 | ||
@@ -812,14 +807,11 @@ struct iwl_chain_noise_data { | |||
812 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | 807 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ |
813 | 808 | ||
814 | 809 | ||
815 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | ||
816 | |||
817 | enum { | 810 | enum { |
818 | MEASUREMENT_READY = (1 << 0), | 811 | MEASUREMENT_READY = (1 << 0), |
819 | MEASUREMENT_ACTIVE = (1 << 1), | 812 | MEASUREMENT_ACTIVE = (1 << 1), |
820 | }; | 813 | }; |
821 | 814 | ||
822 | #endif | ||
823 | 815 | ||
824 | #define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */ | 816 | #define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */ |
825 | 817 | ||
@@ -844,7 +836,7 @@ struct iwl_priv { | |||
844 | 836 | ||
845 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; | 837 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
846 | 838 | ||
847 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT | 839 | #ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT |
848 | /* spectrum measurement report caching */ | 840 | /* spectrum measurement report caching */ |
849 | struct iwl4965_spectrum_notification measure_report; | 841 | struct iwl4965_spectrum_notification measure_report; |
850 | u8 measurement_status; | 842 | u8 measurement_status; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c index 4a08a1b50979..bce53830b301 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c | |||
@@ -273,8 +273,7 @@ EXPORT_SYMBOL(iwl_eeprom_init); | |||
273 | 273 | ||
274 | void iwl_eeprom_free(struct iwl_priv *priv) | 274 | void iwl_eeprom_free(struct iwl_priv *priv) |
275 | { | 275 | { |
276 | if(priv->eeprom) | 276 | kfree(priv->eeprom); |
277 | kfree(priv->eeprom); | ||
278 | priv->eeprom = NULL; | 277 | priv->eeprom = NULL; |
279 | } | 278 | } |
280 | EXPORT_SYMBOL(iwl_eeprom_free); | 279 | EXPORT_SYMBOL(iwl_eeprom_free); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c index 8fa991b7202a..6512834bb916 100644 --- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c +++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c | |||
@@ -228,7 +228,7 @@ cancel: | |||
228 | * TX cmd queue. Otherwise in case the cmd comes | 228 | * TX cmd queue. Otherwise in case the cmd comes |
229 | * in later, it will possibly set an invalid | 229 | * in later, it will possibly set an invalid |
230 | * address (cmd->meta.source). */ | 230 | * address (cmd->meta.source). */ |
231 | qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx]; | 231 | qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx]; |
232 | qcmd->meta.flags &= ~CMD_WANT_SKB; | 232 | qcmd->meta.flags &= ~CMD_WANT_SKB; |
233 | } | 233 | } |
234 | fail: | 234 | fail: |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c index 899d7a2567a8..cb11c4a4d691 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.c +++ b/drivers/net/wireless/iwlwifi/iwl-led.c | |||
@@ -161,12 +161,32 @@ int iwl4965_led_off(struct iwl_priv *priv, int led_id) | |||
161 | /* Set led register off */ | 161 | /* Set led register off */ |
162 | static int iwl4965_led_off_reg(struct iwl_priv *priv, int led_id) | 162 | static int iwl4965_led_off_reg(struct iwl_priv *priv, int led_id) |
163 | { | 163 | { |
164 | IWL_DEBUG_LED("radio off\n"); | 164 | IWL_DEBUG_LED("LED Reg off\n"); |
165 | iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF); | 165 | iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF); |
166 | return 0; | 166 | return 0; |
167 | } | 167 | } |
168 | 168 | ||
169 | /* | 169 | /* |
170 | * Set led register in case of disassociation according to rfkill state | ||
171 | */ | ||
172 | static int iwl_led_associate(struct iwl_priv *priv, int led_id) | ||
173 | { | ||
174 | IWL_DEBUG_LED("Associated\n"); | ||
175 | priv->allow_blinking = 1; | ||
176 | return iwl4965_led_on_reg(priv, led_id); | ||
177 | } | ||
178 | static int iwl_led_disassociate(struct iwl_priv *priv, int led_id) | ||
179 | { | ||
180 | priv->allow_blinking = 0; | ||
181 | if (iwl_is_rfkill(priv)) | ||
182 | iwl4965_led_off_reg(priv, led_id); | ||
183 | else | ||
184 | iwl4965_led_on_reg(priv, led_id); | ||
185 | |||
186 | return 0; | ||
187 | } | ||
188 | |||
189 | /* | ||
170 | * brightness call back function for Tx/Rx LED | 190 | * brightness call back function for Tx/Rx LED |
171 | */ | 191 | */ |
172 | static int iwl_led_associated(struct iwl_priv *priv, int led_id) | 192 | static int iwl_led_associated(struct iwl_priv *priv, int led_id) |
@@ -199,16 +219,10 @@ static void iwl_led_brightness_set(struct led_classdev *led_cdev, | |||
199 | led_type_str[led->type], brightness); | 219 | led_type_str[led->type], brightness); |
200 | switch (brightness) { | 220 | switch (brightness) { |
201 | case LED_FULL: | 221 | case LED_FULL: |
202 | if (led->type == IWL_LED_TRG_ASSOC) | ||
203 | priv->allow_blinking = 1; | ||
204 | |||
205 | if (led->led_on) | 222 | if (led->led_on) |
206 | led->led_on(priv, IWL_LED_LINK); | 223 | led->led_on(priv, IWL_LED_LINK); |
207 | break; | 224 | break; |
208 | case LED_OFF: | 225 | case LED_OFF: |
209 | if (led->type == IWL_LED_TRG_ASSOC) | ||
210 | priv->allow_blinking = 0; | ||
211 | |||
212 | if (led->led_off) | 226 | if (led->led_off) |
213 | led->led_off(priv, IWL_LED_LINK); | 227 | led->led_off(priv, IWL_LED_LINK); |
214 | break; | 228 | break; |
@@ -228,12 +242,12 @@ static void iwl_led_brightness_set(struct led_classdev *led_cdev, | |||
228 | */ | 242 | */ |
229 | static int iwl_leds_register_led(struct iwl_priv *priv, struct iwl_led *led, | 243 | static int iwl_leds_register_led(struct iwl_priv *priv, struct iwl_led *led, |
230 | enum led_type type, u8 set_led, | 244 | enum led_type type, u8 set_led, |
231 | const char *name, char *trigger) | 245 | char *trigger) |
232 | { | 246 | { |
233 | struct device *device = wiphy_dev(priv->hw->wiphy); | 247 | struct device *device = wiphy_dev(priv->hw->wiphy); |
234 | int ret; | 248 | int ret; |
235 | 249 | ||
236 | led->led_dev.name = name; | 250 | led->led_dev.name = led->name; |
237 | led->led_dev.brightness_set = iwl_led_brightness_set; | 251 | led->led_dev.brightness_set = iwl_led_brightness_set; |
238 | led->led_dev.default_trigger = trigger; | 252 | led->led_dev.default_trigger = trigger; |
239 | 253 | ||
@@ -268,7 +282,9 @@ static int iwl_get_blink_rate(struct iwl_priv *priv) | |||
268 | if (tpt < 0) /* wrapparound */ | 282 | if (tpt < 0) /* wrapparound */ |
269 | tpt = -tpt; | 283 | tpt = -tpt; |
270 | 284 | ||
271 | IWL_DEBUG_LED("tpt %lld current_tpt %lld\n", tpt, current_tpt); | 285 | IWL_DEBUG_LED("tpt %lld current_tpt %llu\n", |
286 | (long long)tpt, | ||
287 | (unsigned long long)current_tpt); | ||
272 | priv->led_tpt = current_tpt; | 288 | priv->led_tpt = current_tpt; |
273 | 289 | ||
274 | if (!priv->allow_blinking) | 290 | if (!priv->allow_blinking) |
@@ -282,12 +298,6 @@ static int iwl_get_blink_rate(struct iwl_priv *priv) | |||
282 | return i; | 298 | return i; |
283 | } | 299 | } |
284 | 300 | ||
285 | static inline int is_rf_kill(struct iwl_priv *priv) | ||
286 | { | ||
287 | return test_bit(STATUS_RF_KILL_HW, &priv->status) || | ||
288 | test_bit(STATUS_RF_KILL_SW, &priv->status); | ||
289 | } | ||
290 | |||
291 | /* | 301 | /* |
292 | * this function called from handler. Since setting Led command can | 302 | * this function called from handler. Since setting Led command can |
293 | * happen very frequent we postpone led command to be called from | 303 | * happen very frequent we postpone led command to be called from |
@@ -301,7 +311,7 @@ void iwl_leds_background(struct iwl_priv *priv) | |||
301 | priv->last_blink_time = 0; | 311 | priv->last_blink_time = 0; |
302 | return; | 312 | return; |
303 | } | 313 | } |
304 | if (is_rf_kill(priv)) { | 314 | if (iwl_is_rfkill(priv)) { |
305 | priv->last_blink_time = 0; | 315 | priv->last_blink_time = 0; |
306 | return; | 316 | return; |
307 | } | 317 | } |
@@ -335,7 +345,6 @@ EXPORT_SYMBOL(iwl_leds_background); | |||
335 | int iwl_leds_register(struct iwl_priv *priv) | 345 | int iwl_leds_register(struct iwl_priv *priv) |
336 | { | 346 | { |
337 | char *trigger; | 347 | char *trigger; |
338 | char name[32]; | ||
339 | int ret; | 348 | int ret; |
340 | 349 | ||
341 | priv->last_blink_rate = 0; | 350 | priv->last_blink_rate = 0; |
@@ -344,7 +353,8 @@ int iwl_leds_register(struct iwl_priv *priv) | |||
344 | priv->allow_blinking = 0; | 353 | priv->allow_blinking = 0; |
345 | 354 | ||
346 | trigger = ieee80211_get_radio_led_name(priv->hw); | 355 | trigger = ieee80211_get_radio_led_name(priv->hw); |
347 | snprintf(name, sizeof(name), "iwl-%s:radio", | 356 | snprintf(priv->led[IWL_LED_TRG_RADIO].name, |
357 | sizeof(priv->led[IWL_LED_TRG_RADIO].name), "iwl-%s:radio", | ||
348 | wiphy_name(priv->hw->wiphy)); | 358 | wiphy_name(priv->hw->wiphy)); |
349 | 359 | ||
350 | priv->led[IWL_LED_TRG_RADIO].led_on = iwl4965_led_on_reg; | 360 | priv->led[IWL_LED_TRG_RADIO].led_on = iwl4965_led_on_reg; |
@@ -352,31 +362,33 @@ int iwl_leds_register(struct iwl_priv *priv) | |||
352 | priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL; | 362 | priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL; |
353 | 363 | ||
354 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RADIO], | 364 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RADIO], |
355 | IWL_LED_TRG_RADIO, 1, name, trigger); | 365 | IWL_LED_TRG_RADIO, 1, trigger); |
356 | if (ret) | 366 | if (ret) |
357 | goto exit_fail; | 367 | goto exit_fail; |
358 | 368 | ||
359 | trigger = ieee80211_get_assoc_led_name(priv->hw); | 369 | trigger = ieee80211_get_assoc_led_name(priv->hw); |
360 | snprintf(name, sizeof(name), "iwl-%s:assoc", | 370 | snprintf(priv->led[IWL_LED_TRG_ASSOC].name, |
371 | sizeof(priv->led[IWL_LED_TRG_ASSOC].name), "iwl-%s:assoc", | ||
361 | wiphy_name(priv->hw->wiphy)); | 372 | wiphy_name(priv->hw->wiphy)); |
362 | 373 | ||
363 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_ASSOC], | 374 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_ASSOC], |
364 | IWL_LED_TRG_ASSOC, 0, name, trigger); | 375 | IWL_LED_TRG_ASSOC, 0, trigger); |
365 | 376 | ||
366 | /* for assoc always turn led on */ | 377 | /* for assoc always turn led on */ |
367 | priv->led[IWL_LED_TRG_ASSOC].led_on = iwl4965_led_on_reg; | 378 | priv->led[IWL_LED_TRG_ASSOC].led_on = iwl_led_associate; |
368 | priv->led[IWL_LED_TRG_ASSOC].led_off = iwl4965_led_on_reg; | 379 | priv->led[IWL_LED_TRG_ASSOC].led_off = iwl_led_disassociate; |
369 | priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL; | 380 | priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL; |
370 | 381 | ||
371 | if (ret) | 382 | if (ret) |
372 | goto exit_fail; | 383 | goto exit_fail; |
373 | 384 | ||
374 | trigger = ieee80211_get_rx_led_name(priv->hw); | 385 | trigger = ieee80211_get_rx_led_name(priv->hw); |
375 | snprintf(name, sizeof(name), "iwl-%s:RX", wiphy_name(priv->hw->wiphy)); | 386 | snprintf(priv->led[IWL_LED_TRG_RX].name, |
376 | 387 | sizeof(priv->led[IWL_LED_TRG_RX].name), "iwl-%s:RX", | |
388 | wiphy_name(priv->hw->wiphy)); | ||
377 | 389 | ||
378 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RX], | 390 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RX], |
379 | IWL_LED_TRG_RX, 0, name, trigger); | 391 | IWL_LED_TRG_RX, 0, trigger); |
380 | 392 | ||
381 | priv->led[IWL_LED_TRG_RX].led_on = iwl_led_associated; | 393 | priv->led[IWL_LED_TRG_RX].led_on = iwl_led_associated; |
382 | priv->led[IWL_LED_TRG_RX].led_off = iwl_led_associated; | 394 | priv->led[IWL_LED_TRG_RX].led_off = iwl_led_associated; |
@@ -386,9 +398,12 @@ int iwl_leds_register(struct iwl_priv *priv) | |||
386 | goto exit_fail; | 398 | goto exit_fail; |
387 | 399 | ||
388 | trigger = ieee80211_get_tx_led_name(priv->hw); | 400 | trigger = ieee80211_get_tx_led_name(priv->hw); |
389 | snprintf(name, sizeof(name), "iwl-%s:TX", wiphy_name(priv->hw->wiphy)); | 401 | snprintf(priv->led[IWL_LED_TRG_TX].name, |
402 | sizeof(priv->led[IWL_LED_TRG_TX].name), "iwl-%s:TX", | ||
403 | wiphy_name(priv->hw->wiphy)); | ||
404 | |||
390 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_TX], | 405 | ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_TX], |
391 | IWL_LED_TRG_TX, 0, name, trigger); | 406 | IWL_LED_TRG_TX, 0, trigger); |
392 | 407 | ||
393 | priv->led[IWL_LED_TRG_TX].led_on = iwl_led_associated; | 408 | priv->led[IWL_LED_TRG_TX].led_on = iwl_led_associated; |
394 | priv->led[IWL_LED_TRG_TX].led_off = iwl_led_associated; | 409 | priv->led[IWL_LED_TRG_TX].led_off = iwl_led_associated; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h index 1980ae5a7e82..588c9ad20e83 100644 --- a/drivers/net/wireless/iwlwifi/iwl-led.h +++ b/drivers/net/wireless/iwlwifi/iwl-led.h | |||
@@ -52,6 +52,7 @@ enum led_type { | |||
52 | struct iwl_led { | 52 | struct iwl_led { |
53 | struct iwl_priv *priv; | 53 | struct iwl_priv *priv; |
54 | struct led_classdev led_dev; | 54 | struct led_classdev led_dev; |
55 | char name[32]; | ||
55 | 56 | ||
56 | int (*led_on) (struct iwl_priv *priv, int led_id); | 57 | int (*led_on) (struct iwl_priv *priv, int led_id); |
57 | int (*led_off) (struct iwl_priv *priv, int led_id); | 58 | int (*led_off) (struct iwl_priv *priv, int led_id); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c index 2e71803e09ba..028e3053c0ca 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.c +++ b/drivers/net/wireless/iwlwifi/iwl-power.c | |||
@@ -82,7 +82,7 @@ | |||
82 | 82 | ||
83 | /* default power management (not Tx power) table values */ | 83 | /* default power management (not Tx power) table values */ |
84 | /* for tim 0-10 */ | 84 | /* for tim 0-10 */ |
85 | static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = { | 85 | static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = { |
86 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, | 86 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
87 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, | 87 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, |
88 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, | 88 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, |
@@ -93,7 +93,7 @@ static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = { | |||
93 | 93 | ||
94 | 94 | ||
95 | /* for tim = 3-10 */ | 95 | /* for tim = 3-10 */ |
96 | static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = { | 96 | static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = { |
97 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, | 97 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
98 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, | 98 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, |
99 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0}, | 99 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0}, |
@@ -103,7 +103,7 @@ static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = { | |||
103 | }; | 103 | }; |
104 | 104 | ||
105 | /* for tim > 11 */ | 105 | /* for tim > 11 */ |
106 | static struct iwl_power_vec_entry range_2[IWL_POWER_AC] = { | 106 | static struct iwl_power_vec_entry range_2[IWL_POWER_MAX] = { |
107 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, | 107 | {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
108 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, | 108 | {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, |
109 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, | 109 | {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, |
@@ -112,12 +112,19 @@ static struct iwl_power_vec_entry range_2[IWL_POWER_AC] = { | |||
112 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} | 112 | {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} |
113 | }; | 113 | }; |
114 | 114 | ||
115 | /* set card power command */ | ||
116 | static int iwl_set_power(struct iwl_priv *priv, void *cmd) | ||
117 | { | ||
118 | return iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD, | ||
119 | sizeof(struct iwl_powertable_cmd), | ||
120 | cmd, NULL); | ||
121 | } | ||
115 | /* decide the right power level according to association status | 122 | /* decide the right power level according to association status |
116 | * and battery status | 123 | * and battery status |
117 | */ | 124 | */ |
118 | static u16 iwl_get_auto_power_mode(struct iwl_priv *priv) | 125 | static u16 iwl_get_auto_power_mode(struct iwl_priv *priv) |
119 | { | 126 | { |
120 | u16 mode = priv->power_data.user_power_setting; | 127 | u16 mode; |
121 | 128 | ||
122 | switch (priv->power_data.user_power_setting) { | 129 | switch (priv->power_data.user_power_setting) { |
123 | case IWL_POWER_AUTO: | 130 | case IWL_POWER_AUTO: |
@@ -129,12 +136,16 @@ static u16 iwl_get_auto_power_mode(struct iwl_priv *priv) | |||
129 | else | 136 | else |
130 | mode = IWL_POWER_ON_AC_DISASSOC; | 137 | mode = IWL_POWER_ON_AC_DISASSOC; |
131 | break; | 138 | break; |
139 | /* FIXME: remove battery and ac from here */ | ||
132 | case IWL_POWER_BATTERY: | 140 | case IWL_POWER_BATTERY: |
133 | mode = IWL_POWER_INDEX_3; | 141 | mode = IWL_POWER_INDEX_3; |
134 | break; | 142 | break; |
135 | case IWL_POWER_AC: | 143 | case IWL_POWER_AC: |
136 | mode = IWL_POWER_MODE_CAM; | 144 | mode = IWL_POWER_MODE_CAM; |
137 | break; | 145 | break; |
146 | default: | ||
147 | mode = priv->power_data.user_power_setting; | ||
148 | break; | ||
138 | } | 149 | } |
139 | return mode; | 150 | return mode; |
140 | } | 151 | } |
@@ -144,7 +155,7 @@ static int iwl_power_init_handle(struct iwl_priv *priv) | |||
144 | { | 155 | { |
145 | int ret = 0, i; | 156 | int ret = 0, i; |
146 | struct iwl_power_mgr *pow_data; | 157 | struct iwl_power_mgr *pow_data; |
147 | int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC; | 158 | int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX; |
148 | u16 pci_pm; | 159 | u16 pci_pm; |
149 | 160 | ||
150 | IWL_DEBUG_POWER("Initialize power \n"); | 161 | IWL_DEBUG_POWER("Initialize power \n"); |
@@ -162,11 +173,11 @@ static int iwl_power_init_handle(struct iwl_priv *priv) | |||
162 | if (ret != 0) | 173 | if (ret != 0) |
163 | return 0; | 174 | return 0; |
164 | else { | 175 | else { |
165 | struct iwl4965_powertable_cmd *cmd; | 176 | struct iwl_powertable_cmd *cmd; |
166 | 177 | ||
167 | IWL_DEBUG_POWER("adjust power command flags\n"); | 178 | IWL_DEBUG_POWER("adjust power command flags\n"); |
168 | 179 | ||
169 | for (i = 0; i < IWL_POWER_AC; i++) { | 180 | for (i = 0; i < IWL_POWER_MAX; i++) { |
170 | cmd = &pow_data->pwr_range_0[i].cmd; | 181 | cmd = &pow_data->pwr_range_0[i].cmd; |
171 | 182 | ||
172 | if (pci_pm & 0x1) | 183 | if (pci_pm & 0x1) |
@@ -180,7 +191,7 @@ static int iwl_power_init_handle(struct iwl_priv *priv) | |||
180 | 191 | ||
181 | /* adjust power command according to dtim period and power level*/ | 192 | /* adjust power command according to dtim period and power level*/ |
182 | static int iwl_update_power_command(struct iwl_priv *priv, | 193 | static int iwl_update_power_command(struct iwl_priv *priv, |
183 | struct iwl4965_powertable_cmd *cmd, | 194 | struct iwl_powertable_cmd *cmd, |
184 | u16 mode) | 195 | u16 mode) |
185 | { | 196 | { |
186 | int ret = 0, i; | 197 | int ret = 0, i; |
@@ -204,7 +215,7 @@ static int iwl_update_power_command(struct iwl_priv *priv, | |||
204 | range = &pow_data->pwr_range_2[0]; | 215 | range = &pow_data->pwr_range_2[0]; |
205 | 216 | ||
206 | period = pow_data->dtim_period; | 217 | period = pow_data->dtim_period; |
207 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd)); | 218 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd)); |
208 | 219 | ||
209 | if (period == 0) { | 220 | if (period == 0) { |
210 | period = 1; | 221 | period = 1; |
@@ -258,17 +269,18 @@ int iwl_power_update_mode(struct iwl_priv *priv, u8 refresh) | |||
258 | * else user level */ | 269 | * else user level */ |
259 | 270 | ||
260 | switch (setting->system_power_setting) { | 271 | switch (setting->system_power_setting) { |
261 | case IWL_POWER_AUTO: | 272 | case IWL_POWER_SYS_AUTO: |
262 | final_mode = iwl_get_auto_power_mode(priv); | 273 | final_mode = iwl_get_auto_power_mode(priv); |
263 | break; | 274 | break; |
264 | case IWL_POWER_BATTERY: | 275 | case IWL_POWER_SYS_BATTERY: |
265 | final_mode = IWL_POWER_INDEX_3; | 276 | final_mode = IWL_POWER_INDEX_3; |
266 | break; | 277 | break; |
267 | case IWL_POWER_AC: | 278 | case IWL_POWER_SYS_AC: |
268 | final_mode = IWL_POWER_MODE_CAM; | 279 | final_mode = IWL_POWER_MODE_CAM; |
269 | break; | 280 | break; |
270 | default: | 281 | default: |
271 | final_mode = setting->system_power_setting; | 282 | final_mode = IWL_POWER_INDEX_3; |
283 | WARN_ON(1); | ||
272 | } | 284 | } |
273 | 285 | ||
274 | if (setting->critical_power_setting > final_mode) | 286 | if (setting->critical_power_setting > final_mode) |
@@ -280,7 +292,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, u8 refresh) | |||
280 | 292 | ||
281 | if (!iwl_is_rfkill(priv) && !setting->power_disabled && | 293 | if (!iwl_is_rfkill(priv) && !setting->power_disabled && |
282 | ((setting->power_mode != final_mode) || refresh)) { | 294 | ((setting->power_mode != final_mode) || refresh)) { |
283 | struct iwl4965_powertable_cmd cmd; | 295 | struct iwl_powertable_cmd cmd; |
284 | 296 | ||
285 | if (final_mode != IWL_POWER_MODE_CAM) | 297 | if (final_mode != IWL_POWER_MODE_CAM) |
286 | set_bit(STATUS_POWER_PMI, &priv->status); | 298 | set_bit(STATUS_POWER_PMI, &priv->status); |
@@ -291,8 +303,7 @@ int iwl_power_update_mode(struct iwl_priv *priv, u8 refresh) | |||
291 | if (final_mode == IWL_POWER_INDEX_5) | 303 | if (final_mode == IWL_POWER_INDEX_5) |
292 | cmd.flags |= IWL_POWER_FAST_PD; | 304 | cmd.flags |= IWL_POWER_FAST_PD; |
293 | 305 | ||
294 | if (priv->cfg->ops->lib->set_power) | 306 | ret = iwl_set_power(priv, &cmd); |
295 | ret = priv->cfg->ops->lib->set_power(priv, &cmd); | ||
296 | 307 | ||
297 | if (final_mode == IWL_POWER_MODE_CAM) | 308 | if (final_mode == IWL_POWER_MODE_CAM) |
298 | clear_bit(STATUS_POWER_PMI, &priv->status); | 309 | clear_bit(STATUS_POWER_PMI, &priv->status); |
@@ -388,7 +399,7 @@ void iwl_power_initialize(struct iwl_priv *priv) | |||
388 | iwl_power_init_handle(priv); | 399 | iwl_power_init_handle(priv); |
389 | priv->power_data.user_power_setting = IWL_POWER_AUTO; | 400 | priv->power_data.user_power_setting = IWL_POWER_AUTO; |
390 | priv->power_data.power_disabled = 0; | 401 | priv->power_data.power_disabled = 0; |
391 | priv->power_data.system_power_setting = IWL_POWER_AUTO; | 402 | priv->power_data.system_power_setting = IWL_POWER_SYS_AUTO; |
392 | priv->power_data.is_battery_active = 0; | 403 | priv->power_data.is_battery_active = 0; |
393 | priv->power_data.power_disabled = 0; | 404 | priv->power_data.power_disabled = 0; |
394 | priv->power_data.critical_power_setting = 0; | 405 | priv->power_data.critical_power_setting = 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h index b066724a1c2b..abcbbf96a84e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.h +++ b/drivers/net/wireless/iwlwifi/iwl-power.h | |||
@@ -33,12 +33,25 @@ | |||
33 | 33 | ||
34 | struct iwl_priv; | 34 | struct iwl_priv; |
35 | 35 | ||
36 | #define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */ | 36 | enum { |
37 | #define IWL_POWER_INDEX_3 0x03 | 37 | IWL_POWER_MODE_CAM, /* Continuously Aware Mode, always on */ |
38 | #define IWL_POWER_INDEX_5 0x05 | 38 | IWL_POWER_INDEX_1, |
39 | #define IWL_POWER_AC 0x06 | 39 | IWL_POWER_INDEX_2, |
40 | #define IWL_POWER_BATTERY 0x07 | 40 | IWL_POWER_INDEX_3, |
41 | #define IWL_POWER_AUTO 0x08 | 41 | IWL_POWER_INDEX_4, |
42 | IWL_POWER_INDEX_5, | ||
43 | IWL_POWER_AUTO, | ||
44 | IWL_POWER_MAX = IWL_POWER_AUTO, | ||
45 | IWL_POWER_AC, | ||
46 | IWL_POWER_BATTERY, | ||
47 | }; | ||
48 | |||
49 | enum { | ||
50 | IWL_POWER_SYS_AUTO, | ||
51 | IWL_POWER_SYS_AC, | ||
52 | IWL_POWER_SYS_BATTERY, | ||
53 | }; | ||
54 | |||
42 | #define IWL_POWER_LIMIT 0x08 | 55 | #define IWL_POWER_LIMIT 0x08 |
43 | #define IWL_POWER_MASK 0x0F | 56 | #define IWL_POWER_MASK 0x0F |
44 | #define IWL_POWER_ENABLED 0x10 | 57 | #define IWL_POWER_ENABLED 0x10 |
@@ -46,15 +59,15 @@ struct iwl_priv; | |||
46 | /* Power management (not Tx power) structures */ | 59 | /* Power management (not Tx power) structures */ |
47 | 60 | ||
48 | struct iwl_power_vec_entry { | 61 | struct iwl_power_vec_entry { |
49 | struct iwl4965_powertable_cmd cmd; | 62 | struct iwl_powertable_cmd cmd; |
50 | u8 no_dtim; | 63 | u8 no_dtim; |
51 | }; | 64 | }; |
52 | 65 | ||
53 | struct iwl_power_mgr { | 66 | struct iwl_power_mgr { |
54 | spinlock_t lock; | 67 | spinlock_t lock; |
55 | struct iwl_power_vec_entry pwr_range_0[IWL_POWER_AC]; | 68 | struct iwl_power_vec_entry pwr_range_0[IWL_POWER_MAX]; |
56 | struct iwl_power_vec_entry pwr_range_1[IWL_POWER_AC]; | 69 | struct iwl_power_vec_entry pwr_range_1[IWL_POWER_MAX]; |
57 | struct iwl_power_vec_entry pwr_range_2[IWL_POWER_AC]; | 70 | struct iwl_power_vec_entry pwr_range_2[IWL_POWER_MAX]; |
58 | u32 dtim_period; | 71 | u32 dtim_period; |
59 | /* final power level that used to calculate final power command */ | 72 | /* final power level that used to calculate final power command */ |
60 | u8 power_mode; | 73 | u8 power_mode; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h index 70d9c7568b98..ee5afd48d3af 100644 --- a/drivers/net/wireless/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/iwlwifi/iwl-prph.h | |||
@@ -84,14 +84,16 @@ | |||
84 | #define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200) | 84 | #define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200) |
85 | #define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800) | 85 | #define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800) |
86 | 86 | ||
87 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | ||
88 | 87 | ||
89 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | 88 | #define APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS (0x00400000) |
89 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | ||
90 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | ||
91 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | ||
92 | #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ | ||
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) | ||
90 | 94 | ||
91 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | ||
92 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | ||
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x01000000) | ||
94 | 95 | ||
96 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | ||
95 | 97 | ||
96 | /** | 98 | /** |
97 | * BSM (Bootstrap State Machine) | 99 | * BSM (Bootstrap State Machine) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index e2d9afba38a5..f3f6ea49fdd2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -791,7 +791,7 @@ static inline void iwl_dbg_report_frame(struct iwl_priv *priv, | |||
791 | 791 | ||
792 | static void iwl_add_radiotap(struct iwl_priv *priv, | 792 | static void iwl_add_radiotap(struct iwl_priv *priv, |
793 | struct sk_buff *skb, | 793 | struct sk_buff *skb, |
794 | struct iwl4965_rx_phy_res *rx_start, | 794 | struct iwl_rx_phy_res *rx_start, |
795 | struct ieee80211_rx_status *stats, | 795 | struct ieee80211_rx_status *stats, |
796 | u32 ampdu_status) | 796 | u32 ampdu_status) |
797 | { | 797 | { |
@@ -1010,8 +1010,8 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
1010 | struct ieee80211_rx_status *stats) | 1010 | struct ieee80211_rx_status *stats) |
1011 | { | 1011 | { |
1012 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | 1012 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
1013 | struct iwl4965_rx_phy_res *rx_start = (include_phy) ? | 1013 | struct iwl_rx_phy_res *rx_start = (include_phy) ? |
1014 | (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL; | 1014 | (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : NULL; |
1015 | struct ieee80211_hdr *hdr; | 1015 | struct ieee80211_hdr *hdr; |
1016 | u16 len; | 1016 | u16 len; |
1017 | __le32 *rx_end; | 1017 | __le32 *rx_end; |
@@ -1020,7 +1020,7 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
1020 | u32 ampdu_status_legacy; | 1020 | u32 ampdu_status_legacy; |
1021 | 1021 | ||
1022 | if (!include_phy && priv->last_phy_res[0]) | 1022 | if (!include_phy && priv->last_phy_res[0]) |
1023 | rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1]; | 1023 | rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1]; |
1024 | 1024 | ||
1025 | if (!rx_start) { | 1025 | if (!rx_start) { |
1026 | IWL_ERROR("MPDU frame without a PHY data\n"); | 1026 | IWL_ERROR("MPDU frame without a PHY data\n"); |
@@ -1032,8 +1032,8 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
1032 | 1032 | ||
1033 | len = le16_to_cpu(rx_start->byte_count); | 1033 | len = le16_to_cpu(rx_start->byte_count); |
1034 | 1034 | ||
1035 | rx_end = (__le32 *) ((u8 *) &pkt->u.raw[0] + | 1035 | rx_end = (__le32 *)((u8 *) &pkt->u.raw[0] + |
1036 | sizeof(struct iwl4965_rx_phy_res) + | 1036 | sizeof(struct iwl_rx_phy_res) + |
1037 | rx_start->cfg_phy_cnt + len); | 1037 | rx_start->cfg_phy_cnt + len); |
1038 | 1038 | ||
1039 | } else { | 1039 | } else { |
@@ -1084,40 +1084,13 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv, | |||
1084 | } | 1084 | } |
1085 | 1085 | ||
1086 | /* Calc max signal level (dBm) among 3 possible receivers */ | 1086 | /* Calc max signal level (dBm) among 3 possible receivers */ |
1087 | static int iwl_calc_rssi(struct iwl_priv *priv, | 1087 | static inline int iwl_calc_rssi(struct iwl_priv *priv, |
1088 | struct iwl4965_rx_phy_res *rx_resp) | 1088 | struct iwl_rx_phy_res *rx_resp) |
1089 | { | 1089 | { |
1090 | /* data from PHY/DSP regarding signal strength, etc., | 1090 | return priv->cfg->ops->utils->calc_rssi(priv, rx_resp); |
1091 | * contents are always there, not configurable by host. */ | ||
1092 | struct iwl4965_rx_non_cfg_phy *ncphy = | ||
1093 | (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy; | ||
1094 | u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK) | ||
1095 | >> IWL_AGC_DB_POS; | ||
1096 | |||
1097 | u32 valid_antennae = | ||
1098 | (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK) | ||
1099 | >> RX_PHY_FLAGS_ANTENNAE_OFFSET; | ||
1100 | u8 max_rssi = 0; | ||
1101 | u32 i; | ||
1102 | |||
1103 | /* Find max rssi among 3 possible receivers. | ||
1104 | * These values are measured by the digital signal processor (DSP). | ||
1105 | * They should stay fairly constant even as the signal strength varies, | ||
1106 | * if the radio's automatic gain control (AGC) is working right. | ||
1107 | * AGC value (see below) will provide the "interesting" info. */ | ||
1108 | for (i = 0; i < 3; i++) | ||
1109 | if (valid_antennae & (1 << i)) | ||
1110 | max_rssi = max(ncphy->rssi_info[i << 1], max_rssi); | ||
1111 | |||
1112 | IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n", | ||
1113 | ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4], | ||
1114 | max_rssi, agc); | ||
1115 | |||
1116 | /* dBm = max_rssi dB - agc dB - constant. | ||
1117 | * Higher AGC (higher radio gain) means lower signal. */ | ||
1118 | return max_rssi - agc - IWL_RSSI_OFFSET; | ||
1119 | } | 1091 | } |
1120 | 1092 | ||
1093 | |||
1121 | static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) | 1094 | static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) |
1122 | { | 1095 | { |
1123 | unsigned long flags; | 1096 | unsigned long flags; |
@@ -1180,9 +1153,9 @@ void iwl_rx_reply_rx(struct iwl_priv *priv, | |||
1180 | * this rx packet for legacy frames, | 1153 | * this rx packet for legacy frames, |
1181 | * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */ | 1154 | * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */ |
1182 | int include_phy = (pkt->hdr.cmd == REPLY_RX); | 1155 | int include_phy = (pkt->hdr.cmd == REPLY_RX); |
1183 | struct iwl4965_rx_phy_res *rx_start = (include_phy) ? | 1156 | struct iwl_rx_phy_res *rx_start = (include_phy) ? |
1184 | (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : | 1157 | (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : |
1185 | (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1]; | 1158 | (struct iwl_rx_phy_res *)&priv->last_phy_res[1]; |
1186 | __le32 *rx_end; | 1159 | __le32 *rx_end; |
1187 | unsigned int len = 0; | 1160 | unsigned int len = 0; |
1188 | u16 fc; | 1161 | u16 fc; |
@@ -1210,7 +1183,7 @@ void iwl_rx_reply_rx(struct iwl_priv *priv, | |||
1210 | 1183 | ||
1211 | if (!include_phy) { | 1184 | if (!include_phy) { |
1212 | if (priv->last_phy_res[0]) | 1185 | if (priv->last_phy_res[0]) |
1213 | rx_start = (struct iwl4965_rx_phy_res *) | 1186 | rx_start = (struct iwl_rx_phy_res *) |
1214 | &priv->last_phy_res[1]; | 1187 | &priv->last_phy_res[1]; |
1215 | else | 1188 | else |
1216 | rx_start = NULL; | 1189 | rx_start = NULL; |
@@ -1227,7 +1200,7 @@ void iwl_rx_reply_rx(struct iwl_priv *priv, | |||
1227 | 1200 | ||
1228 | len = le16_to_cpu(rx_start->byte_count); | 1201 | len = le16_to_cpu(rx_start->byte_count); |
1229 | rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt + | 1202 | rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt + |
1230 | sizeof(struct iwl4965_rx_phy_res) + len); | 1203 | sizeof(struct iwl_rx_phy_res) + len); |
1231 | } else { | 1204 | } else { |
1232 | struct iwl4965_rx_mpdu_res_start *amsdu = | 1205 | struct iwl4965_rx_mpdu_res_start *amsdu = |
1233 | (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw; | 1206 | (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw; |
@@ -1316,6 +1289,6 @@ void iwl_rx_reply_rx_phy(struct iwl_priv *priv, | |||
1316 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | 1289 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
1317 | priv->last_phy_res[0] = 1; | 1290 | priv->last_phy_res[0] = 1; |
1318 | memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), | 1291 | memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), |
1319 | sizeof(struct iwl4965_rx_phy_res)); | 1292 | sizeof(struct iwl_rx_phy_res)); |
1320 | } | 1293 | } |
1321 | EXPORT_SYMBOL(iwl_rx_reply_rx_phy); | 1294 | EXPORT_SYMBOL(iwl_rx_reply_rx_phy); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c index efc750d2fc5c..9bb6adb28b73 100644 --- a/drivers/net/wireless/iwlwifi/iwl-scan.c +++ b/drivers/net/wireless/iwlwifi/iwl-scan.c | |||
@@ -202,6 +202,7 @@ static int iwl_send_scan_abort(struct iwl_priv *priv) | |||
202 | clear_bit(STATUS_SCAN_HW, &priv->status); | 202 | clear_bit(STATUS_SCAN_HW, &priv->status); |
203 | } | 203 | } |
204 | 204 | ||
205 | priv->alloc_rxb_skb--; | ||
205 | dev_kfree_skb_any(cmd.meta.u.skb); | 206 | dev_kfree_skb_any(cmd.meta.u.skb); |
206 | 207 | ||
207 | return ret; | 208 | return ret; |
@@ -270,6 +271,7 @@ static void iwl_rx_scan_results_notif(struct iwl_priv *priv, | |||
270 | static void iwl_rx_scan_complete_notif(struct iwl_priv *priv, | 271 | static void iwl_rx_scan_complete_notif(struct iwl_priv *priv, |
271 | struct iwl_rx_mem_buffer *rxb) | 272 | struct iwl_rx_mem_buffer *rxb) |
272 | { | 273 | { |
274 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
273 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; | 275 | struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; |
274 | struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | 276 | struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw; |
275 | 277 | ||
@@ -277,6 +279,7 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv, | |||
277 | scan_notif->scanned_channels, | 279 | scan_notif->scanned_channels, |
278 | scan_notif->tsf_low, | 280 | scan_notif->tsf_low, |
279 | scan_notif->tsf_high, scan_notif->status); | 281 | scan_notif->tsf_high, scan_notif->status); |
282 | #endif | ||
280 | 283 | ||
281 | /* The HW is no longer scanning */ | 284 | /* The HW is no longer scanning */ |
282 | clear_bit(STATUS_SCAN_HW, &priv->status); | 285 | clear_bit(STATUS_SCAN_HW, &priv->status); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c index 6d1467d0bd9d..60a6e0106036 100644 --- a/drivers/net/wireless/iwlwifi/iwl-sta.c +++ b/drivers/net/wireless/iwlwifi/iwl-sta.c | |||
@@ -823,7 +823,7 @@ int iwl_send_lq_cmd(struct iwl_priv *priv, | |||
823 | if (lq->sta_id == 0xFF) | 823 | if (lq->sta_id == 0xFF) |
824 | lq->sta_id = IWL_AP_ID; | 824 | lq->sta_id = IWL_AP_ID; |
825 | 825 | ||
826 | iwl_dump_lq_cmd(priv,lq); | 826 | iwl_dump_lq_cmd(priv, lq); |
827 | 827 | ||
828 | if (iwl_is_associated(priv) && priv->assoc_station_added) | 828 | if (iwl_is_associated(priv) && priv->assoc_station_added) |
829 | return iwl_send_cmd(priv, &cmd); | 829 | return iwl_send_cmd(priv, &cmd); |
@@ -839,7 +839,7 @@ EXPORT_SYMBOL(iwl_send_lq_cmd); | |||
839 | * for automatic fallback during transmission. | 839 | * for automatic fallback during transmission. |
840 | * | 840 | * |
841 | * NOTE: This sets up a default set of values. These will be replaced later | 841 | * NOTE: This sets up a default set of values. These will be replaced later |
842 | * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of | 842 | * if the driver's iwl-agn-rs rate scaling algorithm is used, instead of |
843 | * rc80211_simple. | 843 | * rc80211_simple. |
844 | * | 844 | * |
845 | * NOTE: Run REPLY_ADD_STA command to set up station table entry, before | 845 | * NOTE: Run REPLY_ADD_STA command to set up station table entry, before |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index 9b50b1052b09..aa98c76d8195 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -208,11 +208,12 @@ EXPORT_SYMBOL(iwl_txq_update_write_ptr); | |||
208 | * Free all buffers. | 208 | * Free all buffers. |
209 | * 0-fill, but do not free "txq" descriptor structure. | 209 | * 0-fill, but do not free "txq" descriptor structure. |
210 | */ | 210 | */ |
211 | static void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq) | 211 | static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id) |
212 | { | 212 | { |
213 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; | ||
213 | struct iwl_queue *q = &txq->q; | 214 | struct iwl_queue *q = &txq->q; |
214 | struct pci_dev *dev = priv->pci_dev; | 215 | struct pci_dev *dev = priv->pci_dev; |
215 | int len; | 216 | int i, slots_num, len; |
216 | 217 | ||
217 | if (q->n_bd == 0) | 218 | if (q->n_bd == 0) |
218 | return; | 219 | return; |
@@ -227,7 +228,12 @@ static void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq) | |||
227 | len += IWL_MAX_SCAN_SIZE; | 228 | len += IWL_MAX_SCAN_SIZE; |
228 | 229 | ||
229 | /* De-alloc array of command/tx buffers */ | 230 | /* De-alloc array of command/tx buffers */ |
230 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | 231 | slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? |
232 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | ||
233 | for (i = 0; i < slots_num; i++) | ||
234 | kfree(txq->cmd[i]); | ||
235 | if (txq_id == IWL_CMD_QUEUE_NUM) | ||
236 | kfree(txq->cmd[slots_num]); | ||
231 | 237 | ||
232 | /* De-alloc circular buffer of TFDs */ | 238 | /* De-alloc circular buffer of TFDs */ |
233 | if (txq->q.n_bd) | 239 | if (txq->q.n_bd) |
@@ -400,8 +406,7 @@ static int iwl_tx_queue_init(struct iwl_priv *priv, | |||
400 | struct iwl_tx_queue *txq, | 406 | struct iwl_tx_queue *txq, |
401 | int slots_num, u32 txq_id) | 407 | int slots_num, u32 txq_id) |
402 | { | 408 | { |
403 | struct pci_dev *dev = priv->pci_dev; | 409 | int i, len; |
404 | int len; | ||
405 | int rc = 0; | 410 | int rc = 0; |
406 | 411 | ||
407 | /* | 412 | /* |
@@ -412,17 +417,25 @@ static int iwl_tx_queue_init(struct iwl_priv *priv, | |||
412 | * For normal Tx queues (all other queues), no super-size command | 417 | * For normal Tx queues (all other queues), no super-size command |
413 | * space is needed. | 418 | * space is needed. |
414 | */ | 419 | */ |
415 | len = sizeof(struct iwl_cmd) * slots_num; | 420 | len = sizeof(struct iwl_cmd); |
416 | if (txq_id == IWL_CMD_QUEUE_NUM) | 421 | for (i = 0; i <= slots_num; i++) { |
417 | len += IWL_MAX_SCAN_SIZE; | 422 | if (i == slots_num) { |
418 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | 423 | if (txq_id == IWL_CMD_QUEUE_NUM) |
419 | if (!txq->cmd) | 424 | len += IWL_MAX_SCAN_SIZE; |
420 | return -ENOMEM; | 425 | else |
426 | continue; | ||
427 | } | ||
428 | |||
429 | txq->cmd[i] = kmalloc(len, GFP_KERNEL | GFP_DMA); | ||
430 | if (!txq->cmd[i]) | ||
431 | return -ENOMEM; | ||
432 | } | ||
421 | 433 | ||
422 | /* Alloc driver data array and TFD circular buffer */ | 434 | /* Alloc driver data array and TFD circular buffer */ |
423 | rc = iwl_tx_queue_alloc(priv, txq, txq_id); | 435 | rc = iwl_tx_queue_alloc(priv, txq, txq_id); |
424 | if (rc) { | 436 | if (rc) { |
425 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | 437 | for (i = 0; i < slots_num; i++) |
438 | kfree(txq->cmd[i]); | ||
426 | 439 | ||
427 | return -ENOMEM; | 440 | return -ENOMEM; |
428 | } | 441 | } |
@@ -451,7 +464,7 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv) | |||
451 | 464 | ||
452 | /* Tx queues */ | 465 | /* Tx queues */ |
453 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) | 466 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) |
454 | iwl_tx_queue_free(priv, &priv->txq[txq_id]); | 467 | iwl_tx_queue_free(priv, txq_id); |
455 | 468 | ||
456 | /* Keep-warm buffer */ | 469 | /* Keep-warm buffer */ |
457 | iwl_kw_free(priv); | 470 | iwl_kw_free(priv); |
@@ -859,7 +872,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
859 | txq->txb[q->write_ptr].skb[0] = skb; | 872 | txq->txb[q->write_ptr].skb[0] = skb; |
860 | 873 | ||
861 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | 874 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ |
862 | out_cmd = &txq->cmd[idx]; | 875 | out_cmd = txq->cmd[idx]; |
863 | tx_cmd = &out_cmd->cmd.tx; | 876 | tx_cmd = &out_cmd->cmd.tx; |
864 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | 877 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); |
865 | memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd)); | 878 | memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd)); |
@@ -899,14 +912,15 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
899 | 912 | ||
900 | /* Physical address of this Tx command's header (not MAC header!), | 913 | /* Physical address of this Tx command's header (not MAC header!), |
901 | * within command buffer array. */ | 914 | * within command buffer array. */ |
902 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx + | 915 | txcmd_phys = pci_map_single(priv->pci_dev, out_cmd, |
903 | offsetof(struct iwl_cmd, hdr); | 916 | sizeof(struct iwl_cmd), PCI_DMA_TODEVICE); |
917 | txcmd_phys += offsetof(struct iwl_cmd, hdr); | ||
904 | 918 | ||
905 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 919 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
906 | * first entry */ | 920 | * first entry */ |
907 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); | 921 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
908 | 922 | ||
909 | if (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT)) | 923 | if (info->control.hw_key) |
910 | iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id); | 924 | iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id); |
911 | 925 | ||
912 | /* Set up TFD's 2nd entry to point directly to remainder of skb, | 926 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
@@ -962,16 +976,16 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
962 | if (ret) | 976 | if (ret) |
963 | return ret; | 977 | return ret; |
964 | 978 | ||
965 | if ((iwl_queue_space(q) < q->high_mark) | 979 | if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) { |
966 | && priv->mac80211_registered) { | ||
967 | if (wait_write_ptr) { | 980 | if (wait_write_ptr) { |
968 | spin_lock_irqsave(&priv->lock, flags); | 981 | spin_lock_irqsave(&priv->lock, flags); |
969 | txq->need_update = 1; | 982 | txq->need_update = 1; |
970 | iwl_txq_update_write_ptr(priv, txq); | 983 | iwl_txq_update_write_ptr(priv, txq); |
971 | spin_unlock_irqrestore(&priv->lock, flags); | 984 | spin_unlock_irqrestore(&priv->lock, flags); |
985 | } else { | ||
986 | ieee80211_stop_queue(priv->hw, | ||
987 | skb_get_queue_mapping(skb)); | ||
972 | } | 988 | } |
973 | |||
974 | ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb)); | ||
975 | } | 989 | } |
976 | 990 | ||
977 | return 0; | 991 | return 0; |
@@ -1004,7 +1018,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1004 | u32 idx; | 1018 | u32 idx; |
1005 | u16 fix_size; | 1019 | u16 fix_size; |
1006 | dma_addr_t phys_addr; | 1020 | dma_addr_t phys_addr; |
1007 | int ret; | 1021 | int len, ret; |
1008 | unsigned long flags; | 1022 | unsigned long flags; |
1009 | 1023 | ||
1010 | cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len); | 1024 | cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len); |
@@ -1034,7 +1048,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1034 | control_flags = (u32 *) tfd; | 1048 | control_flags = (u32 *) tfd; |
1035 | 1049 | ||
1036 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); | 1050 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
1037 | out_cmd = &txq->cmd[idx]; | 1051 | out_cmd = txq->cmd[idx]; |
1038 | 1052 | ||
1039 | out_cmd->hdr.cmd = cmd->id; | 1053 | out_cmd->hdr.cmd = cmd->id; |
1040 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | 1054 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); |
@@ -1048,9 +1062,11 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1048 | INDEX_TO_SEQ(q->write_ptr)); | 1062 | INDEX_TO_SEQ(q->write_ptr)); |
1049 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) | 1063 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
1050 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | 1064 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); |
1051 | 1065 | len = (idx == TFD_CMD_SLOTS) ? | |
1052 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | 1066 | IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd); |
1053 | offsetof(struct iwl_cmd, hdr); | 1067 | phys_addr = pci_map_single(priv->pci_dev, out_cmd, len, |
1068 | PCI_DMA_TODEVICE); | ||
1069 | phys_addr += offsetof(struct iwl_cmd, hdr); | ||
1054 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); | 1070 | iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); |
1055 | 1071 | ||
1056 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | 1072 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " |
@@ -1115,6 +1131,9 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) | |||
1115 | { | 1131 | { |
1116 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; | 1132 | struct iwl_tx_queue *txq = &priv->txq[txq_id]; |
1117 | struct iwl_queue *q = &txq->q; | 1133 | struct iwl_queue *q = &txq->q; |
1134 | struct iwl_tfd_frame *bd = &txq->bd[index]; | ||
1135 | dma_addr_t dma_addr; | ||
1136 | int is_odd, buf_len; | ||
1118 | int nfreed = 0; | 1137 | int nfreed = 0; |
1119 | 1138 | ||
1120 | if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { | 1139 | if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { |
@@ -1132,6 +1151,19 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) | |||
1132 | q->write_ptr, q->read_ptr); | 1151 | q->write_ptr, q->read_ptr); |
1133 | queue_work(priv->workqueue, &priv->restart); | 1152 | queue_work(priv->workqueue, &priv->restart); |
1134 | } | 1153 | } |
1154 | is_odd = (index/2) & 0x1; | ||
1155 | if (is_odd) { | ||
1156 | dma_addr = IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) | | ||
1157 | (IWL_GET_BITS(bd->pa[index], | ||
1158 | tb2_addr_hi20) << 16); | ||
1159 | buf_len = IWL_GET_BITS(bd->pa[index], tb2_len); | ||
1160 | } else { | ||
1161 | dma_addr = le32_to_cpu(bd->pa[index].tb1_addr); | ||
1162 | buf_len = IWL_GET_BITS(bd->pa[index], tb1_len); | ||
1163 | } | ||
1164 | |||
1165 | pci_unmap_single(priv->pci_dev, dma_addr, buf_len, | ||
1166 | PCI_DMA_TODEVICE); | ||
1135 | nfreed++; | 1167 | nfreed++; |
1136 | } | 1168 | } |
1137 | } | 1169 | } |
@@ -1163,7 +1195,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1163 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | 1195 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); |
1164 | 1196 | ||
1165 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | 1197 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); |
1166 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | 1198 | cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; |
1167 | 1199 | ||
1168 | /* Input error checking is done when commands are added to queue. */ | 1200 | /* Input error checking is done when commands are added to queue. */ |
1169 | if (cmd->meta.flags & CMD_WANT_SKB) { | 1201 | if (cmd->meta.flags & CMD_WANT_SKB) { |
@@ -1391,7 +1423,7 @@ static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1391 | /* For each frame attempted in aggregation, | 1423 | /* For each frame attempted in aggregation, |
1392 | * update driver's record of tx frame's status. */ | 1424 | * update driver's record of tx frame's status. */ |
1393 | for (i = 0; i < agg->frame_count ; i++) { | 1425 | for (i = 0; i < agg->frame_count ; i++) { |
1394 | ack = bitmap & (1 << i); | 1426 | ack = bitmap & (1ULL << i); |
1395 | successes += !!ack; | 1427 | successes += !!ack; |
1396 | IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", | 1428 | IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", |
1397 | ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff, | 1429 | ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff, |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 4a22d3fba75b..444847ab1b5a 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -275,10 +275,8 @@ static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv, | |||
275 | return 0; | 275 | return 0; |
276 | 276 | ||
277 | error: | 277 | error: |
278 | if (txq->txb) { | 278 | kfree(txq->txb); |
279 | kfree(txq->txb); | 279 | txq->txb = NULL; |
280 | txq->txb = NULL; | ||
281 | } | ||
282 | 280 | ||
283 | return -ENOMEM; | 281 | return -ENOMEM; |
284 | } | 282 | } |
@@ -365,10 +363,8 @@ void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *t | |||
365 | txq->q.n_bd, txq->bd, txq->q.dma_addr); | 363 | txq->q.n_bd, txq->bd, txq->q.dma_addr); |
366 | 364 | ||
367 | /* De-alloc array of per-TFD driver data */ | 365 | /* De-alloc array of per-TFD driver data */ |
368 | if (txq->txb) { | 366 | kfree(txq->txb); |
369 | kfree(txq->txb); | 367 | txq->txb = NULL; |
370 | txq->txb = NULL; | ||
371 | } | ||
372 | 368 | ||
373 | /* 0-fill queue descriptor structure */ | 369 | /* 0-fill queue descriptor structure */ |
374 | memset(txq, 0, sizeof(*txq)); | 370 | memset(txq, 0, sizeof(*txq)); |
@@ -2667,7 +2663,7 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2667 | * first entry */ | 2663 | * first entry */ |
2668 | iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); | 2664 | iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
2669 | 2665 | ||
2670 | if (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT)) | 2666 | if (info->control.hw_key) |
2671 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0); | 2667 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0); |
2672 | 2668 | ||
2673 | /* Set up TFD's 2nd entry to point directly to remainder of skb, | 2669 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
@@ -2703,9 +2699,8 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb) | |||
2703 | 2699 | ||
2704 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 2700 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
2705 | txq->need_update = 1; | 2701 | txq->need_update = 1; |
2706 | if (qc) { | 2702 | if (qc) |
2707 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | 2703 | priv->stations[sta_id].tid[tid].seq_number = seq_number; |
2708 | } | ||
2709 | } else { | 2704 | } else { |
2710 | wait_write_ptr = 1; | 2705 | wait_write_ptr = 1; |
2711 | txq->need_update = 0; | 2706 | txq->need_update = 0; |
@@ -3813,7 +3808,7 @@ int iwl3945_calc_db_from_ratio(int sig_ratio) | |||
3813 | /* 100:1 or higher, divide by 10 and use table, | 3808 | /* 100:1 or higher, divide by 10 and use table, |
3814 | * add 20 dB to make up for divide by 10 */ | 3809 | * add 20 dB to make up for divide by 10 */ |
3815 | if (sig_ratio >= 100) | 3810 | if (sig_ratio >= 100) |
3816 | return (20 + (int)ratio2dB[sig_ratio/10]); | 3811 | return 20 + (int)ratio2dB[sig_ratio/10]; |
3817 | 3812 | ||
3818 | /* We shouldn't see this */ | 3813 | /* We shouldn't see this */ |
3819 | if (sig_ratio < 1) | 3814 | if (sig_ratio < 1) |
@@ -5088,7 +5083,7 @@ static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv) | |||
5088 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, | 5083 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, |
5089 | * looking at all data. | 5084 | * looking at all data. |
5090 | */ | 5085 | */ |
5091 | static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len) | 5086 | static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len) |
5092 | { | 5087 | { |
5093 | u32 val; | 5088 | u32 val; |
5094 | u32 save_len = len; | 5089 | u32 save_len = len; |
@@ -5237,7 +5232,7 @@ static int iwl3945_verify_bsm(struct iwl3945_priv *priv) | |||
5237 | val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG); | 5232 | val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG); |
5238 | for (reg = BSM_SRAM_LOWER_BOUND; | 5233 | for (reg = BSM_SRAM_LOWER_BOUND; |
5239 | reg < BSM_SRAM_LOWER_BOUND + len; | 5234 | reg < BSM_SRAM_LOWER_BOUND + len; |
5240 | reg += sizeof(u32), image ++) { | 5235 | reg += sizeof(u32), image++) { |
5241 | val = iwl3945_read_prph(priv, reg); | 5236 | val = iwl3945_read_prph(priv, reg); |
5242 | if (val != le32_to_cpu(*image)) { | 5237 | if (val != le32_to_cpu(*image)) { |
5243 | IWL_ERROR("BSM uCode verification failed at " | 5238 | IWL_ERROR("BSM uCode verification failed at " |
@@ -6336,7 +6331,7 @@ static void iwl3945_bg_post_associate(struct work_struct *data) | |||
6336 | DECLARE_MAC_BUF(mac); | 6331 | DECLARE_MAC_BUF(mac); |
6337 | 6332 | ||
6338 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | 6333 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { |
6339 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | 6334 | IWL_ERROR("%s Should not be called in AP mode\n", __func__); |
6340 | return; | 6335 | return; |
6341 | } | 6336 | } |
6342 | 6337 | ||
@@ -6417,7 +6412,7 @@ static void iwl3945_bg_post_associate(struct work_struct *data) | |||
6417 | 6412 | ||
6418 | default: | 6413 | default: |
6419 | IWL_ERROR("%s Should not be called in %d mode\n", | 6414 | IWL_ERROR("%s Should not be called in %d mode\n", |
6420 | __FUNCTION__, priv->iw_mode); | 6415 | __func__, priv->iw_mode); |
6421 | break; | 6416 | break; |
6422 | } | 6417 | } |
6423 | 6418 | ||
@@ -6594,12 +6589,6 @@ static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
6594 | 6589 | ||
6595 | IWL_DEBUG_MAC80211("enter\n"); | 6590 | IWL_DEBUG_MAC80211("enter\n"); |
6596 | 6591 | ||
6597 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | ||
6598 | IWL_DEBUG_MAC80211("leave - monitor\n"); | ||
6599 | dev_kfree_skb_any(skb); | ||
6600 | return 0; | ||
6601 | } | ||
6602 | |||
6603 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | 6592 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
6604 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); | 6593 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
6605 | 6594 | ||
@@ -7456,7 +7445,7 @@ static ssize_t show_measurement(struct device *d, | |||
7456 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 7445 | struct iwl3945_priv *priv = dev_get_drvdata(d); |
7457 | struct iwl3945_spectrum_notification measure_report; | 7446 | struct iwl3945_spectrum_notification measure_report; |
7458 | u32 size = sizeof(measure_report), len = 0, ofs = 0; | 7447 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
7459 | u8 *data = (u8 *) & measure_report; | 7448 | u8 *data = (u8 *)&measure_report; |
7460 | unsigned long flags; | 7449 | unsigned long flags; |
7461 | 7450 | ||
7462 | spin_lock_irqsave(&priv->lock, flags); | 7451 | spin_lock_irqsave(&priv->lock, flags); |
@@ -7627,7 +7616,7 @@ static ssize_t show_power_level(struct device *d, | |||
7627 | else | 7616 | else |
7628 | p += sprintf(p, " \n"); | 7617 | p += sprintf(p, " \n"); |
7629 | 7618 | ||
7630 | return (p - buf + 1); | 7619 | return p - buf + 1; |
7631 | 7620 | ||
7632 | } | 7621 | } |
7633 | 7622 | ||
@@ -7649,7 +7638,7 @@ static ssize_t show_statistics(struct device *d, | |||
7649 | struct iwl3945_priv *priv = dev_get_drvdata(d); | 7638 | struct iwl3945_priv *priv = dev_get_drvdata(d); |
7650 | u32 size = sizeof(struct iwl3945_notif_statistics); | 7639 | u32 size = sizeof(struct iwl3945_notif_statistics); |
7651 | u32 len = 0, ofs = 0; | 7640 | u32 len = 0, ofs = 0; |
7652 | u8 *data = (u8 *) & priv->statistics; | 7641 | u8 *data = (u8 *)&priv->statistics; |
7653 | int rc = 0; | 7642 | int rc = 0; |
7654 | 7643 | ||
7655 | if (!iwl3945_is_alive(priv)) | 7644 | if (!iwl3945_is_alive(priv)) |
@@ -7899,8 +7888,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
7899 | priv->ibss_beacon = NULL; | 7888 | priv->ibss_beacon = NULL; |
7900 | 7889 | ||
7901 | /* Tell mac80211 our characteristics */ | 7890 | /* Tell mac80211 our characteristics */ |
7902 | hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 7891 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
7903 | IEEE80211_HW_SIGNAL_DBM | | ||
7904 | IEEE80211_HW_NOISE_DBM; | 7892 | IEEE80211_HW_NOISE_DBM; |
7905 | 7893 | ||
7906 | /* 4 EDCA QOS priorities */ | 7894 | /* 4 EDCA QOS priorities */ |
@@ -8004,16 +7992,16 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
8004 | 7992 | ||
8005 | /* nic init */ | 7993 | /* nic init */ |
8006 | iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 7994 | iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
8007 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | 7995 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
8008 | 7996 | ||
8009 | iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | 7997 | iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
8010 | err = iwl3945_poll_bit(priv, CSR_GP_CNTRL, | 7998 | err = iwl3945_poll_bit(priv, CSR_GP_CNTRL, |
8011 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | 7999 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
8012 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | 8000 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); |
8013 | if (err < 0) { | 8001 | if (err < 0) { |
8014 | IWL_DEBUG_INFO("Failed to init the card\n"); | 8002 | IWL_DEBUG_INFO("Failed to init the card\n"); |
8015 | goto out_remove_sysfs; | 8003 | goto out_remove_sysfs; |
8016 | } | 8004 | } |
8017 | /* Read the EEPROM */ | 8005 | /* Read the EEPROM */ |
8018 | err = iwl3945_eeprom_init(priv); | 8006 | err = iwl3945_eeprom_init(priv); |
8019 | if (err) { | 8007 | if (err) { |
@@ -8115,9 +8103,8 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | |||
8115 | iwl3945_unset_hw_setting(priv); | 8103 | iwl3945_unset_hw_setting(priv); |
8116 | iwl3945_clear_stations_table(priv); | 8104 | iwl3945_clear_stations_table(priv); |
8117 | 8105 | ||
8118 | if (priv->mac80211_registered) { | 8106 | if (priv->mac80211_registered) |
8119 | ieee80211_unregister_hw(priv->hw); | 8107 | ieee80211_unregister_hw(priv->hw); |
8120 | } | ||
8121 | 8108 | ||
8122 | /*netif_stop_queue(dev); */ | 8109 | /*netif_stop_queue(dev); */ |
8123 | flush_workqueue(priv->workqueue); | 8110 | flush_workqueue(priv->workqueue); |
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c index 14d5d61cec4c..bd32ac0b4e07 100644 --- a/drivers/net/wireless/libertas/main.c +++ b/drivers/net/wireless/libertas/main.c | |||
@@ -297,9 +297,7 @@ static ssize_t lbs_rtap_set(struct device *dev, | |||
297 | lbs_add_rtap(priv); | 297 | lbs_add_rtap(priv); |
298 | } | 298 | } |
299 | priv->monitormode = monitor_mode; | 299 | priv->monitormode = monitor_mode; |
300 | } | 300 | } else { |
301 | |||
302 | else { | ||
303 | if (!priv->monitormode) | 301 | if (!priv->monitormode) |
304 | return strlen(buf); | 302 | return strlen(buf); |
305 | priv->monitormode = 0; | 303 | priv->monitormode = 0; |
@@ -1242,8 +1240,6 @@ int lbs_start_card(struct lbs_private *priv) | |||
1242 | lbs_pr_err("cannot register ethX device\n"); | 1240 | lbs_pr_err("cannot register ethX device\n"); |
1243 | goto done; | 1241 | goto done; |
1244 | } | 1242 | } |
1245 | if (device_create_file(&dev->dev, &dev_attr_lbs_rtap)) | ||
1246 | lbs_pr_err("cannot register lbs_rtap attribute\n"); | ||
1247 | 1243 | ||
1248 | lbs_update_channel(priv); | 1244 | lbs_update_channel(priv); |
1249 | 1245 | ||
@@ -1275,6 +1271,13 @@ int lbs_start_card(struct lbs_private *priv) | |||
1275 | 1271 | ||
1276 | if (device_create_file(&dev->dev, &dev_attr_lbs_mesh)) | 1272 | if (device_create_file(&dev->dev, &dev_attr_lbs_mesh)) |
1277 | lbs_pr_err("cannot register lbs_mesh attribute\n"); | 1273 | lbs_pr_err("cannot register lbs_mesh attribute\n"); |
1274 | |||
1275 | /* While rtap isn't related to mesh, only mesh-enabled | ||
1276 | * firmware implements the rtap functionality via | ||
1277 | * CMD_802_11_MONITOR_MODE. | ||
1278 | */ | ||
1279 | if (device_create_file(&dev->dev, &dev_attr_lbs_rtap)) | ||
1280 | lbs_pr_err("cannot register lbs_rtap attribute\n"); | ||
1278 | } | 1281 | } |
1279 | } | 1282 | } |
1280 | 1283 | ||
@@ -1306,9 +1309,9 @@ void lbs_stop_card(struct lbs_private *priv) | |||
1306 | netif_carrier_off(priv->dev); | 1309 | netif_carrier_off(priv->dev); |
1307 | 1310 | ||
1308 | lbs_debugfs_remove_one(priv); | 1311 | lbs_debugfs_remove_one(priv); |
1309 | device_remove_file(&dev->dev, &dev_attr_lbs_rtap); | ||
1310 | if (priv->mesh_tlv) { | 1312 | if (priv->mesh_tlv) { |
1311 | device_remove_file(&dev->dev, &dev_attr_lbs_mesh); | 1313 | device_remove_file(&dev->dev, &dev_attr_lbs_mesh); |
1314 | device_remove_file(&dev->dev, &dev_attr_lbs_rtap); | ||
1312 | } | 1315 | } |
1313 | 1316 | ||
1314 | /* Flush pending command nodes */ | 1317 | /* Flush pending command nodes */ |
diff --git a/drivers/net/wireless/libertas/persistcfg.c b/drivers/net/wireless/libertas/persistcfg.c index 6d0ff8decaf7..3309a9c3cfef 100644 --- a/drivers/net/wireless/libertas/persistcfg.c +++ b/drivers/net/wireless/libertas/persistcfg.c | |||
@@ -48,7 +48,7 @@ static ssize_t bootflag_get(struct device *dev, | |||
48 | if (ret) | 48 | if (ret) |
49 | return ret; | 49 | return ret; |
50 | 50 | ||
51 | return snprintf(buf, 12, "0x%x\n", le32_to_cpu(defs.bootflag)); | 51 | return snprintf(buf, 12, "%d\n", le32_to_cpu(defs.bootflag)); |
52 | } | 52 | } |
53 | 53 | ||
54 | /** | 54 | /** |
@@ -63,8 +63,8 @@ static ssize_t bootflag_set(struct device *dev, struct device_attribute *attr, | |||
63 | int ret; | 63 | int ret; |
64 | 64 | ||
65 | memset(&cmd, 0, sizeof(cmd)); | 65 | memset(&cmd, 0, sizeof(cmd)); |
66 | ret = sscanf(buf, "%x", &datum); | 66 | ret = sscanf(buf, "%d", &datum); |
67 | if (ret != 1) | 67 | if ((ret != 1) || (datum > 1)) |
68 | return -EINVAL; | 68 | return -EINVAL; |
69 | 69 | ||
70 | *((__le32 *)&cmd.data[0]) = cpu_to_le32(!!datum); | 70 | *((__le32 *)&cmd.data[0]) = cpu_to_le32(!!datum); |
@@ -91,7 +91,7 @@ static ssize_t boottime_get(struct device *dev, | |||
91 | if (ret) | 91 | if (ret) |
92 | return ret; | 92 | return ret; |
93 | 93 | ||
94 | return snprintf(buf, 12, "0x%x\n", defs.boottime); | 94 | return snprintf(buf, 12, "%d\n", defs.boottime); |
95 | } | 95 | } |
96 | 96 | ||
97 | /** | 97 | /** |
@@ -106,8 +106,8 @@ static ssize_t boottime_set(struct device *dev, | |||
106 | int ret; | 106 | int ret; |
107 | 107 | ||
108 | memset(&cmd, 0, sizeof(cmd)); | 108 | memset(&cmd, 0, sizeof(cmd)); |
109 | ret = sscanf(buf, "%x", &datum); | 109 | ret = sscanf(buf, "%d", &datum); |
110 | if (ret != 1) | 110 | if ((ret != 1) || (datum > 255)) |
111 | return -EINVAL; | 111 | return -EINVAL; |
112 | 112 | ||
113 | /* A too small boot time will result in the device booting into | 113 | /* A too small boot time will result in the device booting into |
@@ -143,7 +143,7 @@ static ssize_t channel_get(struct device *dev, | |||
143 | if (ret) | 143 | if (ret) |
144 | return ret; | 144 | return ret; |
145 | 145 | ||
146 | return snprintf(buf, 12, "0x%x\n", le16_to_cpu(defs.channel)); | 146 | return snprintf(buf, 12, "%d\n", le16_to_cpu(defs.channel)); |
147 | } | 147 | } |
148 | 148 | ||
149 | /** | 149 | /** |
@@ -154,11 +154,11 @@ static ssize_t channel_set(struct device *dev, struct device_attribute *attr, | |||
154 | { | 154 | { |
155 | struct lbs_private *priv = to_net_dev(dev)->priv; | 155 | struct lbs_private *priv = to_net_dev(dev)->priv; |
156 | struct cmd_ds_mesh_config cmd; | 156 | struct cmd_ds_mesh_config cmd; |
157 | uint16_t datum; | 157 | uint32_t datum; |
158 | int ret; | 158 | int ret; |
159 | 159 | ||
160 | memset(&cmd, 0, sizeof(cmd)); | 160 | memset(&cmd, 0, sizeof(cmd)); |
161 | ret = sscanf(buf, "%hx", &datum); | 161 | ret = sscanf(buf, "%d", &datum); |
162 | if (ret != 1 || datum < 1 || datum > 11) | 162 | if (ret != 1 || datum < 1 || datum > 11) |
163 | return -EINVAL; | 163 | return -EINVAL; |
164 | 164 | ||
@@ -274,8 +274,8 @@ static ssize_t protocol_id_set(struct device *dev, | |||
274 | int ret; | 274 | int ret; |
275 | 275 | ||
276 | memset(&cmd, 0, sizeof(cmd)); | 276 | memset(&cmd, 0, sizeof(cmd)); |
277 | ret = sscanf(buf, "%x", &datum); | 277 | ret = sscanf(buf, "%d", &datum); |
278 | if (ret != 1) | 278 | if ((ret != 1) || (datum > 255)) |
279 | return -EINVAL; | 279 | return -EINVAL; |
280 | 280 | ||
281 | /* fetch all other Information Element parameters */ | 281 | /* fetch all other Information Element parameters */ |
@@ -328,8 +328,8 @@ static ssize_t metric_id_set(struct device *dev, struct device_attribute *attr, | |||
328 | int ret; | 328 | int ret; |
329 | 329 | ||
330 | memset(&cmd, 0, sizeof(cmd)); | 330 | memset(&cmd, 0, sizeof(cmd)); |
331 | ret = sscanf(buf, "%x", &datum); | 331 | ret = sscanf(buf, "%d", &datum); |
332 | if (ret != 1) | 332 | if ((ret != 1) || (datum > 255)) |
333 | return -EINVAL; | 333 | return -EINVAL; |
334 | 334 | ||
335 | /* fetch all other Information Element parameters */ | 335 | /* fetch all other Information Element parameters */ |
@@ -382,8 +382,8 @@ static ssize_t capability_set(struct device *dev, struct device_attribute *attr, | |||
382 | int ret; | 382 | int ret; |
383 | 383 | ||
384 | memset(&cmd, 0, sizeof(cmd)); | 384 | memset(&cmd, 0, sizeof(cmd)); |
385 | ret = sscanf(buf, "%x", &datum); | 385 | ret = sscanf(buf, "%d", &datum); |
386 | if (ret != 1) | 386 | if ((ret != 1) || (datum > 255)) |
387 | return -EINVAL; | 387 | return -EINVAL; |
388 | 388 | ||
389 | /* fetch all other Information Element parameters */ | 389 | /* fetch all other Information Element parameters */ |
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c index 5816230d58f8..248d31a7aa33 100644 --- a/drivers/net/wireless/mac80211_hwsim.c +++ b/drivers/net/wireless/mac80211_hwsim.c | |||
@@ -500,7 +500,7 @@ failed_hw: | |||
500 | device_unregister(data->dev); | 500 | device_unregister(data->dev); |
501 | failed_drvdata: | 501 | failed_drvdata: |
502 | ieee80211_free_hw(hw); | 502 | ieee80211_free_hw(hw); |
503 | hwsim_radios[i] = 0; | 503 | hwsim_radios[i] = NULL; |
504 | failed: | 504 | failed: |
505 | mac80211_hwsim_free(); | 505 | mac80211_hwsim_free(); |
506 | return err; | 506 | return err; |
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h index c6f27b9022f9..cac9a515b82d 100644 --- a/drivers/net/wireless/p54/p54.h +++ b/drivers/net/wireless/p54/p54.h | |||
@@ -52,6 +52,7 @@ struct p54_common { | |||
52 | int (*open)(struct ieee80211_hw *dev); | 52 | int (*open)(struct ieee80211_hw *dev); |
53 | void (*stop)(struct ieee80211_hw *dev); | 53 | void (*stop)(struct ieee80211_hw *dev); |
54 | int mode; | 54 | int mode; |
55 | struct mutex conf_mutex; | ||
55 | u8 mac_addr[ETH_ALEN]; | 56 | u8 mac_addr[ETH_ALEN]; |
56 | u8 bssid[ETH_ALEN]; | 57 | u8 bssid[ETH_ALEN]; |
57 | struct pda_iq_autocal_entry *iq_autocal; | 58 | struct pda_iq_autocal_entry *iq_autocal; |
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c index ffaf7a6b6810..4da89ea9b561 100644 --- a/drivers/net/wireless/p54/p54common.c +++ b/drivers/net/wireless/p54/p54common.c | |||
@@ -886,9 +886,12 @@ static void p54_remove_interface(struct ieee80211_hw *dev, | |||
886 | static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | 886 | static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) |
887 | { | 887 | { |
888 | int ret; | 888 | int ret; |
889 | struct p54_common *priv = dev->priv; | ||
889 | 890 | ||
891 | mutex_lock(&priv->conf_mutex); | ||
890 | ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq)); | 892 | ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq)); |
891 | p54_set_vdcf(dev); | 893 | p54_set_vdcf(dev); |
894 | mutex_unlock(&priv->conf_mutex); | ||
892 | return ret; | 895 | return ret; |
893 | } | 896 | } |
894 | 897 | ||
@@ -898,10 +901,12 @@ static int p54_config_interface(struct ieee80211_hw *dev, | |||
898 | { | 901 | { |
899 | struct p54_common *priv = dev->priv; | 902 | struct p54_common *priv = dev->priv; |
900 | 903 | ||
904 | mutex_lock(&priv->conf_mutex); | ||
901 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642); | 905 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642); |
902 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0); | 906 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0); |
903 | p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0); | 907 | p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0); |
904 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | 908 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); |
909 | mutex_unlock(&priv->conf_mutex); | ||
905 | return 0; | 910 | return 0; |
906 | } | 911 | } |
907 | 912 | ||
@@ -1009,6 +1014,7 @@ struct ieee80211_hw *p54_init_common(size_t priv_data_len) | |||
1009 | } | 1014 | } |
1010 | 1015 | ||
1011 | p54_init_vdcf(dev); | 1016 | p54_init_vdcf(dev); |
1017 | mutex_init(&priv->conf_mutex); | ||
1012 | 1018 | ||
1013 | return dev; | 1019 | return dev; |
1014 | } | 1020 | } |
diff --git a/drivers/net/wireless/prism54/isl_ioctl.c b/drivers/net/wireless/prism54/isl_ioctl.c index 97fa14e0a479..3d75a7137d3c 100644 --- a/drivers/net/wireless/prism54/isl_ioctl.c +++ b/drivers/net/wireless/prism54/isl_ioctl.c | |||
@@ -2518,7 +2518,7 @@ enum { | |||
2518 | 2518 | ||
2519 | #define PRISM2_HOSTAPD_MAX_BUF_SIZE 1024 | 2519 | #define PRISM2_HOSTAPD_MAX_BUF_SIZE 1024 |
2520 | #define PRISM2_HOSTAPD_GENERIC_ELEMENT_HDR_LEN \ | 2520 | #define PRISM2_HOSTAPD_GENERIC_ELEMENT_HDR_LEN \ |
2521 | ((int) (&((struct prism2_hostapd_param *) 0)->u.generic_elem.data)) | 2521 | offsetof(struct prism2_hostapd_param, u.generic_elem.data) |
2522 | 2522 | ||
2523 | /* Maximum length for algorithm names (-1 for nul termination) | 2523 | /* Maximum length for algorithm names (-1 for nul termination) |
2524 | * used in ioctl() */ | 2524 | * used in ioctl() */ |
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c index aa6dfb811c71..181a146b4768 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.c +++ b/drivers/net/wireless/rt2x00/rt2500pci.c | |||
@@ -1220,6 +1220,7 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1220 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1220 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1221 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1221 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1222 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); | 1222 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
1223 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len); | ||
1223 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1224 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
1224 | rt2x00_desc_write(txd, 0, word); | 1225 | rt2x00_desc_write(txd, 0, word); |
1225 | } | 1226 | } |
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c index 3558cb210747..cd5af656932d 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.c +++ b/drivers/net/wireless/rt2x00/rt2500usb.c | |||
@@ -633,6 +633,16 @@ static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev) | |||
633 | rt2x00dev->link.vgc_level = value; | 633 | rt2x00dev->link.vgc_level = value; |
634 | } | 634 | } |
635 | 635 | ||
636 | /* | ||
637 | * NOTE: This function is directly ported from legacy driver, but | ||
638 | * despite it being declared it was never called. Although link tuning | ||
639 | * sounds like a good idea, and usually works well for the other drivers, | ||
640 | * it does _not_ work with rt2500usb. Enabling this function will result | ||
641 | * in TX capabilities only until association kicks in. Immediately | ||
642 | * after the successful association all TX frames will be kept in the | ||
643 | * hardware queue and never transmitted. | ||
644 | */ | ||
645 | #if 0 | ||
636 | static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev) | 646 | static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev) |
637 | { | 647 | { |
638 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); | 648 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); |
@@ -752,6 +762,9 @@ dynamic_cca_tune: | |||
752 | rt2x00dev->link.vgc_level = r17; | 762 | rt2x00dev->link.vgc_level = r17; |
753 | } | 763 | } |
754 | } | 764 | } |
765 | #else | ||
766 | #define rt2500usb_link_tuner NULL | ||
767 | #endif | ||
755 | 768 | ||
756 | /* | 769 | /* |
757 | * Initialization functions. | 770 | * Initialization functions. |
@@ -1121,6 +1134,7 @@ static void rt2500usb_write_beacon(struct queue_entry *entry) | |||
1121 | int pipe = usb_sndbulkpipe(usb_dev, 1); | 1134 | int pipe = usb_sndbulkpipe(usb_dev, 1); |
1122 | int length; | 1135 | int length; |
1123 | u16 reg; | 1136 | u16 reg; |
1137 | u32 word, len; | ||
1124 | 1138 | ||
1125 | /* | 1139 | /* |
1126 | * Add the descriptor in front of the skb. | 1140 | * Add the descriptor in front of the skb. |
@@ -1130,6 +1144,17 @@ static void rt2500usb_write_beacon(struct queue_entry *entry) | |||
1130 | skbdesc->desc = entry->skb->data; | 1144 | skbdesc->desc = entry->skb->data; |
1131 | 1145 | ||
1132 | /* | 1146 | /* |
1147 | * Adjust the beacon databyte count. The current number is | ||
1148 | * calculated before this function gets called, but falsely | ||
1149 | * assumes that the descriptor was already present in the SKB. | ||
1150 | */ | ||
1151 | rt2x00_desc_read(skbdesc->desc, 0, &word); | ||
1152 | len = rt2x00_get_field32(word, TXD_W0_DATABYTE_COUNT); | ||
1153 | len += skbdesc->desc_len; | ||
1154 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, len); | ||
1155 | rt2x00_desc_write(skbdesc->desc, 0, word); | ||
1156 | |||
1157 | /* | ||
1133 | * Disable beaconing while we are reloading the beacon data, | 1158 | * Disable beaconing while we are reloading the beacon data, |
1134 | * otherwise we might be sending out invalid data. | 1159 | * otherwise we might be sending out invalid data. |
1135 | */ | 1160 | */ |
@@ -1364,6 +1389,9 @@ static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1364 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); | 1389 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); |
1365 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); | 1390 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
1366 | EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); | 1391 | EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); |
1392 | } else { | ||
1393 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); | ||
1394 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); | ||
1367 | } | 1395 | } |
1368 | 1396 | ||
1369 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); | 1397 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); |
@@ -1372,9 +1400,6 @@ static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1372 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); | 1400 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); |
1373 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); | 1401 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); |
1374 | EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); | 1402 | EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); |
1375 | } else { | ||
1376 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); | ||
1377 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); | ||
1378 | } | 1403 | } |
1379 | 1404 | ||
1380 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); | 1405 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); |
@@ -1650,7 +1675,6 @@ static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1650 | * Initialize all hw fields. | 1675 | * Initialize all hw fields. |
1651 | */ | 1676 | */ |
1652 | rt2x00dev->hw->flags = | 1677 | rt2x00dev->hw->flags = |
1653 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | ||
1654 | IEEE80211_HW_RX_INCLUDES_FCS | | 1678 | IEEE80211_HW_RX_INCLUDES_FCS | |
1655 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 1679 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1656 | IEEE80211_HW_SIGNAL_DBM; | 1680 | IEEE80211_HW_SIGNAL_DBM; |
@@ -1726,6 +1750,7 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1726 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | 1750 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1727 | __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | 1751 | __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); |
1728 | __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags); | 1752 | __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags); |
1753 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); | ||
1729 | 1754 | ||
1730 | /* | 1755 | /* |
1731 | * Set the rssi offset. | 1756 | * Set the rssi offset. |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index 07b03b3c7ef1..8b10ea41b204 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -108,7 +108,10 @@ | |||
108 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) | 108 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) |
109 | #define DIFS ( PIFS + SLOT_TIME ) | 109 | #define DIFS ( PIFS + SLOT_TIME ) |
110 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) | 110 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) |
111 | #define EIFS ( SIFS + (8 * (IEEE80211_HEADER + ACK_SIZE)) ) | 111 | #define EIFS ( SIFS + DIFS + \ |
112 | (8 * (IEEE80211_HEADER + ACK_SIZE)) ) | ||
113 | #define SHORT_EIFS ( SIFS + SHORT_DIFS + \ | ||
114 | (8 * (IEEE80211_HEADER + ACK_SIZE)) ) | ||
112 | 115 | ||
113 | /* | 116 | /* |
114 | * Chipset identification | 117 | * Chipset identification |
@@ -365,6 +368,12 @@ struct rt2x00_intf { | |||
365 | #define DELAYED_CONFIG_ERP 0x00000002 | 368 | #define DELAYED_CONFIG_ERP 0x00000002 |
366 | #define DELAYED_LED_ASSOC 0x00000004 | 369 | #define DELAYED_LED_ASSOC 0x00000004 |
367 | 370 | ||
371 | /* | ||
372 | * Software sequence counter, this is only required | ||
373 | * for hardware which doesn't support hardware | ||
374 | * sequence counting. | ||
375 | */ | ||
376 | spinlock_t seqlock; | ||
368 | u16 seqno; | 377 | u16 seqno; |
369 | }; | 378 | }; |
370 | 379 | ||
@@ -597,6 +606,7 @@ enum rt2x00_flags { | |||
597 | DEVICE_STARTED_SUSPEND, | 606 | DEVICE_STARTED_SUSPEND, |
598 | DEVICE_ENABLED_RADIO, | 607 | DEVICE_ENABLED_RADIO, |
599 | DEVICE_DISABLED_RADIO_HW, | 608 | DEVICE_DISABLED_RADIO_HW, |
609 | DEVICE_DIRTY_CONFIG, | ||
600 | 610 | ||
601 | /* | 611 | /* |
602 | * Driver features | 612 | * Driver features |
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c index f20ca712504f..d134c3be539a 100644 --- a/drivers/net/wireless/rt2x00/rt2x00config.c +++ b/drivers/net/wireless/rt2x00/rt2x00config.c | |||
@@ -254,6 +254,8 @@ config: | |||
254 | libconf.ant.rx = default_ant->rx; | 254 | libconf.ant.rx = default_ant->rx; |
255 | else if (active_ant->rx == ANTENNA_SW_DIVERSITY) | 255 | else if (active_ant->rx == ANTENNA_SW_DIVERSITY) |
256 | libconf.ant.rx = ANTENNA_B; | 256 | libconf.ant.rx = ANTENNA_B; |
257 | else | ||
258 | libconf.ant.rx = active_ant->rx; | ||
257 | 259 | ||
258 | if (conf->antenna_sel_tx) | 260 | if (conf->antenna_sel_tx) |
259 | libconf.ant.tx = conf->antenna_sel_tx; | 261 | libconf.ant.tx = conf->antenna_sel_tx; |
@@ -261,6 +263,8 @@ config: | |||
261 | libconf.ant.tx = default_ant->tx; | 263 | libconf.ant.tx = default_ant->tx; |
262 | else if (active_ant->tx == ANTENNA_SW_DIVERSITY) | 264 | else if (active_ant->tx == ANTENNA_SW_DIVERSITY) |
263 | libconf.ant.tx = ANTENNA_B; | 265 | libconf.ant.tx = ANTENNA_B; |
266 | else | ||
267 | libconf.ant.tx = active_ant->tx; | ||
264 | } | 268 | } |
265 | 269 | ||
266 | if (flags & CONFIG_UPDATE_SLOT_TIME) { | 270 | if (flags & CONFIG_UPDATE_SLOT_TIME) { |
@@ -271,7 +275,7 @@ config: | |||
271 | libconf.sifs = SIFS; | 275 | libconf.sifs = SIFS; |
272 | libconf.pifs = short_slot_time ? SHORT_PIFS : PIFS; | 276 | libconf.pifs = short_slot_time ? SHORT_PIFS : PIFS; |
273 | libconf.difs = short_slot_time ? SHORT_DIFS : DIFS; | 277 | libconf.difs = short_slot_time ? SHORT_DIFS : DIFS; |
274 | libconf.eifs = EIFS; | 278 | libconf.eifs = short_slot_time ? SHORT_EIFS : EIFS; |
275 | } | 279 | } |
276 | 280 | ||
277 | libconf.conf = conf; | 281 | libconf.conf = conf; |
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c index 300cf061035f..6bee1d611bbf 100644 --- a/drivers/net/wireless/rt2x00/rt2x00debug.c +++ b/drivers/net/wireless/rt2x00/rt2x00debug.c | |||
@@ -372,9 +372,6 @@ static ssize_t rt2x00debug_write_##__name(struct file *file, \ | |||
372 | if (*offset) \ | 372 | if (*offset) \ |
373 | return 0; \ | 373 | return 0; \ |
374 | \ | 374 | \ |
375 | if (!capable(CAP_NET_ADMIN)) \ | ||
376 | return -EPERM; \ | ||
377 | \ | ||
378 | if (intf->offset_##__name >= debug->__name.word_count) \ | 375 | if (intf->offset_##__name >= debug->__name.word_count) \ |
379 | return -EINVAL; \ | 376 | return -EINVAL; \ |
380 | \ | 377 | \ |
@@ -454,7 +451,7 @@ static struct dentry *rt2x00debug_create_file_driver(const char *name, | |||
454 | data += sprintf(data, "compiled: %s %s\n", __DATE__, __TIME__); | 451 | data += sprintf(data, "compiled: %s %s\n", __DATE__, __TIME__); |
455 | blob->size = strlen(blob->data); | 452 | blob->size = strlen(blob->data); |
456 | 453 | ||
457 | return debugfs_create_blob(name, S_IRUGO, intf->driver_folder, blob); | 454 | return debugfs_create_blob(name, S_IRUSR, intf->driver_folder, blob); |
458 | } | 455 | } |
459 | 456 | ||
460 | static struct dentry *rt2x00debug_create_file_chipset(const char *name, | 457 | static struct dentry *rt2x00debug_create_file_chipset(const char *name, |
@@ -482,7 +479,7 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name, | |||
482 | data += sprintf(data, "rf length: %d\n", debug->rf.word_count); | 479 | data += sprintf(data, "rf length: %d\n", debug->rf.word_count); |
483 | blob->size = strlen(blob->data); | 480 | blob->size = strlen(blob->data); |
484 | 481 | ||
485 | return debugfs_create_blob(name, S_IRUGO, intf->driver_folder, blob); | 482 | return debugfs_create_blob(name, S_IRUSR, intf->driver_folder, blob); |
486 | } | 483 | } |
487 | 484 | ||
488 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | 485 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) |
@@ -517,7 +514,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
517 | if (IS_ERR(intf->chipset_entry)) | 514 | if (IS_ERR(intf->chipset_entry)) |
518 | goto exit; | 515 | goto exit; |
519 | 516 | ||
520 | intf->dev_flags = debugfs_create_file("dev_flags", S_IRUGO, | 517 | intf->dev_flags = debugfs_create_file("dev_flags", S_IRUSR, |
521 | intf->driver_folder, intf, | 518 | intf->driver_folder, intf, |
522 | &rt2x00debug_fop_dev_flags); | 519 | &rt2x00debug_fop_dev_flags); |
523 | if (IS_ERR(intf->dev_flags)) | 520 | if (IS_ERR(intf->dev_flags)) |
@@ -532,7 +529,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
532 | ({ \ | 529 | ({ \ |
533 | (__intf)->__name##_off_entry = \ | 530 | (__intf)->__name##_off_entry = \ |
534 | debugfs_create_u32(__stringify(__name) "_offset", \ | 531 | debugfs_create_u32(__stringify(__name) "_offset", \ |
535 | S_IRUGO | S_IWUSR, \ | 532 | S_IRUSR | S_IWUSR, \ |
536 | (__intf)->register_folder, \ | 533 | (__intf)->register_folder, \ |
537 | &(__intf)->offset_##__name); \ | 534 | &(__intf)->offset_##__name); \ |
538 | if (IS_ERR((__intf)->__name##_off_entry)) \ | 535 | if (IS_ERR((__intf)->__name##_off_entry)) \ |
@@ -540,7 +537,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
540 | \ | 537 | \ |
541 | (__intf)->__name##_val_entry = \ | 538 | (__intf)->__name##_val_entry = \ |
542 | debugfs_create_file(__stringify(__name) "_value", \ | 539 | debugfs_create_file(__stringify(__name) "_value", \ |
543 | S_IRUGO | S_IWUSR, \ | 540 | S_IRUSR | S_IWUSR, \ |
544 | (__intf)->register_folder, \ | 541 | (__intf)->register_folder, \ |
545 | (__intf), &rt2x00debug_fop_##__name);\ | 542 | (__intf), &rt2x00debug_fop_##__name);\ |
546 | if (IS_ERR((__intf)->__name##_val_entry)) \ | 543 | if (IS_ERR((__intf)->__name##_val_entry)) \ |
@@ -560,7 +557,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
560 | goto exit; | 557 | goto exit; |
561 | 558 | ||
562 | intf->queue_frame_dump_entry = | 559 | intf->queue_frame_dump_entry = |
563 | debugfs_create_file("dump", S_IRUGO, intf->queue_folder, | 560 | debugfs_create_file("dump", S_IRUSR, intf->queue_folder, |
564 | intf, &rt2x00debug_fop_queue_dump); | 561 | intf, &rt2x00debug_fop_queue_dump); |
565 | if (IS_ERR(intf->queue_frame_dump_entry)) | 562 | if (IS_ERR(intf->queue_frame_dump_entry)) |
566 | goto exit; | 563 | goto exit; |
@@ -569,7 +566,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
569 | init_waitqueue_head(&intf->frame_dump_waitqueue); | 566 | init_waitqueue_head(&intf->frame_dump_waitqueue); |
570 | 567 | ||
571 | intf->queue_stats_entry = | 568 | intf->queue_stats_entry = |
572 | debugfs_create_file("queue", S_IRUGO, intf->queue_folder, | 569 | debugfs_create_file("queue", S_IRUSR, intf->queue_folder, |
573 | intf, &rt2x00debug_fop_queue_stats); | 570 | intf, &rt2x00debug_fop_queue_stats); |
574 | 571 | ||
575 | return; | 572 | return; |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 8c93eb8353b0..f42283ad7b02 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -1013,6 +1013,7 @@ int rt2x00lib_start(struct rt2x00_dev *rt2x00dev) | |||
1013 | rt2x00dev->intf_associated = 0; | 1013 | rt2x00dev->intf_associated = 0; |
1014 | 1014 | ||
1015 | __set_bit(DEVICE_STARTED, &rt2x00dev->flags); | 1015 | __set_bit(DEVICE_STARTED, &rt2x00dev->flags); |
1016 | __set_bit(DEVICE_DIRTY_CONFIG, &rt2x00dev->flags); | ||
1016 | 1017 | ||
1017 | return 0; | 1018 | return 0; |
1018 | } | 1019 | } |
@@ -1237,9 +1238,9 @@ int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev) | |||
1237 | /* | 1238 | /* |
1238 | * Reconfigure device. | 1239 | * Reconfigure device. |
1239 | */ | 1240 | */ |
1240 | rt2x00lib_config(rt2x00dev, &rt2x00dev->hw->conf, 1); | 1241 | retval = rt2x00mac_config(rt2x00dev->hw, &rt2x00dev->hw->conf); |
1241 | if (!rt2x00dev->hw->conf.radio_enabled) | 1242 | if (retval) |
1242 | rt2x00lib_disable_radio(rt2x00dev); | 1243 | goto exit; |
1243 | 1244 | ||
1244 | /* | 1245 | /* |
1245 | * Iterator over each active interface to | 1246 | * Iterator over each active interface to |
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h index f2c9b0e79b5f..c5fb3a72cf37 100644 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h | |||
@@ -125,13 +125,6 @@ void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | |||
125 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | 125 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); |
126 | 126 | ||
127 | /** | 127 | /** |
128 | * rt2x00queue_free_skb - free a skb | ||
129 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
130 | * @skb: The skb to free. | ||
131 | */ | ||
132 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
133 | |||
134 | /** | ||
135 | * rt2x00queue_write_tx_frame - Write TX frame to hardware | 128 | * rt2x00queue_write_tx_frame - Write TX frame to hardware |
136 | * @queue: Queue over which the frame should be send | 129 | * @queue: Queue over which the frame should be send |
137 | * @skb: The skb to send | 130 | * @skb: The skb to send |
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c index f1dcbaa80c3c..bd422fd6a894 100644 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c | |||
@@ -63,7 +63,7 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | |||
63 | */ | 63 | */ |
64 | memcpy(skb->cb, frag_skb->cb, sizeof(skb->cb)); | 64 | memcpy(skb->cb, frag_skb->cb, sizeof(skb->cb)); |
65 | rts_info = IEEE80211_SKB_CB(skb); | 65 | rts_info = IEEE80211_SKB_CB(skb); |
66 | rts_info->flags |= IEEE80211_TX_CTL_DO_NOT_ENCRYPT; | 66 | rts_info->control.hw_key = NULL; |
67 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_RTS_CTS; | 67 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_RTS_CTS; |
68 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_CTS_PROTECT; | 68 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_CTS_PROTECT; |
69 | rts_info->flags &= ~IEEE80211_TX_CTL_REQ_TX_STATUS; | 69 | rts_info->flags &= ~IEEE80211_TX_CTL_REQ_TX_STATUS; |
@@ -83,6 +83,7 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | |||
83 | (struct ieee80211_rts *)(skb->data)); | 83 | (struct ieee80211_rts *)(skb->data)); |
84 | 84 | ||
85 | if (rt2x00queue_write_tx_frame(queue, skb)) { | 85 | if (rt2x00queue_write_tx_frame(queue, skb)) { |
86 | dev_kfree_skb_any(skb); | ||
86 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); | 87 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); |
87 | return NETDEV_TX_BUSY; | 88 | return NETDEV_TX_BUSY; |
88 | } | 89 | } |
@@ -96,7 +97,6 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
96 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 97 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
97 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; | 98 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
98 | enum data_queue_qid qid = skb_get_queue_mapping(skb); | 99 | enum data_queue_qid qid = skb_get_queue_mapping(skb); |
99 | struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); | ||
100 | struct data_queue *queue; | 100 | struct data_queue *queue; |
101 | u16 frame_control; | 101 | u16 frame_control; |
102 | 102 | ||
@@ -152,18 +152,6 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
152 | } | 152 | } |
153 | } | 153 | } |
154 | 154 | ||
155 | /* | ||
156 | * XXX: This is as wrong as the old mac80211 code was, | ||
157 | * due to beacons not getting sequence numbers assigned | ||
158 | * properly. | ||
159 | */ | ||
160 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
161 | if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | ||
162 | intf->seqno += 0x10; | ||
163 | ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
164 | ieee80211hdr->seq_ctrl |= cpu_to_le16(intf->seqno); | ||
165 | } | ||
166 | |||
167 | if (rt2x00queue_write_tx_frame(queue, skb)) { | 155 | if (rt2x00queue_write_tx_frame(queue, skb)) { |
168 | ieee80211_stop_queue(rt2x00dev->hw, qid); | 156 | ieee80211_stop_queue(rt2x00dev->hw, qid); |
169 | return NETDEV_TX_BUSY; | 157 | return NETDEV_TX_BUSY; |
@@ -259,6 +247,7 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |||
259 | rt2x00dev->intf_sta_count++; | 247 | rt2x00dev->intf_sta_count++; |
260 | 248 | ||
261 | spin_lock_init(&intf->lock); | 249 | spin_lock_init(&intf->lock); |
250 | spin_lock_init(&intf->seqlock); | ||
262 | intf->beacon = entry; | 251 | intf->beacon = entry; |
263 | 252 | ||
264 | if (conf->type == IEEE80211_IF_TYPE_AP) | 253 | if (conf->type == IEEE80211_IF_TYPE_AP) |
@@ -322,6 +311,7 @@ EXPORT_SYMBOL_GPL(rt2x00mac_remove_interface); | |||
322 | int rt2x00mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) | 311 | int rt2x00mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
323 | { | 312 | { |
324 | struct rt2x00_dev *rt2x00dev = hw->priv; | 313 | struct rt2x00_dev *rt2x00dev = hw->priv; |
314 | int force_reconfig; | ||
325 | 315 | ||
326 | /* | 316 | /* |
327 | * Mac80211 might be calling this function while we are trying | 317 | * Mac80211 might be calling this function while we are trying |
@@ -341,7 +331,17 @@ int rt2x00mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) | |||
341 | rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 331 | rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); |
342 | } | 332 | } |
343 | 333 | ||
344 | rt2x00lib_config(rt2x00dev, conf, 0); | 334 | /* |
335 | * When the DEVICE_DIRTY_CONFIG flag is set, the device has recently | ||
336 | * been started and the configuration must be forced upon the hardware. | ||
337 | * Otherwise registers will not be intialized correctly and could | ||
338 | * result in non-working hardware because essential registers aren't | ||
339 | * initialized. | ||
340 | */ | ||
341 | force_reconfig = | ||
342 | __test_and_clear_bit(DEVICE_DIRTY_CONFIG, &rt2x00dev->flags); | ||
343 | |||
344 | rt2x00lib_config(rt2x00dev, conf, force_reconfig); | ||
345 | 345 | ||
346 | /* | 346 | /* |
347 | * Reenable RX only if the radio should be on. | 347 | * Reenable RX only if the radio should be on. |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c index 7f442030f5ad..898cdd7f57d9 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c | |||
@@ -120,6 +120,7 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry, | |||
120 | { | 120 | { |
121 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 121 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
122 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); | 122 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); |
123 | struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); | ||
123 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data; | 124 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data; |
124 | struct ieee80211_rate *rate = | 125 | struct ieee80211_rate *rate = |
125 | ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); | 126 | ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); |
@@ -127,6 +128,7 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry, | |||
127 | unsigned int data_length; | 128 | unsigned int data_length; |
128 | unsigned int duration; | 129 | unsigned int duration; |
129 | unsigned int residual; | 130 | unsigned int residual; |
131 | unsigned long irqflags; | ||
130 | 132 | ||
131 | memset(txdesc, 0, sizeof(*txdesc)); | 133 | memset(txdesc, 0, sizeof(*txdesc)); |
132 | 134 | ||
@@ -200,6 +202,31 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry, | |||
200 | } | 202 | } |
201 | 203 | ||
202 | /* | 204 | /* |
205 | * Hardware should insert sequence counter. | ||
206 | * FIXME: We insert a software sequence counter first for | ||
207 | * hardware that doesn't support hardware sequence counting. | ||
208 | * | ||
209 | * This is wrong because beacons are not getting sequence | ||
210 | * numbers assigned properly. | ||
211 | * | ||
212 | * A secondary problem exists for drivers that cannot toggle | ||
213 | * sequence counting per-frame, since those will override the | ||
214 | * sequence counter given by mac80211. | ||
215 | */ | ||
216 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
217 | spin_lock_irqsave(&intf->seqlock, irqflags); | ||
218 | |||
219 | if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)) | ||
220 | intf->seqno += 0x10; | ||
221 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
222 | hdr->seq_ctrl |= cpu_to_le16(intf->seqno); | ||
223 | |||
224 | spin_unlock_irqrestore(&intf->seqlock, irqflags); | ||
225 | |||
226 | __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags); | ||
227 | } | ||
228 | |||
229 | /* | ||
203 | * PLCP setup | 230 | * PLCP setup |
204 | * Length calculation depends on OFDM/CCK rate. | 231 | * Length calculation depends on OFDM/CCK rate. |
205 | */ | 232 | */ |
@@ -466,9 +493,12 @@ void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev) | |||
466 | if (!rt2x00dev->ops->lib->init_rxentry) | 493 | if (!rt2x00dev->ops->lib->init_rxentry) |
467 | return; | 494 | return; |
468 | 495 | ||
469 | for (i = 0; i < queue->limit; i++) | 496 | for (i = 0; i < queue->limit; i++) { |
497 | queue->entries[i].flags = 0; | ||
498 | |||
470 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, | 499 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, |
471 | &queue->entries[i]); | 500 | &queue->entries[i]); |
501 | } | ||
472 | } | 502 | } |
473 | 503 | ||
474 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev) | 504 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev) |
@@ -482,9 +512,12 @@ void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev) | |||
482 | if (!rt2x00dev->ops->lib->init_txentry) | 512 | if (!rt2x00dev->ops->lib->init_txentry) |
483 | continue; | 513 | continue; |
484 | 514 | ||
485 | for (i = 0; i < queue->limit; i++) | 515 | for (i = 0; i < queue->limit; i++) { |
516 | queue->entries[i].flags = 0; | ||
517 | |||
486 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, | 518 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, |
487 | &queue->entries[i]); | 519 | &queue->entries[i]); |
520 | } | ||
488 | } | 521 | } |
489 | } | 522 | } |
490 | 523 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h index 8945945c892e..a4a8c57004db 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.h +++ b/drivers/net/wireless/rt2x00/rt2x00queue.h | |||
@@ -199,6 +199,7 @@ struct txdone_entry_desc { | |||
199 | * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. | 199 | * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. |
200 | * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame. | 200 | * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame. |
201 | * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate. | 201 | * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate. |
202 | * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter. | ||
202 | * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame. | 203 | * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame. |
203 | * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. | 204 | * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. |
204 | * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. | 205 | * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. |
@@ -210,6 +211,7 @@ enum txentry_desc_flags { | |||
210 | ENTRY_TXD_RTS_FRAME, | 211 | ENTRY_TXD_RTS_FRAME, |
211 | ENTRY_TXD_CTS_FRAME, | 212 | ENTRY_TXD_CTS_FRAME, |
212 | ENTRY_TXD_OFDM_RATE, | 213 | ENTRY_TXD_OFDM_RATE, |
214 | ENTRY_TXD_GENERATE_SEQ, | ||
213 | ENTRY_TXD_FIRST_FRAGMENT, | 215 | ENTRY_TXD_FIRST_FRAGMENT, |
214 | ENTRY_TXD_MORE_FRAG, | 216 | ENTRY_TXD_MORE_FRAG, |
215 | ENTRY_TXD_REQ_TIMESTAMP, | 217 | ENTRY_TXD_REQ_TIMESTAMP, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index 83862e7f7aec..8d76bb2e0312 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -122,6 +122,38 @@ int rt2x00usb_vendor_request_buff(struct rt2x00_dev *rt2x00dev, | |||
122 | } | 122 | } |
123 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_buff); | 123 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_buff); |
124 | 124 | ||
125 | int rt2x00usb_vendor_request_large_buff(struct rt2x00_dev *rt2x00dev, | ||
126 | const u8 request, const u8 requesttype, | ||
127 | const u16 offset, const void *buffer, | ||
128 | const u16 buffer_length, | ||
129 | const int timeout) | ||
130 | { | ||
131 | int status = 0; | ||
132 | unsigned char *tb; | ||
133 | u16 off, len, bsize; | ||
134 | |||
135 | mutex_lock(&rt2x00dev->usb_cache_mutex); | ||
136 | |||
137 | tb = (char *)buffer; | ||
138 | off = offset; | ||
139 | len = buffer_length; | ||
140 | while (len && !status) { | ||
141 | bsize = min_t(u16, CSR_CACHE_SIZE, len); | ||
142 | status = rt2x00usb_vendor_req_buff_lock(rt2x00dev, request, | ||
143 | requesttype, off, tb, | ||
144 | bsize, timeout); | ||
145 | |||
146 | tb += bsize; | ||
147 | len -= bsize; | ||
148 | off += bsize; | ||
149 | } | ||
150 | |||
151 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
152 | |||
153 | return status; | ||
154 | } | ||
155 | EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_large_buff); | ||
156 | |||
125 | /* | 157 | /* |
126 | * TX data handlers. | 158 | * TX data handlers. |
127 | */ | 159 | */ |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h index aad794adf52c..3b4a67417f95 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.h +++ b/drivers/net/wireless/rt2x00/rt2x00usb.h | |||
@@ -70,8 +70,7 @@ | |||
70 | /* | 70 | /* |
71 | * Cache size | 71 | * Cache size |
72 | */ | 72 | */ |
73 | #define CSR_CACHE_SIZE 8 | 73 | #define CSR_CACHE_SIZE 64 |
74 | #define CSR_CACHE_SIZE_FIRMWARE 64 | ||
75 | 74 | ||
76 | /* | 75 | /* |
77 | * USB request types. | 76 | * USB request types. |
@@ -172,6 +171,25 @@ int rt2x00usb_vendor_req_buff_lock(struct rt2x00_dev *rt2x00dev, | |||
172 | const u16 buffer_length, const int timeout); | 171 | const u16 buffer_length, const int timeout); |
173 | 172 | ||
174 | /** | 173 | /** |
174 | * rt2x00usb_vendor_request_large_buff - Send register command to device (buffered) | ||
175 | * @rt2x00dev: Pointer to &struct rt2x00_dev | ||
176 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) | ||
177 | * @requesttype: Request type &USB_VENDOR_REQUEST_* | ||
178 | * @offset: Register start offset to perform action on | ||
179 | * @buffer: Buffer where information will be read/written to by device | ||
180 | * @buffer_length: Size of &buffer | ||
181 | * @timeout: Operation timeout | ||
182 | * | ||
183 | * This function is used to transfer register data in blocks larger | ||
184 | * then CSR_CACHE_SIZE. Use for firmware upload, keys and beacons. | ||
185 | */ | ||
186 | int rt2x00usb_vendor_request_large_buff(struct rt2x00_dev *rt2x00dev, | ||
187 | const u8 request, const u8 requesttype, | ||
188 | const u16 offset, const void *buffer, | ||
189 | const u16 buffer_length, | ||
190 | const int timeout); | ||
191 | |||
192 | /** | ||
175 | * rt2x00usb_vendor_request_sw - Send single register command to device | 193 | * rt2x00usb_vendor_request_sw - Send single register command to device |
176 | * @rt2x00dev: Pointer to &struct rt2x00_dev | 194 | * @rt2x00dev: Pointer to &struct rt2x00_dev |
177 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) | 195 | * @request: USB vendor command (See &enum rt2x00usb_vendor_request) |
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index f7c1f92c1448..087e90b328cd 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -1004,6 +1004,11 @@ static int rt61pci_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
1004 | } | 1004 | } |
1005 | 1005 | ||
1006 | /* | 1006 | /* |
1007 | * Hardware needs another millisecond before it is ready. | ||
1008 | */ | ||
1009 | msleep(1); | ||
1010 | |||
1011 | /* | ||
1007 | * Reset MAC and BBP registers. | 1012 | * Reset MAC and BBP registers. |
1008 | */ | 1013 | */ |
1009 | reg = 0; | 1014 | reg = 0; |
@@ -1544,7 +1549,8 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1544 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); | 1549 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); |
1545 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); | 1550 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1546 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1551 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1547 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); | 1552 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, |
1553 | test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags)); | ||
1548 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); | 1554 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); |
1549 | rt2x00_desc_write(txd, 1, word); | 1555 | rt2x00_desc_write(txd, 1, word); |
1550 | 1556 | ||
@@ -2278,7 +2284,6 @@ static void rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2278 | * Initialize all hw fields. | 2284 | * Initialize all hw fields. |
2279 | */ | 2285 | */ |
2280 | rt2x00dev->hw->flags = | 2286 | rt2x00dev->hw->flags = |
2281 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | ||
2282 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 2287 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
2283 | IEEE80211_HW_SIGNAL_DBM; | 2288 | IEEE80211_HW_SIGNAL_DBM; |
2284 | rt2x00dev->hw->extra_tx_headroom = 0; | 2289 | rt2x00dev->hw->extra_tx_headroom = 0; |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index d383735ab8f2..9761eaaa08be 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -890,9 +890,6 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
890 | unsigned int i; | 890 | unsigned int i; |
891 | int status; | 891 | int status; |
892 | u32 reg; | 892 | u32 reg; |
893 | const char *ptr = data; | ||
894 | char *cache; | ||
895 | int buflen; | ||
896 | 893 | ||
897 | /* | 894 | /* |
898 | * Wait for stable hardware. | 895 | * Wait for stable hardware. |
@@ -911,31 +908,12 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
911 | 908 | ||
912 | /* | 909 | /* |
913 | * Write firmware to device. | 910 | * Write firmware to device. |
914 | * We setup a seperate cache for this action, | ||
915 | * since we are going to write larger chunks of data | ||
916 | * then normally used cache size. | ||
917 | */ | 911 | */ |
918 | cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL); | 912 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, |
919 | if (!cache) { | 913 | USB_VENDOR_REQUEST_OUT, |
920 | ERROR(rt2x00dev, "Failed to allocate firmware cache.\n"); | 914 | FIRMWARE_IMAGE_BASE, |
921 | return -ENOMEM; | 915 | data, len, |
922 | } | 916 | REGISTER_TIMEOUT32(len)); |
923 | |||
924 | for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) { | ||
925 | buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE); | ||
926 | |||
927 | memcpy(cache, ptr, buflen); | ||
928 | |||
929 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, | ||
930 | USB_VENDOR_REQUEST_OUT, | ||
931 | FIRMWARE_IMAGE_BASE + i, 0, | ||
932 | cache, buflen, | ||
933 | REGISTER_TIMEOUT32(buflen)); | ||
934 | |||
935 | ptr += buflen; | ||
936 | } | ||
937 | |||
938 | kfree(cache); | ||
939 | 917 | ||
940 | /* | 918 | /* |
941 | * Send firmware request to device to load firmware, | 919 | * Send firmware request to device to load firmware, |
@@ -1303,7 +1281,8 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1303 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); | 1281 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); |
1304 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); | 1282 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1305 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1283 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1306 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); | 1284 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, |
1285 | test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags)); | ||
1307 | rt2x00_desc_write(txd, 1, word); | 1286 | rt2x00_desc_write(txd, 1, word); |
1308 | 1287 | ||
1309 | rt2x00_desc_read(txd, 2, &word); | 1288 | rt2x00_desc_read(txd, 2, &word); |
@@ -1352,6 +1331,7 @@ static void rt73usb_write_beacon(struct queue_entry *entry) | |||
1352 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | 1331 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1353 | unsigned int beacon_base; | 1332 | unsigned int beacon_base; |
1354 | u32 reg; | 1333 | u32 reg; |
1334 | u32 word, len; | ||
1355 | 1335 | ||
1356 | /* | 1336 | /* |
1357 | * Add the descriptor in front of the skb. | 1337 | * Add the descriptor in front of the skb. |
@@ -1361,6 +1341,17 @@ static void rt73usb_write_beacon(struct queue_entry *entry) | |||
1361 | skbdesc->desc = entry->skb->data; | 1341 | skbdesc->desc = entry->skb->data; |
1362 | 1342 | ||
1363 | /* | 1343 | /* |
1344 | * Adjust the beacon databyte count. The current number is | ||
1345 | * calculated before this function gets called, but falsely | ||
1346 | * assumes that the descriptor was already present in the SKB. | ||
1347 | */ | ||
1348 | rt2x00_desc_read(skbdesc->desc, 0, &word); | ||
1349 | len = rt2x00_get_field32(word, TXD_W0_DATABYTE_COUNT); | ||
1350 | len += skbdesc->desc_len; | ||
1351 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, len); | ||
1352 | rt2x00_desc_write(skbdesc->desc, 0, word); | ||
1353 | |||
1354 | /* | ||
1364 | * Disable beaconing while we are reloading the beacon data, | 1355 | * Disable beaconing while we are reloading the beacon data, |
1365 | * otherwise we might be sending out invalid data. | 1356 | * otherwise we might be sending out invalid data. |
1366 | */ | 1357 | */ |
@@ -1374,10 +1365,10 @@ static void rt73usb_write_beacon(struct queue_entry *entry) | |||
1374 | * Write entire beacon with descriptor to register. | 1365 | * Write entire beacon with descriptor to register. |
1375 | */ | 1366 | */ |
1376 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | 1367 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); |
1377 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, | 1368 | rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE, |
1378 | USB_VENDOR_REQUEST_OUT, beacon_base, 0, | 1369 | USB_VENDOR_REQUEST_OUT, beacon_base, |
1379 | entry->skb->data, entry->skb->len, | 1370 | entry->skb->data, entry->skb->len, |
1380 | REGISTER_TIMEOUT32(entry->skb->len)); | 1371 | REGISTER_TIMEOUT32(entry->skb->len)); |
1381 | 1372 | ||
1382 | /* | 1373 | /* |
1383 | * Clean up the beacon skb. | 1374 | * Clean up the beacon skb. |
@@ -1871,7 +1862,6 @@ static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1871 | * Initialize all hw fields. | 1862 | * Initialize all hw fields. |
1872 | */ | 1863 | */ |
1873 | rt2x00dev->hw->flags = | 1864 | rt2x00dev->hw->flags = |
1874 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | ||
1875 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 1865 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1876 | IEEE80211_HW_SIGNAL_DBM; | 1866 | IEEE80211_HW_SIGNAL_DBM; |
1877 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; | 1867 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
diff --git a/drivers/net/wireless/rtl8187.h b/drivers/net/wireless/rtl8187.h index 3afb49f8866a..5a9515c99960 100644 --- a/drivers/net/wireless/rtl8187.h +++ b/drivers/net/wireless/rtl8187.h | |||
@@ -47,11 +47,13 @@ struct rtl8187_rx_hdr { | |||
47 | struct rtl8187b_rx_hdr { | 47 | struct rtl8187b_rx_hdr { |
48 | __le32 flags; | 48 | __le32 flags; |
49 | __le64 mac_time; | 49 | __le64 mac_time; |
50 | u8 noise; | 50 | u8 sq; |
51 | u8 signal; | 51 | u8 rssi; |
52 | u8 agc; | 52 | u8 agc; |
53 | u8 reserved; | 53 | u8 flags2; |
54 | __le32 unused; | 54 | __le16 snr_long2end; |
55 | s8 pwdb_g12; | ||
56 | u8 fot; | ||
55 | } __attribute__((packed)); | 57 | } __attribute__((packed)); |
56 | 58 | ||
57 | /* {rtl8187,rtl8187b}_tx_info is in skb */ | 59 | /* {rtl8187,rtl8187b}_tx_info is in skb */ |
@@ -92,6 +94,10 @@ struct rtl8187_priv { | |||
92 | const struct rtl818x_rf_ops *rf; | 94 | const struct rtl818x_rf_ops *rf; |
93 | struct ieee80211_vif *vif; | 95 | struct ieee80211_vif *vif; |
94 | int mode; | 96 | int mode; |
97 | /* The mutex protects the TX loopback state. | ||
98 | * Any attempt to set channels concurrently locks the device. | ||
99 | */ | ||
100 | struct mutex conf_mutex; | ||
95 | 101 | ||
96 | /* rtl8187 specific */ | 102 | /* rtl8187 specific */ |
97 | struct ieee80211_channel channels[14]; | 103 | struct ieee80211_channel channels[14]; |
@@ -100,6 +106,7 @@ struct rtl8187_priv { | |||
100 | struct usb_device *udev; | 106 | struct usb_device *udev; |
101 | u32 rx_conf; | 107 | u32 rx_conf; |
102 | u16 txpwr_base; | 108 | u16 txpwr_base; |
109 | u16 seqno; | ||
103 | u8 asic_rev; | 110 | u8 asic_rev; |
104 | u8 is_rtl8187b; | 111 | u8 is_rtl8187b; |
105 | enum { | 112 | enum { |
diff --git a/drivers/net/wireless/rtl8187_dev.c b/drivers/net/wireless/rtl8187_dev.c index d3067b1216ca..57376fb993ed 100644 --- a/drivers/net/wireless/rtl8187_dev.c +++ b/drivers/net/wireless/rtl8187_dev.c | |||
@@ -31,6 +31,8 @@ MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); | |||
31 | MODULE_LICENSE("GPL"); | 31 | MODULE_LICENSE("GPL"); |
32 | 32 | ||
33 | static struct usb_device_id rtl8187_table[] __devinitdata = { | 33 | static struct usb_device_id rtl8187_table[] __devinitdata = { |
34 | /* Asus */ | ||
35 | {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, | ||
34 | /* Realtek */ | 36 | /* Realtek */ |
35 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, | 37 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, |
36 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, | 38 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, |
@@ -169,6 +171,7 @@ static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) | |||
169 | { | 171 | { |
170 | struct rtl8187_priv *priv = dev->priv; | 172 | struct rtl8187_priv *priv = dev->priv; |
171 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 173 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
174 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; | ||
172 | unsigned int ep; | 175 | unsigned int ep; |
173 | void *buf; | 176 | void *buf; |
174 | struct urb *urb; | 177 | struct urb *urb; |
@@ -234,6 +237,20 @@ static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) | |||
234 | ep = epmap[skb_get_queue_mapping(skb)]; | 237 | ep = epmap[skb_get_queue_mapping(skb)]; |
235 | } | 238 | } |
236 | 239 | ||
240 | /* FIXME: The sequence that follows is needed for this driver to | ||
241 | * work with mac80211 since "mac80211: fix TX sequence numbers". | ||
242 | * As with the temporary code in rt2x00, changes will be needed | ||
243 | * to get proper sequence numbers on beacons. In addition, this | ||
244 | * patch places the sequence number in the hardware state, which | ||
245 | * limits us to a single virtual state. | ||
246 | */ | ||
247 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
248 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | ||
249 | priv->seqno += 0x10; | ||
250 | ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
251 | ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno); | ||
252 | } | ||
253 | |||
237 | info->driver_data[0] = dev; | 254 | info->driver_data[0] = dev; |
238 | info->driver_data[1] = urb; | 255 | info->driver_data[1] = urb; |
239 | 256 | ||
@@ -257,6 +274,7 @@ static void rtl8187_rx_cb(struct urb *urb) | |||
257 | struct ieee80211_rx_status rx_status = { 0 }; | 274 | struct ieee80211_rx_status rx_status = { 0 }; |
258 | int rate, signal; | 275 | int rate, signal; |
259 | u32 flags; | 276 | u32 flags; |
277 | u32 quality; | ||
260 | 278 | ||
261 | spin_lock(&priv->rx_queue.lock); | 279 | spin_lock(&priv->rx_queue.lock); |
262 | if (skb->next) | 280 | if (skb->next) |
@@ -280,44 +298,57 @@ static void rtl8187_rx_cb(struct urb *urb) | |||
280 | flags = le32_to_cpu(hdr->flags); | 298 | flags = le32_to_cpu(hdr->flags); |
281 | signal = hdr->signal & 0x7f; | 299 | signal = hdr->signal & 0x7f; |
282 | rx_status.antenna = (hdr->signal >> 7) & 1; | 300 | rx_status.antenna = (hdr->signal >> 7) & 1; |
283 | rx_status.signal = signal; | ||
284 | rx_status.noise = hdr->noise; | 301 | rx_status.noise = hdr->noise; |
285 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | 302 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
286 | priv->signal = signal; | ||
287 | priv->quality = signal; | 303 | priv->quality = signal; |
304 | rx_status.qual = priv->quality; | ||
288 | priv->noise = hdr->noise; | 305 | priv->noise = hdr->noise; |
306 | rate = (flags >> 20) & 0xF; | ||
307 | if (rate > 3) { /* OFDM rate */ | ||
308 | if (signal > 90) | ||
309 | signal = 90; | ||
310 | else if (signal < 25) | ||
311 | signal = 25; | ||
312 | signal = 90 - signal; | ||
313 | } else { /* CCK rate */ | ||
314 | if (signal > 95) | ||
315 | signal = 95; | ||
316 | else if (signal < 30) | ||
317 | signal = 30; | ||
318 | signal = 95 - signal; | ||
319 | } | ||
320 | rx_status.signal = signal; | ||
321 | priv->signal = signal; | ||
289 | } else { | 322 | } else { |
290 | struct rtl8187b_rx_hdr *hdr = | 323 | struct rtl8187b_rx_hdr *hdr = |
291 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | 324 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); |
325 | /* The Realtek datasheet for the RTL8187B shows that the RX | ||
326 | * header contains the following quantities: signal quality, | ||
327 | * RSSI, AGC, the received power in dB, and the measured SNR. | ||
328 | * In testing, none of these quantities show qualitative | ||
329 | * agreement with AP signal strength, except for the AGC, | ||
330 | * which is inversely proportional to the strength of the | ||
331 | * signal. In the following, the quality and signal strength | ||
332 | * are derived from the AGC. The arbitrary scaling constants | ||
333 | * are chosen to make the results close to the values obtained | ||
334 | * for a BCM4312 using b43 as the driver. The noise is ignored | ||
335 | * for now. | ||
336 | */ | ||
292 | flags = le32_to_cpu(hdr->flags); | 337 | flags = le32_to_cpu(hdr->flags); |
293 | signal = hdr->agc >> 1; | 338 | quality = 170 - hdr->agc; |
294 | rx_status.antenna = (hdr->signal >> 7) & 1; | 339 | if (quality > 100) |
295 | rx_status.signal = 64 - min(hdr->noise, (u8)64); | 340 | quality = 100; |
296 | rx_status.noise = hdr->noise; | 341 | signal = 14 - hdr->agc / 2; |
342 | rx_status.qual = quality; | ||
343 | priv->quality = quality; | ||
344 | rx_status.signal = signal; | ||
345 | priv->signal = signal; | ||
346 | rx_status.antenna = (hdr->rssi >> 7) & 1; | ||
297 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | 347 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
298 | priv->signal = hdr->signal; | 348 | rate = (flags >> 20) & 0xF; |
299 | priv->quality = hdr->agc >> 1; | ||
300 | priv->noise = hdr->noise; | ||
301 | } | 349 | } |
302 | 350 | ||
303 | skb_trim(skb, flags & 0x0FFF); | 351 | skb_trim(skb, flags & 0x0FFF); |
304 | rate = (flags >> 20) & 0xF; | ||
305 | if (rate > 3) { /* OFDM rate */ | ||
306 | if (signal > 90) | ||
307 | signal = 90; | ||
308 | else if (signal < 25) | ||
309 | signal = 25; | ||
310 | signal = 90 - signal; | ||
311 | } else { /* CCK rate */ | ||
312 | if (signal > 95) | ||
313 | signal = 95; | ||
314 | else if (signal < 30) | ||
315 | signal = 30; | ||
316 | signal = 95 - signal; | ||
317 | } | ||
318 | |||
319 | rx_status.qual = priv->quality; | ||
320 | rx_status.signal = signal; | ||
321 | rx_status.rate_idx = rate; | 352 | rx_status.rate_idx = rate; |
322 | rx_status.freq = dev->conf.channel->center_freq; | 353 | rx_status.freq = dev->conf.channel->center_freq; |
323 | rx_status.band = dev->conf.channel->band; | 354 | rx_status.band = dev->conf.channel->band; |
@@ -697,6 +728,7 @@ static int rtl8187_start(struct ieee80211_hw *dev) | |||
697 | if (ret) | 728 | if (ret) |
698 | return ret; | 729 | return ret; |
699 | 730 | ||
731 | mutex_lock(&priv->conf_mutex); | ||
700 | if (priv->is_rtl8187b) { | 732 | if (priv->is_rtl8187b) { |
701 | reg = RTL818X_RX_CONF_MGMT | | 733 | reg = RTL818X_RX_CONF_MGMT | |
702 | RTL818X_RX_CONF_DATA | | 734 | RTL818X_RX_CONF_DATA | |
@@ -718,6 +750,7 @@ static int rtl8187_start(struct ieee80211_hw *dev) | |||
718 | (7 << 0 /* long retry limit */) | | 750 | (7 << 0 /* long retry limit */) | |
719 | (7 << 21 /* MAX TX DMA */)); | 751 | (7 << 21 /* MAX TX DMA */)); |
720 | rtl8187_init_urbs(dev); | 752 | rtl8187_init_urbs(dev); |
753 | mutex_unlock(&priv->conf_mutex); | ||
721 | return 0; | 754 | return 0; |
722 | } | 755 | } |
723 | 756 | ||
@@ -761,6 +794,7 @@ static int rtl8187_start(struct ieee80211_hw *dev) | |||
761 | reg |= RTL818X_CMD_TX_ENABLE; | 794 | reg |= RTL818X_CMD_TX_ENABLE; |
762 | reg |= RTL818X_CMD_RX_ENABLE; | 795 | reg |= RTL818X_CMD_RX_ENABLE; |
763 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | 796 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); |
797 | mutex_unlock(&priv->conf_mutex); | ||
764 | 798 | ||
765 | return 0; | 799 | return 0; |
766 | } | 800 | } |
@@ -772,6 +806,7 @@ static void rtl8187_stop(struct ieee80211_hw *dev) | |||
772 | struct sk_buff *skb; | 806 | struct sk_buff *skb; |
773 | u32 reg; | 807 | u32 reg; |
774 | 808 | ||
809 | mutex_lock(&priv->conf_mutex); | ||
775 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | 810 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
776 | 811 | ||
777 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | 812 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
@@ -791,7 +826,7 @@ static void rtl8187_stop(struct ieee80211_hw *dev) | |||
791 | usb_kill_urb(info->urb); | 826 | usb_kill_urb(info->urb); |
792 | kfree_skb(skb); | 827 | kfree_skb(skb); |
793 | } | 828 | } |
794 | return; | 829 | mutex_unlock(&priv->conf_mutex); |
795 | } | 830 | } |
796 | 831 | ||
797 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | 832 | static int rtl8187_add_interface(struct ieee80211_hw *dev, |
@@ -811,6 +846,7 @@ static int rtl8187_add_interface(struct ieee80211_hw *dev, | |||
811 | return -EOPNOTSUPP; | 846 | return -EOPNOTSUPP; |
812 | } | 847 | } |
813 | 848 | ||
849 | mutex_lock(&priv->conf_mutex); | ||
814 | priv->vif = conf->vif; | 850 | priv->vif = conf->vif; |
815 | 851 | ||
816 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | 852 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
@@ -819,6 +855,7 @@ static int rtl8187_add_interface(struct ieee80211_hw *dev, | |||
819 | ((u8 *)conf->mac_addr)[i]); | 855 | ((u8 *)conf->mac_addr)[i]); |
820 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | 856 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
821 | 857 | ||
858 | mutex_unlock(&priv->conf_mutex); | ||
822 | return 0; | 859 | return 0; |
823 | } | 860 | } |
824 | 861 | ||
@@ -826,8 +863,10 @@ static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |||
826 | struct ieee80211_if_init_conf *conf) | 863 | struct ieee80211_if_init_conf *conf) |
827 | { | 864 | { |
828 | struct rtl8187_priv *priv = dev->priv; | 865 | struct rtl8187_priv *priv = dev->priv; |
866 | mutex_lock(&priv->conf_mutex); | ||
829 | priv->mode = IEEE80211_IF_TYPE_MNTR; | 867 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
830 | priv->vif = NULL; | 868 | priv->vif = NULL; |
869 | mutex_unlock(&priv->conf_mutex); | ||
831 | } | 870 | } |
832 | 871 | ||
833 | static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | 872 | static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) |
@@ -835,6 +874,7 @@ static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |||
835 | struct rtl8187_priv *priv = dev->priv; | 874 | struct rtl8187_priv *priv = dev->priv; |
836 | u32 reg; | 875 | u32 reg; |
837 | 876 | ||
877 | mutex_lock(&priv->conf_mutex); | ||
838 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); | 878 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
839 | /* Enable TX loopback on MAC level to avoid TX during channel | 879 | /* Enable TX loopback on MAC level to avoid TX during channel |
840 | * changes, as this has be seen to causes problems and the | 880 | * changes, as this has be seen to causes problems and the |
@@ -867,6 +907,7 @@ static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |||
867 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | 907 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); |
868 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | 908 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); |
869 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | 909 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); |
910 | mutex_unlock(&priv->conf_mutex); | ||
870 | return 0; | 911 | return 0; |
871 | } | 912 | } |
872 | 913 | ||
@@ -878,6 +919,7 @@ static int rtl8187_config_interface(struct ieee80211_hw *dev, | |||
878 | int i; | 919 | int i; |
879 | u8 reg; | 920 | u8 reg; |
880 | 921 | ||
922 | mutex_lock(&priv->conf_mutex); | ||
881 | for (i = 0; i < ETH_ALEN; i++) | 923 | for (i = 0; i < ETH_ALEN; i++) |
882 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); | 924 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); |
883 | 925 | ||
@@ -891,6 +933,7 @@ static int rtl8187_config_interface(struct ieee80211_hw *dev, | |||
891 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | 933 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); |
892 | } | 934 | } |
893 | 935 | ||
936 | mutex_unlock(&priv->conf_mutex); | ||
894 | return 0; | 937 | return 0; |
895 | } | 938 | } |
896 | 939 | ||
@@ -1015,9 +1058,7 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1015 | 1058 | ||
1016 | priv->mode = IEEE80211_IF_TYPE_MNTR; | 1059 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
1017 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 1060 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1018 | IEEE80211_HW_RX_INCLUDES_FCS | | 1061 | IEEE80211_HW_RX_INCLUDES_FCS; |
1019 | IEEE80211_HW_SIGNAL_UNSPEC; | ||
1020 | dev->max_signal = 65; | ||
1021 | 1062 | ||
1022 | eeprom.data = dev; | 1063 | eeprom.data = dev; |
1023 | eeprom.register_read = rtl8187_eeprom_register_read; | 1064 | eeprom.register_read = rtl8187_eeprom_register_read; |
@@ -1132,10 +1173,16 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1132 | (*channel++).hw_value = txpwr >> 8; | 1173 | (*channel++).hw_value = txpwr >> 8; |
1133 | } | 1174 | } |
1134 | 1175 | ||
1135 | if (priv->is_rtl8187b) | 1176 | if (priv->is_rtl8187b) { |
1136 | printk(KERN_WARNING "rtl8187: 8187B chip detected. Support " | 1177 | printk(KERN_WARNING "rtl8187: 8187B chip detected. Support " |
1137 | "is EXPERIMENTAL, and could damage your\n" | 1178 | "is EXPERIMENTAL, and could damage your\n" |
1138 | " hardware, use at your own risk\n"); | 1179 | " hardware, use at your own risk\n"); |
1180 | dev->flags |= IEEE80211_HW_SIGNAL_DBM; | ||
1181 | } else { | ||
1182 | dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC; | ||
1183 | dev->max_signal = 65; | ||
1184 | } | ||
1185 | |||
1139 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) | 1186 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) |
1140 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" | 1187 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" |
1141 | " info!\n"); | 1188 | " info!\n"); |
@@ -1154,6 +1201,7 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1154 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | 1201 | printk(KERN_ERR "rtl8187: Cannot register device\n"); |
1155 | goto err_free_dev; | 1202 | goto err_free_dev; |
1156 | } | 1203 | } |
1204 | mutex_init(&priv->conf_mutex); | ||
1157 | 1205 | ||
1158 | printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n", | 1206 | printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n", |
1159 | wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), | 1207 | wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), |
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c index fcc532bb6a7e..4d7b98b05030 100644 --- a/drivers/net/wireless/zd1211rw/zd_mac.c +++ b/drivers/net/wireless/zd1211rw/zd_mac.c | |||
@@ -935,7 +935,6 @@ struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf) | |||
935 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band; | 935 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band; |
936 | 936 | ||
937 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | | 937 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
938 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | ||
939 | IEEE80211_HW_SIGNAL_DB; | 938 | IEEE80211_HW_SIGNAL_DB; |
940 | 939 | ||
941 | hw->max_signal = 100; | 940 | hw->max_signal = 100; |