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authorLennert Buytenhek <buytenh@wantstofly.org>2006-01-08 04:01:11 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-08 23:12:45 -0500
commit3b68d70dffe255e7681d5725d96bc2b92a24bb9d (patch)
tree0f311381f9d39e10360431cb57c94b7bcae62727 /drivers/net
parent3eaa5e7dcce0653d2bfd2ab85a623687da49f8d5 (diff)
[PATCH] cs89x0: cleanly implement ixdp2x01 and pnx0501 support
Implement suitable versions of the readword/writeword macros for ixdp2x01 and pnx0501. Handle the 32-bit spacing of the registers in these functions instead of in the header file. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Cc: dmitry pervushin <dpervushin@ru.mvista.com> Cc: <dsaxena@plexity.net> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/cs89x0.c28
-rw-r--r--drivers/net/cs89x0.h19
2 files changed, 34 insertions, 13 deletions
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index 756d80adc47b..7abc9f858f98 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -338,6 +338,32 @@ out:
338} 338}
339#endif 339#endif
340 340
341#if defined(CONFIG_ARCH_IXDP2X01)
342static int
343readword(unsigned long base_addr, int portno)
344{
345 return (u16)__raw_readl(base_addr + (portno << 1));
346}
347
348static void
349writeword(unsigned long base_addr, int portno, int value)
350{
351 __raw_writel((u16)value, base_addr + (portno << 1));
352}
353#else
354#if defined(CONFIG_ARCH_PNX0501)
355static int
356readword(unsigned long base_addr, int portno)
357{
358 return inw(base_addr + (portno << 1));
359}
360
361static void
362writeword(unsigned long base_addr, int portno, int value)
363{
364 outw(value, base_addr + (portno << 1));
365}
366#else
341static int 367static int
342readword(unsigned long base_addr, int portno) 368readword(unsigned long base_addr, int portno)
343{ 369{
@@ -349,6 +375,8 @@ writeword(unsigned long base_addr, int portno, int value)
349{ 375{
350 outw(value, base_addr + portno); 376 outw(value, base_addr + portno);
351} 377}
378#endif
379#endif
352 380
353static int 381static int
354readreg(struct net_device *dev, int regno) 382readreg(struct net_device *dev, int regno)
diff --git a/drivers/net/cs89x0.h b/drivers/net/cs89x0.h
index decea264f121..bd954aaa636f 100644
--- a/drivers/net/cs89x0.h
+++ b/drivers/net/cs89x0.h
@@ -16,13 +16,6 @@
16 16
17#include <linux/config.h> 17#include <linux/config.h>
18 18
19#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105)
20/* IXDP2401/IXDP2801 uses dword-aligned register addressing */
21#define CS89x0_PORT(reg) ((reg) * 2)
22#else
23#define CS89x0_PORT(reg) (reg)
24#endif
25
26#define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */ 19#define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */
27 /* offset 2h -> Model/Product Number */ 20 /* offset 2h -> Model/Product Number */
28 /* offset 3h -> Chip Revision Number */ 21 /* offset 3h -> Chip Revision Number */
@@ -332,16 +325,16 @@
332#define RAM_SIZE 0x1000 /* The card has 4k bytes or RAM */ 325#define RAM_SIZE 0x1000 /* The card has 4k bytes or RAM */
333#define PKT_START PP_TxFrame /* Start of packet RAM */ 326#define PKT_START PP_TxFrame /* Start of packet RAM */
334 327
335#define RX_FRAME_PORT CS89x0_PORT(0x0000) 328#define RX_FRAME_PORT 0x0000
336#define TX_FRAME_PORT RX_FRAME_PORT 329#define TX_FRAME_PORT RX_FRAME_PORT
337#define TX_CMD_PORT CS89x0_PORT(0x0004) 330#define TX_CMD_PORT 0x0004
338#define TX_NOW 0x0000 /* Tx packet after 5 bytes copied */ 331#define TX_NOW 0x0000 /* Tx packet after 5 bytes copied */
339#define TX_AFTER_381 0x0040 /* Tx packet after 381 bytes copied */ 332#define TX_AFTER_381 0x0040 /* Tx packet after 381 bytes copied */
340#define TX_AFTER_ALL 0x00c0 /* Tx packet after all bytes copied */ 333#define TX_AFTER_ALL 0x00c0 /* Tx packet after all bytes copied */
341#define TX_LEN_PORT CS89x0_PORT(0x0006) 334#define TX_LEN_PORT 0x0006
342#define ISQ_PORT CS89x0_PORT(0x0008) 335#define ISQ_PORT 0x0008
343#define ADD_PORT CS89x0_PORT(0x000A) 336#define ADD_PORT 0x000A
344#define DATA_PORT CS89x0_PORT(0x000C) 337#define DATA_PORT 0x000C
345 338
346#define EEPROM_WRITE_EN 0x00F0 339#define EEPROM_WRITE_EN 0x00F0
347#define EEPROM_WRITE_DIS 0x0000 340#define EEPROM_WRITE_DIS 0x0000