aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net
diff options
context:
space:
mode:
authorStephen Hemminger <shemminger@osdl.org>2006-04-05 20:47:15 -0400
committerJeff Garzik <jeff@garzik.org>2006-04-12 18:11:23 -0400
commit43f2f10444c008296cc8de68a72fd87b33b50452 (patch)
tree4b0268f07e4478e844b4f59f868bd0e2fbb0baed /drivers/net
parent94843566d7119e049a72618a3c939d5c2be022c7 (diff)
[PATCH] sky2: bad memory reference on dual port cards
Sky2 driver will oops referencing bad memory if used on a dual port card. The problem is accessing past end of MIB counter space. Applies for both 2.6.17 and 2.6.16 (with fuzz) Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/sky2.c4
-rw-r--r--drivers/net/sky2.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 4272e47258df..67b0eab16589 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -577,8 +577,8 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
577 reg = gma_read16(hw, port, GM_PHY_ADDR); 577 reg = gma_read16(hw, port, GM_PHY_ADDR);
578 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); 578 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
579 579
580 for (i = 0; i < GM_MIB_CNT_SIZE; i++) 580 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
581 gma_read16(hw, port, GM_MIB_CNT_BASE + 8 * i); 581 gma_read16(hw, port, i);
582 gma_write16(hw, port, GM_PHY_ADDR, reg); 582 gma_write16(hw, port, GM_PHY_ADDR, reg);
583 583
584 /* transmit control */ 584 /* transmit control */
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 62532b4e45c5..89dd18cd12f0 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -1375,7 +1375,7 @@ enum {
1375 GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */ 1375 GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */
1376/* MIB Counters */ 1376/* MIB Counters */
1377 GM_MIB_CNT_BASE = 0x0100, /* Base Address of MIB Counters */ 1377 GM_MIB_CNT_BASE = 0x0100, /* Base Address of MIB Counters */
1378 GM_MIB_CNT_SIZE = 256, 1378 GM_MIB_CNT_END = 0x025C, /* Last MIB counter */
1379}; 1379};
1380 1380
1381 1381