diff options
author | Michael Chan <mchan@broadcom.com> | 2006-03-20 20:47:20 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2006-03-20 20:47:20 -0500 |
commit | d4d2c558fd3e1f5e386b153f194aa8f0be496c77 (patch) | |
tree | 2cdabdb87525b94a5e80a993563538a64bec6d11 /drivers/net | |
parent | d15150f755bb468afe003d1afee0f45a2fc5eeeb (diff) |
[TG3]: Add support for 5714S and 5715S
Add support for 5714S and 5715S.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/tg3.c | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 6c6c5498899f..b0de6b2754cc 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -223,8 +223,12 @@ static struct pci_device_id tg3_pci_tbl[] = { | |||
223 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 223 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
224 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714, | 224 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714, |
225 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 225 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
226 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714S, | ||
227 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | ||
226 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715, | 228 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715, |
227 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 229 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
230 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715S, | ||
231 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | ||
228 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, | 232 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, |
229 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 233 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
230 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S, | 234 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S, |
@@ -2680,6 +2684,12 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset) | |||
2680 | 2684 | ||
2681 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | 2685 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); |
2682 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | 2686 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); |
2687 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) { | ||
2688 | if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP) | ||
2689 | bmsr |= BMSR_LSTATUS; | ||
2690 | else | ||
2691 | bmsr &= ~BMSR_LSTATUS; | ||
2692 | } | ||
2683 | 2693 | ||
2684 | err |= tg3_readphy(tp, MII_BMCR, &bmcr); | 2694 | err |= tg3_readphy(tp, MII_BMCR, &bmcr); |
2685 | 2695 | ||
@@ -2748,6 +2758,13 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset) | |||
2748 | bmcr = new_bmcr; | 2758 | bmcr = new_bmcr; |
2749 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | 2759 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); |
2750 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | 2760 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); |
2761 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == | ||
2762 | ASIC_REV_5714) { | ||
2763 | if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP) | ||
2764 | bmsr |= BMSR_LSTATUS; | ||
2765 | else | ||
2766 | bmsr &= ~BMSR_LSTATUS; | ||
2767 | } | ||
2751 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; | 2768 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; |
2752 | } | 2769 | } |
2753 | } | 2770 | } |
@@ -5585,6 +5602,9 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5585 | tg3_abort_hw(tp, 1); | 5602 | tg3_abort_hw(tp, 1); |
5586 | } | 5603 | } |
5587 | 5604 | ||
5605 | if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) | ||
5606 | tg3_phy_reset(tp); | ||
5607 | |||
5588 | err = tg3_chip_reset(tp); | 5608 | err = tg3_chip_reset(tp); |
5589 | if (err) | 5609 | if (err) |
5590 | return err; | 5610 | return err; |
@@ -6097,6 +6117,17 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
6097 | tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG; | 6117 | tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG; |
6098 | } | 6118 | } |
6099 | 6119 | ||
6120 | if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && | ||
6121 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)) { | ||
6122 | u32 tmp; | ||
6123 | |||
6124 | tmp = tr32(SERDES_RX_CTRL); | ||
6125 | tw32(SERDES_RX_CTRL, tmp | SERDES_RX_SIG_DETECT); | ||
6126 | tp->grc_local_ctrl &= ~GRC_LCLCTRL_USE_EXT_SIG_DETECT; | ||
6127 | tp->grc_local_ctrl |= GRC_LCLCTRL_USE_SIG_DETECT; | ||
6128 | tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); | ||
6129 | } | ||
6130 | |||
6100 | err = tg3_setup_phy(tp, 1); | 6131 | err = tg3_setup_phy(tp, 1); |
6101 | if (err) | 6132 | if (err) |
6102 | return err; | 6133 | return err; |
@@ -6476,7 +6507,9 @@ static int tg3_open(struct net_device *dev) | |||
6476 | 6507 | ||
6477 | if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && | 6508 | if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && |
6478 | (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) && | 6509 | (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) && |
6479 | (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX)) { | 6510 | (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX) && |
6511 | !((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) && | ||
6512 | (tp->pdev_peer == tp->pdev))) { | ||
6480 | /* All MSI supporting chips should support tagged | 6513 | /* All MSI supporting chips should support tagged |
6481 | * status. Assert that this is the case. | 6514 | * status. Assert that this is the case. |
6482 | */ | 6515 | */ |