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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-21 12:31:48 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-21 12:31:48 -0500
commit3d1f337b3e7378923c89f37afb573a918ef40be5 (patch)
tree386798378567a10d1c7b24f599cb50f70298694c /drivers/net
parent2bf2154c6bb5599e3ec3f73c34861a0b12aa839e (diff)
parent5e35941d990123f155b02d5663e51a24f816b6f3 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6: (235 commits) [NETFILTER]: Add H.323 conntrack/NAT helper [TG3]: Don't mark tg3_test_registers() as returning const. [IPV6]: Cleanups for net/ipv6/addrconf.c (kzalloc, early exit) v2 [IPV6]: Nearly complete kzalloc cleanup for net/ipv6 [IPV6]: Cleanup of net/ipv6/reassambly.c [BRIDGE]: Remove duplicate const from is_link_local() argument type. [DECNET]: net/decnet/dn_route.c: fix inconsequent NULL checking [TG3]: make drivers/net/tg3.c:tg3_request_irq() static [BRIDGE]: use LLC to send STP [LLC]: llc_mac_hdr_init const arguments [BRIDGE]: allow show/store of group multicast address [BRIDGE]: use llc for receiving STP packets [BRIDGE]: stp timer to jiffies cleanup [BRIDGE]: forwarding remove unneeded preempt and bh diasables [BRIDGE]: netfilter inline cleanup [BRIDGE]: netfilter VLAN macro cleanup [BRIDGE]: netfilter dont use __constant_htons [BRIDGE]: netfilter whitespace [BRIDGE]: optimize frame pass up [BRIDGE]: use kzalloc ...
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/8139too.c2
-rw-r--r--drivers/net/bnx2.c477
-rw-r--r--drivers/net/bnx2.h37
-rw-r--r--drivers/net/cassini.c40
-rw-r--r--drivers/net/cassini.h2
-rw-r--r--drivers/net/e1000/e1000_main.c2
-rw-r--r--drivers/net/irda/Kconfig8
-rw-r--r--drivers/net/irda/Makefile1
-rw-r--r--drivers/net/irda/donauboe.c2
-rw-r--r--drivers/net/irda/ep7211_ir.c11
-rw-r--r--drivers/net/irda/irtty-sir.c19
-rw-r--r--drivers/net/irda/nsc-ircc.c320
-rw-r--r--drivers/net/irda/nsc-ircc.h2
-rw-r--r--drivers/net/irda/sir_dongle.c19
-rw-r--r--drivers/net/irda/toim3232-sir.c375
-rw-r--r--drivers/net/irda/vlsi_ir.c2
-rw-r--r--drivers/net/ppp_generic.c4
-rw-r--r--drivers/net/pppoe.c3
-rw-r--r--drivers/net/sungem.c37
-rw-r--r--drivers/net/sungem.h6
-rw-r--r--drivers/net/tg3.c648
-rw-r--r--drivers/net/tg3.h19
-rw-r--r--drivers/net/wan/sbni.c3
23 files changed, 1472 insertions, 567 deletions
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index e58d4c50c2e1..f5ee064ab6b2 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -1605,7 +1605,7 @@ static void rtl8139_thread (void *_data)
1605 if (tp->watchdog_fired) { 1605 if (tp->watchdog_fired) {
1606 tp->watchdog_fired = 0; 1606 tp->watchdog_fired = 0;
1607 rtl8139_tx_timeout_task(_data); 1607 rtl8139_tx_timeout_task(_data);
1608 } else if (rtnl_shlock_nowait() == 0) { 1608 } else if (rtnl_trylock()) {
1609 rtl8139_thread_iter (dev, tp, tp->mmio_addr); 1609 rtl8139_thread_iter (dev, tp, tp->mmio_addr);
1610 rtnl_unlock (); 1610 rtnl_unlock ();
1611 } else { 1611 } else {
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index b787b6582e50..7d213707008a 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -14,8 +14,8 @@
14 14
15#define DRV_MODULE_NAME "bnx2" 15#define DRV_MODULE_NAME "bnx2"
16#define PFX DRV_MODULE_NAME ": " 16#define PFX DRV_MODULE_NAME ": "
17#define DRV_MODULE_VERSION "1.4.31" 17#define DRV_MODULE_VERSION "1.4.38"
18#define DRV_MODULE_RELDATE "January 19, 2006" 18#define DRV_MODULE_RELDATE "February 10, 2006"
19 19
20#define RUN_AT(x) (jiffies + (x)) 20#define RUN_AT(x) (jiffies + (x))
21 21
@@ -360,6 +360,8 @@ bnx2_netif_start(struct bnx2 *bp)
360static void 360static void
361bnx2_free_mem(struct bnx2 *bp) 361bnx2_free_mem(struct bnx2 *bp)
362{ 362{
363 int i;
364
363 if (bp->stats_blk) { 365 if (bp->stats_blk) {
364 pci_free_consistent(bp->pdev, sizeof(struct statistics_block), 366 pci_free_consistent(bp->pdev, sizeof(struct statistics_block),
365 bp->stats_blk, bp->stats_blk_mapping); 367 bp->stats_blk, bp->stats_blk_mapping);
@@ -378,19 +380,23 @@ bnx2_free_mem(struct bnx2 *bp)
378 } 380 }
379 kfree(bp->tx_buf_ring); 381 kfree(bp->tx_buf_ring);
380 bp->tx_buf_ring = NULL; 382 bp->tx_buf_ring = NULL;
381 if (bp->rx_desc_ring) { 383 for (i = 0; i < bp->rx_max_ring; i++) {
382 pci_free_consistent(bp->pdev, 384 if (bp->rx_desc_ring[i])
383 sizeof(struct rx_bd) * RX_DESC_CNT, 385 pci_free_consistent(bp->pdev,
384 bp->rx_desc_ring, bp->rx_desc_mapping); 386 sizeof(struct rx_bd) * RX_DESC_CNT,
385 bp->rx_desc_ring = NULL; 387 bp->rx_desc_ring[i],
386 } 388 bp->rx_desc_mapping[i]);
387 kfree(bp->rx_buf_ring); 389 bp->rx_desc_ring[i] = NULL;
390 }
391 vfree(bp->rx_buf_ring);
388 bp->rx_buf_ring = NULL; 392 bp->rx_buf_ring = NULL;
389} 393}
390 394
391static int 395static int
392bnx2_alloc_mem(struct bnx2 *bp) 396bnx2_alloc_mem(struct bnx2 *bp)
393{ 397{
398 int i;
399
394 bp->tx_buf_ring = kmalloc(sizeof(struct sw_bd) * TX_DESC_CNT, 400 bp->tx_buf_ring = kmalloc(sizeof(struct sw_bd) * TX_DESC_CNT,
395 GFP_KERNEL); 401 GFP_KERNEL);
396 if (bp->tx_buf_ring == NULL) 402 if (bp->tx_buf_ring == NULL)
@@ -404,18 +410,23 @@ bnx2_alloc_mem(struct bnx2 *bp)
404 if (bp->tx_desc_ring == NULL) 410 if (bp->tx_desc_ring == NULL)
405 goto alloc_mem_err; 411 goto alloc_mem_err;
406 412
407 bp->rx_buf_ring = kmalloc(sizeof(struct sw_bd) * RX_DESC_CNT, 413 bp->rx_buf_ring = vmalloc(sizeof(struct sw_bd) * RX_DESC_CNT *
408 GFP_KERNEL); 414 bp->rx_max_ring);
409 if (bp->rx_buf_ring == NULL) 415 if (bp->rx_buf_ring == NULL)
410 goto alloc_mem_err; 416 goto alloc_mem_err;
411 417
412 memset(bp->rx_buf_ring, 0, sizeof(struct sw_bd) * RX_DESC_CNT); 418 memset(bp->rx_buf_ring, 0, sizeof(struct sw_bd) * RX_DESC_CNT *
413 bp->rx_desc_ring = pci_alloc_consistent(bp->pdev, 419 bp->rx_max_ring);
414 sizeof(struct rx_bd) * 420
415 RX_DESC_CNT, 421 for (i = 0; i < bp->rx_max_ring; i++) {
416 &bp->rx_desc_mapping); 422 bp->rx_desc_ring[i] =
417 if (bp->rx_desc_ring == NULL) 423 pci_alloc_consistent(bp->pdev,
418 goto alloc_mem_err; 424 sizeof(struct rx_bd) * RX_DESC_CNT,
425 &bp->rx_desc_mapping[i]);
426 if (bp->rx_desc_ring[i] == NULL)
427 goto alloc_mem_err;
428
429 }
419 430
420 bp->status_blk = pci_alloc_consistent(bp->pdev, 431 bp->status_blk = pci_alloc_consistent(bp->pdev,
421 sizeof(struct status_block), 432 sizeof(struct status_block),
@@ -1520,7 +1531,7 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, u16 index)
1520 struct sk_buff *skb; 1531 struct sk_buff *skb;
1521 struct sw_bd *rx_buf = &bp->rx_buf_ring[index]; 1532 struct sw_bd *rx_buf = &bp->rx_buf_ring[index];
1522 dma_addr_t mapping; 1533 dma_addr_t mapping;
1523 struct rx_bd *rxbd = &bp->rx_desc_ring[index]; 1534 struct rx_bd *rxbd = &bp->rx_desc_ring[RX_RING(index)][RX_IDX(index)];
1524 unsigned long align; 1535 unsigned long align;
1525 1536
1526 skb = dev_alloc_skb(bp->rx_buf_size); 1537 skb = dev_alloc_skb(bp->rx_buf_size);
@@ -1656,23 +1667,30 @@ static inline void
1656bnx2_reuse_rx_skb(struct bnx2 *bp, struct sk_buff *skb, 1667bnx2_reuse_rx_skb(struct bnx2 *bp, struct sk_buff *skb,
1657 u16 cons, u16 prod) 1668 u16 cons, u16 prod)
1658{ 1669{
1659 struct sw_bd *cons_rx_buf = &bp->rx_buf_ring[cons]; 1670 struct sw_bd *cons_rx_buf, *prod_rx_buf;
1660 struct sw_bd *prod_rx_buf = &bp->rx_buf_ring[prod]; 1671 struct rx_bd *cons_bd, *prod_bd;
1661 struct rx_bd *cons_bd = &bp->rx_desc_ring[cons]; 1672
1662 struct rx_bd *prod_bd = &bp->rx_desc_ring[prod]; 1673 cons_rx_buf = &bp->rx_buf_ring[cons];
1674 prod_rx_buf = &bp->rx_buf_ring[prod];
1663 1675
1664 pci_dma_sync_single_for_device(bp->pdev, 1676 pci_dma_sync_single_for_device(bp->pdev,
1665 pci_unmap_addr(cons_rx_buf, mapping), 1677 pci_unmap_addr(cons_rx_buf, mapping),
1666 bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE); 1678 bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
1667 1679
1668 prod_rx_buf->skb = cons_rx_buf->skb; 1680 bp->rx_prod_bseq += bp->rx_buf_use_size;
1669 pci_unmap_addr_set(prod_rx_buf, mapping,
1670 pci_unmap_addr(cons_rx_buf, mapping));
1671 1681
1672 memcpy(prod_bd, cons_bd, 8); 1682 prod_rx_buf->skb = skb;
1673 1683
1674 bp->rx_prod_bseq += bp->rx_buf_use_size; 1684 if (cons == prod)
1685 return;
1675 1686
1687 pci_unmap_addr_set(prod_rx_buf, mapping,
1688 pci_unmap_addr(cons_rx_buf, mapping));
1689
1690 cons_bd = &bp->rx_desc_ring[RX_RING(cons)][RX_IDX(cons)];
1691 prod_bd = &bp->rx_desc_ring[RX_RING(prod)][RX_IDX(prod)];
1692 prod_bd->rx_bd_haddr_hi = cons_bd->rx_bd_haddr_hi;
1693 prod_bd->rx_bd_haddr_lo = cons_bd->rx_bd_haddr_lo;
1676} 1694}
1677 1695
1678static int 1696static int
@@ -1699,14 +1717,19 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
1699 u32 status; 1717 u32 status;
1700 struct sw_bd *rx_buf; 1718 struct sw_bd *rx_buf;
1701 struct sk_buff *skb; 1719 struct sk_buff *skb;
1720 dma_addr_t dma_addr;
1702 1721
1703 sw_ring_cons = RX_RING_IDX(sw_cons); 1722 sw_ring_cons = RX_RING_IDX(sw_cons);
1704 sw_ring_prod = RX_RING_IDX(sw_prod); 1723 sw_ring_prod = RX_RING_IDX(sw_prod);
1705 1724
1706 rx_buf = &bp->rx_buf_ring[sw_ring_cons]; 1725 rx_buf = &bp->rx_buf_ring[sw_ring_cons];
1707 skb = rx_buf->skb; 1726 skb = rx_buf->skb;
1708 pci_dma_sync_single_for_cpu(bp->pdev, 1727
1709 pci_unmap_addr(rx_buf, mapping), 1728 rx_buf->skb = NULL;
1729
1730 dma_addr = pci_unmap_addr(rx_buf, mapping);
1731
1732 pci_dma_sync_single_for_cpu(bp->pdev, dma_addr,
1710 bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE); 1733 bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
1711 1734
1712 rx_hdr = (struct l2_fhdr *) skb->data; 1735 rx_hdr = (struct l2_fhdr *) skb->data;
@@ -1747,8 +1770,7 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
1747 skb = new_skb; 1770 skb = new_skb;
1748 } 1771 }
1749 else if (bnx2_alloc_rx_skb(bp, sw_ring_prod) == 0) { 1772 else if (bnx2_alloc_rx_skb(bp, sw_ring_prod) == 0) {
1750 pci_unmap_single(bp->pdev, 1773 pci_unmap_single(bp->pdev, dma_addr,
1751 pci_unmap_addr(rx_buf, mapping),
1752 bp->rx_buf_use_size, PCI_DMA_FROMDEVICE); 1774 bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
1753 1775
1754 skb_reserve(skb, bp->rx_offset); 1776 skb_reserve(skb, bp->rx_offset);
@@ -1794,8 +1816,6 @@ reuse_rx:
1794 rx_pkt++; 1816 rx_pkt++;
1795 1817
1796next_rx: 1818next_rx:
1797 rx_buf->skb = NULL;
1798
1799 sw_cons = NEXT_RX_BD(sw_cons); 1819 sw_cons = NEXT_RX_BD(sw_cons);
1800 sw_prod = NEXT_RX_BD(sw_prod); 1820 sw_prod = NEXT_RX_BD(sw_prod);
1801 1821
@@ -3340,27 +3360,35 @@ bnx2_init_rx_ring(struct bnx2 *bp)
3340 bp->hw_rx_cons = 0; 3360 bp->hw_rx_cons = 0;
3341 bp->rx_prod_bseq = 0; 3361 bp->rx_prod_bseq = 0;
3342 3362
3343 rxbd = &bp->rx_desc_ring[0]; 3363 for (i = 0; i < bp->rx_max_ring; i++) {
3344 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) { 3364 int j;
3345 rxbd->rx_bd_len = bp->rx_buf_use_size;
3346 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3347 }
3348 3365
3349 rxbd->rx_bd_haddr_hi = (u64) bp->rx_desc_mapping >> 32; 3366 rxbd = &bp->rx_desc_ring[i][0];
3350 rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping & 0xffffffff; 3367 for (j = 0; j < MAX_RX_DESC_CNT; j++, rxbd++) {
3368 rxbd->rx_bd_len = bp->rx_buf_use_size;
3369 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3370 }
3371 if (i == (bp->rx_max_ring - 1))
3372 j = 0;
3373 else
3374 j = i + 1;
3375 rxbd->rx_bd_haddr_hi = (u64) bp->rx_desc_mapping[j] >> 32;
3376 rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping[j] &
3377 0xffffffff;
3378 }
3351 3379
3352 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE; 3380 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE;
3353 val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2; 3381 val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2;
3354 val |= 0x02 << 8; 3382 val |= 0x02 << 8;
3355 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_CTX_TYPE, val); 3383 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_CTX_TYPE, val);
3356 3384
3357 val = (u64) bp->rx_desc_mapping >> 32; 3385 val = (u64) bp->rx_desc_mapping[0] >> 32;
3358 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_HI, val); 3386 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_HI, val);
3359 3387
3360 val = (u64) bp->rx_desc_mapping & 0xffffffff; 3388 val = (u64) bp->rx_desc_mapping[0] & 0xffffffff;
3361 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val); 3389 CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val);
3362 3390
3363 for ( ;ring_prod < bp->rx_ring_size; ) { 3391 for (i = 0; i < bp->rx_ring_size; i++) {
3364 if (bnx2_alloc_rx_skb(bp, ring_prod) < 0) { 3392 if (bnx2_alloc_rx_skb(bp, ring_prod) < 0) {
3365 break; 3393 break;
3366 } 3394 }
@@ -3375,6 +3403,29 @@ bnx2_init_rx_ring(struct bnx2 *bp)
3375} 3403}
3376 3404
3377static void 3405static void
3406bnx2_set_rx_ring_size(struct bnx2 *bp, u32 size)
3407{
3408 u32 num_rings, max;
3409
3410 bp->rx_ring_size = size;
3411 num_rings = 1;
3412 while (size > MAX_RX_DESC_CNT) {
3413 size -= MAX_RX_DESC_CNT;
3414 num_rings++;
3415 }
3416 /* round to next power of 2 */
3417 max = MAX_RX_RINGS;
3418 while ((max & num_rings) == 0)
3419 max >>= 1;
3420
3421 if (num_rings != max)
3422 max <<= 1;
3423
3424 bp->rx_max_ring = max;
3425 bp->rx_max_ring_idx = (bp->rx_max_ring * RX_DESC_CNT) - 1;
3426}
3427
3428static void
3378bnx2_free_tx_skbs(struct bnx2 *bp) 3429bnx2_free_tx_skbs(struct bnx2 *bp)
3379{ 3430{
3380 int i; 3431 int i;
@@ -3419,7 +3470,7 @@ bnx2_free_rx_skbs(struct bnx2 *bp)
3419 if (bp->rx_buf_ring == NULL) 3470 if (bp->rx_buf_ring == NULL)
3420 return; 3471 return;
3421 3472
3422 for (i = 0; i < RX_DESC_CNT; i++) { 3473 for (i = 0; i < bp->rx_max_ring_idx; i++) {
3423 struct sw_bd *rx_buf = &bp->rx_buf_ring[i]; 3474 struct sw_bd *rx_buf = &bp->rx_buf_ring[i];
3424 struct sk_buff *skb = rx_buf->skb; 3475 struct sk_buff *skb = rx_buf->skb;
3425 3476
@@ -3506,74 +3557,9 @@ bnx2_test_registers(struct bnx2 *bp)
3506 { 0x0c00, 0, 0x00000000, 0x00000001 }, 3557 { 0x0c00, 0, 0x00000000, 0x00000001 },
3507 { 0x0c04, 0, 0x00000000, 0x03ff0001 }, 3558 { 0x0c04, 0, 0x00000000, 0x03ff0001 },
3508 { 0x0c08, 0, 0x0f0ff073, 0x00000000 }, 3559 { 0x0c08, 0, 0x0f0ff073, 0x00000000 },
3509 { 0x0c0c, 0, 0x00ffffff, 0x00000000 },
3510 { 0x0c30, 0, 0x00000000, 0xffffffff },
3511 { 0x0c34, 0, 0x00000000, 0xffffffff },
3512 { 0x0c38, 0, 0x00000000, 0xffffffff },
3513 { 0x0c3c, 0, 0x00000000, 0xffffffff },
3514 { 0x0c40, 0, 0x00000000, 0xffffffff },
3515 { 0x0c44, 0, 0x00000000, 0xffffffff },
3516 { 0x0c48, 0, 0x00000000, 0x0007ffff },
3517 { 0x0c4c, 0, 0x00000000, 0xffffffff },
3518 { 0x0c50, 0, 0x00000000, 0xffffffff },
3519 { 0x0c54, 0, 0x00000000, 0xffffffff },
3520 { 0x0c58, 0, 0x00000000, 0xffffffff },
3521 { 0x0c5c, 0, 0x00000000, 0xffffffff },
3522 { 0x0c60, 0, 0x00000000, 0xffffffff },
3523 { 0x0c64, 0, 0x00000000, 0xffffffff },
3524 { 0x0c68, 0, 0x00000000, 0xffffffff },
3525 { 0x0c6c, 0, 0x00000000, 0xffffffff },
3526 { 0x0c70, 0, 0x00000000, 0xffffffff },
3527 { 0x0c74, 0, 0x00000000, 0xffffffff },
3528 { 0x0c78, 0, 0x00000000, 0xffffffff },
3529 { 0x0c7c, 0, 0x00000000, 0xffffffff },
3530 { 0x0c80, 0, 0x00000000, 0xffffffff },
3531 { 0x0c84, 0, 0x00000000, 0xffffffff },
3532 { 0x0c88, 0, 0x00000000, 0xffffffff },
3533 { 0x0c8c, 0, 0x00000000, 0xffffffff },
3534 { 0x0c90, 0, 0x00000000, 0xffffffff },
3535 { 0x0c94, 0, 0x00000000, 0xffffffff },
3536 { 0x0c98, 0, 0x00000000, 0xffffffff },
3537 { 0x0c9c, 0, 0x00000000, 0xffffffff },
3538 { 0x0ca0, 0, 0x00000000, 0xffffffff },
3539 { 0x0ca4, 0, 0x00000000, 0xffffffff },
3540 { 0x0ca8, 0, 0x00000000, 0x0007ffff },
3541 { 0x0cac, 0, 0x00000000, 0xffffffff },
3542 { 0x0cb0, 0, 0x00000000, 0xffffffff },
3543 { 0x0cb4, 0, 0x00000000, 0xffffffff },
3544 { 0x0cb8, 0, 0x00000000, 0xffffffff },
3545 { 0x0cbc, 0, 0x00000000, 0xffffffff },
3546 { 0x0cc0, 0, 0x00000000, 0xffffffff },
3547 { 0x0cc4, 0, 0x00000000, 0xffffffff },
3548 { 0x0cc8, 0, 0x00000000, 0xffffffff },
3549 { 0x0ccc, 0, 0x00000000, 0xffffffff },
3550 { 0x0cd0, 0, 0x00000000, 0xffffffff },
3551 { 0x0cd4, 0, 0x00000000, 0xffffffff },
3552 { 0x0cd8, 0, 0x00000000, 0xffffffff },
3553 { 0x0cdc, 0, 0x00000000, 0xffffffff },
3554 { 0x0ce0, 0, 0x00000000, 0xffffffff },
3555 { 0x0ce4, 0, 0x00000000, 0xffffffff },
3556 { 0x0ce8, 0, 0x00000000, 0xffffffff },
3557 { 0x0cec, 0, 0x00000000, 0xffffffff },
3558 { 0x0cf0, 0, 0x00000000, 0xffffffff },
3559 { 0x0cf4, 0, 0x00000000, 0xffffffff },
3560 { 0x0cf8, 0, 0x00000000, 0xffffffff },
3561 { 0x0cfc, 0, 0x00000000, 0xffffffff },
3562 { 0x0d00, 0, 0x00000000, 0xffffffff },
3563 { 0x0d04, 0, 0x00000000, 0xffffffff },
3564 3560
3565 { 0x1000, 0, 0x00000000, 0x00000001 }, 3561 { 0x1000, 0, 0x00000000, 0x00000001 },
3566 { 0x1004, 0, 0x00000000, 0x000f0001 }, 3562 { 0x1004, 0, 0x00000000, 0x000f0001 },
3567 { 0x1044, 0, 0x00000000, 0xffc003ff },
3568 { 0x1080, 0, 0x00000000, 0x0001ffff },
3569 { 0x1084, 0, 0x00000000, 0xffffffff },
3570 { 0x1088, 0, 0x00000000, 0xffffffff },
3571 { 0x108c, 0, 0x00000000, 0xffffffff },
3572 { 0x1090, 0, 0x00000000, 0xffffffff },
3573 { 0x1094, 0, 0x00000000, 0xffffffff },
3574 { 0x1098, 0, 0x00000000, 0xffffffff },
3575 { 0x109c, 0, 0x00000000, 0xffffffff },
3576 { 0x10a0, 0, 0x00000000, 0xffffffff },
3577 3563
3578 { 0x1408, 0, 0x01c00800, 0x00000000 }, 3564 { 0x1408, 0, 0x01c00800, 0x00000000 },
3579 { 0x149c, 0, 0x8000ffff, 0x00000000 }, 3565 { 0x149c, 0, 0x8000ffff, 0x00000000 },
@@ -3585,111 +3571,9 @@ bnx2_test_registers(struct bnx2 *bp)
3585 { 0x14c4, 0, 0x00003fff, 0x00000000 }, 3571 { 0x14c4, 0, 0x00003fff, 0x00000000 },
3586 { 0x14cc, 0, 0x00000000, 0x00000001 }, 3572 { 0x14cc, 0, 0x00000000, 0x00000001 },
3587 { 0x14d0, 0, 0xffffffff, 0x00000000 }, 3573 { 0x14d0, 0, 0xffffffff, 0x00000000 },
3588 { 0x1500, 0, 0x00000000, 0xffffffff },
3589 { 0x1504, 0, 0x00000000, 0xffffffff },
3590 { 0x1508, 0, 0x00000000, 0xffffffff },
3591 { 0x150c, 0, 0x00000000, 0xffffffff },
3592 { 0x1510, 0, 0x00000000, 0xffffffff },
3593 { 0x1514, 0, 0x00000000, 0xffffffff },
3594 { 0x1518, 0, 0x00000000, 0xffffffff },
3595 { 0x151c, 0, 0x00000000, 0xffffffff },
3596 { 0x1520, 0, 0x00000000, 0xffffffff },
3597 { 0x1524, 0, 0x00000000, 0xffffffff },
3598 { 0x1528, 0, 0x00000000, 0xffffffff },
3599 { 0x152c, 0, 0x00000000, 0xffffffff },
3600 { 0x1530, 0, 0x00000000, 0xffffffff },
3601 { 0x1534, 0, 0x00000000, 0xffffffff },
3602 { 0x1538, 0, 0x00000000, 0xffffffff },
3603 { 0x153c, 0, 0x00000000, 0xffffffff },
3604 { 0x1540, 0, 0x00000000, 0xffffffff },
3605 { 0x1544, 0, 0x00000000, 0xffffffff },
3606 { 0x1548, 0, 0x00000000, 0xffffffff },
3607 { 0x154c, 0, 0x00000000, 0xffffffff },
3608 { 0x1550, 0, 0x00000000, 0xffffffff },
3609 { 0x1554, 0, 0x00000000, 0xffffffff },
3610 { 0x1558, 0, 0x00000000, 0xffffffff },
3611 { 0x1600, 0, 0x00000000, 0xffffffff },
3612 { 0x1604, 0, 0x00000000, 0xffffffff },
3613 { 0x1608, 0, 0x00000000, 0xffffffff },
3614 { 0x160c, 0, 0x00000000, 0xffffffff },
3615 { 0x1610, 0, 0x00000000, 0xffffffff },
3616 { 0x1614, 0, 0x00000000, 0xffffffff },
3617 { 0x1618, 0, 0x00000000, 0xffffffff },
3618 { 0x161c, 0, 0x00000000, 0xffffffff },
3619 { 0x1620, 0, 0x00000000, 0xffffffff },
3620 { 0x1624, 0, 0x00000000, 0xffffffff },
3621 { 0x1628, 0, 0x00000000, 0xffffffff },
3622 { 0x162c, 0, 0x00000000, 0xffffffff },
3623 { 0x1630, 0, 0x00000000, 0xffffffff },
3624 { 0x1634, 0, 0x00000000, 0xffffffff },
3625 { 0x1638, 0, 0x00000000, 0xffffffff },
3626 { 0x163c, 0, 0x00000000, 0xffffffff },
3627 { 0x1640, 0, 0x00000000, 0xffffffff },
3628 { 0x1644, 0, 0x00000000, 0xffffffff },
3629 { 0x1648, 0, 0x00000000, 0xffffffff },
3630 { 0x164c, 0, 0x00000000, 0xffffffff },
3631 { 0x1650, 0, 0x00000000, 0xffffffff },
3632 { 0x1654, 0, 0x00000000, 0xffffffff },
3633 3574
3634 { 0x1800, 0, 0x00000000, 0x00000001 }, 3575 { 0x1800, 0, 0x00000000, 0x00000001 },
3635 { 0x1804, 0, 0x00000000, 0x00000003 }, 3576 { 0x1804, 0, 0x00000000, 0x00000003 },
3636 { 0x1840, 0, 0x00000000, 0xffffffff },
3637 { 0x1844, 0, 0x00000000, 0xffffffff },
3638 { 0x1848, 0, 0x00000000, 0xffffffff },
3639 { 0x184c, 0, 0x00000000, 0xffffffff },
3640 { 0x1850, 0, 0x00000000, 0xffffffff },
3641 { 0x1900, 0, 0x7ffbffff, 0x00000000 },
3642 { 0x1904, 0, 0xffffffff, 0x00000000 },
3643 { 0x190c, 0, 0xffffffff, 0x00000000 },
3644 { 0x1914, 0, 0xffffffff, 0x00000000 },
3645 { 0x191c, 0, 0xffffffff, 0x00000000 },
3646 { 0x1924, 0, 0xffffffff, 0x00000000 },
3647 { 0x192c, 0, 0xffffffff, 0x00000000 },
3648 { 0x1934, 0, 0xffffffff, 0x00000000 },
3649 { 0x193c, 0, 0xffffffff, 0x00000000 },
3650 { 0x1944, 0, 0xffffffff, 0x00000000 },
3651 { 0x194c, 0, 0xffffffff, 0x00000000 },
3652 { 0x1954, 0, 0xffffffff, 0x00000000 },
3653 { 0x195c, 0, 0xffffffff, 0x00000000 },
3654 { 0x1964, 0, 0xffffffff, 0x00000000 },
3655 { 0x196c, 0, 0xffffffff, 0x00000000 },
3656 { 0x1974, 0, 0xffffffff, 0x00000000 },
3657 { 0x197c, 0, 0xffffffff, 0x00000000 },
3658 { 0x1980, 0, 0x0700ffff, 0x00000000 },
3659
3660 { 0x1c00, 0, 0x00000000, 0x00000001 },
3661 { 0x1c04, 0, 0x00000000, 0x00000003 },
3662 { 0x1c08, 0, 0x0000000f, 0x00000000 },
3663 { 0x1c40, 0, 0x00000000, 0xffffffff },
3664 { 0x1c44, 0, 0x00000000, 0xffffffff },
3665 { 0x1c48, 0, 0x00000000, 0xffffffff },
3666 { 0x1c4c, 0, 0x00000000, 0xffffffff },
3667 { 0x1c50, 0, 0x00000000, 0xffffffff },
3668 { 0x1d00, 0, 0x7ffbffff, 0x00000000 },
3669 { 0x1d04, 0, 0xffffffff, 0x00000000 },
3670 { 0x1d0c, 0, 0xffffffff, 0x00000000 },
3671 { 0x1d14, 0, 0xffffffff, 0x00000000 },
3672 { 0x1d1c, 0, 0xffffffff, 0x00000000 },
3673 { 0x1d24, 0, 0xffffffff, 0x00000000 },
3674 { 0x1d2c, 0, 0xffffffff, 0x00000000 },
3675 { 0x1d34, 0, 0xffffffff, 0x00000000 },
3676 { 0x1d3c, 0, 0xffffffff, 0x00000000 },
3677 { 0x1d44, 0, 0xffffffff, 0x00000000 },
3678 { 0x1d4c, 0, 0xffffffff, 0x00000000 },
3679 { 0x1d54, 0, 0xffffffff, 0x00000000 },
3680 { 0x1d5c, 0, 0xffffffff, 0x00000000 },
3681 { 0x1d64, 0, 0xffffffff, 0x00000000 },
3682 { 0x1d6c, 0, 0xffffffff, 0x00000000 },
3683 { 0x1d74, 0, 0xffffffff, 0x00000000 },
3684 { 0x1d7c, 0, 0xffffffff, 0x00000000 },
3685 { 0x1d80, 0, 0x0700ffff, 0x00000000 },
3686
3687 { 0x2004, 0, 0x00000000, 0x0337000f },
3688 { 0x2008, 0, 0xffffffff, 0x00000000 },
3689 { 0x200c, 0, 0xffffffff, 0x00000000 },
3690 { 0x2010, 0, 0xffffffff, 0x00000000 },
3691 { 0x2014, 0, 0x801fff80, 0x00000000 },
3692 { 0x2018, 0, 0x000003ff, 0x00000000 },
3693 3577
3694 { 0x2800, 0, 0x00000000, 0x00000001 }, 3578 { 0x2800, 0, 0x00000000, 0x00000001 },
3695 { 0x2804, 0, 0x00000000, 0x00003f01 }, 3579 { 0x2804, 0, 0x00000000, 0x00003f01 },
@@ -3707,16 +3591,6 @@ bnx2_test_registers(struct bnx2 *bp)
3707 { 0x2c00, 0, 0x00000000, 0x00000011 }, 3591 { 0x2c00, 0, 0x00000000, 0x00000011 },
3708 { 0x2c04, 0, 0x00000000, 0x00030007 }, 3592 { 0x2c04, 0, 0x00000000, 0x00030007 },
3709 3593
3710 { 0x3000, 0, 0x00000000, 0x00000001 },
3711 { 0x3004, 0, 0x00000000, 0x007007ff },
3712 { 0x3008, 0, 0x00000003, 0x00000000 },
3713 { 0x300c, 0, 0xffffffff, 0x00000000 },
3714 { 0x3010, 0, 0xffffffff, 0x00000000 },
3715 { 0x3014, 0, 0xffffffff, 0x00000000 },
3716 { 0x3034, 0, 0xffffffff, 0x00000000 },
3717 { 0x3038, 0, 0xffffffff, 0x00000000 },
3718 { 0x3050, 0, 0x00000001, 0x00000000 },
3719
3720 { 0x3c00, 0, 0x00000000, 0x00000001 }, 3594 { 0x3c00, 0, 0x00000000, 0x00000001 },
3721 { 0x3c04, 0, 0x00000000, 0x00070000 }, 3595 { 0x3c04, 0, 0x00000000, 0x00070000 },
3722 { 0x3c08, 0, 0x00007f71, 0x07f00000 }, 3596 { 0x3c08, 0, 0x00007f71, 0x07f00000 },
@@ -3726,88 +3600,11 @@ bnx2_test_registers(struct bnx2 *bp)
3726 { 0x3c18, 0, 0x00000000, 0xffffffff }, 3600 { 0x3c18, 0, 0x00000000, 0xffffffff },
3727 { 0x3c1c, 0, 0xfffff000, 0x00000000 }, 3601 { 0x3c1c, 0, 0xfffff000, 0x00000000 },
3728 { 0x3c20, 0, 0xffffff00, 0x00000000 }, 3602 { 0x3c20, 0, 0xffffff00, 0x00000000 },
3729 { 0x3c24, 0, 0xffffffff, 0x00000000 },
3730 { 0x3c28, 0, 0xffffffff, 0x00000000 },
3731 { 0x3c2c, 0, 0xffffffff, 0x00000000 },
3732 { 0x3c30, 0, 0xffffffff, 0x00000000 },
3733 { 0x3c34, 0, 0xffffffff, 0x00000000 },
3734 { 0x3c38, 0, 0xffffffff, 0x00000000 },
3735 { 0x3c3c, 0, 0xffffffff, 0x00000000 },
3736 { 0x3c40, 0, 0xffffffff, 0x00000000 },
3737 { 0x3c44, 0, 0xffffffff, 0x00000000 },
3738 { 0x3c48, 0, 0xffffffff, 0x00000000 },
3739 { 0x3c4c, 0, 0xffffffff, 0x00000000 },
3740 { 0x3c50, 0, 0xffffffff, 0x00000000 },
3741 { 0x3c54, 0, 0xffffffff, 0x00000000 },
3742 { 0x3c58, 0, 0xffffffff, 0x00000000 },
3743 { 0x3c5c, 0, 0xffffffff, 0x00000000 },
3744 { 0x3c60, 0, 0xffffffff, 0x00000000 },
3745 { 0x3c64, 0, 0xffffffff, 0x00000000 },
3746 { 0x3c68, 0, 0xffffffff, 0x00000000 },
3747 { 0x3c6c, 0, 0xffffffff, 0x00000000 },
3748 { 0x3c70, 0, 0xffffffff, 0x00000000 },
3749 { 0x3c74, 0, 0x0000003f, 0x00000000 },
3750 { 0x3c78, 0, 0x00000000, 0x00000000 },
3751 { 0x3c7c, 0, 0x00000000, 0x00000000 },
3752 { 0x3c80, 0, 0x3fffffff, 0x00000000 },
3753 { 0x3c84, 0, 0x0000003f, 0x00000000 },
3754 { 0x3c88, 0, 0x00000000, 0xffffffff },
3755 { 0x3c8c, 0, 0x00000000, 0xffffffff },
3756
3757 { 0x4000, 0, 0x00000000, 0x00000001 },
3758 { 0x4004, 0, 0x00000000, 0x00030000 },
3759 { 0x4008, 0, 0x00000ff0, 0x00000000 },
3760 { 0x400c, 0, 0xffffffff, 0x00000000 },
3761 { 0x4088, 0, 0x00000000, 0x00070303 },
3762
3763 { 0x4400, 0, 0x00000000, 0x00000001 },
3764 { 0x4404, 0, 0x00000000, 0x00003f01 },
3765 { 0x4408, 0, 0x7fff00ff, 0x00000000 },
3766 { 0x440c, 0, 0xffffffff, 0x00000000 },
3767 { 0x4410, 0, 0xffff, 0x0000 },
3768 { 0x4414, 0, 0xffff, 0x0000 },
3769 { 0x4418, 0, 0xffff, 0x0000 },
3770 { 0x441c, 0, 0xffff, 0x0000 },
3771 { 0x4428, 0, 0xffffffff, 0x00000000 },
3772 { 0x442c, 0, 0xffffffff, 0x00000000 },
3773 { 0x4430, 0, 0xffffffff, 0x00000000 },
3774 { 0x4434, 0, 0xffffffff, 0x00000000 },
3775 { 0x4438, 0, 0xffffffff, 0x00000000 },
3776 { 0x443c, 0, 0xffffffff, 0x00000000 },
3777 { 0x4440, 0, 0xffffffff, 0x00000000 },
3778 { 0x4444, 0, 0xffffffff, 0x00000000 },
3779
3780 { 0x4c00, 0, 0x00000000, 0x00000001 },
3781 { 0x4c04, 0, 0x00000000, 0x0000003f },
3782 { 0x4c08, 0, 0xffffffff, 0x00000000 },
3783 { 0x4c0c, 0, 0x0007fc00, 0x00000000 },
3784 { 0x4c10, 0, 0x80003fe0, 0x00000000 },
3785 { 0x4c14, 0, 0xffffffff, 0x00000000 },
3786 { 0x4c44, 0, 0x00000000, 0x9fff9fff },
3787 { 0x4c48, 0, 0x00000000, 0xb3009fff },
3788 { 0x4c4c, 0, 0x00000000, 0x77f33b30 },
3789 { 0x4c50, 0, 0x00000000, 0xffffffff },
3790 3603
3791 { 0x5004, 0, 0x00000000, 0x0000007f }, 3604 { 0x5004, 0, 0x00000000, 0x0000007f },
3792 { 0x5008, 0, 0x0f0007ff, 0x00000000 }, 3605 { 0x5008, 0, 0x0f0007ff, 0x00000000 },
3793 { 0x500c, 0, 0xf800f800, 0x07ff07ff }, 3606 { 0x500c, 0, 0xf800f800, 0x07ff07ff },
3794 3607
3795 { 0x5400, 0, 0x00000008, 0x00000001 },
3796 { 0x5404, 0, 0x00000000, 0x0000003f },
3797 { 0x5408, 0, 0x0000001f, 0x00000000 },
3798 { 0x540c, 0, 0xffffffff, 0x00000000 },
3799 { 0x5410, 0, 0xffffffff, 0x00000000 },
3800 { 0x5414, 0, 0x0000ffff, 0x00000000 },
3801 { 0x5418, 0, 0x0000ffff, 0x00000000 },
3802 { 0x541c, 0, 0x0000ffff, 0x00000000 },
3803 { 0x5420, 0, 0x0000ffff, 0x00000000 },
3804 { 0x5428, 0, 0x000000ff, 0x00000000 },
3805 { 0x542c, 0, 0xff00ffff, 0x00000000 },
3806 { 0x5430, 0, 0x001fff80, 0x00000000 },
3807 { 0x5438, 0, 0xffffffff, 0x00000000 },
3808 { 0x543c, 0, 0xffffffff, 0x00000000 },
3809 { 0x5440, 0, 0xf800f800, 0x07ff07ff },
3810
3811 { 0x5c00, 0, 0x00000000, 0x00000001 }, 3608 { 0x5c00, 0, 0x00000000, 0x00000001 },
3812 { 0x5c04, 0, 0x00000000, 0x0003000f }, 3609 { 0x5c04, 0, 0x00000000, 0x0003000f },
3813 { 0x5c08, 0, 0x00000003, 0x00000000 }, 3610 { 0x5c08, 0, 0x00000003, 0x00000000 },
@@ -4794,6 +4591,64 @@ bnx2_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
4794 info->fw_version[5] = 0; 4591 info->fw_version[5] = 0;
4795} 4592}
4796 4593
4594#define BNX2_REGDUMP_LEN (32 * 1024)
4595
4596static int
4597bnx2_get_regs_len(struct net_device *dev)
4598{
4599 return BNX2_REGDUMP_LEN;
4600}
4601
4602static void
4603bnx2_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *_p)
4604{
4605 u32 *p = _p, i, offset;
4606 u8 *orig_p = _p;
4607 struct bnx2 *bp = netdev_priv(dev);
4608 u32 reg_boundaries[] = { 0x0000, 0x0098, 0x0400, 0x045c,
4609 0x0800, 0x0880, 0x0c00, 0x0c10,
4610 0x0c30, 0x0d08, 0x1000, 0x101c,
4611 0x1040, 0x1048, 0x1080, 0x10a4,
4612 0x1400, 0x1490, 0x1498, 0x14f0,
4613 0x1500, 0x155c, 0x1580, 0x15dc,
4614 0x1600, 0x1658, 0x1680, 0x16d8,
4615 0x1800, 0x1820, 0x1840, 0x1854,
4616 0x1880, 0x1894, 0x1900, 0x1984,
4617 0x1c00, 0x1c0c, 0x1c40, 0x1c54,
4618 0x1c80, 0x1c94, 0x1d00, 0x1d84,
4619 0x2000, 0x2030, 0x23c0, 0x2400,
4620 0x2800, 0x2820, 0x2830, 0x2850,
4621 0x2b40, 0x2c10, 0x2fc0, 0x3058,
4622 0x3c00, 0x3c94, 0x4000, 0x4010,
4623 0x4080, 0x4090, 0x43c0, 0x4458,
4624 0x4c00, 0x4c18, 0x4c40, 0x4c54,
4625 0x4fc0, 0x5010, 0x53c0, 0x5444,
4626 0x5c00, 0x5c18, 0x5c80, 0x5c90,
4627 0x5fc0, 0x6000, 0x6400, 0x6428,
4628 0x6800, 0x6848, 0x684c, 0x6860,
4629 0x6888, 0x6910, 0x8000 };
4630
4631 regs->version = 0;
4632
4633 memset(p, 0, BNX2_REGDUMP_LEN);
4634
4635 if (!netif_running(bp->dev))
4636 return;
4637
4638 i = 0;
4639 offset = reg_boundaries[0];
4640 p += offset;
4641 while (offset < BNX2_REGDUMP_LEN) {
4642 *p++ = REG_RD(bp, offset);
4643 offset += 4;
4644 if (offset == reg_boundaries[i + 1]) {
4645 offset = reg_boundaries[i + 2];
4646 p = (u32 *) (orig_p + offset);
4647 i += 2;
4648 }
4649 }
4650}
4651
4797static void 4652static void
4798bnx2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 4653bnx2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
4799{ 4654{
@@ -4979,7 +4834,7 @@ bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
4979{ 4834{
4980 struct bnx2 *bp = netdev_priv(dev); 4835 struct bnx2 *bp = netdev_priv(dev);
4981 4836
4982 ering->rx_max_pending = MAX_RX_DESC_CNT; 4837 ering->rx_max_pending = MAX_TOTAL_RX_DESC_CNT;
4983 ering->rx_mini_max_pending = 0; 4838 ering->rx_mini_max_pending = 0;
4984 ering->rx_jumbo_max_pending = 0; 4839 ering->rx_jumbo_max_pending = 0;
4985 4840
@@ -4996,17 +4851,28 @@ bnx2_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
4996{ 4851{
4997 struct bnx2 *bp = netdev_priv(dev); 4852 struct bnx2 *bp = netdev_priv(dev);
4998 4853
4999 if ((ering->rx_pending > MAX_RX_DESC_CNT) || 4854 if ((ering->rx_pending > MAX_TOTAL_RX_DESC_CNT) ||
5000 (ering->tx_pending > MAX_TX_DESC_CNT) || 4855 (ering->tx_pending > MAX_TX_DESC_CNT) ||
5001 (ering->tx_pending <= MAX_SKB_FRAGS)) { 4856 (ering->tx_pending <= MAX_SKB_FRAGS)) {
5002 4857
5003 return -EINVAL; 4858 return -EINVAL;
5004 } 4859 }
5005 bp->rx_ring_size = ering->rx_pending; 4860 if (netif_running(bp->dev)) {
4861 bnx2_netif_stop(bp);
4862 bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
4863 bnx2_free_skbs(bp);
4864 bnx2_free_mem(bp);
4865 }
4866
4867 bnx2_set_rx_ring_size(bp, ering->rx_pending);
5006 bp->tx_ring_size = ering->tx_pending; 4868 bp->tx_ring_size = ering->tx_pending;
5007 4869
5008 if (netif_running(bp->dev)) { 4870 if (netif_running(bp->dev)) {
5009 bnx2_netif_stop(bp); 4871 int rc;
4872
4873 rc = bnx2_alloc_mem(bp);
4874 if (rc)
4875 return rc;
5010 bnx2_init_nic(bp); 4876 bnx2_init_nic(bp);
5011 bnx2_netif_start(bp); 4877 bnx2_netif_start(bp);
5012 } 4878 }
@@ -5360,6 +5226,8 @@ static struct ethtool_ops bnx2_ethtool_ops = {
5360 .get_settings = bnx2_get_settings, 5226 .get_settings = bnx2_get_settings,
5361 .set_settings = bnx2_set_settings, 5227 .set_settings = bnx2_set_settings,
5362 .get_drvinfo = bnx2_get_drvinfo, 5228 .get_drvinfo = bnx2_get_drvinfo,
5229 .get_regs_len = bnx2_get_regs_len,
5230 .get_regs = bnx2_get_regs,
5363 .get_wol = bnx2_get_wol, 5231 .get_wol = bnx2_get_wol,
5364 .set_wol = bnx2_set_wol, 5232 .set_wol = bnx2_set_wol,
5365 .nway_reset = bnx2_nway_reset, 5233 .nway_reset = bnx2_nway_reset,
@@ -5678,7 +5546,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
5678 bp->mac_addr[5] = (u8) reg; 5546 bp->mac_addr[5] = (u8) reg;
5679 5547
5680 bp->tx_ring_size = MAX_TX_DESC_CNT; 5548 bp->tx_ring_size = MAX_TX_DESC_CNT;
5681 bp->rx_ring_size = 100; 5549 bnx2_set_rx_ring_size(bp, 100);
5682 5550
5683 bp->rx_csum = 1; 5551 bp->rx_csum = 1;
5684 5552
@@ -5897,6 +5765,7 @@ bnx2_suspend(struct pci_dev *pdev, pm_message_t state)
5897 if (!netif_running(dev)) 5765 if (!netif_running(dev))
5898 return 0; 5766 return 0;
5899 5767
5768 flush_scheduled_work();
5900 bnx2_netif_stop(bp); 5769 bnx2_netif_stop(bp);
5901 netif_device_detach(dev); 5770 netif_device_detach(dev);
5902 del_timer_sync(&bp->timer); 5771 del_timer_sync(&bp->timer);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 9f691cbd666b..fd4b7f2eb477 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -23,6 +23,7 @@
23#include <linux/errno.h> 23#include <linux/errno.h>
24#include <linux/ioport.h> 24#include <linux/ioport.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/vmalloc.h>
26#include <linux/interrupt.h> 27#include <linux/interrupt.h>
27#include <linux/pci.h> 28#include <linux/pci.h>
28#include <linux/init.h> 29#include <linux/init.h>
@@ -3792,8 +3793,10 @@ struct l2_fhdr {
3792#define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd)) 3793#define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd))
3793#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1) 3794#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1)
3794 3795
3796#define MAX_RX_RINGS 4
3795#define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct rx_bd)) 3797#define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct rx_bd))
3796#define MAX_RX_DESC_CNT (RX_DESC_CNT - 1) 3798#define MAX_RX_DESC_CNT (RX_DESC_CNT - 1)
3799#define MAX_TOTAL_RX_DESC_CNT (MAX_RX_DESC_CNT * MAX_RX_RINGS)
3797 3800
3798#define NEXT_TX_BD(x) (((x) & (MAX_TX_DESC_CNT - 1)) == \ 3801#define NEXT_TX_BD(x) (((x) & (MAX_TX_DESC_CNT - 1)) == \
3799 (MAX_TX_DESC_CNT - 1)) ? \ 3802 (MAX_TX_DESC_CNT - 1)) ? \
@@ -3805,8 +3808,10 @@ struct l2_fhdr {
3805 (MAX_RX_DESC_CNT - 1)) ? \ 3808 (MAX_RX_DESC_CNT - 1)) ? \
3806 (x) + 2 : (x) + 1 3809 (x) + 2 : (x) + 1
3807 3810
3808#define RX_RING_IDX(x) ((x) & MAX_RX_DESC_CNT) 3811#define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx)
3809 3812
3813#define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> 8)
3814#define RX_IDX(x) ((x) & MAX_RX_DESC_CNT)
3810 3815
3811/* Context size. */ 3816/* Context size. */
3812#define CTX_SHIFT 7 3817#define CTX_SHIFT 7
@@ -3903,6 +3908,15 @@ struct bnx2 {
3903 struct status_block *status_blk; 3908 struct status_block *status_blk;
3904 u32 last_status_idx; 3909 u32 last_status_idx;
3905 3910
3911 u32 flags;
3912#define PCIX_FLAG 1
3913#define PCI_32BIT_FLAG 2
3914#define ONE_TDMA_FLAG 4 /* no longer used */
3915#define NO_WOL_FLAG 8
3916#define USING_DAC_FLAG 0x10
3917#define USING_MSI_FLAG 0x20
3918#define ASF_ENABLE_FLAG 0x40
3919
3906 struct tx_bd *tx_desc_ring; 3920 struct tx_bd *tx_desc_ring;
3907 struct sw_bd *tx_buf_ring; 3921 struct sw_bd *tx_buf_ring;
3908 u32 tx_prod_bseq; 3922 u32 tx_prod_bseq;
@@ -3920,19 +3934,22 @@ struct bnx2 {
3920 u32 rx_offset; 3934 u32 rx_offset;
3921 u32 rx_buf_use_size; /* useable size */ 3935 u32 rx_buf_use_size; /* useable size */
3922 u32 rx_buf_size; /* with alignment */ 3936 u32 rx_buf_size; /* with alignment */
3923 struct rx_bd *rx_desc_ring; 3937 u32 rx_max_ring_idx;
3924 struct sw_bd *rx_buf_ring; 3938
3925 u32 rx_prod_bseq; 3939 u32 rx_prod_bseq;
3926 u16 rx_prod; 3940 u16 rx_prod;
3927 u16 rx_cons; 3941 u16 rx_cons;
3928 3942
3929 u32 rx_csum; 3943 u32 rx_csum;
3930 3944
3945 struct sw_bd *rx_buf_ring;
3946 struct rx_bd *rx_desc_ring[MAX_RX_RINGS];
3947
3931 /* Only used to synchronize netif_stop_queue/wake_queue when tx */ 3948 /* Only used to synchronize netif_stop_queue/wake_queue when tx */
3932 /* ring is full */ 3949 /* ring is full */
3933 spinlock_t tx_lock; 3950 spinlock_t tx_lock;
3934 3951
3935 /* End of fileds used in the performance code paths. */ 3952 /* End of fields used in the performance code paths. */
3936 3953
3937 char *name; 3954 char *name;
3938 3955
@@ -3945,15 +3962,6 @@ struct bnx2 {
3945 /* Used to synchronize phy accesses. */ 3962 /* Used to synchronize phy accesses. */
3946 spinlock_t phy_lock; 3963 spinlock_t phy_lock;
3947 3964
3948 u32 flags;
3949#define PCIX_FLAG 1
3950#define PCI_32BIT_FLAG 2
3951#define ONE_TDMA_FLAG 4 /* no longer used */
3952#define NO_WOL_FLAG 8
3953#define USING_DAC_FLAG 0x10
3954#define USING_MSI_FLAG 0x20
3955#define ASF_ENABLE_FLAG 0x40
3956
3957 u32 phy_flags; 3965 u32 phy_flags;
3958#define PHY_SERDES_FLAG 1 3966#define PHY_SERDES_FLAG 1
3959#define PHY_CRC_FIX_FLAG 2 3967#define PHY_CRC_FIX_FLAG 2
@@ -4004,8 +4012,9 @@ struct bnx2 {
4004 dma_addr_t tx_desc_mapping; 4012 dma_addr_t tx_desc_mapping;
4005 4013
4006 4014
4015 int rx_max_ring;
4007 int rx_ring_size; 4016 int rx_ring_size;
4008 dma_addr_t rx_desc_mapping; 4017 dma_addr_t rx_desc_mapping[MAX_RX_RINGS];
4009 4018
4010 u16 tx_quick_cons_trip; 4019 u16 tx_quick_cons_trip;
4011 u16 tx_quick_cons_trip_int; 4020 u16 tx_quick_cons_trip_int;
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 6e295fce5c6f..8f1573e658a5 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -91,6 +91,7 @@
91#include <linux/mii.h> 91#include <linux/mii.h>
92#include <linux/ip.h> 92#include <linux/ip.h>
93#include <linux/tcp.h> 93#include <linux/tcp.h>
94#include <linux/mutex.h>
94 95
95#include <net/checksum.h> 96#include <net/checksum.h>
96 97
@@ -3892,7 +3893,7 @@ static void cas_reset(struct cas *cp, int blkflag)
3892 spin_unlock(&cp->stat_lock[N_TX_RINGS]); 3893 spin_unlock(&cp->stat_lock[N_TX_RINGS]);
3893} 3894}
3894 3895
3895/* Shut down the chip, must be called with pm_sem held. */ 3896/* Shut down the chip, must be called with pm_mutex held. */
3896static void cas_shutdown(struct cas *cp) 3897static void cas_shutdown(struct cas *cp)
3897{ 3898{
3898 unsigned long flags; 3899 unsigned long flags;
@@ -4311,11 +4312,11 @@ static int cas_open(struct net_device *dev)
4311 int hw_was_up, err; 4312 int hw_was_up, err;
4312 unsigned long flags; 4313 unsigned long flags;
4313 4314
4314 down(&cp->pm_sem); 4315 mutex_lock(&cp->pm_mutex);
4315 4316
4316 hw_was_up = cp->hw_running; 4317 hw_was_up = cp->hw_running;
4317 4318
4318 /* The power-management semaphore protects the hw_running 4319 /* The power-management mutex protects the hw_running
4319 * etc. state so it is safe to do this bit without cp->lock 4320 * etc. state so it is safe to do this bit without cp->lock
4320 */ 4321 */
4321 if (!cp->hw_running) { 4322 if (!cp->hw_running) {
@@ -4364,7 +4365,7 @@ static int cas_open(struct net_device *dev)
4364 cas_unlock_all_restore(cp, flags); 4365 cas_unlock_all_restore(cp, flags);
4365 4366
4366 netif_start_queue(dev); 4367 netif_start_queue(dev);
4367 up(&cp->pm_sem); 4368 mutex_unlock(&cp->pm_mutex);
4368 return 0; 4369 return 0;
4369 4370
4370err_spare: 4371err_spare:
@@ -4372,7 +4373,7 @@ err_spare:
4372 cas_free_rxds(cp); 4373 cas_free_rxds(cp);
4373err_tx_tiny: 4374err_tx_tiny:
4374 cas_tx_tiny_free(cp); 4375 cas_tx_tiny_free(cp);
4375 up(&cp->pm_sem); 4376 mutex_unlock(&cp->pm_mutex);
4376 return err; 4377 return err;
4377} 4378}
4378 4379
@@ -4382,7 +4383,7 @@ static int cas_close(struct net_device *dev)
4382 struct cas *cp = netdev_priv(dev); 4383 struct cas *cp = netdev_priv(dev);
4383 4384
4384 /* Make sure we don't get distracted by suspend/resume */ 4385 /* Make sure we don't get distracted by suspend/resume */
4385 down(&cp->pm_sem); 4386 mutex_lock(&cp->pm_mutex);
4386 4387
4387 netif_stop_queue(dev); 4388 netif_stop_queue(dev);
4388 4389
@@ -4399,7 +4400,7 @@ static int cas_close(struct net_device *dev)
4399 cas_spare_free(cp); 4400 cas_spare_free(cp);
4400 cas_free_rxds(cp); 4401 cas_free_rxds(cp);
4401 cas_tx_tiny_free(cp); 4402 cas_tx_tiny_free(cp);
4402 up(&cp->pm_sem); 4403 mutex_unlock(&cp->pm_mutex);
4403 return 0; 4404 return 0;
4404} 4405}
4405 4406
@@ -4834,10 +4835,10 @@ static int cas_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4834 unsigned long flags; 4835 unsigned long flags;
4835 int rc = -EOPNOTSUPP; 4836 int rc = -EOPNOTSUPP;
4836 4837
4837 /* Hold the PM semaphore while doing ioctl's or we may collide 4838 /* Hold the PM mutex while doing ioctl's or we may collide
4838 * with open/close and power management and oops. 4839 * with open/close and power management and oops.
4839 */ 4840 */
4840 down(&cp->pm_sem); 4841 mutex_lock(&cp->pm_mutex);
4841 switch (cmd) { 4842 switch (cmd) {
4842 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 4843 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
4843 data->phy_id = cp->phy_addr; 4844 data->phy_id = cp->phy_addr;
@@ -4867,7 +4868,7 @@ static int cas_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4867 break; 4868 break;
4868 }; 4869 };
4869 4870
4870 up(&cp->pm_sem); 4871 mutex_unlock(&cp->pm_mutex);
4871 return rc; 4872 return rc;
4872} 4873}
4873 4874
@@ -4994,7 +4995,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
4994 spin_lock_init(&cp->tx_lock[i]); 4995 spin_lock_init(&cp->tx_lock[i]);
4995 } 4996 }
4996 spin_lock_init(&cp->stat_lock[N_TX_RINGS]); 4997 spin_lock_init(&cp->stat_lock[N_TX_RINGS]);
4997 init_MUTEX(&cp->pm_sem); 4998 mutex_init(&cp->pm_mutex);
4998 4999
4999 init_timer(&cp->link_timer); 5000 init_timer(&cp->link_timer);
5000 cp->link_timer.function = cas_link_timer; 5001 cp->link_timer.function = cas_link_timer;
@@ -5116,10 +5117,10 @@ err_out_free_consistent:
5116 cp->init_block, cp->block_dvma); 5117 cp->init_block, cp->block_dvma);
5117 5118
5118err_out_iounmap: 5119err_out_iounmap:
5119 down(&cp->pm_sem); 5120 mutex_lock(&cp->pm_mutex);
5120 if (cp->hw_running) 5121 if (cp->hw_running)
5121 cas_shutdown(cp); 5122 cas_shutdown(cp);
5122 up(&cp->pm_sem); 5123 mutex_unlock(&cp->pm_mutex);
5123 5124
5124 iounmap(cp->regs); 5125 iounmap(cp->regs);
5125 5126
@@ -5152,11 +5153,11 @@ static void __devexit cas_remove_one(struct pci_dev *pdev)
5152 cp = netdev_priv(dev); 5153 cp = netdev_priv(dev);
5153 unregister_netdev(dev); 5154 unregister_netdev(dev);
5154 5155
5155 down(&cp->pm_sem); 5156 mutex_lock(&cp->pm_mutex);
5156 flush_scheduled_work(); 5157 flush_scheduled_work();
5157 if (cp->hw_running) 5158 if (cp->hw_running)
5158 cas_shutdown(cp); 5159 cas_shutdown(cp);
5159 up(&cp->pm_sem); 5160 mutex_unlock(&cp->pm_mutex);
5160 5161
5161#if 1 5162#if 1
5162 if (cp->orig_cacheline_size) { 5163 if (cp->orig_cacheline_size) {
@@ -5183,10 +5184,7 @@ static int cas_suspend(struct pci_dev *pdev, pm_message_t state)
5183 struct cas *cp = netdev_priv(dev); 5184 struct cas *cp = netdev_priv(dev);
5184 unsigned long flags; 5185 unsigned long flags;
5185 5186
5186 /* We hold the PM semaphore during entire driver 5187 mutex_lock(&cp->pm_mutex);
5187 * sleep time
5188 */
5189 down(&cp->pm_sem);
5190 5188
5191 /* If the driver is opened, we stop the DMA */ 5189 /* If the driver is opened, we stop the DMA */
5192 if (cp->opened) { 5190 if (cp->opened) {
@@ -5206,6 +5204,7 @@ static int cas_suspend(struct pci_dev *pdev, pm_message_t state)
5206 5204
5207 if (cp->hw_running) 5205 if (cp->hw_running)
5208 cas_shutdown(cp); 5206 cas_shutdown(cp);
5207 mutex_unlock(&cp->pm_mutex);
5209 5208
5210 return 0; 5209 return 0;
5211} 5210}
@@ -5217,6 +5216,7 @@ static int cas_resume(struct pci_dev *pdev)
5217 5216
5218 printk(KERN_INFO "%s: resuming\n", dev->name); 5217 printk(KERN_INFO "%s: resuming\n", dev->name);
5219 5218
5219 mutex_lock(&cp->pm_mutex);
5220 cas_hard_reset(cp); 5220 cas_hard_reset(cp);
5221 if (cp->opened) { 5221 if (cp->opened) {
5222 unsigned long flags; 5222 unsigned long flags;
@@ -5229,7 +5229,7 @@ static int cas_resume(struct pci_dev *pdev)
5229 5229
5230 netif_device_attach(dev); 5230 netif_device_attach(dev);
5231 } 5231 }
5232 up(&cp->pm_sem); 5232 mutex_unlock(&cp->pm_mutex);
5233 return 0; 5233 return 0;
5234} 5234}
5235#endif /* CONFIG_PM */ 5235#endif /* CONFIG_PM */
diff --git a/drivers/net/cassini.h b/drivers/net/cassini.h
index 88063ef16cf6..ab55c7ee1012 100644
--- a/drivers/net/cassini.h
+++ b/drivers/net/cassini.h
@@ -4284,7 +4284,7 @@ struct cas {
4284 * (ie. not power managed) */ 4284 * (ie. not power managed) */
4285 int hw_running; 4285 int hw_running;
4286 int opened; 4286 int opened;
4287 struct semaphore pm_sem; /* open/close/suspend/resume */ 4287 struct mutex pm_mutex; /* open/close/suspend/resume */
4288 4288
4289 struct cas_init_block *init_block; 4289 struct cas_init_block *init_block;
4290 struct cas_tx_desc *init_txds[MAX_TX_RINGS]; 4290 struct cas_tx_desc *init_txds[MAX_TX_RINGS];
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index f39de16e6b97..49cd096a3c3d 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -920,7 +920,7 @@ e1000_remove(struct pci_dev *pdev)
920 unregister_netdev(netdev); 920 unregister_netdev(netdev);
921#ifdef CONFIG_E1000_NAPI 921#ifdef CONFIG_E1000_NAPI
922 for (i = 0; i < adapter->num_rx_queues; i++) 922 for (i = 0; i < adapter->num_rx_queues; i++)
923 __dev_put(&adapter->polling_netdev[i]); 923 dev_put(&adapter->polling_netdev[i]);
924#endif 924#endif
925 925
926 if (!e1000_check_phy_reset_block(&adapter->hw)) 926 if (!e1000_check_phy_reset_block(&adapter->hw))
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index c81fe1c382d5..5e6d00752990 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -64,6 +64,14 @@ config TEKRAM_DONGLE
64 dongles you will have to start irattach like this: 64 dongles you will have to start irattach like this:
65 "irattach -d tekram". 65 "irattach -d tekram".
66 66
67config TOIM3232_DONGLE
68 tristate "TOIM3232 IrDa dongle"
69 depends on DONGLE && IRDA
70 help
71 Say Y here if you want to build support for the Vishay/Temic
72 TOIM3232 and TOIM4232 based dongles.
73 To compile it as a module, choose M here.
74
67config LITELINK_DONGLE 75config LITELINK_DONGLE
68 tristate "Parallax LiteLink dongle" 76 tristate "Parallax LiteLink dongle"
69 depends on DONGLE && IRDA 77 depends on DONGLE && IRDA
diff --git a/drivers/net/irda/Makefile b/drivers/net/irda/Makefile
index 72cbfdc9cfcc..27ab75f20799 100644
--- a/drivers/net/irda/Makefile
+++ b/drivers/net/irda/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_OLD_BELKIN_DONGLE) += old_belkin-sir.o
43obj-$(CONFIG_MCP2120_DONGLE) += mcp2120-sir.o 43obj-$(CONFIG_MCP2120_DONGLE) += mcp2120-sir.o
44obj-$(CONFIG_ACT200L_DONGLE) += act200l-sir.o 44obj-$(CONFIG_ACT200L_DONGLE) += act200l-sir.o
45obj-$(CONFIG_MA600_DONGLE) += ma600-sir.o 45obj-$(CONFIG_MA600_DONGLE) += ma600-sir.o
46obj-$(CONFIG_TOIM3232_DONGLE) += toim3232-sir.o
46 47
47# The SIR helper module 48# The SIR helper module
48sir-dev-objs := sir_dev.o sir_dongle.o sir_kthread.o 49sir-dev-objs := sir_dev.o sir_dongle.o sir_kthread.o
diff --git a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c
index 3137592d60c0..910c0cab35b0 100644
--- a/drivers/net/irda/donauboe.c
+++ b/drivers/net/irda/donauboe.c
@@ -1778,7 +1778,7 @@ static struct pci_driver donauboe_pci_driver = {
1778static int __init 1778static int __init
1779donauboe_init (void) 1779donauboe_init (void)
1780{ 1780{
1781 return pci_module_init(&donauboe_pci_driver); 1781 return pci_register_driver(&donauboe_pci_driver);
1782} 1782}
1783 1783
1784static void __exit 1784static void __exit
diff --git a/drivers/net/irda/ep7211_ir.c b/drivers/net/irda/ep7211_ir.c
index 31896262d21c..4cba38f7e4a8 100644
--- a/drivers/net/irda/ep7211_ir.c
+++ b/drivers/net/irda/ep7211_ir.c
@@ -8,6 +8,7 @@
8#include <linux/delay.h> 8#include <linux/delay.h>
9#include <linux/tty.h> 9#include <linux/tty.h>
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/spinlock.h>
11 12
12#include <net/irda/irda.h> 13#include <net/irda/irda.h>
13#include <net/irda/irda_device.h> 14#include <net/irda/irda_device.h>
@@ -23,6 +24,8 @@ static void ep7211_ir_close(dongle_t *self);
23static int ep7211_ir_change_speed(struct irda_task *task); 24static int ep7211_ir_change_speed(struct irda_task *task);
24static int ep7211_ir_reset(struct irda_task *task); 25static int ep7211_ir_reset(struct irda_task *task);
25 26
27static DEFINE_SPINLOCK(ep7211_lock);
28
26static struct dongle_reg dongle = { 29static struct dongle_reg dongle = {
27 .type = IRDA_EP7211_IR, 30 .type = IRDA_EP7211_IR,
28 .open = ep7211_ir_open, 31 .open = ep7211_ir_open,
@@ -36,7 +39,7 @@ static void ep7211_ir_open(dongle_t *self, struct qos_info *qos)
36{ 39{
37 unsigned int syscon1, flags; 40 unsigned int syscon1, flags;
38 41
39 save_flags(flags); cli(); 42 spin_lock_irqsave(&ep7211_lock, flags);
40 43
41 /* Turn on the SIR encoder. */ 44 /* Turn on the SIR encoder. */
42 syscon1 = clps_readl(SYSCON1); 45 syscon1 = clps_readl(SYSCON1);
@@ -46,14 +49,14 @@ static void ep7211_ir_open(dongle_t *self, struct qos_info *qos)
46 /* XXX: We should disable modem status interrupts on the first 49 /* XXX: We should disable modem status interrupts on the first
47 UART (interrupt #14). */ 50 UART (interrupt #14). */
48 51
49 restore_flags(flags); 52 spin_unlock_irqrestore(&ep7211_lock, flags);
50} 53}
51 54
52static void ep7211_ir_close(dongle_t *self) 55static void ep7211_ir_close(dongle_t *self)
53{ 56{
54 unsigned int syscon1, flags; 57 unsigned int syscon1, flags;
55 58
56 save_flags(flags); cli(); 59 spin_lock_irqsave(&ep7211_lock, flags);
57 60
58 /* Turn off the SIR encoder. */ 61 /* Turn off the SIR encoder. */
59 syscon1 = clps_readl(SYSCON1); 62 syscon1 = clps_readl(SYSCON1);
@@ -63,7 +66,7 @@ static void ep7211_ir_close(dongle_t *self)
63 /* XXX: If we've disabled the modem status interrupts, we should 66 /* XXX: If we've disabled the modem status interrupts, we should
64 reset them back to their original state. */ 67 reset them back to their original state. */
65 68
66 restore_flags(flags); 69 spin_unlock_irqrestore(&ep7211_lock, flags);
67} 70}
68 71
69/* 72/*
diff --git a/drivers/net/irda/irtty-sir.c b/drivers/net/irda/irtty-sir.c
index 101750bf210f..6a98b7ae4975 100644
--- a/drivers/net/irda/irtty-sir.c
+++ b/drivers/net/irda/irtty-sir.c
@@ -33,6 +33,7 @@
33#include <asm/uaccess.h> 33#include <asm/uaccess.h>
34#include <linux/smp_lock.h> 34#include <linux/smp_lock.h>
35#include <linux/delay.h> 35#include <linux/delay.h>
36#include <linux/mutex.h>
36 37
37#include <net/irda/irda.h> 38#include <net/irda/irda.h>
38#include <net/irda/irda_device.h> 39#include <net/irda/irda_device.h>
@@ -338,7 +339,7 @@ static inline void irtty_stop_receiver(struct tty_struct *tty, int stop)
338/*****************************************************************/ 339/*****************************************************************/
339 340
340/* serialize ldisc open/close with sir_dev */ 341/* serialize ldisc open/close with sir_dev */
341static DECLARE_MUTEX(irtty_sem); 342static DEFINE_MUTEX(irtty_mutex);
342 343
343/* notifier from sir_dev when irda% device gets opened (ifup) */ 344/* notifier from sir_dev when irda% device gets opened (ifup) */
344 345
@@ -348,11 +349,11 @@ static int irtty_start_dev(struct sir_dev *dev)
348 struct tty_struct *tty; 349 struct tty_struct *tty;
349 350
350 /* serialize with ldisc open/close */ 351 /* serialize with ldisc open/close */
351 down(&irtty_sem); 352 mutex_lock(&irtty_mutex);
352 353
353 priv = dev->priv; 354 priv = dev->priv;
354 if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) { 355 if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) {
355 up(&irtty_sem); 356 mutex_unlock(&irtty_mutex);
356 return -ESTALE; 357 return -ESTALE;
357 } 358 }
358 359
@@ -363,7 +364,7 @@ static int irtty_start_dev(struct sir_dev *dev)
363 /* Make sure we can receive more data */ 364 /* Make sure we can receive more data */
364 irtty_stop_receiver(tty, FALSE); 365 irtty_stop_receiver(tty, FALSE);
365 366
366 up(&irtty_sem); 367 mutex_unlock(&irtty_mutex);
367 return 0; 368 return 0;
368} 369}
369 370
@@ -375,11 +376,11 @@ static int irtty_stop_dev(struct sir_dev *dev)
375 struct tty_struct *tty; 376 struct tty_struct *tty;
376 377
377 /* serialize with ldisc open/close */ 378 /* serialize with ldisc open/close */
378 down(&irtty_sem); 379 mutex_lock(&irtty_mutex);
379 380
380 priv = dev->priv; 381 priv = dev->priv;
381 if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) { 382 if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) {
382 up(&irtty_sem); 383 mutex_unlock(&irtty_mutex);
383 return -ESTALE; 384 return -ESTALE;
384 } 385 }
385 386
@@ -390,7 +391,7 @@ static int irtty_stop_dev(struct sir_dev *dev)
390 if (tty->driver->stop) 391 if (tty->driver->stop)
391 tty->driver->stop(tty); 392 tty->driver->stop(tty);
392 393
393 up(&irtty_sem); 394 mutex_unlock(&irtty_mutex);
394 395
395 return 0; 396 return 0;
396} 397}
@@ -514,13 +515,13 @@ static int irtty_open(struct tty_struct *tty)
514 priv->dev = dev; 515 priv->dev = dev;
515 516
516 /* serialize with start_dev - in case we were racing with ifup */ 517 /* serialize with start_dev - in case we were racing with ifup */
517 down(&irtty_sem); 518 mutex_lock(&irtty_mutex);
518 519
519 dev->priv = priv; 520 dev->priv = priv;
520 tty->disc_data = priv; 521 tty->disc_data = priv;
521 tty->receive_room = 65536; 522 tty->receive_room = 65536;
522 523
523 up(&irtty_sem); 524 mutex_unlock(&irtty_mutex);
524 525
525 IRDA_DEBUG(0, "%s - %s: irda line discipline opened\n", __FUNCTION__, tty->name); 526 IRDA_DEBUG(0, "%s - %s: irda line discipline opened\n", __FUNCTION__, tty->name);
526 527
diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c
index ee717d0e939e..83141a3ff546 100644
--- a/drivers/net/irda/nsc-ircc.c
+++ b/drivers/net/irda/nsc-ircc.c
@@ -12,6 +12,7 @@
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no> 12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com> 13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com 14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
15 * All Rights Reserved 16 * All Rights Reserved
16 * 17 *
17 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
@@ -53,14 +54,13 @@
53#include <linux/init.h> 54#include <linux/init.h>
54#include <linux/rtnetlink.h> 55#include <linux/rtnetlink.h>
55#include <linux/dma-mapping.h> 56#include <linux/dma-mapping.h>
57#include <linux/pnp.h>
58#include <linux/platform_device.h>
56 59
57#include <asm/io.h> 60#include <asm/io.h>
58#include <asm/dma.h> 61#include <asm/dma.h>
59#include <asm/byteorder.h> 62#include <asm/byteorder.h>
60 63
61#include <linux/pm.h>
62#include <linux/pm_legacy.h>
63
64#include <net/irda/wrapper.h> 64#include <net/irda/wrapper.h>
65#include <net/irda/irda.h> 65#include <net/irda/irda.h>
66#include <net/irda/irda_device.h> 66#include <net/irda/irda_device.h>
@@ -72,14 +72,27 @@
72 72
73static char *driver_name = "nsc-ircc"; 73static char *driver_name = "nsc-ircc";
74 74
75/* Power Management */
76#define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78static int nsc_ircc_resume(struct platform_device *dev);
79
80static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86};
87
75/* Module parameters */ 88/* Module parameters */
76static int qos_mtt_bits = 0x07; /* 1 ms or more */ 89static int qos_mtt_bits = 0x07; /* 1 ms or more */
77static int dongle_id; 90static int dongle_id;
78 91
79/* Use BIOS settions by default, but user may supply module parameters */ 92/* Use BIOS settions by default, but user may supply module parameters */
80static unsigned int io[] = { ~0, ~0, ~0, ~0 }; 93static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
81static unsigned int irq[] = { 0, 0, 0, 0, 0 }; 94static unsigned int irq[] = { 0, 0, 0, 0, 0 };
82static unsigned int dma[] = { 0, 0, 0, 0, 0 }; 95static unsigned int dma[] = { 0, 0, 0, 0, 0 };
83 96
84static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info); 97static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
85static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info); 98static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
@@ -87,6 +100,7 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
87static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info); 100static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
88static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info); 101static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
89static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info); 102static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
90 104
91/* These are the known NSC chips */ 105/* These are the known NSC chips */
92static nsc_chip_t chips[] = { 106static nsc_chip_t chips[] = {
@@ -101,11 +115,12 @@ static nsc_chip_t chips[] = {
101 /* Contributed by Jan Frey - IBM A30/A31 */ 115 /* Contributed by Jan Frey - IBM A30/A31 */
102 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff, 116 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
103 nsc_ircc_probe_39x, nsc_ircc_init_39x }, 117 nsc_ircc_probe_39x, nsc_ircc_init_39x },
118 { "IBM", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
104 { NULL } 120 { NULL }
105}; 121};
106 122
107/* Max 4 instances for now */ 123static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
108static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
109 124
110static char *dongle_types[] = { 125static char *dongle_types[] = {
111 "Differential serial interface", 126 "Differential serial interface",
@@ -126,8 +141,24 @@ static char *dongle_types[] = {
126 "No dongle connected", 141 "No dongle connected",
127}; 142};
128 143
144/* PNP probing */
145static chipio_t pnp_info;
146static const struct pnp_device_id nsc_ircc_pnp_table[] = {
147 { .id = "NSC6001", .driver_data = 0 },
148 { .id = "IBM0071", .driver_data = 0 },
149 { }
150};
151
152MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
153
154static struct pnp_driver nsc_ircc_pnp_driver = {
155 .name = "nsc-ircc",
156 .id_table = nsc_ircc_pnp_table,
157 .probe = nsc_ircc_pnp_probe,
158};
159
129/* Some prototypes */ 160/* Some prototypes */
130static int nsc_ircc_open(int i, chipio_t *info); 161static int nsc_ircc_open(chipio_t *info);
131static int nsc_ircc_close(struct nsc_ircc_cb *self); 162static int nsc_ircc_close(struct nsc_ircc_cb *self);
132static int nsc_ircc_setup(chipio_t *info); 163static int nsc_ircc_setup(chipio_t *info);
133static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self); 164static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
@@ -146,7 +177,10 @@ static int nsc_ircc_net_open(struct net_device *dev);
146static int nsc_ircc_net_close(struct net_device *dev); 177static int nsc_ircc_net_close(struct net_device *dev);
147static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 178static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
148static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev); 179static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
149static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data); 180
181/* Globals */
182static int pnp_registered;
183static int pnp_succeeded;
150 184
151/* 185/*
152 * Function nsc_ircc_init () 186 * Function nsc_ircc_init ()
@@ -158,28 +192,36 @@ static int __init nsc_ircc_init(void)
158{ 192{
159 chipio_t info; 193 chipio_t info;
160 nsc_chip_t *chip; 194 nsc_chip_t *chip;
161 int ret = -ENODEV; 195 int ret;
162 int cfg_base; 196 int cfg_base;
163 int cfg, id; 197 int cfg, id;
164 int reg; 198 int reg;
165 int i = 0; 199 int i = 0;
166 200
201 ret = platform_driver_register(&nsc_ircc_driver);
202 if (ret) {
203 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
204 return ret;
205 }
206
207 /* Register with PnP subsystem to detect disable ports */
208 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
209
210 if (ret >= 0)
211 pnp_registered = 1;
212
213 ret = -ENODEV;
214
167 /* Probe for all the NSC chipsets we know about */ 215 /* Probe for all the NSC chipsets we know about */
168 for (chip=chips; chip->name ; chip++) { 216 for (chip = chips; chip->name ; chip++) {
169 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__, 217 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
170 chip->name); 218 chip->name);
171 219
172 /* Try all config registers for this chip */ 220 /* Try all config registers for this chip */
173 for (cfg=0; cfg<3; cfg++) { 221 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
174 cfg_base = chip->cfg[cfg]; 222 cfg_base = chip->cfg[cfg];
175 if (!cfg_base) 223 if (!cfg_base)
176 continue; 224 continue;
177
178 memset(&info, 0, sizeof(chipio_t));
179 info.cfg_base = cfg_base;
180 info.fir_base = io[i];
181 info.dma = dma[i];
182 info.irq = irq[i];
183 225
184 /* Read index register */ 226 /* Read index register */
185 reg = inb(cfg_base); 227 reg = inb(cfg_base);
@@ -194,24 +236,65 @@ static int __init nsc_ircc_init(void)
194 if ((id & chip->cid_mask) == chip->cid_value) { 236 if ((id & chip->cid_mask) == chip->cid_value) {
195 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n", 237 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
196 __FUNCTION__, chip->name, id & ~chip->cid_mask); 238 __FUNCTION__, chip->name, id & ~chip->cid_mask);
197 /*
198 * If the user supplies the base address, then
199 * we init the chip, if not we probe the values
200 * set by the BIOS
201 */
202 if (io[i] < 0x2000) {
203 chip->init(chip, &info);
204 } else
205 chip->probe(chip, &info);
206 239
207 if (nsc_ircc_open(i, &info) == 0) 240 /*
208 ret = 0; 241 * If we found a correct PnP setting,
242 * we first try it.
243 */
244 if (pnp_succeeded) {
245 memset(&info, 0, sizeof(chipio_t));
246 info.cfg_base = cfg_base;
247 info.fir_base = pnp_info.fir_base;
248 info.dma = pnp_info.dma;
249 info.irq = pnp_info.irq;
250
251 if (info.fir_base < 0x2000) {
252 IRDA_MESSAGE("%s, chip->init\n", driver_name);
253 chip->init(chip, &info);
254 } else
255 chip->probe(chip, &info);
256
257 if (nsc_ircc_open(&info) >= 0)
258 ret = 0;
259 }
260
261 /*
262 * Opening based on PnP values failed.
263 * Let's fallback to user values, or probe
264 * the chip.
265 */
266 if (ret) {
267 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
268 memset(&info, 0, sizeof(chipio_t));
269 info.cfg_base = cfg_base;
270 info.fir_base = io[i];
271 info.dma = dma[i];
272 info.irq = irq[i];
273
274 /*
275 * If the user supplies the base address, then
276 * we init the chip, if not we probe the values
277 * set by the BIOS
278 */
279 if (io[i] < 0x2000) {
280 chip->init(chip, &info);
281 } else
282 chip->probe(chip, &info);
283
284 if (nsc_ircc_open(&info) >= 0)
285 ret = 0;
286 }
209 i++; 287 i++;
210 } else { 288 } else {
211 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id); 289 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
212 } 290 }
213 } 291 }
214 292 }
293
294 if (ret) {
295 platform_driver_unregister(&nsc_ircc_driver);
296 pnp_unregister_driver(&nsc_ircc_pnp_driver);
297 pnp_registered = 0;
215 } 298 }
216 299
217 return ret; 300 return ret;
@@ -227,12 +310,17 @@ static void __exit nsc_ircc_cleanup(void)
227{ 310{
228 int i; 311 int i;
229 312
230 pm_unregister_all(nsc_ircc_pmproc); 313 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
231
232 for (i=0; i < 4; i++) {
233 if (dev_self[i]) 314 if (dev_self[i])
234 nsc_ircc_close(dev_self[i]); 315 nsc_ircc_close(dev_self[i]);
235 } 316 }
317
318 platform_driver_unregister(&nsc_ircc_driver);
319
320 if (pnp_registered)
321 pnp_unregister_driver(&nsc_ircc_pnp_driver);
322
323 pnp_registered = 0;
236} 324}
237 325
238/* 326/*
@@ -241,16 +329,26 @@ static void __exit nsc_ircc_cleanup(void)
241 * Open driver instance 329 * Open driver instance
242 * 330 *
243 */ 331 */
244static int __init nsc_ircc_open(int i, chipio_t *info) 332static int __init nsc_ircc_open(chipio_t *info)
245{ 333{
246 struct net_device *dev; 334 struct net_device *dev;
247 struct nsc_ircc_cb *self; 335 struct nsc_ircc_cb *self;
248 struct pm_dev *pmdev;
249 void *ret; 336 void *ret;
250 int err; 337 int err, chip_index;
251 338
252 IRDA_DEBUG(2, "%s()\n", __FUNCTION__); 339 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
253 340
341
342 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
343 if (!dev_self[chip_index])
344 break;
345 }
346
347 if (chip_index == ARRAY_SIZE(dev_self)) {
348 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
349 return -ENOMEM;
350 }
351
254 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name, 352 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
255 info->cfg_base); 353 info->cfg_base);
256 354
@@ -271,8 +369,8 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
271 spin_lock_init(&self->lock); 369 spin_lock_init(&self->lock);
272 370
273 /* Need to store self somewhere */ 371 /* Need to store self somewhere */
274 dev_self[i] = self; 372 dev_self[chip_index] = self;
275 self->index = i; 373 self->index = chip_index;
276 374
277 /* Initialize IO */ 375 /* Initialize IO */
278 self->io.cfg_base = info->cfg_base; 376 self->io.cfg_base = info->cfg_base;
@@ -351,7 +449,7 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
351 449
352 /* Check if user has supplied a valid dongle id or not */ 450 /* Check if user has supplied a valid dongle id or not */
353 if ((dongle_id <= 0) || 451 if ((dongle_id <= 0) ||
354 (dongle_id >= (sizeof(dongle_types) / sizeof(dongle_types[0]))) ) { 452 (dongle_id >= ARRAY_SIZE(dongle_types))) {
355 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base); 453 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
356 454
357 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name, 455 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
@@ -364,11 +462,18 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
364 self->io.dongle_id = dongle_id; 462 self->io.dongle_id = dongle_id;
365 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id); 463 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
366 464
367 pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc); 465 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
368 if (pmdev) 466 self->index, NULL, 0);
369 pmdev->data = self; 467 if (IS_ERR(self->pldev)) {
468 err = PTR_ERR(self->pldev);
469 goto out5;
470 }
471 platform_set_drvdata(self->pldev, self);
370 472
371 return 0; 473 return chip_index;
474
475 out5:
476 unregister_netdev(dev);
372 out4: 477 out4:
373 dma_free_coherent(NULL, self->tx_buff.truesize, 478 dma_free_coherent(NULL, self->tx_buff.truesize,
374 self->tx_buff.head, self->tx_buff_dma); 479 self->tx_buff.head, self->tx_buff_dma);
@@ -379,7 +484,7 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
379 release_region(self->io.fir_base, self->io.fir_ext); 484 release_region(self->io.fir_base, self->io.fir_ext);
380 out1: 485 out1:
381 free_netdev(dev); 486 free_netdev(dev);
382 dev_self[i] = NULL; 487 dev_self[chip_index] = NULL;
383 return err; 488 return err;
384} 489}
385 490
@@ -399,6 +504,8 @@ static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
399 504
400 iobase = self->io.fir_base; 505 iobase = self->io.fir_base;
401 506
507 platform_device_unregister(self->pldev);
508
402 /* Remove netdevice */ 509 /* Remove netdevice */
403 unregister_netdev(self->netdev); 510 unregister_netdev(self->netdev);
404 511
@@ -806,6 +913,43 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
806 return 0; 913 return 0;
807} 914}
808 915
916/* PNP probing */
917static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
918{
919 memset(&pnp_info, 0, sizeof(chipio_t));
920 pnp_info.irq = -1;
921 pnp_info.dma = -1;
922 pnp_succeeded = 1;
923
924 /* There don't seem to be any way to get the cfg_base.
925 * On my box, cfg_base is in the PnP descriptor of the
926 * motherboard. Oh well... Jean II */
927
928 if (pnp_port_valid(dev, 0) &&
929 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
930 pnp_info.fir_base = pnp_port_start(dev, 0);
931
932 if (pnp_irq_valid(dev, 0) &&
933 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
934 pnp_info.irq = pnp_irq(dev, 0);
935
936 if (pnp_dma_valid(dev, 0) &&
937 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
938 pnp_info.dma = pnp_dma(dev, 0);
939
940 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
941 __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
942
943 if((pnp_info.fir_base == 0) ||
944 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
945 /* Returning an error will disable the device. Yuck ! */
946 //return -EINVAL;
947 pnp_succeeded = 0;
948 }
949
950 return 0;
951}
952
809/* 953/*
810 * Function nsc_ircc_setup (info) 954 * Function nsc_ircc_setup (info)
811 * 955 *
@@ -2161,45 +2305,83 @@ static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
2161 return &self->stats; 2305 return &self->stats;
2162} 2306}
2163 2307
2164static void nsc_ircc_suspend(struct nsc_ircc_cb *self) 2308static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2165{ 2309{
2166 IRDA_MESSAGE("%s, Suspending\n", driver_name); 2310 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2311 int bank;
2312 unsigned long flags;
2313 int iobase = self->io.fir_base;
2167 2314
2168 if (self->io.suspended) 2315 if (self->io.suspended)
2169 return; 2316 return 0;
2170 2317
2171 nsc_ircc_net_close(self->netdev); 2318 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2172 2319
2320 rtnl_lock();
2321 if (netif_running(self->netdev)) {
2322 netif_device_detach(self->netdev);
2323 spin_lock_irqsave(&self->lock, flags);
2324 /* Save current bank */
2325 bank = inb(iobase+BSR);
2326
2327 /* Disable interrupts */
2328 switch_bank(iobase, BANK0);
2329 outb(0, iobase+IER);
2330
2331 /* Restore bank register */
2332 outb(bank, iobase+BSR);
2333
2334 spin_unlock_irqrestore(&self->lock, flags);
2335 free_irq(self->io.irq, self->netdev);
2336 disable_dma(self->io.dma);
2337 }
2173 self->io.suspended = 1; 2338 self->io.suspended = 1;
2339 rtnl_unlock();
2340
2341 return 0;
2174} 2342}
2175 2343
2176static void nsc_ircc_wakeup(struct nsc_ircc_cb *self) 2344static int nsc_ircc_resume(struct platform_device *dev)
2177{ 2345{
2346 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2347 unsigned long flags;
2348
2178 if (!self->io.suspended) 2349 if (!self->io.suspended)
2179 return; 2350 return 0;
2180 2351
2352 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2353
2354 rtnl_lock();
2181 nsc_ircc_setup(&self->io); 2355 nsc_ircc_setup(&self->io);
2182 nsc_ircc_net_open(self->netdev); 2356 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2183
2184 IRDA_MESSAGE("%s, Waking up\n", driver_name);
2185 2357
2358 if (netif_running(self->netdev)) {
2359 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2360 self->netdev->name, self->netdev)) {
2361 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2362 driver_name, self->io.irq);
2363
2364 /*
2365 * Don't fail resume process, just kill this
2366 * network interface
2367 */
2368 unregister_netdevice(self->netdev);
2369 } else {
2370 spin_lock_irqsave(&self->lock, flags);
2371 nsc_ircc_change_speed(self, self->io.speed);
2372 spin_unlock_irqrestore(&self->lock, flags);
2373 netif_device_attach(self->netdev);
2374 }
2375
2376 } else {
2377 spin_lock_irqsave(&self->lock, flags);
2378 nsc_ircc_change_speed(self, 9600);
2379 spin_unlock_irqrestore(&self->lock, flags);
2380 }
2186 self->io.suspended = 0; 2381 self->io.suspended = 0;
2187} 2382 rtnl_unlock();
2188 2383
2189static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data) 2384 return 0;
2190{
2191 struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
2192 if (self) {
2193 switch (rqst) {
2194 case PM_SUSPEND:
2195 nsc_ircc_suspend(self);
2196 break;
2197 case PM_RESUME:
2198 nsc_ircc_wakeup(self);
2199 break;
2200 }
2201 }
2202 return 0;
2203} 2385}
2204 2386
2205MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>"); 2387MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
diff --git a/drivers/net/irda/nsc-ircc.h b/drivers/net/irda/nsc-ircc.h
index 6edf7e514624..dacf671abcd6 100644
--- a/drivers/net/irda/nsc-ircc.h
+++ b/drivers/net/irda/nsc-ircc.h
@@ -269,7 +269,7 @@ struct nsc_ircc_cb {
269 __u32 new_speed; 269 __u32 new_speed;
270 int index; /* Instance index */ 270 int index; /* Instance index */
271 271
272 struct pm_dev *dev; 272 struct platform_device *pldev;
273}; 273};
274 274
275static inline void switch_bank(int iobase, int bank) 275static inline void switch_bank(int iobase, int bank)
diff --git a/drivers/net/irda/sir_dongle.c b/drivers/net/irda/sir_dongle.c
index 8d225921ae7b..d7e32d9554fc 100644
--- a/drivers/net/irda/sir_dongle.c
+++ b/drivers/net/irda/sir_dongle.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/smp_lock.h> 17#include <linux/smp_lock.h>
18#include <linux/kmod.h> 18#include <linux/kmod.h>
19#include <linux/mutex.h>
19 20
20#include <net/irda/irda.h> 21#include <net/irda/irda.h>
21 22
@@ -28,7 +29,7 @@
28 */ 29 */
29 30
30static LIST_HEAD(dongle_list); /* list of registered dongle drivers */ 31static LIST_HEAD(dongle_list); /* list of registered dongle drivers */
31static DECLARE_MUTEX(dongle_list_lock); /* protects the list */ 32static DEFINE_MUTEX(dongle_list_lock); /* protects the list */
32 33
33int irda_register_dongle(struct dongle_driver *new) 34int irda_register_dongle(struct dongle_driver *new)
34{ 35{
@@ -38,25 +39,25 @@ int irda_register_dongle(struct dongle_driver *new)
38 IRDA_DEBUG(0, "%s : registering dongle \"%s\" (%d).\n", 39 IRDA_DEBUG(0, "%s : registering dongle \"%s\" (%d).\n",
39 __FUNCTION__, new->driver_name, new->type); 40 __FUNCTION__, new->driver_name, new->type);
40 41
41 down(&dongle_list_lock); 42 mutex_lock(&dongle_list_lock);
42 list_for_each(entry, &dongle_list) { 43 list_for_each(entry, &dongle_list) {
43 drv = list_entry(entry, struct dongle_driver, dongle_list); 44 drv = list_entry(entry, struct dongle_driver, dongle_list);
44 if (new->type == drv->type) { 45 if (new->type == drv->type) {
45 up(&dongle_list_lock); 46 mutex_unlock(&dongle_list_lock);
46 return -EEXIST; 47 return -EEXIST;
47 } 48 }
48 } 49 }
49 list_add(&new->dongle_list, &dongle_list); 50 list_add(&new->dongle_list, &dongle_list);
50 up(&dongle_list_lock); 51 mutex_unlock(&dongle_list_lock);
51 return 0; 52 return 0;
52} 53}
53EXPORT_SYMBOL(irda_register_dongle); 54EXPORT_SYMBOL(irda_register_dongle);
54 55
55int irda_unregister_dongle(struct dongle_driver *drv) 56int irda_unregister_dongle(struct dongle_driver *drv)
56{ 57{
57 down(&dongle_list_lock); 58 mutex_lock(&dongle_list_lock);
58 list_del(&drv->dongle_list); 59 list_del(&drv->dongle_list);
59 up(&dongle_list_lock); 60 mutex_unlock(&dongle_list_lock);
60 return 0; 61 return 0;
61} 62}
62EXPORT_SYMBOL(irda_unregister_dongle); 63EXPORT_SYMBOL(irda_unregister_dongle);
@@ -75,7 +76,7 @@ int sirdev_get_dongle(struct sir_dev *dev, IRDA_DONGLE type)
75 return -EBUSY; 76 return -EBUSY;
76 77
77 /* serialize access to the list of registered dongles */ 78 /* serialize access to the list of registered dongles */
78 down(&dongle_list_lock); 79 mutex_lock(&dongle_list_lock);
79 80
80 list_for_each(entry, &dongle_list) { 81 list_for_each(entry, &dongle_list) {
81 drv = list_entry(entry, struct dongle_driver, dongle_list); 82 drv = list_entry(entry, struct dongle_driver, dongle_list);
@@ -109,14 +110,14 @@ int sirdev_get_dongle(struct sir_dev *dev, IRDA_DONGLE type)
109 if (!drv->open || (err=drv->open(dev))!=0) 110 if (!drv->open || (err=drv->open(dev))!=0)
110 goto out_reject; /* failed to open driver */ 111 goto out_reject; /* failed to open driver */
111 112
112 up(&dongle_list_lock); 113 mutex_unlock(&dongle_list_lock);
113 return 0; 114 return 0;
114 115
115out_reject: 116out_reject:
116 dev->dongle_drv = NULL; 117 dev->dongle_drv = NULL;
117 module_put(drv->owner); 118 module_put(drv->owner);
118out_unlock: 119out_unlock:
119 up(&dongle_list_lock); 120 mutex_unlock(&dongle_list_lock);
120 return err; 121 return err;
121} 122}
122 123
diff --git a/drivers/net/irda/toim3232-sir.c b/drivers/net/irda/toim3232-sir.c
new file mode 100644
index 000000000000..aa1a9b0ed83e
--- /dev/null
+++ b/drivers/net/irda/toim3232-sir.c
@@ -0,0 +1,375 @@
1/*********************************************************************
2 *
3 * Filename: toim3232-sir.c
4 * Version: 1.0
5 * Description: Implementation of dongles based on the Vishay/Temic
6 * TOIM3232 SIR Endec chipset. Currently only the
7 * IRWave IR320ST-2 is tested, although it should work
8 * with any TOIM3232 or TOIM4232 chipset based RS232
9 * dongle with minimal modification.
10 * Based heavily on the Tekram driver (tekram.c),
11 * with thanks to Dag Brattli and Martin Diehl.
12 * Status: Experimental.
13 * Author: David Basden <davidb-irda@rcpt.to>
14 * Created at: Thu Feb 09 23:47:32 2006
15 *
16 * Copyright (c) 2006 David Basden.
17 * Copyright (c) 1998-1999 Dag Brattli,
18 * Copyright (c) 2002 Martin Diehl,
19 * All Rights Reserved.
20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License as
23 * published by the Free Software Foundation; either version 2 of
24 * the License, or (at your option) any later version.
25 *
26 * Neither Dag Brattli nor University of Tromsø admit liability nor
27 * provide warranty for any of this software. This material is
28 * provided "AS-IS" and at no charge.
29 *
30 ********************************************************************/
31
32/*
33 * This driver has currently only been tested on the IRWave IR320ST-2
34 *
35 * PROTOCOL:
36 *
37 * The protocol for talking to the TOIM3232 is quite easy, and is
38 * designed to interface with RS232 with only level convertors. The
39 * BR/~D line on the chip is brought high to signal 'command mode',
40 * where a command byte is sent to select the baudrate of the RS232
41 * interface and the pulse length of the IRDA output. When BR/~D
42 * is brought low, the dongle then changes to the selected baudrate,
43 * and the RS232 interface is used for data until BR/~D is brought
44 * high again. The initial speed for the TOIMx323 after RESET is
45 * 9600 baud. The baudrate for command-mode is the last selected
46 * baud-rate, or 9600 after a RESET.
47 *
48 * The dongle I have (below) adds some extra hardware on the front end,
49 * but this is mostly directed towards pariasitic power from the RS232
50 * line rather than changing very much about how to communicate with
51 * the TOIM3232.
52 *
53 * The protocol to talk to the TOIM4232 chipset seems to be almost
54 * identical to the TOIM3232 (and the 4232 datasheet is more detailed)
55 * so this code will probably work on that as well, although I haven't
56 * tested it on that hardware.
57 *
58 * Target dongle variations that might be common:
59 *
60 * DTR and RTS function:
61 * The data sheet for the 4232 has a sample implementation that hooks the
62 * DTR and RTS lines to the RESET and BaudRate/~Data lines of the
63 * chip (through line-converters). Given both DTR and RTS would have to
64 * be held low in normal operation, and the TOIMx232 requires +5V to
65 * signal ground, most dongle designers would almost certainly choose
66 * an implementation that kept at least one of DTR or RTS high in
67 * normal operation to provide power to the dongle, but will likely
68 * vary between designs.
69 *
70 * User specified command bits:
71 * There are two user-controllable output lines from the TOIMx232 that
72 * can be set low or high by setting the appropriate bits in the
73 * high-nibble of the command byte (when setting speed and pulse length).
74 * These might be used to switch on and off added hardware or extra
75 * dongle features.
76 *
77 *
78 * Target hardware: IRWave IR320ST-2
79 *
80 * The IRWave IR320ST-2 is a simple dongle based on the Vishay/Temic
81 * TOIM3232 SIR Endec and the Vishay/Temic TFDS4500 SIR IRDA transciever.
82 * It uses a hex inverter and some discrete components to buffer and
83 * line convert the RS232 down to 5V.
84 *
85 * The dongle is powered through a voltage regulator, fed by a large
86 * capacitor. To switch the dongle on, DTR is brought high to charge
87 * the capacitor and drive the voltage regulator. DTR isn't associated
88 * with any control lines on the TOIM3232. Parisitic power is also taken
89 * from the RTS, TD and RD lines when brought high, but through resistors.
90 * When DTR is low, the circuit might lose power even with RTS high.
91 *
92 * RTS is inverted and attached to the BR/~D input pin. When RTS
93 * is high, BR/~D is low, and the TOIM3232 is in the normal 'data' mode.
94 * RTS is brought low, BR/~D is high, and the TOIM3232 is in 'command
95 * mode'.
96 *
97 * For some unknown reason, the RESET line isn't actually connected
98 * to anything. This means to reset the dongle to get it to a known
99 * state (9600 baud) you must drop DTR and RTS low, wait for the power
100 * capacitor to discharge, and then bring DTR (and RTS for data mode)
101 * high again, and wait for the capacitor to charge, the power supply
102 * to stabilise, and the oscillator clock to stabilise.
103 *
104 * Fortunately, if the current baudrate is known, the chipset can
105 * easily change speed by entering command mode without having to
106 * reset the dongle first.
107 *
108 * Major Components:
109 *
110 * - Vishay/Temic TOIM3232 SIR Endec to change RS232 pulse timings
111 * to IRDA pulse timings
112 * - 3.6864MHz crystal to drive TOIM3232 clock oscillator
113 * - DM74lS04M Inverting Hex line buffer for RS232 input buffering
114 * and level conversion
115 * - PJ2951AC 150mA voltage regulator
116 * - Vishay/Temic TFDS4500 SIR IRDA front-end transceiver
117 *
118 */
119
120#include <linux/module.h>
121#include <linux/delay.h>
122#include <linux/init.h>
123
124#include <net/irda/irda.h>
125
126#include "sir-dev.h"
127
128static int toim3232delay = 150; /* default is 150 ms */
129module_param(toim3232delay, int, 0);
130MODULE_PARM_DESC(toim3232delay, "toim3232 dongle write complete delay");
131
132#if 0
133static int toim3232flipdtr = 0; /* default is DTR high to reset */
134module_param(toim3232flipdtr, int, 0);
135MODULE_PARM_DESC(toim3232flipdtr, "toim3232 dongle invert DTR (Reset)");
136
137static int toim3232fliprts = 0; /* default is RTS high for baud change */
138module_param(toim3232fliptrs, int, 0);
139MODULE_PARM_DESC(toim3232fliprts, "toim3232 dongle invert RTS (BR/D)");
140#endif
141
142static int toim3232_open(struct sir_dev *);
143static int toim3232_close(struct sir_dev *);
144static int toim3232_change_speed(struct sir_dev *, unsigned);
145static int toim3232_reset(struct sir_dev *);
146
147#define TOIM3232_115200 0x00
148#define TOIM3232_57600 0x01
149#define TOIM3232_38400 0x02
150#define TOIM3232_19200 0x03
151#define TOIM3232_9600 0x06
152#define TOIM3232_2400 0x0A
153
154#define TOIM3232_PW 0x10 /* Pulse select bit */
155
156static struct dongle_driver toim3232 = {
157 .owner = THIS_MODULE,
158 .driver_name = "Vishay TOIM3232",
159 .type = IRDA_TOIM3232_DONGLE,
160 .open = toim3232_open,
161 .close = toim3232_close,
162 .reset = toim3232_reset,
163 .set_speed = toim3232_change_speed,
164};
165
166static int __init toim3232_sir_init(void)
167{
168 if (toim3232delay < 1 || toim3232delay > 500)
169 toim3232delay = 200;
170 IRDA_DEBUG(1, "%s - using %d ms delay\n",
171 toim3232.driver_name, toim3232delay);
172 return irda_register_dongle(&toim3232);
173}
174
175static void __exit toim3232_sir_cleanup(void)
176{
177 irda_unregister_dongle(&toim3232);
178}
179
180static int toim3232_open(struct sir_dev *dev)
181{
182 struct qos_info *qos = &dev->qos;
183
184 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
185
186 /* Pull the lines high to start with.
187 *
188 * For the IR320ST-2, we need to charge the main supply capacitor to
189 * switch the device on. We keep DTR high throughout to do this.
190 * When RTS, TD and RD are high, they will also trickle-charge the
191 * cap. RTS is high for data transmission, and low for baud rate select.
192 * -- DGB
193 */
194 sirdev_set_dtr_rts(dev, TRUE, TRUE);
195
196 /* The TOI3232 supports many speeds between 1200bps and 115000bps.
197 * We really only care about those supported by the IRDA spec, but
198 * 38400 seems to be implemented in many places */
199 qos->baud_rate.bits &= IR_2400|IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
200
201 /* From the tekram driver. Not sure what a reasonable value is -- DGB */
202 qos->min_turn_time.bits = 0x01; /* Needs at least 10 ms */
203 irda_qos_bits_to_value(qos);
204
205 /* irda thread waits 50 msec for power settling */
206
207 return 0;
208}
209
210static int toim3232_close(struct sir_dev *dev)
211{
212 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
213
214 /* Power off dongle */
215 sirdev_set_dtr_rts(dev, FALSE, FALSE);
216
217 return 0;
218}
219
220/*
221 * Function toim3232change_speed (dev, state, speed)
222 *
223 * Set the speed for the TOIM3232 based dongle. Warning, this
224 * function must be called with a process context!
225 *
226 * Algorithm
227 * 1. keep DTR high but clear RTS to bring into baud programming mode
228 * 2. wait at least 7us to enter programming mode
229 * 3. send control word to set baud rate and timing
230 * 4. wait at least 1us
231 * 5. bring RTS high to enter DATA mode (RS232 is passed through to transceiver)
232 * 6. should take effect immediately (although probably worth waiting)
233 */
234
235#define TOIM3232_STATE_WAIT_SPEED (SIRDEV_STATE_DONGLE_SPEED + 1)
236
237static int toim3232_change_speed(struct sir_dev *dev, unsigned speed)
238{
239 unsigned state = dev->fsm.substate;
240 unsigned delay = 0;
241 u8 byte;
242 static int ret = 0;
243
244 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
245
246 switch(state) {
247 case SIRDEV_STATE_DONGLE_SPEED:
248
249 /* Figure out what we are going to send as a control byte */
250 switch (speed) {
251 case 2400:
252 byte = TOIM3232_PW|TOIM3232_2400;
253 break;
254 default:
255 speed = 9600;
256 ret = -EINVAL;
257 /* fall thru */
258 case 9600:
259 byte = TOIM3232_PW|TOIM3232_9600;
260 break;
261 case 19200:
262 byte = TOIM3232_PW|TOIM3232_19200;
263 break;
264 case 38400:
265 byte = TOIM3232_PW|TOIM3232_38400;
266 break;
267 case 57600:
268 byte = TOIM3232_PW|TOIM3232_57600;
269 break;
270 case 115200:
271 byte = TOIM3232_115200;
272 break;
273 }
274
275 /* Set DTR, Clear RTS: Go into baud programming mode */
276 sirdev_set_dtr_rts(dev, TRUE, FALSE);
277
278 /* Wait at least 7us */
279 udelay(14);
280
281 /* Write control byte */
282 sirdev_raw_write(dev, &byte, 1);
283
284 dev->speed = speed;
285
286 state = TOIM3232_STATE_WAIT_SPEED;
287 delay = toim3232delay;
288 break;
289
290 case TOIM3232_STATE_WAIT_SPEED:
291 /* Have transmitted control byte * Wait for 'at least 1us' */
292 udelay(14);
293
294 /* Set DTR, Set RTS: Go into normal data mode */
295 sirdev_set_dtr_rts(dev, TRUE, TRUE);
296
297 /* Wait (TODO: check this is needed) */
298 udelay(50);
299 break;
300
301 default:
302 printk(KERN_ERR "%s - undefined state %d\n", __FUNCTION__, state);
303 ret = -EINVAL;
304 break;
305 }
306
307 dev->fsm.substate = state;
308 return (delay > 0) ? delay : ret;
309}
310
311/*
312 * Function toim3232reset (driver)
313 *
314 * This function resets the toim3232 dongle. Warning, this function
315 * must be called with a process context!!
316 *
317 * What we should do is:
318 * 0. Pull RESET high
319 * 1. Wait for at least 7us
320 * 2. Pull RESET low
321 * 3. Wait for at least 7us
322 * 4. Pull BR/~D high
323 * 5. Wait for at least 7us
324 * 6. Send control byte to set baud rate
325 * 7. Wait at least 1us after stop bit
326 * 8. Pull BR/~D low
327 * 9. Should then be in data mode
328 *
329 * Because the IR320ST-2 doesn't have the RESET line connected for some reason,
330 * we'll have to do something else.
331 *
332 * The default speed after a RESET is 9600, so lets try just bringing it up in
333 * data mode after switching it off, waiting for the supply capacitor to
334 * discharge, and then switch it back on. This isn't actually pulling RESET
335 * high, but it seems to have the same effect.
336 *
337 * This behaviour will probably work on dongles that have the RESET line connected,
338 * but if not, add a flag for the IR320ST-2, and implment the above-listed proper
339 * behaviour.
340 *
341 * RTS is inverted and then fed to BR/~D, so to put it in programming mode, we
342 * need to have pull RTS low
343 */
344
345static int toim3232_reset(struct sir_dev *dev)
346{
347 IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
348
349 /* Switch off both DTR and RTS to switch off dongle */
350 sirdev_set_dtr_rts(dev, FALSE, FALSE);
351
352 /* Should sleep a while. This might be evil doing it this way.*/
353 set_current_state(TASK_UNINTERRUPTIBLE);
354 schedule_timeout(msecs_to_jiffies(50));
355
356 /* Set DTR, Set RTS (data mode) */
357 sirdev_set_dtr_rts(dev, TRUE, TRUE);
358
359 /* Wait at least 10 ms for power to stabilize again */
360 set_current_state(TASK_UNINTERRUPTIBLE);
361 schedule_timeout(msecs_to_jiffies(10));
362
363 /* Speed should now be 9600 */
364 dev->speed = 9600;
365
366 return 0;
367}
368
369MODULE_AUTHOR("David Basden <davidb-linux@rcpt.to>");
370MODULE_DESCRIPTION("Vishay/Temic TOIM3232 based dongle driver");
371MODULE_LICENSE("GPL");
372MODULE_ALIAS("irda-dongle-12"); /* IRDA_TOIM3232_DONGLE */
373
374module_init(toim3232_sir_init);
375module_exit(toim3232_sir_cleanup);
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
index a9f49f058cfb..97a49e0be76b 100644
--- a/drivers/net/irda/vlsi_ir.c
+++ b/drivers/net/irda/vlsi_ir.c
@@ -1887,7 +1887,7 @@ static int __init vlsi_mod_init(void)
1887 vlsi_proc_root->owner = THIS_MODULE; 1887 vlsi_proc_root->owner = THIS_MODULE;
1888 } 1888 }
1889 1889
1890 ret = pci_module_init(&vlsi_irda_driver); 1890 ret = pci_register_driver(&vlsi_irda_driver);
1891 1891
1892 if (ret && vlsi_proc_root) 1892 if (ret && vlsi_proc_root)
1893 remove_proc_entry(PROC_DIR, NULL); 1893 remove_proc_entry(PROC_DIR, NULL);
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 0245e40b51a1..f608c12e3e8b 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1691,8 +1691,8 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
1691 || ppp->npmode[npi] != NPMODE_PASS) { 1691 || ppp->npmode[npi] != NPMODE_PASS) {
1692 kfree_skb(skb); 1692 kfree_skb(skb);
1693 } else { 1693 } else {
1694 skb_pull(skb, 2); /* chop off protocol */ 1694 /* chop off protocol */
1695 skb_postpull_rcsum(skb, skb->data - 2, 2); 1695 skb_pull_rcsum(skb, 2);
1696 skb->dev = ppp->dev; 1696 skb->dev = ppp->dev;
1697 skb->protocol = htons(npindex_to_ethertype[npi]); 1697 skb->protocol = htons(npindex_to_ethertype[npi]);
1698 skb->mac.raw = skb->data; 1698 skb->mac.raw = skb->data;
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index 9369f811075d..475dc930380f 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -337,8 +337,7 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb)
337 if (sk->sk_state & PPPOX_BOUND) { 337 if (sk->sk_state & PPPOX_BOUND) {
338 struct pppoe_hdr *ph = (struct pppoe_hdr *) skb->nh.raw; 338 struct pppoe_hdr *ph = (struct pppoe_hdr *) skb->nh.raw;
339 int len = ntohs(ph->length); 339 int len = ntohs(ph->length);
340 skb_pull(skb, sizeof(struct pppoe_hdr)); 340 skb_pull_rcsum(skb, sizeof(struct pppoe_hdr));
341 skb_postpull_rcsum(skb, ph, sizeof(*ph));
342 if (pskb_trim_rcsum(skb, len)) 341 if (pskb_trim_rcsum(skb, len))
343 goto abort_kfree; 342 goto abort_kfree;
344 343
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 28ce47a02408..38cd30cb7c75 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -55,6 +55,7 @@
55#include <linux/workqueue.h> 55#include <linux/workqueue.h>
56#include <linux/if_vlan.h> 56#include <linux/if_vlan.h>
57#include <linux/bitops.h> 57#include <linux/bitops.h>
58#include <linux/mutex.h>
58 59
59#include <asm/system.h> 60#include <asm/system.h>
60#include <asm/io.h> 61#include <asm/io.h>
@@ -2284,7 +2285,7 @@ static void gem_reset_task(void *data)
2284{ 2285{
2285 struct gem *gp = (struct gem *) data; 2286 struct gem *gp = (struct gem *) data;
2286 2287
2287 down(&gp->pm_sem); 2288 mutex_lock(&gp->pm_mutex);
2288 2289
2289 netif_poll_disable(gp->dev); 2290 netif_poll_disable(gp->dev);
2290 2291
@@ -2311,7 +2312,7 @@ static void gem_reset_task(void *data)
2311 2312
2312 netif_poll_enable(gp->dev); 2313 netif_poll_enable(gp->dev);
2313 2314
2314 up(&gp->pm_sem); 2315 mutex_unlock(&gp->pm_mutex);
2315} 2316}
2316 2317
2317 2318
@@ -2320,14 +2321,14 @@ static int gem_open(struct net_device *dev)
2320 struct gem *gp = dev->priv; 2321 struct gem *gp = dev->priv;
2321 int rc = 0; 2322 int rc = 0;
2322 2323
2323 down(&gp->pm_sem); 2324 mutex_lock(&gp->pm_mutex);
2324 2325
2325 /* We need the cell enabled */ 2326 /* We need the cell enabled */
2326 if (!gp->asleep) 2327 if (!gp->asleep)
2327 rc = gem_do_start(dev); 2328 rc = gem_do_start(dev);
2328 gp->opened = (rc == 0); 2329 gp->opened = (rc == 0);
2329 2330
2330 up(&gp->pm_sem); 2331 mutex_unlock(&gp->pm_mutex);
2331 2332
2332 return rc; 2333 return rc;
2333} 2334}
@@ -2340,13 +2341,13 @@ static int gem_close(struct net_device *dev)
2340 * our caller (dev_close) already did it for us 2341 * our caller (dev_close) already did it for us
2341 */ 2342 */
2342 2343
2343 down(&gp->pm_sem); 2344 mutex_lock(&gp->pm_mutex);
2344 2345
2345 gp->opened = 0; 2346 gp->opened = 0;
2346 if (!gp->asleep) 2347 if (!gp->asleep)
2347 gem_do_stop(dev, 0); 2348 gem_do_stop(dev, 0);
2348 2349
2349 up(&gp->pm_sem); 2350 mutex_unlock(&gp->pm_mutex);
2350 2351
2351 return 0; 2352 return 0;
2352} 2353}
@@ -2358,7 +2359,7 @@ static int gem_suspend(struct pci_dev *pdev, pm_message_t state)
2358 struct gem *gp = dev->priv; 2359 struct gem *gp = dev->priv;
2359 unsigned long flags; 2360 unsigned long flags;
2360 2361
2361 down(&gp->pm_sem); 2362 mutex_lock(&gp->pm_mutex);
2362 2363
2363 netif_poll_disable(dev); 2364 netif_poll_disable(dev);
2364 2365
@@ -2391,11 +2392,11 @@ static int gem_suspend(struct pci_dev *pdev, pm_message_t state)
2391 /* Stop the link timer */ 2392 /* Stop the link timer */
2392 del_timer_sync(&gp->link_timer); 2393 del_timer_sync(&gp->link_timer);
2393 2394
2394 /* Now we release the semaphore to not block the reset task who 2395 /* Now we release the mutex to not block the reset task who
2395 * can take it too. We are marked asleep, so there will be no 2396 * can take it too. We are marked asleep, so there will be no
2396 * conflict here 2397 * conflict here
2397 */ 2398 */
2398 up(&gp->pm_sem); 2399 mutex_unlock(&gp->pm_mutex);
2399 2400
2400 /* Wait for a pending reset task to complete */ 2401 /* Wait for a pending reset task to complete */
2401 while (gp->reset_task_pending) 2402 while (gp->reset_task_pending)
@@ -2424,7 +2425,7 @@ static int gem_resume(struct pci_dev *pdev)
2424 2425
2425 printk(KERN_INFO "%s: resuming\n", dev->name); 2426 printk(KERN_INFO "%s: resuming\n", dev->name);
2426 2427
2427 down(&gp->pm_sem); 2428 mutex_lock(&gp->pm_mutex);
2428 2429
2429 /* Keep the cell enabled during the entire operation, no need to 2430 /* Keep the cell enabled during the entire operation, no need to
2430 * take a lock here tho since nothing else can happen while we are 2431 * take a lock here tho since nothing else can happen while we are
@@ -2440,7 +2441,7 @@ static int gem_resume(struct pci_dev *pdev)
2440 * still asleep, a new sleep cycle may bring it back 2441 * still asleep, a new sleep cycle may bring it back
2441 */ 2442 */
2442 gem_put_cell(gp); 2443 gem_put_cell(gp);
2443 up(&gp->pm_sem); 2444 mutex_unlock(&gp->pm_mutex);
2444 return 0; 2445 return 0;
2445 } 2446 }
2446 pci_set_master(gp->pdev); 2447 pci_set_master(gp->pdev);
@@ -2486,7 +2487,7 @@ static int gem_resume(struct pci_dev *pdev)
2486 2487
2487 netif_poll_enable(dev); 2488 netif_poll_enable(dev);
2488 2489
2489 up(&gp->pm_sem); 2490 mutex_unlock(&gp->pm_mutex);
2490 2491
2491 return 0; 2492 return 0;
2492} 2493}
@@ -2591,7 +2592,7 @@ static int gem_change_mtu(struct net_device *dev, int new_mtu)
2591 return 0; 2592 return 0;
2592 } 2593 }
2593 2594
2594 down(&gp->pm_sem); 2595 mutex_lock(&gp->pm_mutex);
2595 spin_lock_irq(&gp->lock); 2596 spin_lock_irq(&gp->lock);
2596 spin_lock(&gp->tx_lock); 2597 spin_lock(&gp->tx_lock);
2597 dev->mtu = new_mtu; 2598 dev->mtu = new_mtu;
@@ -2602,7 +2603,7 @@ static int gem_change_mtu(struct net_device *dev, int new_mtu)
2602 } 2603 }
2603 spin_unlock(&gp->tx_lock); 2604 spin_unlock(&gp->tx_lock);
2604 spin_unlock_irq(&gp->lock); 2605 spin_unlock_irq(&gp->lock);
2605 up(&gp->pm_sem); 2606 mutex_unlock(&gp->pm_mutex);
2606 2607
2607 return 0; 2608 return 0;
2608} 2609}
@@ -2771,10 +2772,10 @@ static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2771 int rc = -EOPNOTSUPP; 2772 int rc = -EOPNOTSUPP;
2772 unsigned long flags; 2773 unsigned long flags;
2773 2774
2774 /* Hold the PM semaphore while doing ioctl's or we may collide 2775 /* Hold the PM mutex while doing ioctl's or we may collide
2775 * with power management. 2776 * with power management.
2776 */ 2777 */
2777 down(&gp->pm_sem); 2778 mutex_lock(&gp->pm_mutex);
2778 2779
2779 spin_lock_irqsave(&gp->lock, flags); 2780 spin_lock_irqsave(&gp->lock, flags);
2780 gem_get_cell(gp); 2781 gem_get_cell(gp);
@@ -2812,7 +2813,7 @@ static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2812 gem_put_cell(gp); 2813 gem_put_cell(gp);
2813 spin_unlock_irqrestore(&gp->lock, flags); 2814 spin_unlock_irqrestore(&gp->lock, flags);
2814 2815
2815 up(&gp->pm_sem); 2816 mutex_unlock(&gp->pm_mutex);
2816 2817
2817 return rc; 2818 return rc;
2818} 2819}
@@ -3033,7 +3034,7 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
3033 3034
3034 spin_lock_init(&gp->lock); 3035 spin_lock_init(&gp->lock);
3035 spin_lock_init(&gp->tx_lock); 3036 spin_lock_init(&gp->tx_lock);
3036 init_MUTEX(&gp->pm_sem); 3037 mutex_init(&gp->pm_mutex);
3037 3038
3038 init_timer(&gp->link_timer); 3039 init_timer(&gp->link_timer);
3039 gp->link_timer.function = gem_link_timer; 3040 gp->link_timer.function = gem_link_timer;
diff --git a/drivers/net/sungem.h b/drivers/net/sungem.h
index 13006d759ad8..89847215d006 100644
--- a/drivers/net/sungem.h
+++ b/drivers/net/sungem.h
@@ -980,15 +980,15 @@ struct gem {
980 int tx_new, tx_old; 980 int tx_new, tx_old;
981 981
982 unsigned int has_wol : 1; /* chip supports wake-on-lan */ 982 unsigned int has_wol : 1; /* chip supports wake-on-lan */
983 unsigned int asleep : 1; /* chip asleep, protected by pm_sem */ 983 unsigned int asleep : 1; /* chip asleep, protected by pm_mutex */
984 unsigned int asleep_wol : 1; /* was asleep with WOL enabled */ 984 unsigned int asleep_wol : 1; /* was asleep with WOL enabled */
985 unsigned int opened : 1; /* driver opened, protected by pm_sem */ 985 unsigned int opened : 1; /* driver opened, protected by pm_mutex */
986 unsigned int running : 1; /* chip running, protected by lock */ 986 unsigned int running : 1; /* chip running, protected by lock */
987 987
988 /* cell enable count, protected by lock */ 988 /* cell enable count, protected by lock */
989 int cell_enabled; 989 int cell_enabled;
990 990
991 struct semaphore pm_sem; 991 struct mutex pm_mutex;
992 992
993 u32 msg_enable; 993 u32 msg_enable;
994 u32 status; 994 u32 status;
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 6c6c5498899f..e03d1ae50c3e 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,8 +69,8 @@
69 69
70#define DRV_MODULE_NAME "tg3" 70#define DRV_MODULE_NAME "tg3"
71#define PFX DRV_MODULE_NAME ": " 71#define PFX DRV_MODULE_NAME ": "
72#define DRV_MODULE_VERSION "3.49" 72#define DRV_MODULE_VERSION "3.52"
73#define DRV_MODULE_RELDATE "Feb 2, 2006" 73#define DRV_MODULE_RELDATE "Mar 06, 2006"
74 74
75#define TG3_DEF_MAC_MODE 0 75#define TG3_DEF_MAC_MODE 0
76#define TG3_DEF_RX_MODE 0 76#define TG3_DEF_RX_MODE 0
@@ -221,10 +221,22 @@ static struct pci_device_id tg3_pci_tbl[] = {
221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
222 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F, 222 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F,
223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
224 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754,
225 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
226 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M,
227 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
228 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787,
229 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
230 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M,
231 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
224 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714, 232 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714,
225 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 233 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
234 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714S,
235 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
226 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715, 236 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715,
227 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 237 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
238 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715S,
239 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
228 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, 240 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780,
229 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 241 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
230 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S, 242 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S,
@@ -534,6 +546,9 @@ static void tg3_enable_ints(struct tg3 *tp)
534 (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT)); 546 (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT));
535 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 547 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
536 (tp->last_tag << 24)); 548 (tp->last_tag << 24));
549 if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)
550 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
551 (tp->last_tag << 24));
537 tg3_cond_int(tp); 552 tg3_cond_int(tp);
538} 553}
539 554
@@ -1038,9 +1053,11 @@ static void tg3_frob_aux_power(struct tg3 *tp)
1038 struct net_device *dev_peer; 1053 struct net_device *dev_peer;
1039 1054
1040 dev_peer = pci_get_drvdata(tp->pdev_peer); 1055 dev_peer = pci_get_drvdata(tp->pdev_peer);
1056 /* remove_one() may have been run on the peer. */
1041 if (!dev_peer) 1057 if (!dev_peer)
1042 BUG(); 1058 tp_peer = tp;
1043 tp_peer = netdev_priv(dev_peer); 1059 else
1060 tp_peer = netdev_priv(dev_peer);
1044 } 1061 }
1045 1062
1046 if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 || 1063 if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
@@ -1131,7 +1148,7 @@ static int tg3_halt_cpu(struct tg3 *, u32);
1131static int tg3_nvram_lock(struct tg3 *); 1148static int tg3_nvram_lock(struct tg3 *);
1132static void tg3_nvram_unlock(struct tg3 *); 1149static void tg3_nvram_unlock(struct tg3 *);
1133 1150
1134static int tg3_set_power_state(struct tg3 *tp, int state) 1151static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1135{ 1152{
1136 u32 misc_host_ctrl; 1153 u32 misc_host_ctrl;
1137 u16 power_control, power_caps; 1154 u16 power_control, power_caps;
@@ -1150,7 +1167,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1150 power_control |= PCI_PM_CTRL_PME_STATUS; 1167 power_control |= PCI_PM_CTRL_PME_STATUS;
1151 power_control &= ~(PCI_PM_CTRL_STATE_MASK); 1168 power_control &= ~(PCI_PM_CTRL_STATE_MASK);
1152 switch (state) { 1169 switch (state) {
1153 case 0: 1170 case PCI_D0:
1154 power_control |= 0; 1171 power_control |= 0;
1155 pci_write_config_word(tp->pdev, 1172 pci_write_config_word(tp->pdev,
1156 pm + PCI_PM_CTRL, 1173 pm + PCI_PM_CTRL,
@@ -1163,15 +1180,15 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1163 1180
1164 return 0; 1181 return 0;
1165 1182
1166 case 1: 1183 case PCI_D1:
1167 power_control |= 1; 1184 power_control |= 1;
1168 break; 1185 break;
1169 1186
1170 case 2: 1187 case PCI_D2:
1171 power_control |= 2; 1188 power_control |= 2;
1172 break; 1189 break;
1173 1190
1174 case 3: 1191 case PCI_D3hot:
1175 power_control |= 3; 1192 power_control |= 3;
1176 break; 1193 break;
1177 1194
@@ -2680,6 +2697,12 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
2680 2697
2681 err |= tg3_readphy(tp, MII_BMSR, &bmsr); 2698 err |= tg3_readphy(tp, MII_BMSR, &bmsr);
2682 err |= tg3_readphy(tp, MII_BMSR, &bmsr); 2699 err |= tg3_readphy(tp, MII_BMSR, &bmsr);
2700 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
2701 if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
2702 bmsr |= BMSR_LSTATUS;
2703 else
2704 bmsr &= ~BMSR_LSTATUS;
2705 }
2683 2706
2684 err |= tg3_readphy(tp, MII_BMCR, &bmcr); 2707 err |= tg3_readphy(tp, MII_BMCR, &bmcr);
2685 2708
@@ -2748,6 +2771,13 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
2748 bmcr = new_bmcr; 2771 bmcr = new_bmcr;
2749 err |= tg3_readphy(tp, MII_BMSR, &bmsr); 2772 err |= tg3_readphy(tp, MII_BMSR, &bmsr);
2750 err |= tg3_readphy(tp, MII_BMSR, &bmsr); 2773 err |= tg3_readphy(tp, MII_BMSR, &bmsr);
2774 if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
2775 ASIC_REV_5714) {
2776 if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
2777 bmsr |= BMSR_LSTATUS;
2778 else
2779 bmsr &= ~BMSR_LSTATUS;
2780 }
2751 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; 2781 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
2752 } 2782 }
2753 } 2783 }
@@ -3338,6 +3368,23 @@ static inline void tg3_full_unlock(struct tg3 *tp)
3338 spin_unlock_bh(&tp->lock); 3368 spin_unlock_bh(&tp->lock);
3339} 3369}
3340 3370
3371/* One-shot MSI handler - Chip automatically disables interrupt
3372 * after sending MSI so driver doesn't have to do it.
3373 */
3374static irqreturn_t tg3_msi_1shot(int irq, void *dev_id, struct pt_regs *regs)
3375{
3376 struct net_device *dev = dev_id;
3377 struct tg3 *tp = netdev_priv(dev);
3378
3379 prefetch(tp->hw_status);
3380 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
3381
3382 if (likely(!tg3_irq_sync(tp)))
3383 netif_rx_schedule(dev); /* schedule NAPI poll */
3384
3385 return IRQ_HANDLED;
3386}
3387
3341/* MSI ISR - No need to check for interrupt sharing and no need to 3388/* MSI ISR - No need to check for interrupt sharing and no need to
3342 * flush status block and interrupt mailbox. PCI ordering rules 3389 * flush status block and interrupt mailbox. PCI ordering rules
3343 * guarantee that MSI will arrive after the status block. 3390 * guarantee that MSI will arrive after the status block.
@@ -3628,11 +3675,139 @@ static void tg3_set_txd(struct tg3 *tp, int entry,
3628 txd->vlan_tag = vlan_tag << TXD_VLAN_TAG_SHIFT; 3675 txd->vlan_tag = vlan_tag << TXD_VLAN_TAG_SHIFT;
3629} 3676}
3630 3677
3678/* hard_start_xmit for devices that don't have any bugs and
3679 * support TG3_FLG2_HW_TSO_2 only.
3680 */
3631static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) 3681static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
3632{ 3682{
3633 struct tg3 *tp = netdev_priv(dev); 3683 struct tg3 *tp = netdev_priv(dev);
3634 dma_addr_t mapping; 3684 dma_addr_t mapping;
3635 u32 len, entry, base_flags, mss; 3685 u32 len, entry, base_flags, mss;
3686
3687 len = skb_headlen(skb);
3688
3689 /* No BH disabling for tx_lock here. We are running in BH disabled
3690 * context and TX reclaim runs via tp->poll inside of a software
3691 * interrupt. Furthermore, IRQ processing runs lockless so we have
3692 * no IRQ context deadlocks to worry about either. Rejoice!
3693 */
3694 if (!spin_trylock(&tp->tx_lock))
3695 return NETDEV_TX_LOCKED;
3696
3697 if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) {
3698 if (!netif_queue_stopped(dev)) {
3699 netif_stop_queue(dev);
3700
3701 /* This is a hard error, log it. */
3702 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when "
3703 "queue awake!\n", dev->name);
3704 }
3705 spin_unlock(&tp->tx_lock);
3706 return NETDEV_TX_BUSY;
3707 }
3708
3709 entry = tp->tx_prod;
3710 base_flags = 0;
3711#if TG3_TSO_SUPPORT != 0
3712 mss = 0;
3713 if (skb->len > (tp->dev->mtu + ETH_HLEN) &&
3714 (mss = skb_shinfo(skb)->tso_size) != 0) {
3715 int tcp_opt_len, ip_tcp_len;
3716
3717 if (skb_header_cloned(skb) &&
3718 pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
3719 dev_kfree_skb(skb);
3720 goto out_unlock;
3721 }
3722
3723 tcp_opt_len = ((skb->h.th->doff - 5) * 4);
3724 ip_tcp_len = (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr);
3725
3726 base_flags |= (TXD_FLAG_CPU_PRE_DMA |
3727 TXD_FLAG_CPU_POST_DMA);
3728
3729 skb->nh.iph->check = 0;
3730 skb->nh.iph->tot_len = htons(mss + ip_tcp_len + tcp_opt_len);
3731
3732 skb->h.th->check = 0;
3733
3734 mss |= (ip_tcp_len + tcp_opt_len) << 9;
3735 }
3736 else if (skb->ip_summed == CHECKSUM_HW)
3737 base_flags |= TXD_FLAG_TCPUDP_CSUM;
3738#else
3739 mss = 0;
3740 if (skb->ip_summed == CHECKSUM_HW)
3741 base_flags |= TXD_FLAG_TCPUDP_CSUM;
3742#endif
3743#if TG3_VLAN_TAG_USED
3744 if (tp->vlgrp != NULL && vlan_tx_tag_present(skb))
3745 base_flags |= (TXD_FLAG_VLAN |
3746 (vlan_tx_tag_get(skb) << 16));
3747#endif
3748
3749 /* Queue skb data, a.k.a. the main skb fragment. */
3750 mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE);
3751
3752 tp->tx_buffers[entry].skb = skb;
3753 pci_unmap_addr_set(&tp->tx_buffers[entry], mapping, mapping);
3754
3755 tg3_set_txd(tp, entry, mapping, len, base_flags,
3756 (skb_shinfo(skb)->nr_frags == 0) | (mss << 1));
3757
3758 entry = NEXT_TX(entry);
3759
3760 /* Now loop through additional data fragments, and queue them. */
3761 if (skb_shinfo(skb)->nr_frags > 0) {
3762 unsigned int i, last;
3763
3764 last = skb_shinfo(skb)->nr_frags - 1;
3765 for (i = 0; i <= last; i++) {
3766 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
3767
3768 len = frag->size;
3769 mapping = pci_map_page(tp->pdev,
3770 frag->page,
3771 frag->page_offset,
3772 len, PCI_DMA_TODEVICE);
3773
3774 tp->tx_buffers[entry].skb = NULL;
3775 pci_unmap_addr_set(&tp->tx_buffers[entry], mapping, mapping);
3776
3777 tg3_set_txd(tp, entry, mapping, len,
3778 base_flags, (i == last) | (mss << 1));
3779
3780 entry = NEXT_TX(entry);
3781 }
3782 }
3783
3784 /* Packets are ready, update Tx producer idx local and on card. */
3785 tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry);
3786
3787 tp->tx_prod = entry;
3788 if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) {
3789 netif_stop_queue(dev);
3790 if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH)
3791 netif_wake_queue(tp->dev);
3792 }
3793
3794out_unlock:
3795 mmiowb();
3796 spin_unlock(&tp->tx_lock);
3797
3798 dev->trans_start = jiffies;
3799
3800 return NETDEV_TX_OK;
3801}
3802
3803/* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and
3804 * support TG3_FLG2_HW_TSO_1 or firmware TSO only.
3805 */
3806static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev)
3807{
3808 struct tg3 *tp = netdev_priv(dev);
3809 dma_addr_t mapping;
3810 u32 len, entry, base_flags, mss;
3636 int would_hit_hwbug; 3811 int would_hit_hwbug;
3637 3812
3638 len = skb_headlen(skb); 3813 len = skb_headlen(skb);
@@ -4369,6 +4544,10 @@ static int tg3_chip_reset(struct tg3 *tp)
4369 tp->nvram_lock_cnt = 0; 4544 tp->nvram_lock_cnt = 0;
4370 } 4545 }
4371 4546
4547 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
4548 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
4549 tw32(GRC_FASTBOOT_PC, 0);
4550
4372 /* 4551 /*
4373 * We must avoid the readl() that normally takes place. 4552 * We must avoid the readl() that normally takes place.
4374 * It locks machines, causes machine checks, and other 4553 * It locks machines, causes machine checks, and other
@@ -5518,6 +5697,9 @@ static int tg3_set_mac_addr(struct net_device *dev, void *p)
5518 5697
5519 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 5698 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
5520 5699
5700 if (!netif_running(dev))
5701 return 0;
5702
5521 spin_lock_bh(&tp->lock); 5703 spin_lock_bh(&tp->lock);
5522 __tg3_set_mac_addr(tp); 5704 __tg3_set_mac_addr(tp);
5523 spin_unlock_bh(&tp->lock); 5705 spin_unlock_bh(&tp->lock);
@@ -5585,6 +5767,9 @@ static int tg3_reset_hw(struct tg3 *tp)
5585 tg3_abort_hw(tp, 1); 5767 tg3_abort_hw(tp, 1);
5586 } 5768 }
5587 5769
5770 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
5771 tg3_phy_reset(tp);
5772
5588 err = tg3_chip_reset(tp); 5773 err = tg3_chip_reset(tp);
5589 if (err) 5774 if (err)
5590 return err; 5775 return err;
@@ -5993,6 +6178,10 @@ static int tg3_reset_hw(struct tg3 *tp)
5993 } 6178 }
5994 } 6179 }
5995 6180
6181 /* Enable host coalescing bug fix */
6182 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
6183 val |= (1 << 29);
6184
5996 tw32_f(WDMAC_MODE, val); 6185 tw32_f(WDMAC_MODE, val);
5997 udelay(40); 6186 udelay(40);
5998 6187
@@ -6097,6 +6286,17 @@ static int tg3_reset_hw(struct tg3 *tp)
6097 tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG; 6286 tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG;
6098 } 6287 }
6099 6288
6289 if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) &&
6290 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)) {
6291 u32 tmp;
6292
6293 tmp = tr32(SERDES_RX_CTRL);
6294 tw32(SERDES_RX_CTRL, tmp | SERDES_RX_SIG_DETECT);
6295 tp->grc_local_ctrl &= ~GRC_LCLCTRL_USE_EXT_SIG_DETECT;
6296 tp->grc_local_ctrl |= GRC_LCLCTRL_USE_SIG_DETECT;
6297 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
6298 }
6299
6100 err = tg3_setup_phy(tp, 1); 6300 err = tg3_setup_phy(tp, 1);
6101 if (err) 6301 if (err)
6102 return err; 6302 return err;
@@ -6175,7 +6375,7 @@ static int tg3_init_hw(struct tg3 *tp)
6175 int err; 6375 int err;
6176 6376
6177 /* Force the chip into D0. */ 6377 /* Force the chip into D0. */
6178 err = tg3_set_power_state(tp, 0); 6378 err = tg3_set_power_state(tp, PCI_D0);
6179 if (err) 6379 if (err)
6180 goto out; 6380 goto out;
6181 6381
@@ -6331,6 +6531,26 @@ static void tg3_timer(unsigned long __opaque)
6331 add_timer(&tp->timer); 6531 add_timer(&tp->timer);
6332} 6532}
6333 6533
6534static int tg3_request_irq(struct tg3 *tp)
6535{
6536 irqreturn_t (*fn)(int, void *, struct pt_regs *);
6537 unsigned long flags;
6538 struct net_device *dev = tp->dev;
6539
6540 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6541 fn = tg3_msi;
6542 if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)
6543 fn = tg3_msi_1shot;
6544 flags = SA_SAMPLE_RANDOM;
6545 } else {
6546 fn = tg3_interrupt;
6547 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
6548 fn = tg3_interrupt_tagged;
6549 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
6550 }
6551 return (request_irq(tp->pdev->irq, fn, flags, dev->name, dev));
6552}
6553
6334static int tg3_test_interrupt(struct tg3 *tp) 6554static int tg3_test_interrupt(struct tg3 *tp)
6335{ 6555{
6336 struct net_device *dev = tp->dev; 6556 struct net_device *dev = tp->dev;
@@ -6367,16 +6587,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
6367 6587
6368 free_irq(tp->pdev->irq, dev); 6588 free_irq(tp->pdev->irq, dev);
6369 6589
6370 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) 6590 err = tg3_request_irq(tp);
6371 err = request_irq(tp->pdev->irq, tg3_msi,
6372 SA_SAMPLE_RANDOM, dev->name, dev);
6373 else {
6374 irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
6375 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
6376 fn = tg3_interrupt_tagged;
6377 err = request_irq(tp->pdev->irq, fn,
6378 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
6379 }
6380 6591
6381 if (err) 6592 if (err)
6382 return err; 6593 return err;
@@ -6428,14 +6639,7 @@ static int tg3_test_msi(struct tg3 *tp)
6428 6639
6429 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI; 6640 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
6430 6641
6431 { 6642 err = tg3_request_irq(tp);
6432 irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
6433 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
6434 fn = tg3_interrupt_tagged;
6435
6436 err = request_irq(tp->pdev->irq, fn,
6437 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
6438 }
6439 if (err) 6643 if (err)
6440 return err; 6644 return err;
6441 6645
@@ -6462,6 +6666,10 @@ static int tg3_open(struct net_device *dev)
6462 6666
6463 tg3_full_lock(tp, 0); 6667 tg3_full_lock(tp, 0);
6464 6668
6669 err = tg3_set_power_state(tp, PCI_D0);
6670 if (err)
6671 return err;
6672
6465 tg3_disable_ints(tp); 6673 tg3_disable_ints(tp);
6466 tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; 6674 tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
6467 6675
@@ -6476,7 +6684,9 @@ static int tg3_open(struct net_device *dev)
6476 6684
6477 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && 6685 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
6478 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) && 6686 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) &&
6479 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX)) { 6687 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX) &&
6688 !((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) &&
6689 (tp->pdev_peer == tp->pdev))) {
6480 /* All MSI supporting chips should support tagged 6690 /* All MSI supporting chips should support tagged
6481 * status. Assert that this is the case. 6691 * status. Assert that this is the case.
6482 */ 6692 */
@@ -6491,17 +6701,7 @@ static int tg3_open(struct net_device *dev)
6491 tp->tg3_flags2 |= TG3_FLG2_USING_MSI; 6701 tp->tg3_flags2 |= TG3_FLG2_USING_MSI;
6492 } 6702 }
6493 } 6703 }
6494 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) 6704 err = tg3_request_irq(tp);
6495 err = request_irq(tp->pdev->irq, tg3_msi,
6496 SA_SAMPLE_RANDOM, dev->name, dev);
6497 else {
6498 irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
6499 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
6500 fn = tg3_interrupt_tagged;
6501
6502 err = request_irq(tp->pdev->irq, fn,
6503 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
6504 }
6505 6705
6506 if (err) { 6706 if (err) {
6507 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { 6707 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
@@ -6566,6 +6766,14 @@ static int tg3_open(struct net_device *dev)
6566 6766
6567 return err; 6767 return err;
6568 } 6768 }
6769
6770 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6771 if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI) {
6772 u32 val = tr32(0x7c04);
6773
6774 tw32(0x7c04, val | (1 << 29));
6775 }
6776 }
6569 } 6777 }
6570 6778
6571 tg3_full_lock(tp, 0); 6779 tg3_full_lock(tp, 0);
@@ -6839,7 +7047,6 @@ static int tg3_close(struct net_device *dev)
6839 tp->tg3_flags &= 7047 tp->tg3_flags &=
6840 ~(TG3_FLAG_INIT_COMPLETE | 7048 ~(TG3_FLAG_INIT_COMPLETE |
6841 TG3_FLAG_GOT_SERDES_FLOWCTL); 7049 TG3_FLAG_GOT_SERDES_FLOWCTL);
6842 netif_carrier_off(tp->dev);
6843 7050
6844 tg3_full_unlock(tp); 7051 tg3_full_unlock(tp);
6845 7052
@@ -6856,6 +7063,10 @@ static int tg3_close(struct net_device *dev)
6856 7063
6857 tg3_free_consistent(tp); 7064 tg3_free_consistent(tp);
6858 7065
7066 tg3_set_power_state(tp, PCI_D3hot);
7067
7068 netif_carrier_off(tp->dev);
7069
6859 return 0; 7070 return 0;
6860} 7071}
6861 7072
@@ -7150,6 +7361,9 @@ static void tg3_set_rx_mode(struct net_device *dev)
7150{ 7361{
7151 struct tg3 *tp = netdev_priv(dev); 7362 struct tg3 *tp = netdev_priv(dev);
7152 7363
7364 if (!netif_running(dev))
7365 return;
7366
7153 tg3_full_lock(tp, 0); 7367 tg3_full_lock(tp, 0);
7154 __tg3_set_rx_mode(dev); 7368 __tg3_set_rx_mode(dev);
7155 tg3_full_unlock(tp); 7369 tg3_full_unlock(tp);
@@ -7174,6 +7388,9 @@ static void tg3_get_regs(struct net_device *dev,
7174 7388
7175 memset(p, 0, TG3_REGDUMP_LEN); 7389 memset(p, 0, TG3_REGDUMP_LEN);
7176 7390
7391 if (tp->link_config.phy_is_low_power)
7392 return;
7393
7177 tg3_full_lock(tp, 0); 7394 tg3_full_lock(tp, 0);
7178 7395
7179#define __GET_REG32(reg) (*(p)++ = tr32(reg)) 7396#define __GET_REG32(reg) (*(p)++ = tr32(reg))
@@ -7240,6 +7457,7 @@ static int tg3_get_eeprom_len(struct net_device *dev)
7240} 7457}
7241 7458
7242static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val); 7459static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val);
7460static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val);
7243 7461
7244static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 7462static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
7245{ 7463{
@@ -7248,6 +7466,9 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
7248 u8 *pd; 7466 u8 *pd;
7249 u32 i, offset, len, val, b_offset, b_count; 7467 u32 i, offset, len, val, b_offset, b_count;
7250 7468
7469 if (tp->link_config.phy_is_low_power)
7470 return -EAGAIN;
7471
7251 offset = eeprom->offset; 7472 offset = eeprom->offset;
7252 len = eeprom->len; 7473 len = eeprom->len;
7253 eeprom->len = 0; 7474 eeprom->len = 0;
@@ -7309,6 +7530,9 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
7309 u32 offset, len, b_offset, odd_len, start, end; 7530 u32 offset, len, b_offset, odd_len, start, end;
7310 u8 *buf; 7531 u8 *buf;
7311 7532
7533 if (tp->link_config.phy_is_low_power)
7534 return -EAGAIN;
7535
7312 if (eeprom->magic != TG3_EEPROM_MAGIC) 7536 if (eeprom->magic != TG3_EEPROM_MAGIC)
7313 return -EINVAL; 7537 return -EINVAL;
7314 7538
@@ -7442,6 +7666,7 @@ static void tg3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info
7442 7666
7443 strcpy(info->driver, DRV_MODULE_NAME); 7667 strcpy(info->driver, DRV_MODULE_NAME);
7444 strcpy(info->version, DRV_MODULE_VERSION); 7668 strcpy(info->version, DRV_MODULE_VERSION);
7669 strcpy(info->fw_version, tp->fw_ver);
7445 strcpy(info->bus_info, pci_name(tp->pdev)); 7670 strcpy(info->bus_info, pci_name(tp->pdev));
7446} 7671}
7447 7672
@@ -7536,11 +7761,20 @@ static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *
7536 7761
7537 ering->rx_max_pending = TG3_RX_RING_SIZE - 1; 7762 ering->rx_max_pending = TG3_RX_RING_SIZE - 1;
7538 ering->rx_mini_max_pending = 0; 7763 ering->rx_mini_max_pending = 0;
7539 ering->rx_jumbo_max_pending = TG3_RX_JUMBO_RING_SIZE - 1; 7764 if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE)
7765 ering->rx_jumbo_max_pending = TG3_RX_JUMBO_RING_SIZE - 1;
7766 else
7767 ering->rx_jumbo_max_pending = 0;
7768
7769 ering->tx_max_pending = TG3_TX_RING_SIZE - 1;
7540 7770
7541 ering->rx_pending = tp->rx_pending; 7771 ering->rx_pending = tp->rx_pending;
7542 ering->rx_mini_pending = 0; 7772 ering->rx_mini_pending = 0;
7543 ering->rx_jumbo_pending = tp->rx_jumbo_pending; 7773 if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE)
7774 ering->rx_jumbo_pending = tp->rx_jumbo_pending;
7775 else
7776 ering->rx_jumbo_pending = 0;
7777
7544 ering->tx_pending = tp->tx_pending; 7778 ering->tx_pending = tp->tx_pending;
7545} 7779}
7546 7780
@@ -7661,10 +7895,10 @@ static int tg3_set_tx_csum(struct net_device *dev, u32 data)
7661 return 0; 7895 return 0;
7662 } 7896 }
7663 7897
7664 if (data) 7898 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
7665 dev->features |= NETIF_F_IP_CSUM; 7899 ethtool_op_set_tx_hw_csum(dev, data);
7666 else 7900 else
7667 dev->features &= ~NETIF_F_IP_CSUM; 7901 ethtool_op_set_tx_csum(dev, data);
7668 7902
7669 return 0; 7903 return 0;
7670} 7904}
@@ -7734,29 +7968,52 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
7734} 7968}
7735 7969
7736#define NVRAM_TEST_SIZE 0x100 7970#define NVRAM_TEST_SIZE 0x100
7971#define NVRAM_SELFBOOT_FORMAT1_SIZE 0x14
7737 7972
7738static int tg3_test_nvram(struct tg3 *tp) 7973static int tg3_test_nvram(struct tg3 *tp)
7739{ 7974{
7740 u32 *buf, csum; 7975 u32 *buf, csum, magic;
7741 int i, j, err = 0; 7976 int i, j, err = 0, size;
7742 7977
7743 buf = kmalloc(NVRAM_TEST_SIZE, GFP_KERNEL); 7978 if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
7979 return -EIO;
7980
7981 if (magic == TG3_EEPROM_MAGIC)
7982 size = NVRAM_TEST_SIZE;
7983 else if ((magic & 0xff000000) == 0xa5000000) {
7984 if ((magic & 0xe00000) == 0x200000)
7985 size = NVRAM_SELFBOOT_FORMAT1_SIZE;
7986 else
7987 return 0;
7988 } else
7989 return -EIO;
7990
7991 buf = kmalloc(size, GFP_KERNEL);
7744 if (buf == NULL) 7992 if (buf == NULL)
7745 return -ENOMEM; 7993 return -ENOMEM;
7746 7994
7747 for (i = 0, j = 0; i < NVRAM_TEST_SIZE; i += 4, j++) { 7995 err = -EIO;
7996 for (i = 0, j = 0; i < size; i += 4, j++) {
7748 u32 val; 7997 u32 val;
7749 7998
7750 if ((err = tg3_nvram_read(tp, i, &val)) != 0) 7999 if ((err = tg3_nvram_read(tp, i, &val)) != 0)
7751 break; 8000 break;
7752 buf[j] = cpu_to_le32(val); 8001 buf[j] = cpu_to_le32(val);
7753 } 8002 }
7754 if (i < NVRAM_TEST_SIZE) 8003 if (i < size)
7755 goto out; 8004 goto out;
7756 8005
7757 err = -EIO; 8006 /* Selfboot format */
7758 if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC) 8007 if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC) {
7759 goto out; 8008 u8 *buf8 = (u8 *) buf, csum8 = 0;
8009
8010 for (i = 0; i < size; i++)
8011 csum8 += buf8[i];
8012
8013 if (csum8 == 0)
8014 return 0;
8015 return -EIO;
8016 }
7760 8017
7761 /* Bootstrap checksum at offset 0x10 */ 8018 /* Bootstrap checksum at offset 0x10 */
7762 csum = calc_crc((unsigned char *) buf, 0x10); 8019 csum = calc_crc((unsigned char *) buf, 0x10);
@@ -7802,7 +8059,7 @@ static int tg3_test_link(struct tg3 *tp)
7802} 8059}
7803 8060
7804/* Only test the commonly used registers */ 8061/* Only test the commonly used registers */
7805static const int tg3_test_registers(struct tg3 *tp) 8062static int tg3_test_registers(struct tg3 *tp)
7806{ 8063{
7807 int i, is_5705; 8064 int i, is_5705;
7808 u32 offset, read_mask, write_mask, val, save_val, read_val; 8065 u32 offset, read_mask, write_mask, val, save_val, read_val;
@@ -8050,14 +8307,24 @@ static int tg3_test_memory(struct tg3 *tp)
8050 { 0x00008000, 0x02000}, 8307 { 0x00008000, 0x02000},
8051 { 0x00010000, 0x0e000}, 8308 { 0x00010000, 0x0e000},
8052 { 0xffffffff, 0x00000} 8309 { 0xffffffff, 0x00000}
8310 }, mem_tbl_5755[] = {
8311 { 0x00000200, 0x00008},
8312 { 0x00004000, 0x00800},
8313 { 0x00006000, 0x00800},
8314 { 0x00008000, 0x02000},
8315 { 0x00010000, 0x0c000},
8316 { 0xffffffff, 0x00000}
8053 }; 8317 };
8054 struct mem_entry *mem_tbl; 8318 struct mem_entry *mem_tbl;
8055 int err = 0; 8319 int err = 0;
8056 int i; 8320 int i;
8057 8321
8058 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) 8322 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
8059 mem_tbl = mem_tbl_5705; 8323 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
8060 else 8324 mem_tbl = mem_tbl_5755;
8325 else
8326 mem_tbl = mem_tbl_5705;
8327 } else
8061 mem_tbl = mem_tbl_570x; 8328 mem_tbl = mem_tbl_570x;
8062 8329
8063 for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) { 8330 for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
@@ -8229,6 +8496,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8229{ 8496{
8230 struct tg3 *tp = netdev_priv(dev); 8497 struct tg3 *tp = netdev_priv(dev);
8231 8498
8499 if (tp->link_config.phy_is_low_power)
8500 tg3_set_power_state(tp, PCI_D0);
8501
8232 memset(data, 0, sizeof(u64) * TG3_NUM_TEST); 8502 memset(data, 0, sizeof(u64) * TG3_NUM_TEST);
8233 8503
8234 if (tg3_test_nvram(tp) != 0) { 8504 if (tg3_test_nvram(tp) != 0) {
@@ -8257,6 +8527,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8257 if (!err) 8527 if (!err)
8258 tg3_nvram_unlock(tp); 8528 tg3_nvram_unlock(tp);
8259 8529
8530 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
8531 tg3_phy_reset(tp);
8532
8260 if (tg3_test_registers(tp) != 0) { 8533 if (tg3_test_registers(tp) != 0) {
8261 etest->flags |= ETH_TEST_FL_FAILED; 8534 etest->flags |= ETH_TEST_FL_FAILED;
8262 data[2] = 1; 8535 data[2] = 1;
@@ -8286,6 +8559,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8286 8559
8287 tg3_full_unlock(tp); 8560 tg3_full_unlock(tp);
8288 } 8561 }
8562 if (tp->link_config.phy_is_low_power)
8563 tg3_set_power_state(tp, PCI_D3hot);
8564
8289} 8565}
8290 8566
8291static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 8567static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@@ -8305,6 +8581,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
8305 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) 8581 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
8306 break; /* We have no PHY */ 8582 break; /* We have no PHY */
8307 8583
8584 if (tp->link_config.phy_is_low_power)
8585 return -EAGAIN;
8586
8308 spin_lock_bh(&tp->lock); 8587 spin_lock_bh(&tp->lock);
8309 err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval); 8588 err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval);
8310 spin_unlock_bh(&tp->lock); 8589 spin_unlock_bh(&tp->lock);
@@ -8321,6 +8600,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
8321 if (!capable(CAP_NET_ADMIN)) 8600 if (!capable(CAP_NET_ADMIN))
8322 return -EPERM; 8601 return -EPERM;
8323 8602
8603 if (tp->link_config.phy_is_low_power)
8604 return -EAGAIN;
8605
8324 spin_lock_bh(&tp->lock); 8606 spin_lock_bh(&tp->lock);
8325 err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in); 8607 err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in);
8326 spin_unlock_bh(&tp->lock); 8608 spin_unlock_bh(&tp->lock);
@@ -8464,14 +8746,14 @@ static struct ethtool_ops tg3_ethtool_ops = {
8464 8746
8465static void __devinit tg3_get_eeprom_size(struct tg3 *tp) 8747static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
8466{ 8748{
8467 u32 cursize, val; 8749 u32 cursize, val, magic;
8468 8750
8469 tp->nvram_size = EEPROM_CHIP_SIZE; 8751 tp->nvram_size = EEPROM_CHIP_SIZE;
8470 8752
8471 if (tg3_nvram_read(tp, 0, &val) != 0) 8753 if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
8472 return; 8754 return;
8473 8755
8474 if (swab32(val) != TG3_EEPROM_MAGIC) 8756 if ((magic != TG3_EEPROM_MAGIC) && ((magic & 0xff000000) != 0xa5000000))
8475 return; 8757 return;
8476 8758
8477 /* 8759 /*
@@ -8479,13 +8761,13 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
8479 * When we encounter our validation signature, we know the addressing 8761 * When we encounter our validation signature, we know the addressing
8480 * has wrapped around, and thus have our chip size. 8762 * has wrapped around, and thus have our chip size.
8481 */ 8763 */
8482 cursize = 0x800; 8764 cursize = 0x10;
8483 8765
8484 while (cursize < tp->nvram_size) { 8766 while (cursize < tp->nvram_size) {
8485 if (tg3_nvram_read(tp, cursize, &val) != 0) 8767 if (tg3_nvram_read_swab(tp, cursize, &val) != 0)
8486 return; 8768 return;
8487 8769
8488 if (swab32(val) == TG3_EEPROM_MAGIC) 8770 if (val == magic)
8489 break; 8771 break;
8490 8772
8491 cursize <<= 1; 8773 cursize <<= 1;
@@ -8498,6 +8780,15 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
8498{ 8780{
8499 u32 val; 8781 u32 val;
8500 8782
8783 if (tg3_nvram_read_swab(tp, 0, &val) != 0)
8784 return;
8785
8786 /* Selfboot format */
8787 if (val != TG3_EEPROM_MAGIC) {
8788 tg3_get_eeprom_size(tp);
8789 return;
8790 }
8791
8501 if (tg3_nvram_read(tp, 0xf0, &val) == 0) { 8792 if (tg3_nvram_read(tp, 0xf0, &val) == 0) {
8502 if (val != 0) { 8793 if (val != 0) {
8503 tp->nvram_size = (val >> 16) * 1024; 8794 tp->nvram_size = (val >> 16) * 1024;
@@ -8621,6 +8912,44 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
8621 } 8912 }
8622} 8913}
8623 8914
8915static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp)
8916{
8917 u32 nvcfg1;
8918
8919 nvcfg1 = tr32(NVRAM_CFG1);
8920
8921 switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
8922 case FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ:
8923 case FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ:
8924 case FLASH_5787VENDOR_MICRO_EEPROM_64KHZ:
8925 case FLASH_5787VENDOR_MICRO_EEPROM_376KHZ:
8926 tp->nvram_jedecnum = JEDEC_ATMEL;
8927 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
8928 tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
8929
8930 nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;
8931 tw32(NVRAM_CFG1, nvcfg1);
8932 break;
8933 case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED:
8934 case FLASH_5755VENDOR_ATMEL_FLASH_1:
8935 case FLASH_5755VENDOR_ATMEL_FLASH_2:
8936 case FLASH_5755VENDOR_ATMEL_FLASH_3:
8937 tp->nvram_jedecnum = JEDEC_ATMEL;
8938 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
8939 tp->tg3_flags2 |= TG3_FLG2_FLASH;
8940 tp->nvram_pagesize = 264;
8941 break;
8942 case FLASH_5752VENDOR_ST_M45PE10:
8943 case FLASH_5752VENDOR_ST_M45PE20:
8944 case FLASH_5752VENDOR_ST_M45PE40:
8945 tp->nvram_jedecnum = JEDEC_ST;
8946 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
8947 tp->tg3_flags2 |= TG3_FLG2_FLASH;
8948 tp->nvram_pagesize = 256;
8949 break;
8950 }
8951}
8952
8624/* Chips other than 5700/5701 use the NVRAM for fetching info. */ 8953/* Chips other than 5700/5701 use the NVRAM for fetching info. */
8625static void __devinit tg3_nvram_init(struct tg3 *tp) 8954static void __devinit tg3_nvram_init(struct tg3 *tp)
8626{ 8955{
@@ -8656,6 +8985,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
8656 8985
8657 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) 8986 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
8658 tg3_get_5752_nvram_info(tp); 8987 tg3_get_5752_nvram_info(tp);
8988 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
8989 tg3_get_5787_nvram_info(tp);
8659 else 8990 else
8660 tg3_get_nvram_info(tp); 8991 tg3_get_nvram_info(tp);
8661 8992
@@ -8725,6 +9056,34 @@ static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd)
8725 return 0; 9056 return 0;
8726} 9057}
8727 9058
9059static u32 tg3_nvram_phys_addr(struct tg3 *tp, u32 addr)
9060{
9061 if ((tp->tg3_flags & TG3_FLAG_NVRAM) &&
9062 (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) &&
9063 (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
9064 (tp->nvram_jedecnum == JEDEC_ATMEL))
9065
9066 addr = ((addr / tp->nvram_pagesize) <<
9067 ATMEL_AT45DB0X1B_PAGE_POS) +
9068 (addr % tp->nvram_pagesize);
9069
9070 return addr;
9071}
9072
9073static u32 tg3_nvram_logical_addr(struct tg3 *tp, u32 addr)
9074{
9075 if ((tp->tg3_flags & TG3_FLAG_NVRAM) &&
9076 (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) &&
9077 (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
9078 (tp->nvram_jedecnum == JEDEC_ATMEL))
9079
9080 addr = ((addr >> ATMEL_AT45DB0X1B_PAGE_POS) *
9081 tp->nvram_pagesize) +
9082 (addr & ((1 << ATMEL_AT45DB0X1B_PAGE_POS) - 1));
9083
9084 return addr;
9085}
9086
8728static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val) 9087static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
8729{ 9088{
8730 int ret; 9089 int ret;
@@ -8737,14 +9096,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
8737 if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) 9096 if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
8738 return tg3_nvram_read_using_eeprom(tp, offset, val); 9097 return tg3_nvram_read_using_eeprom(tp, offset, val);
8739 9098
8740 if ((tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) && 9099 offset = tg3_nvram_phys_addr(tp, offset);
8741 (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
8742 (tp->nvram_jedecnum == JEDEC_ATMEL)) {
8743
8744 offset = ((offset / tp->nvram_pagesize) <<
8745 ATMEL_AT45DB0X1B_PAGE_POS) +
8746 (offset % tp->nvram_pagesize);
8747 }
8748 9100
8749 if (offset > NVRAM_ADDR_MSK) 9101 if (offset > NVRAM_ADDR_MSK)
8750 return -EINVAL; 9102 return -EINVAL;
@@ -8769,6 +9121,16 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
8769 return ret; 9121 return ret;
8770} 9122}
8771 9123
9124static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val)
9125{
9126 int err;
9127 u32 tmp;
9128
9129 err = tg3_nvram_read(tp, offset, &tmp);
9130 *val = swab32(tmp);
9131 return err;
9132}
9133
8772static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp, 9134static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp,
8773 u32 offset, u32 len, u8 *buf) 9135 u32 offset, u32 len, u8 *buf)
8774{ 9136{
@@ -8921,15 +9283,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
8921 9283
8922 page_off = offset % tp->nvram_pagesize; 9284 page_off = offset % tp->nvram_pagesize;
8923 9285
8924 if ((tp->tg3_flags2 & TG3_FLG2_FLASH) && 9286 phy_addr = tg3_nvram_phys_addr(tp, offset);
8925 (tp->nvram_jedecnum == JEDEC_ATMEL)) {
8926
8927 phy_addr = ((offset / tp->nvram_pagesize) <<
8928 ATMEL_AT45DB0X1B_PAGE_POS) + page_off;
8929 }
8930 else {
8931 phy_addr = offset;
8932 }
8933 9287
8934 tw32(NVRAM_ADDR, phy_addr); 9288 tw32(NVRAM_ADDR, phy_addr);
8935 9289
@@ -8944,6 +9298,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
8944 nvram_cmd |= NVRAM_CMD_LAST; 9298 nvram_cmd |= NVRAM_CMD_LAST;
8945 9299
8946 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) && 9300 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) &&
9301 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) &&
8947 (tp->nvram_jedecnum == JEDEC_ST) && 9302 (tp->nvram_jedecnum == JEDEC_ST) &&
8948 (nvram_cmd & NVRAM_CMD_FIRST)) { 9303 (nvram_cmd & NVRAM_CMD_FIRST)) {
8949 9304
@@ -9347,6 +9702,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
9347{ 9702{
9348 unsigned char vpd_data[256]; 9703 unsigned char vpd_data[256];
9349 int i; 9704 int i;
9705 u32 magic;
9350 9706
9351 if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) { 9707 if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) {
9352 /* Sun decided not to put the necessary bits in the 9708 /* Sun decided not to put the necessary bits in the
@@ -9356,16 +9712,43 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
9356 return; 9712 return;
9357 } 9713 }
9358 9714
9359 for (i = 0; i < 256; i += 4) { 9715 if (tg3_nvram_read_swab(tp, 0x0, &magic))
9360 u32 tmp; 9716 return;
9361 9717
9362 if (tg3_nvram_read(tp, 0x100 + i, &tmp)) 9718 if (magic == TG3_EEPROM_MAGIC) {
9363 goto out_not_found; 9719 for (i = 0; i < 256; i += 4) {
9720 u32 tmp;
9721
9722 if (tg3_nvram_read(tp, 0x100 + i, &tmp))
9723 goto out_not_found;
9364 9724
9365 vpd_data[i + 0] = ((tmp >> 0) & 0xff); 9725 vpd_data[i + 0] = ((tmp >> 0) & 0xff);
9366 vpd_data[i + 1] = ((tmp >> 8) & 0xff); 9726 vpd_data[i + 1] = ((tmp >> 8) & 0xff);
9367 vpd_data[i + 2] = ((tmp >> 16) & 0xff); 9727 vpd_data[i + 2] = ((tmp >> 16) & 0xff);
9368 vpd_data[i + 3] = ((tmp >> 24) & 0xff); 9728 vpd_data[i + 3] = ((tmp >> 24) & 0xff);
9729 }
9730 } else {
9731 int vpd_cap;
9732
9733 vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD);
9734 for (i = 0; i < 256; i += 4) {
9735 u32 tmp, j = 0;
9736 u16 tmp16;
9737
9738 pci_write_config_word(tp->pdev, vpd_cap + PCI_VPD_ADDR,
9739 i);
9740 while (j++ < 100) {
9741 pci_read_config_word(tp->pdev, vpd_cap +
9742 PCI_VPD_ADDR, &tmp16);
9743 if (tmp16 & 0x8000)
9744 break;
9745 msleep(1);
9746 }
9747 pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA,
9748 &tmp);
9749 tmp = cpu_to_le32(tmp);
9750 memcpy(&vpd_data[i], &tmp, 4);
9751 }
9369 } 9752 }
9370 9753
9371 /* Now parse and find the part number. */ 9754 /* Now parse and find the part number. */
@@ -9412,6 +9795,46 @@ out_not_found:
9412 strcpy(tp->board_part_number, "none"); 9795 strcpy(tp->board_part_number, "none");
9413} 9796}
9414 9797
9798static void __devinit tg3_read_fw_ver(struct tg3 *tp)
9799{
9800 u32 val, offset, start;
9801
9802 if (tg3_nvram_read_swab(tp, 0, &val))
9803 return;
9804
9805 if (val != TG3_EEPROM_MAGIC)
9806 return;
9807
9808 if (tg3_nvram_read_swab(tp, 0xc, &offset) ||
9809 tg3_nvram_read_swab(tp, 0x4, &start))
9810 return;
9811
9812 offset = tg3_nvram_logical_addr(tp, offset);
9813 if (tg3_nvram_read_swab(tp, offset, &val))
9814 return;
9815
9816 if ((val & 0xfc000000) == 0x0c000000) {
9817 u32 ver_offset, addr;
9818 int i;
9819
9820 if (tg3_nvram_read_swab(tp, offset + 4, &val) ||
9821 tg3_nvram_read_swab(tp, offset + 8, &ver_offset))
9822 return;
9823
9824 if (val != 0)
9825 return;
9826
9827 addr = offset + ver_offset - start;
9828 for (i = 0; i < 16; i += 4) {
9829 if (tg3_nvram_read(tp, addr + i, &val))
9830 return;
9831
9832 val = cpu_to_le32(val);
9833 memcpy(tp->fw_ver + i, &val, 4);
9834 }
9835 }
9836}
9837
9415#ifdef CONFIG_SPARC64 9838#ifdef CONFIG_SPARC64
9416static int __devinit tg3_is_sun_570X(struct tg3 *tp) 9839static int __devinit tg3_is_sun_570X(struct tg3 *tp)
9417{ 9840{
@@ -9603,6 +10026,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9603 10026
9604 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || 10027 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
9605 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 10028 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
10029 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
9606 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) 10030 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
9607 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 10031 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
9608 10032
@@ -9610,12 +10034,18 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9610 (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) 10034 (tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
9611 tp->tg3_flags2 |= TG3_FLG2_5705_PLUS; 10035 tp->tg3_flags2 |= TG3_FLG2_5705_PLUS;
9612 10036
9613 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) 10037 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
9614 tp->tg3_flags2 |= TG3_FLG2_HW_TSO; 10038 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
10039 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
10040 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
10041 } else
10042 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_1;
10043 }
9615 10044
9616 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && 10045 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
9617 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && 10046 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
9618 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) 10047 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 &&
10048 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787)
9619 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; 10049 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
9620 10050
9621 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) 10051 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
@@ -9772,7 +10202,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9772 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3; 10202 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
9773 10203
9774 /* Force the chip into D0. */ 10204 /* Force the chip into D0. */
9775 err = tg3_set_power_state(tp, 0); 10205 err = tg3_set_power_state(tp, PCI_D0);
9776 if (err) { 10206 if (err) {
9777 printk(KERN_ERR PFX "(%s) transition to D0 failed\n", 10207 printk(KERN_ERR PFX "(%s) transition to D0 failed\n",
9778 pci_name(tp->pdev)); 10208 pci_name(tp->pdev));
@@ -9825,7 +10255,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9825 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0) 10255 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0)
9826 tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG; 10256 tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG;
9827 10257
9828 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) 10258 if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
10259 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787))
9829 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG; 10260 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
9830 10261
9831 tp->coalesce_mode = 0; 10262 tp->coalesce_mode = 0;
@@ -9925,6 +10356,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9925 } 10356 }
9926 10357
9927 tg3_read_partno(tp); 10358 tg3_read_partno(tp);
10359 tg3_read_fw_ver(tp);
9928 10360
9929 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { 10361 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
9930 tp->tg3_flags &= ~TG3_FLAG_USE_MI_INTERRUPT; 10362 tp->tg3_flags &= ~TG3_FLAG_USE_MI_INTERRUPT;
@@ -9960,10 +10392,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
9960 else 10392 else
9961 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; 10393 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
9962 10394
9963 /* It seems all chips can get confused if TX buffers 10395 /* All chips before 5787 can get confused if TX buffers
9964 * straddle the 4GB address boundary in some cases. 10396 * straddle the 4GB address boundary in some cases.
9965 */ 10397 */
9966 tp->dev->hard_start_xmit = tg3_start_xmit; 10398 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
10399 tp->dev->hard_start_xmit = tg3_start_xmit;
10400 else
10401 tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug;
9967 10402
9968 tp->rx_offset = 2; 10403 tp->rx_offset = 2;
9969 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 && 10404 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
@@ -10491,7 +10926,6 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
10491 tp->link_config.speed = SPEED_INVALID; 10926 tp->link_config.speed = SPEED_INVALID;
10492 tp->link_config.duplex = DUPLEX_INVALID; 10927 tp->link_config.duplex = DUPLEX_INVALID;
10493 tp->link_config.autoneg = AUTONEG_ENABLE; 10928 tp->link_config.autoneg = AUTONEG_ENABLE;
10494 netif_carrier_off(tp->dev);
10495 tp->link_config.active_speed = SPEED_INVALID; 10929 tp->link_config.active_speed = SPEED_INVALID;
10496 tp->link_config.active_duplex = DUPLEX_INVALID; 10930 tp->link_config.active_duplex = DUPLEX_INVALID;
10497 tp->link_config.phy_is_low_power = 0; 10931 tp->link_config.phy_is_low_power = 0;
@@ -10550,6 +10984,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
10550 case PHY_ID_BCM5752: return "5752"; 10984 case PHY_ID_BCM5752: return "5752";
10551 case PHY_ID_BCM5714: return "5714"; 10985 case PHY_ID_BCM5714: return "5714";
10552 case PHY_ID_BCM5780: return "5780"; 10986 case PHY_ID_BCM5780: return "5780";
10987 case PHY_ID_BCM5787: return "5787";
10553 case PHY_ID_BCM8002: return "8002/serdes"; 10988 case PHY_ID_BCM8002: return "8002/serdes";
10554 case 0: return "serdes"; 10989 case 0: return "serdes";
10555 default: return "unknown"; 10990 default: return "unknown";
@@ -10848,11 +11283,12 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10848 tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; 11283 tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
10849 } 11284 }
10850 11285
10851 /* TSO is off by default, user can enable using ethtool. */ 11286 /* TSO is on by default on chips that support hardware TSO.
10852#if 0 11287 * Firmware TSO on older chips gives lower performance, so it
10853 if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) 11288 * is off by default, but can be enabled using ethtool.
11289 */
11290 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
10854 dev->features |= NETIF_F_TSO; 11291 dev->features |= NETIF_F_TSO;
10855#endif
10856 11292
10857#endif 11293#endif
10858 11294
@@ -10896,7 +11332,11 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10896 * checksumming. 11332 * checksumming.
10897 */ 11333 */
10898 if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) { 11334 if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {
10899 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; 11335 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
11336 dev->features |= NETIF_F_HW_CSUM;
11337 else
11338 dev->features |= NETIF_F_IP_CSUM;
11339 dev->features |= NETIF_F_SG;
10900 tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; 11340 tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;
10901 } else 11341 } else
10902 tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; 11342 tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS;
@@ -10949,6 +11389,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10949 (pdev->dma_mask == DMA_32BIT_MASK) ? 32 : 11389 (pdev->dma_mask == DMA_32BIT_MASK) ? 32 :
10950 (((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64)); 11390 (((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64));
10951 11391
11392 netif_carrier_off(tp->dev);
11393
10952 return 0; 11394 return 0;
10953 11395
10954err_out_iounmap: 11396err_out_iounmap:
@@ -11044,7 +11486,7 @@ static int tg3_resume(struct pci_dev *pdev)
11044 11486
11045 pci_restore_state(tp->pdev); 11487 pci_restore_state(tp->pdev);
11046 11488
11047 err = tg3_set_power_state(tp, 0); 11489 err = tg3_set_power_state(tp, PCI_D0);
11048 if (err) 11490 if (err)
11049 return err; 11491 return err;
11050 11492
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 7e3b613afb29..baa34c4721db 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -138,6 +138,7 @@
138#define ASIC_REV_5752 0x06 138#define ASIC_REV_5752 0x06
139#define ASIC_REV_5780 0x08 139#define ASIC_REV_5780 0x08
140#define ASIC_REV_5714 0x09 140#define ASIC_REV_5714 0x09
141#define ASIC_REV_5787 0x0b
141#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 142#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
142#define CHIPREV_5700_AX 0x70 143#define CHIPREV_5700_AX 0x70
143#define CHIPREV_5700_BX 0x71 144#define CHIPREV_5700_BX 0x71
@@ -1393,6 +1394,7 @@
1393#define GRC_MDI_CTRL 0x00006844 1394#define GRC_MDI_CTRL 0x00006844
1394#define GRC_SEEPROM_DELAY 0x00006848 1395#define GRC_SEEPROM_DELAY 0x00006848
1395/* 0x684c --> 0x6c00 unused */ 1396/* 0x684c --> 0x6c00 unused */
1397#define GRC_FASTBOOT_PC 0x00006894 /* 5752, 5755, 5787 */
1396 1398
1397/* 0x6c00 --> 0x7000 unused */ 1399/* 0x6c00 --> 0x7000 unused */
1398 1400
@@ -1436,6 +1438,13 @@
1436#define FLASH_5752VENDOR_ST_M45PE10 0x02400000 1438#define FLASH_5752VENDOR_ST_M45PE10 0x02400000
1437#define FLASH_5752VENDOR_ST_M45PE20 0x02400002 1439#define FLASH_5752VENDOR_ST_M45PE20 0x02400002
1438#define FLASH_5752VENDOR_ST_M45PE40 0x02400001 1440#define FLASH_5752VENDOR_ST_M45PE40 0x02400001
1441#define FLASH_5755VENDOR_ATMEL_FLASH_1 0x03400001
1442#define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002
1443#define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000
1444#define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003
1445#define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002
1446#define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000
1447#define FLASH_5787VENDOR_MICRO_EEPROM_376KHZ 0x02000000
1439#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000 1448#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000
1440#define FLASH_5752PAGE_SIZE_256 0x00000000 1449#define FLASH_5752PAGE_SIZE_256 0x00000000
1441#define FLASH_5752PAGE_SIZE_512 0x10000000 1450#define FLASH_5752PAGE_SIZE_512 0x10000000
@@ -2185,7 +2194,7 @@ struct tg3 {
2185#define TG3_FLG2_PHY_SERDES 0x00002000 2194#define TG3_FLG2_PHY_SERDES 0x00002000
2186#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000 2195#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000
2187#define TG3_FLG2_FLASH 0x00008000 2196#define TG3_FLG2_FLASH 0x00008000
2188#define TG3_FLG2_HW_TSO 0x00010000 2197#define TG3_FLG2_HW_TSO_1 0x00010000
2189#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000 2198#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
2190#define TG3_FLG2_5705_PLUS 0x00040000 2199#define TG3_FLG2_5705_PLUS 0x00040000
2191#define TG3_FLG2_5750_PLUS 0x00080000 2200#define TG3_FLG2_5750_PLUS 0x00080000
@@ -2198,6 +2207,9 @@ struct tg3 {
2198#define TG3_FLG2_PARALLEL_DETECT 0x01000000 2207#define TG3_FLG2_PARALLEL_DETECT 0x01000000
2199#define TG3_FLG2_ICH_WORKAROUND 0x02000000 2208#define TG3_FLG2_ICH_WORKAROUND 0x02000000
2200#define TG3_FLG2_5780_CLASS 0x04000000 2209#define TG3_FLG2_5780_CLASS 0x04000000
2210#define TG3_FLG2_HW_TSO_2 0x08000000
2211#define TG3_FLG2_HW_TSO (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2)
2212#define TG3_FLG2_1SHOT_MSI 0x10000000
2201 2213
2202 u32 split_mode_max_reqs; 2214 u32 split_mode_max_reqs;
2203#define SPLIT_MODE_5704_MAX_REQ 3 2215#define SPLIT_MODE_5704_MAX_REQ 3
@@ -2247,6 +2259,7 @@ struct tg3 {
2247#define PHY_ID_BCM5752 0x60008100 2259#define PHY_ID_BCM5752 0x60008100
2248#define PHY_ID_BCM5714 0x60008340 2260#define PHY_ID_BCM5714 0x60008340
2249#define PHY_ID_BCM5780 0x60008350 2261#define PHY_ID_BCM5780 0x60008350
2262#define PHY_ID_BCM5787 0xbc050ce0
2250#define PHY_ID_BCM8002 0x60010140 2263#define PHY_ID_BCM8002 0x60010140
2251#define PHY_ID_INVALID 0xffffffff 2264#define PHY_ID_INVALID 0xffffffff
2252#define PHY_ID_REV_MASK 0x0000000f 2265#define PHY_ID_REV_MASK 0x0000000f
@@ -2258,6 +2271,7 @@ struct tg3 {
2258 u32 led_ctrl; 2271 u32 led_ctrl;
2259 2272
2260 char board_part_number[24]; 2273 char board_part_number[24];
2274 char fw_ver[16];
2261 u32 nic_sram_data_cfg; 2275 u32 nic_sram_data_cfg;
2262 u32 pci_clock_ctrl; 2276 u32 pci_clock_ctrl;
2263 struct pci_dev *pdev_peer; 2277 struct pci_dev *pdev_peer;
@@ -2271,7 +2285,8 @@ struct tg3 {
2271 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \ 2285 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
2272 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \ 2286 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
2273 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \ 2287 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2274 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002) 2288 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
2289 (X) == PHY_ID_BCM8002)
2275 2290
2276 struct tg3_hw_stats *hw_stats; 2291 struct tg3_hw_stats *hw_stats;
2277 dma_addr_t stats_mapping; 2292 dma_addr_t stats_mapping;
diff --git a/drivers/net/wan/sbni.c b/drivers/net/wan/sbni.c
index db2c798ba89e..175ba13bce41 100644
--- a/drivers/net/wan/sbni.c
+++ b/drivers/net/wan/sbni.c
@@ -1495,8 +1495,7 @@ module_param(skip_pci_probe, bool, 0);
1495MODULE_LICENSE("GPL"); 1495MODULE_LICENSE("GPL");
1496 1496
1497 1497
1498int 1498int __init init_module( void )
1499init_module( void )
1500{ 1499{
1501 struct net_device *dev; 1500 struct net_device *dev;
1502 int err; 1501 int err;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-13 10:52:30 -0500