diff options
author | Timur Tabi <timur@freescale.com> | 2007-01-18 12:09:35 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-01-18 12:17:02 -0500 |
commit | 6bf446522b246194551cf167f0168792080d6118 (patch) | |
tree | 805659e5f334a00ae24976f0ab4f1f8f0f27e7bf /drivers/net | |
parent | df19b6b020791b4c42e7cf2e4f582454cbc49251 (diff) |
Fix phy_read/write redefinition errors in ucc_geth_phy.c
The local versions of phy_read() and phy_write() in ucc_geth_phy.c conflict
with the prototypes in include/linux/phy.h, so this patch renames them,
moves them to the top of the file (while eliminating the redundant prototype),
and makes them static.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/ucc_geth_phy.c | 134 |
1 files changed, 66 insertions, 68 deletions
diff --git a/drivers/net/ucc_geth_phy.c b/drivers/net/ucc_geth_phy.c index 5360ec05eaa3..3c86592ce03c 100644 --- a/drivers/net/ucc_geth_phy.c +++ b/drivers/net/ucc_geth_phy.c | |||
@@ -68,8 +68,31 @@ static int gbit_config_aneg(struct ugeth_mii_info *mii_info); | |||
68 | static int genmii_config_aneg(struct ugeth_mii_info *mii_info); | 68 | static int genmii_config_aneg(struct ugeth_mii_info *mii_info); |
69 | static int genmii_update_link(struct ugeth_mii_info *mii_info); | 69 | static int genmii_update_link(struct ugeth_mii_info *mii_info); |
70 | static int genmii_read_status(struct ugeth_mii_info *mii_info); | 70 | static int genmii_read_status(struct ugeth_mii_info *mii_info); |
71 | u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum); | 71 | |
72 | void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val); | 72 | static u16 ucc_geth_phy_read(struct ugeth_mii_info *mii_info, u16 regnum) |
73 | { | ||
74 | u16 retval; | ||
75 | unsigned long flags; | ||
76 | |||
77 | ugphy_vdbg("%s: IN", __FUNCTION__); | ||
78 | |||
79 | spin_lock_irqsave(&mii_info->mdio_lock, flags); | ||
80 | retval = mii_info->mdio_read(mii_info->dev, mii_info->mii_id, regnum); | ||
81 | spin_unlock_irqrestore(&mii_info->mdio_lock, flags); | ||
82 | |||
83 | return retval; | ||
84 | } | ||
85 | |||
86 | static void ucc_geth_phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val) | ||
87 | { | ||
88 | unsigned long flags; | ||
89 | |||
90 | ugphy_vdbg("%s: IN", __FUNCTION__); | ||
91 | |||
92 | spin_lock_irqsave(&mii_info->mdio_lock, flags); | ||
93 | mii_info->mdio_write(mii_info->dev, mii_info->mii_id, regnum, val); | ||
94 | spin_unlock_irqrestore(&mii_info->mdio_lock, flags); | ||
95 | } | ||
73 | 96 | ||
74 | /* Write value to the PHY for this device to the register at regnum, */ | 97 | /* Write value to the PHY for this device to the register at regnum, */ |
75 | /* waiting until the write is done before it returns. All PHY */ | 98 | /* waiting until the write is done before it returns. All PHY */ |
@@ -184,7 +207,7 @@ static void config_genmii_advert(struct ugeth_mii_info *mii_info) | |||
184 | advertise = mii_info->advertising; | 207 | advertise = mii_info->advertising; |
185 | 208 | ||
186 | /* Setup standard advertisement */ | 209 | /* Setup standard advertisement */ |
187 | adv = phy_read(mii_info, MII_ADVERTISE); | 210 | adv = ucc_geth_phy_read(mii_info, MII_ADVERTISE); |
188 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); | 211 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4); |
189 | if (advertise & ADVERTISED_10baseT_Half) | 212 | if (advertise & ADVERTISED_10baseT_Half) |
190 | adv |= ADVERTISE_10HALF; | 213 | adv |= ADVERTISE_10HALF; |
@@ -194,7 +217,7 @@ static void config_genmii_advert(struct ugeth_mii_info *mii_info) | |||
194 | adv |= ADVERTISE_100HALF; | 217 | adv |= ADVERTISE_100HALF; |
195 | if (advertise & ADVERTISED_100baseT_Full) | 218 | if (advertise & ADVERTISED_100baseT_Full) |
196 | adv |= ADVERTISE_100FULL; | 219 | adv |= ADVERTISE_100FULL; |
197 | phy_write(mii_info, MII_ADVERTISE, adv); | 220 | ucc_geth_phy_write(mii_info, MII_ADVERTISE, adv); |
198 | } | 221 | } |
199 | 222 | ||
200 | static void genmii_setup_forced(struct ugeth_mii_info *mii_info) | 223 | static void genmii_setup_forced(struct ugeth_mii_info *mii_info) |
@@ -204,7 +227,7 @@ static void genmii_setup_forced(struct ugeth_mii_info *mii_info) | |||
204 | 227 | ||
205 | ugphy_vdbg("%s: IN", __FUNCTION__); | 228 | ugphy_vdbg("%s: IN", __FUNCTION__); |
206 | 229 | ||
207 | ctrl = phy_read(mii_info, MII_BMCR); | 230 | ctrl = ucc_geth_phy_read(mii_info, MII_BMCR); |
208 | 231 | ||
209 | ctrl &= | 232 | ctrl &= |
210 | ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); | 233 | ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); |
@@ -234,7 +257,7 @@ static void genmii_setup_forced(struct ugeth_mii_info *mii_info) | |||
234 | break; | 257 | break; |
235 | } | 258 | } |
236 | 259 | ||
237 | phy_write(mii_info, MII_BMCR, ctrl); | 260 | ucc_geth_phy_write(mii_info, MII_BMCR, ctrl); |
238 | } | 261 | } |
239 | 262 | ||
240 | /* Enable and Restart Autonegotiation */ | 263 | /* Enable and Restart Autonegotiation */ |
@@ -244,9 +267,9 @@ static void genmii_restart_aneg(struct ugeth_mii_info *mii_info) | |||
244 | 267 | ||
245 | ugphy_vdbg("%s: IN", __FUNCTION__); | 268 | ugphy_vdbg("%s: IN", __FUNCTION__); |
246 | 269 | ||
247 | ctl = phy_read(mii_info, MII_BMCR); | 270 | ctl = ucc_geth_phy_read(mii_info, MII_BMCR); |
248 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); | 271 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); |
249 | phy_write(mii_info, MII_BMCR, ctl); | 272 | ucc_geth_phy_write(mii_info, MII_BMCR, ctl); |
250 | } | 273 | } |
251 | 274 | ||
252 | static int gbit_config_aneg(struct ugeth_mii_info *mii_info) | 275 | static int gbit_config_aneg(struct ugeth_mii_info *mii_info) |
@@ -261,14 +284,14 @@ static int gbit_config_aneg(struct ugeth_mii_info *mii_info) | |||
261 | config_genmii_advert(mii_info); | 284 | config_genmii_advert(mii_info); |
262 | advertise = mii_info->advertising; | 285 | advertise = mii_info->advertising; |
263 | 286 | ||
264 | adv = phy_read(mii_info, MII_1000BASETCONTROL); | 287 | adv = ucc_geth_phy_read(mii_info, MII_1000BASETCONTROL); |
265 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | | 288 | adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | |
266 | MII_1000BASETCONTROL_HALFDUPLEXCAP); | 289 | MII_1000BASETCONTROL_HALFDUPLEXCAP); |
267 | if (advertise & SUPPORTED_1000baseT_Half) | 290 | if (advertise & SUPPORTED_1000baseT_Half) |
268 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; | 291 | adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; |
269 | if (advertise & SUPPORTED_1000baseT_Full) | 292 | if (advertise & SUPPORTED_1000baseT_Full) |
270 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; | 293 | adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; |
271 | phy_write(mii_info, MII_1000BASETCONTROL, adv); | 294 | ucc_geth_phy_write(mii_info, MII_1000BASETCONTROL, adv); |
272 | 295 | ||
273 | /* Start/Restart aneg */ | 296 | /* Start/Restart aneg */ |
274 | genmii_restart_aneg(mii_info); | 297 | genmii_restart_aneg(mii_info); |
@@ -298,10 +321,10 @@ static int genmii_update_link(struct ugeth_mii_info *mii_info) | |||
298 | ugphy_vdbg("%s: IN", __FUNCTION__); | 321 | ugphy_vdbg("%s: IN", __FUNCTION__); |
299 | 322 | ||
300 | /* Do a fake read */ | 323 | /* Do a fake read */ |
301 | phy_read(mii_info, MII_BMSR); | 324 | ucc_geth_phy_read(mii_info, MII_BMSR); |
302 | 325 | ||
303 | /* Read link and autonegotiation status */ | 326 | /* Read link and autonegotiation status */ |
304 | status = phy_read(mii_info, MII_BMSR); | 327 | status = ucc_geth_phy_read(mii_info, MII_BMSR); |
305 | if ((status & BMSR_LSTATUS) == 0) | 328 | if ((status & BMSR_LSTATUS) == 0) |
306 | mii_info->link = 0; | 329 | mii_info->link = 0; |
307 | else | 330 | else |
@@ -329,7 +352,7 @@ static int genmii_read_status(struct ugeth_mii_info *mii_info) | |||
329 | return err; | 352 | return err; |
330 | 353 | ||
331 | if (mii_info->autoneg) { | 354 | if (mii_info->autoneg) { |
332 | status = phy_read(mii_info, MII_LPA); | 355 | status = ucc_geth_phy_read(mii_info, MII_LPA); |
333 | 356 | ||
334 | if (status & (LPA_10FULL | LPA_100FULL)) | 357 | if (status & (LPA_10FULL | LPA_100FULL)) |
335 | mii_info->duplex = DUPLEX_FULL; | 358 | mii_info->duplex = DUPLEX_FULL; |
@@ -352,9 +375,9 @@ static int marvell_init(struct ugeth_mii_info *mii_info) | |||
352 | { | 375 | { |
353 | ugphy_vdbg("%s: IN", __FUNCTION__); | 376 | ugphy_vdbg("%s: IN", __FUNCTION__); |
354 | 377 | ||
355 | phy_write(mii_info, 0x14, 0x0cd2); | 378 | ucc_geth_phy_write(mii_info, 0x14, 0x0cd2); |
356 | phy_write(mii_info, MII_BMCR, | 379 | ucc_geth_phy_write(mii_info, MII_BMCR, |
357 | phy_read(mii_info, MII_BMCR) | BMCR_RESET); | 380 | ucc_geth_phy_read(mii_info, MII_BMCR) | BMCR_RESET); |
358 | msleep(4000); | 381 | msleep(4000); |
359 | 382 | ||
360 | return 0; | 383 | return 0; |
@@ -367,13 +390,13 @@ static int marvell_config_aneg(struct ugeth_mii_info *mii_info) | |||
367 | /* The Marvell PHY has an errata which requires | 390 | /* The Marvell PHY has an errata which requires |
368 | * that certain registers get written in order | 391 | * that certain registers get written in order |
369 | * to restart autonegotiation */ | 392 | * to restart autonegotiation */ |
370 | phy_write(mii_info, MII_BMCR, BMCR_RESET); | 393 | ucc_geth_phy_write(mii_info, MII_BMCR, BMCR_RESET); |
371 | 394 | ||
372 | phy_write(mii_info, 0x1d, 0x1f); | 395 | ucc_geth_phy_write(mii_info, 0x1d, 0x1f); |
373 | phy_write(mii_info, 0x1e, 0x200c); | 396 | ucc_geth_phy_write(mii_info, 0x1e, 0x200c); |
374 | phy_write(mii_info, 0x1d, 0x5); | 397 | ucc_geth_phy_write(mii_info, 0x1d, 0x5); |
375 | phy_write(mii_info, 0x1e, 0); | 398 | ucc_geth_phy_write(mii_info, 0x1e, 0); |
376 | phy_write(mii_info, 0x1e, 0x100); | 399 | ucc_geth_phy_write(mii_info, 0x1e, 0x100); |
377 | 400 | ||
378 | gbit_config_aneg(mii_info); | 401 | gbit_config_aneg(mii_info); |
379 | 402 | ||
@@ -398,7 +421,7 @@ static int marvell_read_status(struct ugeth_mii_info *mii_info) | |||
398 | * are as set */ | 421 | * are as set */ |
399 | if (mii_info->autoneg && mii_info->link) { | 422 | if (mii_info->autoneg && mii_info->link) { |
400 | int speed; | 423 | int speed; |
401 | status = phy_read(mii_info, MII_M1011_PHY_SPEC_STATUS); | 424 | status = ucc_geth_phy_read(mii_info, MII_M1011_PHY_SPEC_STATUS); |
402 | 425 | ||
403 | /* Get the duplexity */ | 426 | /* Get the duplexity */ |
404 | if (status & MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX) | 427 | if (status & MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX) |
@@ -430,7 +453,7 @@ static int marvell_ack_interrupt(struct ugeth_mii_info *mii_info) | |||
430 | ugphy_vdbg("%s: IN", __FUNCTION__); | 453 | ugphy_vdbg("%s: IN", __FUNCTION__); |
431 | 454 | ||
432 | /* Clear the interrupts by reading the reg */ | 455 | /* Clear the interrupts by reading the reg */ |
433 | phy_read(mii_info, MII_M1011_IEVENT); | 456 | ucc_geth_phy_read(mii_info, MII_M1011_IEVENT); |
434 | 457 | ||
435 | return 0; | 458 | return 0; |
436 | } | 459 | } |
@@ -440,9 +463,9 @@ static int marvell_config_intr(struct ugeth_mii_info *mii_info) | |||
440 | ugphy_vdbg("%s: IN", __FUNCTION__); | 463 | ugphy_vdbg("%s: IN", __FUNCTION__); |
441 | 464 | ||
442 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) | 465 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) |
443 | phy_write(mii_info, MII_M1011_IMASK, MII_M1011_IMASK_INIT); | 466 | ucc_geth_phy_write(mii_info, MII_M1011_IMASK, MII_M1011_IMASK_INIT); |
444 | else | 467 | else |
445 | phy_write(mii_info, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); | 468 | ucc_geth_phy_write(mii_info, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); |
446 | 469 | ||
447 | return 0; | 470 | return 0; |
448 | } | 471 | } |
@@ -451,9 +474,9 @@ static int cis820x_init(struct ugeth_mii_info *mii_info) | |||
451 | { | 474 | { |
452 | ugphy_vdbg("%s: IN", __FUNCTION__); | 475 | ugphy_vdbg("%s: IN", __FUNCTION__); |
453 | 476 | ||
454 | phy_write(mii_info, MII_CIS8201_AUX_CONSTAT, | 477 | ucc_geth_phy_write(mii_info, MII_CIS8201_AUX_CONSTAT, |
455 | MII_CIS8201_AUXCONSTAT_INIT); | 478 | MII_CIS8201_AUXCONSTAT_INIT); |
456 | phy_write(mii_info, MII_CIS8201_EXT_CON1, MII_CIS8201_EXTCON1_INIT); | 479 | ucc_geth_phy_write(mii_info, MII_CIS8201_EXT_CON1, MII_CIS8201_EXTCON1_INIT); |
457 | 480 | ||
458 | return 0; | 481 | return 0; |
459 | } | 482 | } |
@@ -477,7 +500,7 @@ static int cis820x_read_status(struct ugeth_mii_info *mii_info) | |||
477 | if (mii_info->autoneg && mii_info->link) { | 500 | if (mii_info->autoneg && mii_info->link) { |
478 | int speed; | 501 | int speed; |
479 | 502 | ||
480 | status = phy_read(mii_info, MII_CIS8201_AUX_CONSTAT); | 503 | status = ucc_geth_phy_read(mii_info, MII_CIS8201_AUX_CONSTAT); |
481 | if (status & MII_CIS8201_AUXCONSTAT_DUPLEX) | 504 | if (status & MII_CIS8201_AUXCONSTAT_DUPLEX) |
482 | mii_info->duplex = DUPLEX_FULL; | 505 | mii_info->duplex = DUPLEX_FULL; |
483 | else | 506 | else |
@@ -505,7 +528,7 @@ static int cis820x_ack_interrupt(struct ugeth_mii_info *mii_info) | |||
505 | { | 528 | { |
506 | ugphy_vdbg("%s: IN", __FUNCTION__); | 529 | ugphy_vdbg("%s: IN", __FUNCTION__); |
507 | 530 | ||
508 | phy_read(mii_info, MII_CIS8201_ISTAT); | 531 | ucc_geth_phy_read(mii_info, MII_CIS8201_ISTAT); |
509 | 532 | ||
510 | return 0; | 533 | return 0; |
511 | } | 534 | } |
@@ -515,9 +538,9 @@ static int cis820x_config_intr(struct ugeth_mii_info *mii_info) | |||
515 | ugphy_vdbg("%s: IN", __FUNCTION__); | 538 | ugphy_vdbg("%s: IN", __FUNCTION__); |
516 | 539 | ||
517 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) | 540 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) |
518 | phy_write(mii_info, MII_CIS8201_IMASK, MII_CIS8201_IMASK_MASK); | 541 | ucc_geth_phy_write(mii_info, MII_CIS8201_IMASK, MII_CIS8201_IMASK_MASK); |
519 | else | 542 | else |
520 | phy_write(mii_info, MII_CIS8201_IMASK, 0); | 543 | ucc_geth_phy_write(mii_info, MII_CIS8201_IMASK, 0); |
521 | 544 | ||
522 | return 0; | 545 | return 0; |
523 | } | 546 | } |
@@ -541,7 +564,7 @@ static int dm9161_read_status(struct ugeth_mii_info *mii_info) | |||
541 | /* If we aren't autonegotiating, assume speeds | 564 | /* If we aren't autonegotiating, assume speeds |
542 | * are as set */ | 565 | * are as set */ |
543 | if (mii_info->autoneg && mii_info->link) { | 566 | if (mii_info->autoneg && mii_info->link) { |
544 | status = phy_read(mii_info, MII_DM9161_SCSR); | 567 | status = ucc_geth_phy_read(mii_info, MII_DM9161_SCSR); |
545 | if (status & (MII_DM9161_SCSR_100F | MII_DM9161_SCSR_100H)) | 568 | if (status & (MII_DM9161_SCSR_100F | MII_DM9161_SCSR_100H)) |
546 | mii_info->speed = SPEED_100; | 569 | mii_info->speed = SPEED_100; |
547 | else | 570 | else |
@@ -572,7 +595,7 @@ static void dm9161_timer(unsigned long data) | |||
572 | { | 595 | { |
573 | struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data; | 596 | struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data; |
574 | struct dm9161_private *priv = mii_info->priv; | 597 | struct dm9161_private *priv = mii_info->priv; |
575 | u16 status = phy_read(mii_info, MII_BMSR); | 598 | u16 status = ucc_geth_phy_read(mii_info, MII_BMSR); |
576 | 599 | ||
577 | ugphy_vdbg("%s: IN", __FUNCTION__); | 600 | ugphy_vdbg("%s: IN", __FUNCTION__); |
578 | 601 | ||
@@ -599,11 +622,11 @@ static int dm9161_init(struct ugeth_mii_info *mii_info) | |||
599 | /* Reset is not done yet */ | 622 | /* Reset is not done yet */ |
600 | priv->resetdone = 0; | 623 | priv->resetdone = 0; |
601 | 624 | ||
602 | phy_write(mii_info, MII_BMCR, | 625 | ucc_geth_phy_write(mii_info, MII_BMCR, |
603 | phy_read(mii_info, MII_BMCR) | BMCR_RESET); | 626 | ucc_geth_phy_read(mii_info, MII_BMCR) | BMCR_RESET); |
604 | 627 | ||
605 | phy_write(mii_info, MII_BMCR, | 628 | ucc_geth_phy_write(mii_info, MII_BMCR, |
606 | phy_read(mii_info, MII_BMCR) & ~BMCR_ISOLATE); | 629 | ucc_geth_phy_read(mii_info, MII_BMCR) & ~BMCR_ISOLATE); |
607 | 630 | ||
608 | config_genmii_advert(mii_info); | 631 | config_genmii_advert(mii_info); |
609 | /* Start/Restart aneg */ | 632 | /* Start/Restart aneg */ |
@@ -634,7 +657,7 @@ static int dm9161_ack_interrupt(struct ugeth_mii_info *mii_info) | |||
634 | ugphy_vdbg("%s: IN", __FUNCTION__); | 657 | ugphy_vdbg("%s: IN", __FUNCTION__); |
635 | 658 | ||
636 | /* Clear the interrupts by reading the reg */ | 659 | /* Clear the interrupts by reading the reg */ |
637 | phy_read(mii_info, MII_DM9161_INTR); | 660 | ucc_geth_phy_read(mii_info, MII_DM9161_INTR); |
638 | 661 | ||
639 | 662 | ||
640 | return 0; | 663 | return 0; |
@@ -645,9 +668,9 @@ static int dm9161_config_intr(struct ugeth_mii_info *mii_info) | |||
645 | ugphy_vdbg("%s: IN", __FUNCTION__); | 668 | ugphy_vdbg("%s: IN", __FUNCTION__); |
646 | 669 | ||
647 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) | 670 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) |
648 | phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_INIT); | 671 | ucc_geth_phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_INIT); |
649 | else | 672 | else |
650 | phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_STOP); | 673 | ucc_geth_phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_STOP); |
651 | 674 | ||
652 | return 0; | 675 | return 0; |
653 | } | 676 | } |
@@ -718,31 +741,6 @@ static struct phy_info *phy_info[] = { | |||
718 | NULL | 741 | NULL |
719 | }; | 742 | }; |
720 | 743 | ||
721 | u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum) | ||
722 | { | ||
723 | u16 retval; | ||
724 | unsigned long flags; | ||
725 | |||
726 | ugphy_vdbg("%s: IN", __FUNCTION__); | ||
727 | |||
728 | spin_lock_irqsave(&mii_info->mdio_lock, flags); | ||
729 | retval = mii_info->mdio_read(mii_info->dev, mii_info->mii_id, regnum); | ||
730 | spin_unlock_irqrestore(&mii_info->mdio_lock, flags); | ||
731 | |||
732 | return retval; | ||
733 | } | ||
734 | |||
735 | void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val) | ||
736 | { | ||
737 | unsigned long flags; | ||
738 | |||
739 | ugphy_vdbg("%s: IN", __FUNCTION__); | ||
740 | |||
741 | spin_lock_irqsave(&mii_info->mdio_lock, flags); | ||
742 | mii_info->mdio_write(mii_info->dev, mii_info->mii_id, regnum, val); | ||
743 | spin_unlock_irqrestore(&mii_info->mdio_lock, flags); | ||
744 | } | ||
745 | |||
746 | /* Use the PHY ID registers to determine what type of PHY is attached | 744 | /* Use the PHY ID registers to determine what type of PHY is attached |
747 | * to device dev. return a struct phy_info structure describing that PHY | 745 | * to device dev. return a struct phy_info structure describing that PHY |
748 | */ | 746 | */ |
@@ -757,11 +755,11 @@ struct phy_info *get_phy_info(struct ugeth_mii_info *mii_info) | |||
757 | ugphy_vdbg("%s: IN", __FUNCTION__); | 755 | ugphy_vdbg("%s: IN", __FUNCTION__); |
758 | 756 | ||
759 | /* Grab the bits from PHYIR1, and put them in the upper half */ | 757 | /* Grab the bits from PHYIR1, and put them in the upper half */ |
760 | phy_reg = phy_read(mii_info, MII_PHYSID1); | 758 | phy_reg = ucc_geth_phy_read(mii_info, MII_PHYSID1); |
761 | phy_ID = (phy_reg & 0xffff) << 16; | 759 | phy_ID = (phy_reg & 0xffff) << 16; |
762 | 760 | ||
763 | /* Grab the bits from PHYIR2, and put them in the lower half */ | 761 | /* Grab the bits from PHYIR2, and put them in the lower half */ |
764 | phy_reg = phy_read(mii_info, MII_PHYSID2); | 762 | phy_reg = ucc_geth_phy_read(mii_info, MII_PHYSID2); |
765 | phy_ID |= (phy_reg & 0xffff); | 763 | phy_ID |= (phy_reg & 0xffff); |
766 | 764 | ||
767 | /* loop through all the known PHY types, and find one that */ | 765 | /* loop through all the known PHY types, and find one that */ |