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authorMichael Buesch <mb@bu3sch.de>2008-01-02 12:55:53 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-09 02:30:06 -0500
commitd987160b710c98997015832422a05e18d9f0f925 (patch)
treeecb389959d6c9678b77dc88976cc57466c235d79 /drivers/net
parent9e8d6f8959c356d8294d45f11231331c3e1bcae6 (diff)
b43: Fix rxheader channel parsing
This patch fixes the parsing of the RX data header channel field. The current code parses the header incorrectly and passes a wrong channel number and frequency for each frame to mac80211. The FIXMEs added by this patch don't matter for now as the code where they live won't get executed anyway. They will be fixed later. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wireless/b43/b43.h2
-rw-r--r--drivers/net/wireless/b43/main.h20
-rw-r--r--drivers/net/wireless/b43/xmit.c27
-rw-r--r--drivers/net/wireless/b43/xmit.h65
4 files changed, 61 insertions, 53 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index a28ad230d63e..7b6fc1ab2b90 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -273,6 +273,8 @@ enum {
273#define B43_PHYTYPE_A 0x00 273#define B43_PHYTYPE_A 0x00
274#define B43_PHYTYPE_B 0x01 274#define B43_PHYTYPE_B 0x01
275#define B43_PHYTYPE_G 0x02 275#define B43_PHYTYPE_G 0x02
276#define B43_PHYTYPE_N 0x04
277#define B43_PHYTYPE_LP 0x05
276 278
277/* PHYRegisters */ 279/* PHYRegisters */
278#define B43_PHY_ILT_A_CTRL 0x0072 280#define B43_PHY_ILT_A_CTRL 0x0072
diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h
index 284d17da17d1..08e2e56e48f4 100644
--- a/drivers/net/wireless/b43/main.h
+++ b/drivers/net/wireless/b43/main.h
@@ -39,11 +39,11 @@
39#define PAD_BYTES(nr_bytes) P4D_BYTES( __LINE__ , (nr_bytes)) 39#define PAD_BYTES(nr_bytes) P4D_BYTES( __LINE__ , (nr_bytes))
40 40
41/* Lightweight function to convert a frequency (in Mhz) to a channel number. */ 41/* Lightweight function to convert a frequency (in Mhz) to a channel number. */
42static inline u8 b43_freq_to_channel_a(int freq) 42static inline u8 b43_freq_to_channel_5ghz(int freq)
43{ 43{
44 return ((freq - 5000) / 5); 44 return ((freq - 5000) / 5);
45} 45}
46static inline u8 b43_freq_to_channel_bg(int freq) 46static inline u8 b43_freq_to_channel_2ghz(int freq)
47{ 47{
48 u8 channel; 48 u8 channel;
49 49
@@ -54,19 +54,13 @@ static inline u8 b43_freq_to_channel_bg(int freq)
54 54
55 return channel; 55 return channel;
56} 56}
57static inline u8 b43_freq_to_channel(struct b43_wldev *dev, int freq)
58{
59 if (dev->phy.type == B43_PHYTYPE_A)
60 return b43_freq_to_channel_a(freq);
61 return b43_freq_to_channel_bg(freq);
62}
63 57
64/* Lightweight function to convert a channel number to a frequency (in Mhz). */ 58/* Lightweight function to convert a channel number to a frequency (in Mhz). */
65static inline int b43_channel_to_freq_a(u8 channel) 59static inline int b43_channel_to_freq_5ghz(u8 channel)
66{ 60{
67 return (5000 + (5 * channel)); 61 return (5000 + (5 * channel));
68} 62}
69static inline int b43_channel_to_freq_bg(u8 channel) 63static inline int b43_channel_to_freq_2ghz(u8 channel)
70{ 64{
71 int freq; 65 int freq;
72 66
@@ -77,12 +71,6 @@ static inline int b43_channel_to_freq_bg(u8 channel)
77 71
78 return freq; 72 return freq;
79} 73}
80static inline int b43_channel_to_freq(struct b43_wldev *dev, u8 channel)
81{
82 if (dev->phy.type == B43_PHYTYPE_A)
83 return b43_channel_to_freq_a(channel);
84 return b43_channel_to_freq_bg(channel);
85}
86 74
87static inline int b43_is_cck_rate(int rate) 75static inline int b43_is_cck_rate(int rate)
88{ 76{
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index 0bd6f8a348a8..3307ba1856b1 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -531,21 +531,32 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
531 switch (chanstat & B43_RX_CHAN_PHYTYPE) { 531 switch (chanstat & B43_RX_CHAN_PHYTYPE) {
532 case B43_PHYTYPE_A: 532 case B43_PHYTYPE_A:
533 status.phymode = MODE_IEEE80211A; 533 status.phymode = MODE_IEEE80211A;
534 status.freq = chanid; 534 B43_WARN_ON(1);
535 status.channel = b43_freq_to_channel_a(chanid); 535 /* FIXME: We don't really know which value the "chanid" contains.
536 break; 536 * So the following assignment might be wrong. */
537 case B43_PHYTYPE_B: 537 status.channel = chanid;
538 status.phymode = MODE_IEEE80211B; 538 status.freq = b43_channel_to_freq_5ghz(status.channel);
539 status.freq = chanid + 2400;
540 status.channel = b43_freq_to_channel_bg(chanid + 2400);
541 break; 539 break;
542 case B43_PHYTYPE_G: 540 case B43_PHYTYPE_G:
543 status.phymode = MODE_IEEE80211G; 541 status.phymode = MODE_IEEE80211G;
542 /* chanid is the radio channel cookie value as used
543 * to tune the radio. */
544 status.freq = chanid + 2400; 544 status.freq = chanid + 2400;
545 status.channel = b43_freq_to_channel_bg(chanid + 2400); 545 status.channel = b43_freq_to_channel_2ghz(status.freq);
546 break;
547 case B43_PHYTYPE_N:
548 status.phymode = 0xDEAD /*FIXME MODE_IEEE80211N*/;
549 /* chanid is the SHM channel cookie. Which is the plain
550 * channel number in b43. */
551 status.channel = chanid;
552 if (chanstat & B43_RX_CHAN_5GHZ)
553 status.freq = b43_freq_to_channel_5ghz(status.freq);
554 else
555 status.freq = b43_freq_to_channel_2ghz(status.freq);
546 break; 556 break;
547 default: 557 default:
548 B43_WARN_ON(1); 558 B43_WARN_ON(1);
559 goto drop;
549 } 560 }
550 561
551 dev->stats.last_rx = jiffies; 562 dev->stats.last_rx = jiffies;
diff --git a/drivers/net/wireless/b43/xmit.h b/drivers/net/wireless/b43/xmit.h
index 03bddd251618..6dc079382f7f 100644
--- a/drivers/net/wireless/b43/xmit.h
+++ b/drivers/net/wireless/b43/xmit.h
@@ -142,49 +142,56 @@ struct b43_rxhdr_fw4 {
142} __attribute__ ((__packed__)); 142} __attribute__ ((__packed__));
143 143
144/* PHY RX Status 0 */ 144/* PHY RX Status 0 */
145#define B43_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */ 145#define B43_RX_PHYST0_GAINCTL 0x4000 /* Gain Control */
146#define B43_RX_PHYST0_PLCPHCF 0x0200 146#define B43_RX_PHYST0_PLCPHCF 0x0200
147#define B43_RX_PHYST0_PLCPFV 0x0100 147#define B43_RX_PHYST0_PLCPFV 0x0100
148#define B43_RX_PHYST0_SHORTPRMBL 0x0080 /* Received with Short Preamble */ 148#define B43_RX_PHYST0_SHORTPRMBL 0x0080 /* Received with Short Preamble */
149#define B43_RX_PHYST0_LCRS 0x0040 149#define B43_RX_PHYST0_LCRS 0x0040
150#define B43_RX_PHYST0_ANT 0x0020 /* Antenna */ 150#define B43_RX_PHYST0_ANT 0x0020 /* Antenna */
151#define B43_RX_PHYST0_UNSRATE 0x0010 151#define B43_RX_PHYST0_UNSRATE 0x0010
152#define B43_RX_PHYST0_CLIP 0x000C 152#define B43_RX_PHYST0_CLIP 0x000C
153#define B43_RX_PHYST0_CLIP_SHIFT 2 153#define B43_RX_PHYST0_CLIP_SHIFT 2
154#define B43_RX_PHYST0_FTYPE 0x0003 /* Frame type */ 154#define B43_RX_PHYST0_FTYPE 0x0003 /* Frame type */
155#define B43_RX_PHYST0_CCK 0x0000 /* Frame type: CCK */ 155#define B43_RX_PHYST0_CCK 0x0000 /* Frame type: CCK */
156#define B43_RX_PHYST0_OFDM 0x0001 /* Frame type: OFDM */ 156#define B43_RX_PHYST0_OFDM 0x0001 /* Frame type: OFDM */
157#define B43_RX_PHYST0_PRE_N 0x0002 /* Pre-standard N-PHY frame */ 157#define B43_RX_PHYST0_PRE_N 0x0002 /* Pre-standard N-PHY frame */
158#define B43_RX_PHYST0_STD_N 0x0003 /* Standard N-PHY frame */ 158#define B43_RX_PHYST0_STD_N 0x0003 /* Standard N-PHY frame */
159 159
160/* PHY RX Status 2 */ 160/* PHY RX Status 2 */
161#define B43_RX_PHYST2_LNAG 0xC000 /* LNA Gain */ 161#define B43_RX_PHYST2_LNAG 0xC000 /* LNA Gain */
162#define B43_RX_PHYST2_LNAG_SHIFT 14 162#define B43_RX_PHYST2_LNAG_SHIFT 14
163#define B43_RX_PHYST2_PNAG 0x3C00 /* PNA Gain */ 163#define B43_RX_PHYST2_PNAG 0x3C00 /* PNA Gain */
164#define B43_RX_PHYST2_PNAG_SHIFT 10 164#define B43_RX_PHYST2_PNAG_SHIFT 10
165#define B43_RX_PHYST2_FOFF 0x03FF /* F offset */ 165#define B43_RX_PHYST2_FOFF 0x03FF /* F offset */
166 166
167/* PHY RX Status 3 */ 167/* PHY RX Status 3 */
168#define B43_RX_PHYST3_DIGG 0x1800 /* DIG Gain */ 168#define B43_RX_PHYST3_DIGG 0x1800 /* DIG Gain */
169#define B43_RX_PHYST3_DIGG_SHIFT 11 169#define B43_RX_PHYST3_DIGG_SHIFT 11
170#define B43_RX_PHYST3_TRSTATE 0x0400 /* TR state */ 170#define B43_RX_PHYST3_TRSTATE 0x0400 /* TR state */
171 171
172/* MAC RX Status */ 172/* MAC RX Status */
173#define B43_RX_MAC_BEACONSENT 0x00008000 /* Beacon send flag */ 173#define B43_RX_MAC_RXST_VALID 0x01000000 /* PHY RXST valid */
174#define B43_RX_MAC_KEYIDX 0x000007E0 /* Key index */ 174#define B43_RX_MAC_TKIP_MICERR 0x00100000 /* TKIP MIC error */
175#define B43_RX_MAC_KEYIDX_SHIFT 5 175#define B43_RX_MAC_TKIP_MICATT 0x00080000 /* TKIP MIC attempted */
176#define B43_RX_MAC_DECERR 0x00000010 /* Decrypt error */ 176#define B43_RX_MAC_AGGTYPE 0x00060000 /* Aggregation type */
177#define B43_RX_MAC_DEC 0x00000008 /* Decryption attempted */ 177#define B43_RX_MAC_AGGTYPE_SHIFT 17
178#define B43_RX_MAC_PADDING 0x00000004 /* Pad bytes present */ 178#define B43_RX_MAC_AMSDU 0x00010000 /* A-MSDU mask */
179#define B43_RX_MAC_RESP 0x00000002 /* Response frame transmitted */ 179#define B43_RX_MAC_BEACONSENT 0x00008000 /* Beacon sent flag */
180#define B43_RX_MAC_FCSERR 0x00000001 /* FCS error */ 180#define B43_RX_MAC_KEYIDX 0x000007E0 /* Key index */
181#define B43_RX_MAC_KEYIDX_SHIFT 5
182#define B43_RX_MAC_DECERR 0x00000010 /* Decrypt error */
183#define B43_RX_MAC_DEC 0x00000008 /* Decryption attempted */
184#define B43_RX_MAC_PADDING 0x00000004 /* Pad bytes present */
185#define B43_RX_MAC_RESP 0x00000002 /* Response frame transmitted */
186#define B43_RX_MAC_FCSERR 0x00000001 /* FCS error */
181 187
182/* RX channel */ 188/* RX channel */
183#define B43_RX_CHAN_GAIN 0xFC00 /* Gain */ 189#define B43_RX_CHAN_40MHZ 0x1000 /* 40 Mhz channel width */
184#define B43_RX_CHAN_GAIN_SHIFT 10 190#define B43_RX_CHAN_5GHZ 0x0800 /* 5 Ghz band */
185#define B43_RX_CHAN_ID 0x03FC /* Channel ID */ 191#define B43_RX_CHAN_ID 0x07F8 /* Channel ID */
186#define B43_RX_CHAN_ID_SHIFT 2 192#define B43_RX_CHAN_ID_SHIFT 3
187#define B43_RX_CHAN_PHYTYPE 0x0003 /* PHY type */ 193#define B43_RX_CHAN_PHYTYPE 0x0007 /* PHY type */
194
188 195
189u8 b43_plcp_get_ratecode_cck(const u8 bitrate); 196u8 b43_plcp_get_ratecode_cck(const u8 bitrate);
190u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate); 197u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate);