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authorMichael Chan <mchan@broadcom.com>2008-07-15 01:39:03 -0400
committerDavid S. Miller <davem@davemloft.net>2008-07-15 01:39:03 -0400
commit7c62e83beb1446d690ed921beddb0dcf34c9baa9 (patch)
tree1961273dd946f6b82bb7831dbcd56a422d83c97f /drivers/net
parenta2f138900d5c342742c369293edaf92d2173c92e (diff)
bnx2: Allow flexible VLAN tag settings.
Negotiate with boot code and ASF firmware to see if it can support keeping VLAN tags in the RX packets. If supported by firmware, the VLAN tag will be kept in the RX packet unless VLAN acceleration is registered. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/bnx2.c44
-rw-r--r--drivers/net/bnx2.h6
2 files changed, 33 insertions, 17 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 4dfd43917aea..2d0213ed6e7d 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -4255,35 +4255,43 @@ nvram_write_end:
4255} 4255}
4256 4256
4257static void 4257static void
4258bnx2_init_remote_phy(struct bnx2 *bp) 4258bnx2_init_fw_cap(struct bnx2 *bp)
4259{ 4259{
4260 u32 val; 4260 u32 val, sig = 0;
4261 4261
4262 bp->phy_flags &= ~BNX2_PHY_FLAG_REMOTE_PHY_CAP; 4262 bp->phy_flags &= ~BNX2_PHY_FLAG_REMOTE_PHY_CAP;
4263 if (!(bp->phy_flags & BNX2_PHY_FLAG_SERDES)) 4263 bp->flags &= ~BNX2_FLAG_CAN_KEEP_VLAN;
4264 return; 4264
4265 if (!(bp->flags & BNX2_FLAG_ASF_ENABLE))
4266 bp->flags |= BNX2_FLAG_CAN_KEEP_VLAN;
4265 4267
4266 val = bnx2_shmem_rd(bp, BNX2_FW_CAP_MB); 4268 val = bnx2_shmem_rd(bp, BNX2_FW_CAP_MB);
4267 if ((val & BNX2_FW_CAP_SIGNATURE_MASK) != BNX2_FW_CAP_SIGNATURE) 4269 if ((val & BNX2_FW_CAP_SIGNATURE_MASK) != BNX2_FW_CAP_SIGNATURE)
4268 return; 4270 return;
4269 4271
4270 if (val & BNX2_FW_CAP_REMOTE_PHY_CAPABLE) { 4272 if ((val & BNX2_FW_CAP_CAN_KEEP_VLAN) == BNX2_FW_CAP_CAN_KEEP_VLAN) {
4273 bp->flags |= BNX2_FLAG_CAN_KEEP_VLAN;
4274 sig |= BNX2_DRV_ACK_CAP_SIGNATURE | BNX2_FW_CAP_CAN_KEEP_VLAN;
4275 }
4276
4277 if ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) &&
4278 (val & BNX2_FW_CAP_REMOTE_PHY_CAPABLE)) {
4279 u32 link;
4280
4271 bp->phy_flags |= BNX2_PHY_FLAG_REMOTE_PHY_CAP; 4281 bp->phy_flags |= BNX2_PHY_FLAG_REMOTE_PHY_CAP;
4272 4282
4273 val = bnx2_shmem_rd(bp, BNX2_LINK_STATUS); 4283 link = bnx2_shmem_rd(bp, BNX2_LINK_STATUS);
4274 if (val & BNX2_LINK_STATUS_SERDES_LINK) 4284 if (link & BNX2_LINK_STATUS_SERDES_LINK)
4275 bp->phy_port = PORT_FIBRE; 4285 bp->phy_port = PORT_FIBRE;
4276 else 4286 else
4277 bp->phy_port = PORT_TP; 4287 bp->phy_port = PORT_TP;
4278 4288
4279 if (netif_running(bp->dev)) { 4289 sig |= BNX2_DRV_ACK_CAP_SIGNATURE |
4280 u32 sig; 4290 BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
4281
4282 sig = BNX2_DRV_ACK_CAP_SIGNATURE |
4283 BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
4284 bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig);
4285 }
4286 } 4291 }
4292
4293 if (netif_running(bp->dev) && sig)
4294 bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig);
4287} 4295}
4288 4296
4289static void 4297static void
@@ -4380,7 +4388,7 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
4380 4388
4381 spin_lock_bh(&bp->phy_lock); 4389 spin_lock_bh(&bp->phy_lock);
4382 old_port = bp->phy_port; 4390 old_port = bp->phy_port;
4383 bnx2_init_remote_phy(bp); 4391 bnx2_init_fw_cap(bp);
4384 if ((bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) && 4392 if ((bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) &&
4385 old_port != bp->phy_port) 4393 old_port != bp->phy_port)
4386 bnx2_set_default_remote_link(bp); 4394 bnx2_set_default_remote_link(bp);
@@ -5879,6 +5887,8 @@ bnx2_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp)
5879 5887
5880 bp->vlgrp = vlgrp; 5888 bp->vlgrp = vlgrp;
5881 bnx2_set_rx_mode(dev); 5889 bnx2_set_rx_mode(dev);
5890 if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN)
5891 bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE, 0, 1);
5882 5892
5883 bnx2_netif_start(bp); 5893 bnx2_netif_start(bp);
5884} 5894}
@@ -7483,8 +7493,6 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7483 if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G) 7493 if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
7484 bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE; 7494 bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;
7485 } 7495 }
7486 bnx2_init_remote_phy(bp);
7487
7488 } else if (CHIP_NUM(bp) == CHIP_NUM_5706 || 7496 } else if (CHIP_NUM(bp) == CHIP_NUM_5706 ||
7489 CHIP_NUM(bp) == CHIP_NUM_5708) 7497 CHIP_NUM(bp) == CHIP_NUM_5708)
7490 bp->phy_flags |= BNX2_PHY_FLAG_CRC_FIX; 7498 bp->phy_flags |= BNX2_PHY_FLAG_CRC_FIX;
@@ -7493,6 +7501,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7493 CHIP_REV(bp) == CHIP_REV_Bx)) 7501 CHIP_REV(bp) == CHIP_REV_Bx))
7494 bp->phy_flags |= BNX2_PHY_FLAG_DIS_EARLY_DAC; 7502 bp->phy_flags |= BNX2_PHY_FLAG_DIS_EARLY_DAC;
7495 7503
7504 bnx2_init_fw_cap(bp);
7505
7496 if ((CHIP_ID(bp) == CHIP_ID_5708_A0) || 7506 if ((CHIP_ID(bp) == CHIP_ID_5708_A0) ||
7497 (CHIP_ID(bp) == CHIP_ID_5708_B0) || 7507 (CHIP_ID(bp) == CHIP_ID_5708_B0) ||
7498 (CHIP_ID(bp) == CHIP_ID_5708_B1)) { 7508 (CHIP_ID(bp) == CHIP_ID_5708_B1)) {
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index efa0ca9a8fd3..7b882fd9d57f 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6670,6 +6670,7 @@ struct bnx2 {
6670#define BNX2_FLAG_USING_MSI_OR_MSIX (BNX2_FLAG_USING_MSI | \ 6670#define BNX2_FLAG_USING_MSI_OR_MSIX (BNX2_FLAG_USING_MSI | \
6671 BNX2_FLAG_USING_MSIX) 6671 BNX2_FLAG_USING_MSIX)
6672#define BNX2_FLAG_JUMBO_BROKEN 0x00000800 6672#define BNX2_FLAG_JUMBO_BROKEN 0x00000800
6673#define BNX2_FLAG_CAN_KEEP_VLAN 0x00001000
6673 6674
6674 struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC]; 6675 struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC];
6675 6676
@@ -6951,6 +6952,7 @@ struct fw_info {
6951#define BNX2_DRV_MSG_CODE_DIAG 0x07000000 6952#define BNX2_DRV_MSG_CODE_DIAG 0x07000000
6952#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000 6953#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
6953#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000 6954#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000
6955#define BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE 0x0d000000
6954#define BNX2_DRV_MSG_CODE_CMD_SET_LINK 0x10000000 6956#define BNX2_DRV_MSG_CODE_CMD_SET_LINK 0x10000000
6955 6957
6956#define BNX2_DRV_MSG_DATA 0x00ff0000 6958#define BNX2_DRV_MSG_DATA 0x00ff0000
@@ -7279,6 +7281,10 @@ struct fw_info {
7279#define BNX2_FW_CAP_SIGNATURE_MASK 0xffff0000 7281#define BNX2_FW_CAP_SIGNATURE_MASK 0xffff0000
7280#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE 0x00000001 7282#define BNX2_FW_CAP_REMOTE_PHY_CAPABLE 0x00000001
7281#define BNX2_FW_CAP_REMOTE_PHY_PRESENT 0x00000002 7283#define BNX2_FW_CAP_REMOTE_PHY_PRESENT 0x00000002
7284#define BNX2_FW_CAP_MFW_CAN_KEEP_VLAN 0x00000008
7285#define BNX2_FW_CAP_BC_CAN_KEEP_VLAN 0x00000010
7286#define BNX2_FW_CAP_CAN_KEEP_VLAN (BNX2_FW_CAP_BC_CAN_KEEP_VLAN | \
7287 BNX2_FW_CAP_MFW_CAN_KEEP_VLAN)
7282 7288
7283#define BNX2_RPHY_SIGNATURE 0x36c 7289#define BNX2_RPHY_SIGNATURE 0x36c
7284#define BNX2_RPHY_LOAD_SIGNATURE 0x5a5a5a5a 7290#define BNX2_RPHY_LOAD_SIGNATURE 0x5a5a5a5a