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authorAlexander Duyck <alexander.h.duyck@intel.com>2011-12-08 01:36:28 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-01-02 20:41:34 -0500
commitf131a6c07ec0eb9d00f99af18be52a6da0458e82 (patch)
tree922fbfa0c2ee5e80708dc219ed9522c083e7a767 /drivers/net
parent455ffa607f0efa90c9fec99604553b7cdd5274b2 (diff)
ixgbevf: Fix register defines to correctly handle complex expressions
This patch is meant to address possible issues with the IXGBEVF register defines generating incorrect values when given a complex expression for the register offset. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/intel/ixgbevf/mbx.h4
-rw-r--r--drivers/net/ethernet/intel/ixgbevf/regs.h42
2 files changed, 23 insertions, 23 deletions
diff --git a/drivers/net/ethernet/intel/ixgbevf/mbx.h b/drivers/net/ethernet/intel/ixgbevf/mbx.h
index ea393eb03f3a..9d38a94a348a 100644
--- a/drivers/net/ethernet/intel/ixgbevf/mbx.h
+++ b/drivers/net/ethernet/intel/ixgbevf/mbx.h
@@ -47,8 +47,8 @@
47#define IXGBE_VFMAILBOX_RSTD 0x00000080 /* PF has indicated reset done */ 47#define IXGBE_VFMAILBOX_RSTD 0x00000080 /* PF has indicated reset done */
48#define IXGBE_VFMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */ 48#define IXGBE_VFMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */
49 49
50#define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * x)) 50#define IXGBE_PFMAILBOX(x) (0x04B00 + (4 * (x)))
51#define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * vfn)) 51#define IXGBE_PFMBMEM(vfn) (0x13000 + (64 * (vfn)))
52 52
53#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */ 53#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */
54#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ 54#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */
diff --git a/drivers/net/ethernet/intel/ixgbevf/regs.h b/drivers/net/ethernet/intel/ixgbevf/regs.h
index 189200eeca26..5e4d5e5cdf38 100644
--- a/drivers/net/ethernet/intel/ixgbevf/regs.h
+++ b/drivers/net/ethernet/intel/ixgbevf/regs.h
@@ -39,29 +39,29 @@
39#define IXGBE_VTEIMC 0x0010C 39#define IXGBE_VTEIMC 0x0010C
40#define IXGBE_VTEIAC 0x00110 40#define IXGBE_VTEIAC 0x00110
41#define IXGBE_VTEIAM 0x00114 41#define IXGBE_VTEIAM 0x00114
42#define IXGBE_VTEITR(x) (0x00820 + (4 * x)) 42#define IXGBE_VTEITR(x) (0x00820 + (4 * (x)))
43#define IXGBE_VTIVAR(x) (0x00120 + (4 * x)) 43#define IXGBE_VTIVAR(x) (0x00120 + (4 * (x)))
44#define IXGBE_VTIVAR_MISC 0x00140 44#define IXGBE_VTIVAR_MISC 0x00140
45#define IXGBE_VTRSCINT(x) (0x00180 + (4 * x)) 45#define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x)))
46#define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * x)) 46#define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x)))
47#define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * x)) 47#define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x)))
48#define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * x)) 48#define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x)))
49#define IXGBE_VFRDH(x) (0x01010 + (0x40 * x)) 49#define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x)))
50#define IXGBE_VFRDT(x) (0x01018 + (0x40 * x)) 50#define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x)))
51#define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * x)) 51#define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x)))
52#define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * x)) 52#define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x)))
53#define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * x)) 53#define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x)))
54#define IXGBE_VFPSRTYPE 0x00300 54#define IXGBE_VFPSRTYPE 0x00300
55#define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * x)) 55#define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x)))
56#define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * x)) 56#define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x)))
57#define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * x)) 57#define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x)))
58#define IXGBE_VFTDH(x) (0x02010 + (0x40 * x)) 58#define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x)))
59#define IXGBE_VFTDT(x) (0x02018 + (0x40 * x)) 59#define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x)))
60#define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * x)) 60#define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x)))
61#define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * x)) 61#define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x)))
62#define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * x)) 62#define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x)))
63#define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * x)) 63#define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x)))
64#define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * x)) 64#define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x)))
65#define IXGBE_VFGPRC 0x0101C 65#define IXGBE_VFGPRC 0x0101C
66#define IXGBE_VFGPTC 0x0201C 66#define IXGBE_VFGPTC 0x0201C
67#define IXGBE_VFGORC_LSB 0x01020 67#define IXGBE_VFGORC_LSB 0x01020