diff options
author | Vladislav Zolotarov <vladz@broadcom.com> | 2011-07-23 23:54:17 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-07-24 16:11:40 -0400 |
commit | d6cae2385f00522b3da8a5f964bf8dfa32a0d138 (patch) | |
tree | 761f7a846115cad968aeb7d545f189cd0ded169e /drivers/net | |
parent | 1cb0c788e03da59f14699530aa031a07a89f0056 (diff) |
bnx2x: count statistic ramrods on EQ to prevent MC assert
This patch includes:
- Counting statistics ramrods as EQ ramrods the way they should be. This
accounting is meant to prevent MC asserts in case of software bugs.
- Fixes in debug facilities which were added while working on one of such
bugs.
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_main.c | 63 |
1 files changed, 32 insertions, 31 deletions
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index ad4a55e4f6e8..008826c1aaad 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -1671,11 +1671,12 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) | |||
1671 | 1671 | ||
1672 | switch (command) { | 1672 | switch (command) { |
1673 | case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE): | 1673 | case (RAMROD_CMD_ID_ETH_CLIENT_UPDATE): |
1674 | DP(NETIF_MSG_IFUP, "got UPDATE ramrod. CID %d\n", cid); | 1674 | DP(BNX2X_MSG_SP, "got UPDATE ramrod. CID %d\n", cid); |
1675 | drv_cmd = BNX2X_Q_CMD_UPDATE; | 1675 | drv_cmd = BNX2X_Q_CMD_UPDATE; |
1676 | break; | 1676 | break; |
1677 | |||
1677 | case (RAMROD_CMD_ID_ETH_CLIENT_SETUP): | 1678 | case (RAMROD_CMD_ID_ETH_CLIENT_SETUP): |
1678 | DP(NETIF_MSG_IFUP, "got MULTI[%d] setup ramrod\n", cid); | 1679 | DP(BNX2X_MSG_SP, "got MULTI[%d] setup ramrod\n", cid); |
1679 | drv_cmd = BNX2X_Q_CMD_SETUP; | 1680 | drv_cmd = BNX2X_Q_CMD_SETUP; |
1680 | break; | 1681 | break; |
1681 | 1682 | ||
@@ -1685,17 +1686,17 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) | |||
1685 | break; | 1686 | break; |
1686 | 1687 | ||
1687 | case (RAMROD_CMD_ID_ETH_HALT): | 1688 | case (RAMROD_CMD_ID_ETH_HALT): |
1688 | DP(NETIF_MSG_IFDOWN, "got MULTI[%d] halt ramrod\n", cid); | 1689 | DP(BNX2X_MSG_SP, "got MULTI[%d] halt ramrod\n", cid); |
1689 | drv_cmd = BNX2X_Q_CMD_HALT; | 1690 | drv_cmd = BNX2X_Q_CMD_HALT; |
1690 | break; | 1691 | break; |
1691 | 1692 | ||
1692 | case (RAMROD_CMD_ID_ETH_TERMINATE): | 1693 | case (RAMROD_CMD_ID_ETH_TERMINATE): |
1693 | DP(NETIF_MSG_IFDOWN, "got MULTI[%d] teminate ramrod\n", cid); | 1694 | DP(BNX2X_MSG_SP, "got MULTI[%d] teminate ramrod\n", cid); |
1694 | drv_cmd = BNX2X_Q_CMD_TERMINATE; | 1695 | drv_cmd = BNX2X_Q_CMD_TERMINATE; |
1695 | break; | 1696 | break; |
1696 | 1697 | ||
1697 | case (RAMROD_CMD_ID_ETH_EMPTY): | 1698 | case (RAMROD_CMD_ID_ETH_EMPTY): |
1698 | DP(NETIF_MSG_IFDOWN, "got MULTI[%d] empty ramrod\n", cid); | 1699 | DP(BNX2X_MSG_SP, "got MULTI[%d] empty ramrod\n", cid); |
1699 | drv_cmd = BNX2X_Q_CMD_EMPTY; | 1700 | drv_cmd = BNX2X_Q_CMD_EMPTY; |
1700 | break; | 1701 | break; |
1701 | 1702 | ||
@@ -1725,6 +1726,8 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) | |||
1725 | /* push the change in bp->spq_left and towards the memory */ | 1726 | /* push the change in bp->spq_left and towards the memory */ |
1726 | smp_mb__after_atomic_inc(); | 1727 | smp_mb__after_atomic_inc(); |
1727 | 1728 | ||
1729 | DP(BNX2X_MSG_SP, "bp->cq_spq_left %x\n", atomic_read(&bp->cq_spq_left)); | ||
1730 | |||
1728 | return; | 1731 | return; |
1729 | } | 1732 | } |
1730 | 1733 | ||
@@ -3089,26 +3092,23 @@ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, | |||
3089 | spe->data.update_data_addr.hi = cpu_to_le32(data_hi); | 3092 | spe->data.update_data_addr.hi = cpu_to_le32(data_hi); |
3090 | spe->data.update_data_addr.lo = cpu_to_le32(data_lo); | 3093 | spe->data.update_data_addr.lo = cpu_to_le32(data_lo); |
3091 | 3094 | ||
3092 | /* stats ramrod has it's own slot on the spq */ | 3095 | /* |
3093 | if (command != RAMROD_CMD_ID_COMMON_STAT_QUERY) { | 3096 | * It's ok if the actual decrement is issued towards the memory |
3094 | /* | 3097 | * somewhere between the spin_lock and spin_unlock. Thus no |
3095 | * It's ok if the actual decrement is issued towards the memory | 3098 | * more explict memory barrier is needed. |
3096 | * somewhere between the spin_lock and spin_unlock. Thus no | 3099 | */ |
3097 | * more explict memory barrier is needed. | 3100 | if (common) |
3098 | */ | 3101 | atomic_dec(&bp->eq_spq_left); |
3099 | if (common) | 3102 | else |
3100 | atomic_dec(&bp->eq_spq_left); | 3103 | atomic_dec(&bp->cq_spq_left); |
3101 | else | ||
3102 | atomic_dec(&bp->cq_spq_left); | ||
3103 | } | ||
3104 | 3104 | ||
3105 | 3105 | ||
3106 | DP(BNX2X_MSG_SP/*NETIF_MSG_TIMER*/, | 3106 | DP(BNX2X_MSG_SP/*NETIF_MSG_TIMER*/, |
3107 | "SPQE[%x] (%x:%x) command %d hw_cid %x data (%x:%x) " | 3107 | "SPQE[%x] (%x:%x) (cmd, common?) (%d,%d) hw_cid %x data (%x:%x) " |
3108 | "type(0x%x) left (ETH, COMMON) (%x,%x)\n", | 3108 | "type(0x%x) left (CQ, EQ) (%x,%x)\n", |
3109 | bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping), | 3109 | bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping), |
3110 | (u32)(U64_LO(bp->spq_mapping) + | 3110 | (u32)(U64_LO(bp->spq_mapping) + |
3111 | (void *)bp->spq_prod_bd - (void *)bp->spq), command, | 3111 | (void *)bp->spq_prod_bd - (void *)bp->spq), command, common, |
3112 | HW_CID(bp, cid), data_hi, data_lo, type, | 3112 | HW_CID(bp, cid), data_hi, data_lo, type, |
3113 | atomic_read(&bp->cq_spq_left), atomic_read(&bp->eq_spq_left)); | 3113 | atomic_read(&bp->cq_spq_left), atomic_read(&bp->eq_spq_left)); |
3114 | 3114 | ||
@@ -3465,6 +3465,7 @@ static inline void bnx2x_attn_int_deasserted3(struct bnx2x *bp, u32 attn) | |||
3465 | } else if (attn & BNX2X_MC_ASSERT_BITS) { | 3465 | } else if (attn & BNX2X_MC_ASSERT_BITS) { |
3466 | 3466 | ||
3467 | BNX2X_ERR("MC assert!\n"); | 3467 | BNX2X_ERR("MC assert!\n"); |
3468 | bnx2x_mc_assert(bp); | ||
3468 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_10, 0); | 3469 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_10, 0); |
3469 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_9, 0); | 3470 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_9, 0); |
3470 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_8, 0); | 3471 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_8, 0); |
@@ -4424,7 +4425,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4424 | sw_cons = bp->eq_cons; | 4425 | sw_cons = bp->eq_cons; |
4425 | sw_prod = bp->eq_prod; | 4426 | sw_prod = bp->eq_prod; |
4426 | 4427 | ||
4427 | DP(BNX2X_MSG_SP, "EQ: hw_cons %u sw_cons %u bp->cq_spq_left %u\n", | 4428 | DP(BNX2X_MSG_SP, "EQ: hw_cons %u sw_cons %u bp->eq_spq_left %x\n", |
4428 | hw_cons, sw_cons, atomic_read(&bp->eq_spq_left)); | 4429 | hw_cons, sw_cons, atomic_read(&bp->eq_spq_left)); |
4429 | 4430 | ||
4430 | for (; sw_cons != hw_cons; | 4431 | for (; sw_cons != hw_cons; |
@@ -4443,7 +4444,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4443 | DP(NETIF_MSG_TIMER, "got statistics comp event %d\n", | 4444 | DP(NETIF_MSG_TIMER, "got statistics comp event %d\n", |
4444 | bp->stats_comp++); | 4445 | bp->stats_comp++); |
4445 | /* nothing to do with stats comp */ | 4446 | /* nothing to do with stats comp */ |
4446 | continue; | 4447 | goto next_spqe; |
4447 | 4448 | ||
4448 | case EVENT_RING_OPCODE_CFC_DEL: | 4449 | case EVENT_RING_OPCODE_CFC_DEL: |
4449 | /* handle according to cid range */ | 4450 | /* handle according to cid range */ |
@@ -4451,7 +4452,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4451 | * we may want to verify here that the bp state is | 4452 | * we may want to verify here that the bp state is |
4452 | * HALTING | 4453 | * HALTING |
4453 | */ | 4454 | */ |
4454 | DP(NETIF_MSG_IFDOWN, | 4455 | DP(BNX2X_MSG_SP, |
4455 | "got delete ramrod for MULTI[%d]\n", cid); | 4456 | "got delete ramrod for MULTI[%d]\n", cid); |
4456 | #ifdef BCM_CNIC | 4457 | #ifdef BCM_CNIC |
4457 | if (!bnx2x_cnic_handle_cfc_del(bp, cid, elem)) | 4458 | if (!bnx2x_cnic_handle_cfc_del(bp, cid, elem)) |
@@ -4467,7 +4468,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4467 | goto next_spqe; | 4468 | goto next_spqe; |
4468 | 4469 | ||
4469 | case EVENT_RING_OPCODE_STOP_TRAFFIC: | 4470 | case EVENT_RING_OPCODE_STOP_TRAFFIC: |
4470 | DP(NETIF_MSG_IFUP, "got STOP TRAFFIC\n"); | 4471 | DP(BNX2X_MSG_SP, "got STOP TRAFFIC\n"); |
4471 | if (f_obj->complete_cmd(bp, f_obj, | 4472 | if (f_obj->complete_cmd(bp, f_obj, |
4472 | BNX2X_F_CMD_TX_STOP)) | 4473 | BNX2X_F_CMD_TX_STOP)) |
4473 | break; | 4474 | break; |
@@ -4475,21 +4476,21 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4475 | goto next_spqe; | 4476 | goto next_spqe; |
4476 | 4477 | ||
4477 | case EVENT_RING_OPCODE_START_TRAFFIC: | 4478 | case EVENT_RING_OPCODE_START_TRAFFIC: |
4478 | DP(NETIF_MSG_IFUP, "got START TRAFFIC\n"); | 4479 | DP(BNX2X_MSG_SP, "got START TRAFFIC\n"); |
4479 | if (f_obj->complete_cmd(bp, f_obj, | 4480 | if (f_obj->complete_cmd(bp, f_obj, |
4480 | BNX2X_F_CMD_TX_START)) | 4481 | BNX2X_F_CMD_TX_START)) |
4481 | break; | 4482 | break; |
4482 | bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED); | 4483 | bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED); |
4483 | goto next_spqe; | 4484 | goto next_spqe; |
4484 | case EVENT_RING_OPCODE_FUNCTION_START: | 4485 | case EVENT_RING_OPCODE_FUNCTION_START: |
4485 | DP(NETIF_MSG_IFUP, "got FUNC_START ramrod\n"); | 4486 | DP(BNX2X_MSG_SP, "got FUNC_START ramrod\n"); |
4486 | if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_START)) | 4487 | if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_START)) |
4487 | break; | 4488 | break; |
4488 | 4489 | ||
4489 | goto next_spqe; | 4490 | goto next_spqe; |
4490 | 4491 | ||
4491 | case EVENT_RING_OPCODE_FUNCTION_STOP: | 4492 | case EVENT_RING_OPCODE_FUNCTION_STOP: |
4492 | DP(NETIF_MSG_IFDOWN, "got FUNC_STOP ramrod\n"); | 4493 | DP(BNX2X_MSG_SP, "got FUNC_STOP ramrod\n"); |
4493 | if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_STOP)) | 4494 | if (f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_STOP)) |
4494 | break; | 4495 | break; |
4495 | 4496 | ||
@@ -4503,7 +4504,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4503 | BNX2X_STATE_OPENING_WAIT4_PORT): | 4504 | BNX2X_STATE_OPENING_WAIT4_PORT): |
4504 | cid = elem->message.data.eth_event.echo & | 4505 | cid = elem->message.data.eth_event.echo & |
4505 | BNX2X_SWCID_MASK; | 4506 | BNX2X_SWCID_MASK; |
4506 | DP(NETIF_MSG_IFUP, "got RSS_UPDATE ramrod. CID %d\n", | 4507 | DP(BNX2X_MSG_SP, "got RSS_UPDATE ramrod. CID %d\n", |
4507 | cid); | 4508 | cid); |
4508 | rss_raw->clear_pending(rss_raw); | 4509 | rss_raw->clear_pending(rss_raw); |
4509 | break; | 4510 | break; |
@@ -4518,7 +4519,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4518 | BNX2X_STATE_DIAG): | 4519 | BNX2X_STATE_DIAG): |
4519 | case (EVENT_RING_OPCODE_CLASSIFICATION_RULES | | 4520 | case (EVENT_RING_OPCODE_CLASSIFICATION_RULES | |
4520 | BNX2X_STATE_CLOSING_WAIT4_HALT): | 4521 | BNX2X_STATE_CLOSING_WAIT4_HALT): |
4521 | DP(NETIF_MSG_IFUP, "got (un)set mac ramrod\n"); | 4522 | DP(BNX2X_MSG_SP, "got (un)set mac ramrod\n"); |
4522 | bnx2x_handle_classification_eqe(bp, elem); | 4523 | bnx2x_handle_classification_eqe(bp, elem); |
4523 | break; | 4524 | break; |
4524 | 4525 | ||
@@ -4528,7 +4529,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4528 | BNX2X_STATE_DIAG): | 4529 | BNX2X_STATE_DIAG): |
4529 | case (EVENT_RING_OPCODE_MULTICAST_RULES | | 4530 | case (EVENT_RING_OPCODE_MULTICAST_RULES | |
4530 | BNX2X_STATE_CLOSING_WAIT4_HALT): | 4531 | BNX2X_STATE_CLOSING_WAIT4_HALT): |
4531 | DP(NETIF_MSG_IFUP, "got mcast ramrod\n"); | 4532 | DP(BNX2X_MSG_SP, "got mcast ramrod\n"); |
4532 | bnx2x_handle_mcast_eqe(bp); | 4533 | bnx2x_handle_mcast_eqe(bp); |
4533 | break; | 4534 | break; |
4534 | 4535 | ||
@@ -4538,7 +4539,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) | |||
4538 | BNX2X_STATE_DIAG): | 4539 | BNX2X_STATE_DIAG): |
4539 | case (EVENT_RING_OPCODE_FILTERS_RULES | | 4540 | case (EVENT_RING_OPCODE_FILTERS_RULES | |
4540 | BNX2X_STATE_CLOSING_WAIT4_HALT): | 4541 | BNX2X_STATE_CLOSING_WAIT4_HALT): |
4541 | DP(NETIF_MSG_IFUP, "got rx_mode ramrod\n"); | 4542 | DP(BNX2X_MSG_SP, "got rx_mode ramrod\n"); |
4542 | bnx2x_handle_rx_mode_eqe(bp); | 4543 | bnx2x_handle_rx_mode_eqe(bp); |
4543 | break; | 4544 | break; |
4544 | default: | 4545 | default: |