diff options
author | David S. Miller <davem@davemloft.net> | 2013-10-23 16:28:39 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-10-23 16:49:34 -0400 |
commit | c3fa32b9764dc45dcf8a2231b1c110abc4a63e0b (patch) | |
tree | 6cf2896a77b65bec64284681e1c3851eb3263e09 /drivers/net | |
parent | 34d92d5315b64a3e5292b7e9511c1bb617227fb6 (diff) | |
parent | 320437af954cbe66478f1f5e8b34cb5a8d072191 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
drivers/net/usb/qmi_wwan.c
include/net/dst.h
Trivial merge conflicts, both were overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
41 files changed, 528 insertions, 364 deletions
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c index 64f2efaf7638..cf0f63e14e53 100644 --- a/drivers/net/can/at91_can.c +++ b/drivers/net/can/at91_can.c | |||
@@ -1405,10 +1405,10 @@ static int at91_can_remove(struct platform_device *pdev) | |||
1405 | 1405 | ||
1406 | static const struct platform_device_id at91_can_id_table[] = { | 1406 | static const struct platform_device_id at91_can_id_table[] = { |
1407 | { | 1407 | { |
1408 | .name = "at91_can", | 1408 | .name = "at91sam9x5_can", |
1409 | .driver_data = (kernel_ulong_t)&at91_at91sam9x5_data, | 1409 | .driver_data = (kernel_ulong_t)&at91_at91sam9x5_data, |
1410 | }, { | 1410 | }, { |
1411 | .name = "at91sam9x5_can", | 1411 | .name = "at91_can", |
1412 | .driver_data = (kernel_ulong_t)&at91_at91sam9263_data, | 1412 | .driver_data = (kernel_ulong_t)&at91_at91sam9263_data, |
1413 | }, { | 1413 | }, { |
1414 | /* sentinel */ | 1414 | /* sentinel */ |
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index df010d64ecbb..ae08cf129ebb 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c | |||
@@ -62,7 +62,7 @@ | |||
62 | #define FLEXCAN_MCR_BCC BIT(16) | 62 | #define FLEXCAN_MCR_BCC BIT(16) |
63 | #define FLEXCAN_MCR_LPRIO_EN BIT(13) | 63 | #define FLEXCAN_MCR_LPRIO_EN BIT(13) |
64 | #define FLEXCAN_MCR_AEN BIT(12) | 64 | #define FLEXCAN_MCR_AEN BIT(12) |
65 | #define FLEXCAN_MCR_MAXMB(x) ((x) & 0xf) | 65 | #define FLEXCAN_MCR_MAXMB(x) ((x) & 0x1f) |
66 | #define FLEXCAN_MCR_IDAM_A (0 << 8) | 66 | #define FLEXCAN_MCR_IDAM_A (0 << 8) |
67 | #define FLEXCAN_MCR_IDAM_B (1 << 8) | 67 | #define FLEXCAN_MCR_IDAM_B (1 << 8) |
68 | #define FLEXCAN_MCR_IDAM_C (2 << 8) | 68 | #define FLEXCAN_MCR_IDAM_C (2 << 8) |
@@ -735,9 +735,11 @@ static int flexcan_chip_start(struct net_device *dev) | |||
735 | * | 735 | * |
736 | */ | 736 | */ |
737 | reg_mcr = flexcan_read(®s->mcr); | 737 | reg_mcr = flexcan_read(®s->mcr); |
738 | reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff); | ||
738 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | | 739 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | |
739 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | | 740 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | |
740 | FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS; | 741 | FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS | |
742 | FLEXCAN_MCR_MAXMB(FLEXCAN_TX_BUF_ID); | ||
741 | netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr); | 743 | netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr); |
742 | flexcan_write(reg_mcr, ®s->mcr); | 744 | flexcan_write(reg_mcr, ®s->mcr); |
743 | 745 | ||
@@ -771,6 +773,10 @@ static int flexcan_chip_start(struct net_device *dev) | |||
771 | netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); | 773 | netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); |
772 | flexcan_write(reg_ctrl, ®s->ctrl); | 774 | flexcan_write(reg_ctrl, ®s->ctrl); |
773 | 775 | ||
776 | /* Abort any pending TX, mark Mailbox as INACTIVE */ | ||
777 | flexcan_write(FLEXCAN_MB_CNT_CODE(0x4), | ||
778 | ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); | ||
779 | |||
774 | /* acceptance mask/acceptance code (accept everything) */ | 780 | /* acceptance mask/acceptance code (accept everything) */ |
775 | flexcan_write(0x0, ®s->rxgmask); | 781 | flexcan_write(0x0, ®s->rxgmask); |
776 | flexcan_write(0x0, ®s->rx14mask); | 782 | flexcan_write(0x0, ®s->rx14mask); |
@@ -979,9 +985,9 @@ static void unregister_flexcandev(struct net_device *dev) | |||
979 | } | 985 | } |
980 | 986 | ||
981 | static const struct of_device_id flexcan_of_match[] = { | 987 | static const struct of_device_id flexcan_of_match[] = { |
982 | { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, }, | ||
983 | { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, }, | ||
984 | { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, }, | 988 | { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, }, |
989 | { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, }, | ||
990 | { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, }, | ||
985 | { /* sentinel */ }, | 991 | { /* sentinel */ }, |
986 | }; | 992 | }; |
987 | MODULE_DEVICE_TABLE(of, flexcan_of_match); | 993 | MODULE_DEVICE_TABLE(of, flexcan_of_match); |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h index 5fb18cd99da2..4e01c57d8c8d 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | |||
@@ -1197,8 +1197,9 @@ union cdu_context { | |||
1197 | /* TM (timers) host DB constants */ | 1197 | /* TM (timers) host DB constants */ |
1198 | #define TM_ILT_PAGE_SZ_HW 0 | 1198 | #define TM_ILT_PAGE_SZ_HW 0 |
1199 | #define TM_ILT_PAGE_SZ (4096 << TM_ILT_PAGE_SZ_HW) /* 4K */ | 1199 | #define TM_ILT_PAGE_SZ (4096 << TM_ILT_PAGE_SZ_HW) /* 4K */ |
1200 | /* #define TM_CONN_NUM (CNIC_STARTING_CID+CNIC_ISCSI_CXT_MAX) */ | 1200 | #define TM_CONN_NUM (BNX2X_FIRST_VF_CID + \ |
1201 | #define TM_CONN_NUM 1024 | 1201 | BNX2X_VF_CIDS + \ |
1202 | CNIC_ISCSI_CID_MAX) | ||
1202 | #define TM_ILT_SZ (8 * TM_CONN_NUM) | 1203 | #define TM_ILT_SZ (8 * TM_CONN_NUM) |
1203 | #define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ) | 1204 | #define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ) |
1204 | 1205 | ||
@@ -1527,7 +1528,6 @@ struct bnx2x { | |||
1527 | #define PCI_32BIT_FLAG (1 << 1) | 1528 | #define PCI_32BIT_FLAG (1 << 1) |
1528 | #define ONE_PORT_FLAG (1 << 2) | 1529 | #define ONE_PORT_FLAG (1 << 2) |
1529 | #define NO_WOL_FLAG (1 << 3) | 1530 | #define NO_WOL_FLAG (1 << 3) |
1530 | #define USING_DAC_FLAG (1 << 4) | ||
1531 | #define USING_MSIX_FLAG (1 << 5) | 1531 | #define USING_MSIX_FLAG (1 << 5) |
1532 | #define USING_MSI_FLAG (1 << 6) | 1532 | #define USING_MSI_FLAG (1 << 6) |
1533 | #define DISABLE_MSI_FLAG (1 << 7) | 1533 | #define DISABLE_MSI_FLAG (1 << 7) |
@@ -1622,7 +1622,7 @@ struct bnx2x { | |||
1622 | u16 rx_ticks_int; | 1622 | u16 rx_ticks_int; |
1623 | u16 rx_ticks; | 1623 | u16 rx_ticks; |
1624 | /* Maximal coalescing timeout in us */ | 1624 | /* Maximal coalescing timeout in us */ |
1625 | #define BNX2X_MAX_COALESCE_TOUT (0xf0*12) | 1625 | #define BNX2X_MAX_COALESCE_TOUT (0xff*BNX2X_BTR) |
1626 | 1626 | ||
1627 | u32 lin_cnt; | 1627 | u32 lin_cnt; |
1628 | 1628 | ||
@@ -2075,7 +2075,8 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, | |||
2075 | 2075 | ||
2076 | void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, | 2076 | void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
2077 | u8 src_type, u8 dst_type); | 2077 | u8 src_type, u8 dst_type); |
2078 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae); | 2078 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
2079 | u32 *comp); | ||
2079 | 2080 | ||
2080 | /* FLR related routines */ | 2081 | /* FLR related routines */ |
2081 | u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); | 2082 | u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); |
@@ -2495,4 +2496,8 @@ enum { | |||
2495 | #define NUM_MACS 8 | 2496 | #define NUM_MACS 8 |
2496 | 2497 | ||
2497 | void bnx2x_set_local_cmng(struct bnx2x *bp); | 2498 | void bnx2x_set_local_cmng(struct bnx2x *bp); |
2499 | |||
2500 | #define MCPR_SCRATCH_BASE(bp) \ | ||
2501 | (CHIP_IS_E1x(bp) ? MCP_REG_MCPR_SCRATCH : MCP_A_REG_MCPR_SCRATCH) | ||
2502 | |||
2498 | #endif /* bnx2x.h */ | 2503 | #endif /* bnx2x.h */ |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c index 0c64122aeaff..6e46cff5236d 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | |||
@@ -681,6 +681,7 @@ static void bnx2x_gro_receive(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
681 | } | 681 | } |
682 | } | 682 | } |
683 | #endif | 683 | #endif |
684 | skb_record_rx_queue(skb, fp->rx_queue); | ||
684 | napi_gro_receive(&fp->napi, skb); | 685 | napi_gro_receive(&fp->napi, skb); |
685 | } | 686 | } |
686 | 687 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c index 8213cc827aae..32d0f1435fb4 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | |||
@@ -894,17 +894,8 @@ static void bnx2x_get_regs(struct net_device *dev, | |||
894 | * will re-enable parity attentions right after the dump. | 894 | * will re-enable parity attentions right after the dump. |
895 | */ | 895 | */ |
896 | 896 | ||
897 | /* Disable parity on path 0 */ | ||
898 | bnx2x_pretend_func(bp, 0); | ||
899 | bnx2x_disable_blocks_parity(bp); | 897 | bnx2x_disable_blocks_parity(bp); |
900 | 898 | ||
901 | /* Disable parity on path 1 */ | ||
902 | bnx2x_pretend_func(bp, 1); | ||
903 | bnx2x_disable_blocks_parity(bp); | ||
904 | |||
905 | /* Return to current function */ | ||
906 | bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); | ||
907 | |||
908 | dump_hdr.header_size = (sizeof(struct dump_header) / 4) - 1; | 899 | dump_hdr.header_size = (sizeof(struct dump_header) / 4) - 1; |
909 | dump_hdr.preset = DUMP_ALL_PRESETS; | 900 | dump_hdr.preset = DUMP_ALL_PRESETS; |
910 | dump_hdr.version = BNX2X_DUMP_VERSION; | 901 | dump_hdr.version = BNX2X_DUMP_VERSION; |
@@ -931,18 +922,9 @@ static void bnx2x_get_regs(struct net_device *dev, | |||
931 | /* Actually read the registers */ | 922 | /* Actually read the registers */ |
932 | __bnx2x_get_regs(bp, p); | 923 | __bnx2x_get_regs(bp, p); |
933 | 924 | ||
934 | /* Re-enable parity attentions on path 0 */ | 925 | /* Re-enable parity attentions */ |
935 | bnx2x_pretend_func(bp, 0); | ||
936 | bnx2x_clear_blocks_parity(bp); | 926 | bnx2x_clear_blocks_parity(bp); |
937 | bnx2x_enable_blocks_parity(bp); | 927 | bnx2x_enable_blocks_parity(bp); |
938 | |||
939 | /* Re-enable parity attentions on path 1 */ | ||
940 | bnx2x_pretend_func(bp, 1); | ||
941 | bnx2x_clear_blocks_parity(bp); | ||
942 | bnx2x_enable_blocks_parity(bp); | ||
943 | |||
944 | /* Return to current function */ | ||
945 | bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); | ||
946 | } | 928 | } |
947 | 929 | ||
948 | static int bnx2x_get_preset_regs_len(struct net_device *dev, u32 preset) | 930 | static int bnx2x_get_preset_regs_len(struct net_device *dev, u32 preset) |
@@ -996,17 +978,8 @@ static int bnx2x_get_dump_data(struct net_device *dev, | |||
996 | * will re-enable parity attentions right after the dump. | 978 | * will re-enable parity attentions right after the dump. |
997 | */ | 979 | */ |
998 | 980 | ||
999 | /* Disable parity on path 0 */ | ||
1000 | bnx2x_pretend_func(bp, 0); | ||
1001 | bnx2x_disable_blocks_parity(bp); | 981 | bnx2x_disable_blocks_parity(bp); |
1002 | 982 | ||
1003 | /* Disable parity on path 1 */ | ||
1004 | bnx2x_pretend_func(bp, 1); | ||
1005 | bnx2x_disable_blocks_parity(bp); | ||
1006 | |||
1007 | /* Return to current function */ | ||
1008 | bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); | ||
1009 | |||
1010 | dump_hdr.header_size = (sizeof(struct dump_header) / 4) - 1; | 983 | dump_hdr.header_size = (sizeof(struct dump_header) / 4) - 1; |
1011 | dump_hdr.preset = bp->dump_preset_idx; | 984 | dump_hdr.preset = bp->dump_preset_idx; |
1012 | dump_hdr.version = BNX2X_DUMP_VERSION; | 985 | dump_hdr.version = BNX2X_DUMP_VERSION; |
@@ -1035,19 +1008,10 @@ static int bnx2x_get_dump_data(struct net_device *dev, | |||
1035 | /* Actually read the registers */ | 1008 | /* Actually read the registers */ |
1036 | __bnx2x_get_preset_regs(bp, p, dump_hdr.preset); | 1009 | __bnx2x_get_preset_regs(bp, p, dump_hdr.preset); |
1037 | 1010 | ||
1038 | /* Re-enable parity attentions on path 0 */ | 1011 | /* Re-enable parity attentions */ |
1039 | bnx2x_pretend_func(bp, 0); | ||
1040 | bnx2x_clear_blocks_parity(bp); | 1012 | bnx2x_clear_blocks_parity(bp); |
1041 | bnx2x_enable_blocks_parity(bp); | 1013 | bnx2x_enable_blocks_parity(bp); |
1042 | 1014 | ||
1043 | /* Re-enable parity attentions on path 1 */ | ||
1044 | bnx2x_pretend_func(bp, 1); | ||
1045 | bnx2x_clear_blocks_parity(bp); | ||
1046 | bnx2x_enable_blocks_parity(bp); | ||
1047 | |||
1048 | /* Return to current function */ | ||
1049 | bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); | ||
1050 | |||
1051 | return 0; | 1015 | return 0; |
1052 | } | 1016 | } |
1053 | 1017 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h index 76df015f486a..c2dfea7968f4 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h | |||
@@ -640,23 +640,35 @@ static const struct { | |||
640 | * [30] MCP Latched ump_tx_parity | 640 | * [30] MCP Latched ump_tx_parity |
641 | * [31] MCP Latched scpad_parity | 641 | * [31] MCP Latched scpad_parity |
642 | */ | 642 | */ |
643 | #define MISC_AEU_ENABLE_MCP_PRTY_BITS \ | 643 | #define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS \ |
644 | (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ | 644 | (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ |
645 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ | 645 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ |
646 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ | 646 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY) |
647 | |||
648 | #define MISC_AEU_ENABLE_MCP_PRTY_BITS \ | ||
649 | (MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS | \ | ||
647 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) | 650 | AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) |
648 | 651 | ||
649 | /* Below registers control the MCP parity attention output. When | 652 | /* Below registers control the MCP parity attention output. When |
650 | * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are | 653 | * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are |
651 | * enabled, when cleared - disabled. | 654 | * enabled, when cleared - disabled. |
652 | */ | 655 | */ |
653 | static const u32 mcp_attn_ctl_regs[] = { | 656 | static const struct { |
654 | MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, | 657 | u32 addr; |
655 | MISC_REG_AEU_ENABLE4_NIG_0, | 658 | u32 bits; |
656 | MISC_REG_AEU_ENABLE4_PXP_0, | 659 | } mcp_attn_ctl_regs[] = { |
657 | MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, | 660 | { MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, |
658 | MISC_REG_AEU_ENABLE4_NIG_1, | 661 | MISC_AEU_ENABLE_MCP_PRTY_BITS }, |
659 | MISC_REG_AEU_ENABLE4_PXP_1 | 662 | { MISC_REG_AEU_ENABLE4_NIG_0, |
663 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
664 | { MISC_REG_AEU_ENABLE4_PXP_0, | ||
665 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
666 | { MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, | ||
667 | MISC_AEU_ENABLE_MCP_PRTY_BITS }, | ||
668 | { MISC_REG_AEU_ENABLE4_NIG_1, | ||
669 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, | ||
670 | { MISC_REG_AEU_ENABLE4_PXP_1, | ||
671 | MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS } | ||
660 | }; | 672 | }; |
661 | 673 | ||
662 | static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) | 674 | static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) |
@@ -665,14 +677,14 @@ static inline void bnx2x_set_mcp_parity(struct bnx2x *bp, u8 enable) | |||
665 | u32 reg_val; | 677 | u32 reg_val; |
666 | 678 | ||
667 | for (i = 0; i < ARRAY_SIZE(mcp_attn_ctl_regs); i++) { | 679 | for (i = 0; i < ARRAY_SIZE(mcp_attn_ctl_regs); i++) { |
668 | reg_val = REG_RD(bp, mcp_attn_ctl_regs[i]); | 680 | reg_val = REG_RD(bp, mcp_attn_ctl_regs[i].addr); |
669 | 681 | ||
670 | if (enable) | 682 | if (enable) |
671 | reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; | 683 | reg_val |= mcp_attn_ctl_regs[i].bits; |
672 | else | 684 | else |
673 | reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; | 685 | reg_val &= ~mcp_attn_ctl_regs[i].bits; |
674 | 686 | ||
675 | REG_WR(bp, mcp_attn_ctl_regs[i], reg_val); | 687 | REG_WR(bp, mcp_attn_ctl_regs[i].addr, reg_val); |
676 | } | 688 | } |
677 | } | 689 | } |
678 | 690 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index 04b9177f46bf..bb2f20291509 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -503,9 +503,9 @@ void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, | |||
503 | } | 503 | } |
504 | 504 | ||
505 | /* issue a dmae command over the init-channel and wait for completion */ | 505 | /* issue a dmae command over the init-channel and wait for completion */ |
506 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) | 506 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
507 | u32 *comp) | ||
507 | { | 508 | { |
508 | u32 *wb_comp = bnx2x_sp(bp, wb_comp); | ||
509 | int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000; | 509 | int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000; |
510 | int rc = 0; | 510 | int rc = 0; |
511 | 511 | ||
@@ -518,14 +518,14 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) | |||
518 | spin_lock_bh(&bp->dmae_lock); | 518 | spin_lock_bh(&bp->dmae_lock); |
519 | 519 | ||
520 | /* reset completion */ | 520 | /* reset completion */ |
521 | *wb_comp = 0; | 521 | *comp = 0; |
522 | 522 | ||
523 | /* post the command on the channel used for initializations */ | 523 | /* post the command on the channel used for initializations */ |
524 | bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); | 524 | bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); |
525 | 525 | ||
526 | /* wait for completion */ | 526 | /* wait for completion */ |
527 | udelay(5); | 527 | udelay(5); |
528 | while ((*wb_comp & ~DMAE_PCI_ERR_FLAG) != DMAE_COMP_VAL) { | 528 | while ((*comp & ~DMAE_PCI_ERR_FLAG) != DMAE_COMP_VAL) { |
529 | 529 | ||
530 | if (!cnt || | 530 | if (!cnt || |
531 | (bp->recovery_state != BNX2X_RECOVERY_DONE && | 531 | (bp->recovery_state != BNX2X_RECOVERY_DONE && |
@@ -537,7 +537,7 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) | |||
537 | cnt--; | 537 | cnt--; |
538 | udelay(50); | 538 | udelay(50); |
539 | } | 539 | } |
540 | if (*wb_comp & DMAE_PCI_ERR_FLAG) { | 540 | if (*comp & DMAE_PCI_ERR_FLAG) { |
541 | BNX2X_ERR("DMAE PCI error!\n"); | 541 | BNX2X_ERR("DMAE PCI error!\n"); |
542 | rc = DMAE_PCI_ERROR; | 542 | rc = DMAE_PCI_ERROR; |
543 | } | 543 | } |
@@ -574,7 +574,7 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, | |||
574 | dmae.len = len32; | 574 | dmae.len = len32; |
575 | 575 | ||
576 | /* issue the command and wait for completion */ | 576 | /* issue the command and wait for completion */ |
577 | rc = bnx2x_issue_dmae_with_comp(bp, &dmae); | 577 | rc = bnx2x_issue_dmae_with_comp(bp, &dmae, bnx2x_sp(bp, wb_comp)); |
578 | if (rc) { | 578 | if (rc) { |
579 | BNX2X_ERR("DMAE returned failure %d\n", rc); | 579 | BNX2X_ERR("DMAE returned failure %d\n", rc); |
580 | bnx2x_panic(); | 580 | bnx2x_panic(); |
@@ -611,7 +611,7 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) | |||
611 | dmae.len = len32; | 611 | dmae.len = len32; |
612 | 612 | ||
613 | /* issue the command and wait for completion */ | 613 | /* issue the command and wait for completion */ |
614 | rc = bnx2x_issue_dmae_with_comp(bp, &dmae); | 614 | rc = bnx2x_issue_dmae_with_comp(bp, &dmae, bnx2x_sp(bp, wb_comp)); |
615 | if (rc) { | 615 | if (rc) { |
616 | BNX2X_ERR("DMAE returned failure %d\n", rc); | 616 | BNX2X_ERR("DMAE returned failure %d\n", rc); |
617 | bnx2x_panic(); | 617 | bnx2x_panic(); |
@@ -751,6 +751,10 @@ static int bnx2x_mc_assert(struct bnx2x *bp) | |||
751 | return rc; | 751 | return rc; |
752 | } | 752 | } |
753 | 753 | ||
754 | #define MCPR_TRACE_BUFFER_SIZE (0x800) | ||
755 | #define SCRATCH_BUFFER_SIZE(bp) \ | ||
756 | (CHIP_IS_E1(bp) ? 0x10000 : (CHIP_IS_E1H(bp) ? 0x20000 : 0x28000)) | ||
757 | |||
754 | void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) | 758 | void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) |
755 | { | 759 | { |
756 | u32 addr, val; | 760 | u32 addr, val; |
@@ -775,7 +779,17 @@ void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) | |||
775 | trace_shmem_base = bp->common.shmem_base; | 779 | trace_shmem_base = bp->common.shmem_base; |
776 | else | 780 | else |
777 | trace_shmem_base = SHMEM2_RD(bp, other_shmem_base_addr); | 781 | trace_shmem_base = SHMEM2_RD(bp, other_shmem_base_addr); |
778 | addr = trace_shmem_base - 0x800; | 782 | |
783 | /* sanity */ | ||
784 | if (trace_shmem_base < MCPR_SCRATCH_BASE(bp) + MCPR_TRACE_BUFFER_SIZE || | ||
785 | trace_shmem_base >= MCPR_SCRATCH_BASE(bp) + | ||
786 | SCRATCH_BUFFER_SIZE(bp)) { | ||
787 | BNX2X_ERR("Unable to dump trace buffer (mark %x)\n", | ||
788 | trace_shmem_base); | ||
789 | return; | ||
790 | } | ||
791 | |||
792 | addr = trace_shmem_base - MCPR_TRACE_BUFFER_SIZE; | ||
779 | 793 | ||
780 | /* validate TRCB signature */ | 794 | /* validate TRCB signature */ |
781 | mark = REG_RD(bp, addr); | 795 | mark = REG_RD(bp, addr); |
@@ -787,14 +801,17 @@ void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl) | |||
787 | /* read cyclic buffer pointer */ | 801 | /* read cyclic buffer pointer */ |
788 | addr += 4; | 802 | addr += 4; |
789 | mark = REG_RD(bp, addr); | 803 | mark = REG_RD(bp, addr); |
790 | mark = (CHIP_IS_E1x(bp) ? MCP_REG_MCPR_SCRATCH : MCP_A_REG_MCPR_SCRATCH) | 804 | mark = MCPR_SCRATCH_BASE(bp) + ((mark + 0x3) & ~0x3) - 0x08000000; |
791 | + ((mark + 0x3) & ~0x3) - 0x08000000; | 805 | if (mark >= trace_shmem_base || mark < addr + 4) { |
806 | BNX2X_ERR("Mark doesn't fall inside Trace Buffer\n"); | ||
807 | return; | ||
808 | } | ||
792 | printk("%s" "begin fw dump (mark 0x%x)\n", lvl, mark); | 809 | printk("%s" "begin fw dump (mark 0x%x)\n", lvl, mark); |
793 | 810 | ||
794 | printk("%s", lvl); | 811 | printk("%s", lvl); |
795 | 812 | ||
796 | /* dump buffer after the mark */ | 813 | /* dump buffer after the mark */ |
797 | for (offset = mark; offset <= trace_shmem_base; offset += 0x8*4) { | 814 | for (offset = mark; offset < trace_shmem_base; offset += 0x8*4) { |
798 | for (word = 0; word < 8; word++) | 815 | for (word = 0; word < 8; word++) |
799 | data[word] = htonl(REG_RD(bp, offset + 4*word)); | 816 | data[word] = htonl(REG_RD(bp, offset + 4*word)); |
800 | data[8] = 0x0; | 817 | data[8] = 0x0; |
@@ -4280,65 +4297,60 @@ static void _print_next_block(int idx, const char *blk) | |||
4280 | pr_cont("%s%s", idx ? ", " : "", blk); | 4297 | pr_cont("%s%s", idx ? ", " : "", blk); |
4281 | } | 4298 | } |
4282 | 4299 | ||
4283 | static int bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig, | 4300 | static bool bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig, |
4284 | int par_num, bool print) | 4301 | int *par_num, bool print) |
4285 | { | 4302 | { |
4286 | int i = 0; | 4303 | u32 cur_bit; |
4287 | u32 cur_bit = 0; | 4304 | bool res; |
4305 | int i; | ||
4306 | |||
4307 | res = false; | ||
4308 | |||
4288 | for (i = 0; sig; i++) { | 4309 | for (i = 0; sig; i++) { |
4289 | cur_bit = ((u32)0x1 << i); | 4310 | cur_bit = (0x1UL << i); |
4290 | if (sig & cur_bit) { | 4311 | if (sig & cur_bit) { |
4291 | switch (cur_bit) { | 4312 | res |= true; /* Each bit is real error! */ |
4292 | case AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR: | 4313 | |
4293 | if (print) { | 4314 | if (print) { |
4294 | _print_next_block(par_num++, "BRB"); | 4315 | switch (cur_bit) { |
4316 | case AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR: | ||
4317 | _print_next_block((*par_num)++, "BRB"); | ||
4295 | _print_parity(bp, | 4318 | _print_parity(bp, |
4296 | BRB1_REG_BRB1_PRTY_STS); | 4319 | BRB1_REG_BRB1_PRTY_STS); |
4297 | } | 4320 | break; |
4298 | break; | 4321 | case AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR: |
4299 | case AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR: | 4322 | _print_next_block((*par_num)++, |
4300 | if (print) { | 4323 | "PARSER"); |
4301 | _print_next_block(par_num++, "PARSER"); | ||
4302 | _print_parity(bp, PRS_REG_PRS_PRTY_STS); | 4324 | _print_parity(bp, PRS_REG_PRS_PRTY_STS); |
4303 | } | 4325 | break; |
4304 | break; | 4326 | case AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR: |
4305 | case AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR: | 4327 | _print_next_block((*par_num)++, "TSDM"); |
4306 | if (print) { | ||
4307 | _print_next_block(par_num++, "TSDM"); | ||
4308 | _print_parity(bp, | 4328 | _print_parity(bp, |
4309 | TSDM_REG_TSDM_PRTY_STS); | 4329 | TSDM_REG_TSDM_PRTY_STS); |
4310 | } | 4330 | break; |
4311 | break; | 4331 | case AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR: |
4312 | case AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR: | 4332 | _print_next_block((*par_num)++, |
4313 | if (print) { | ||
4314 | _print_next_block(par_num++, | ||
4315 | "SEARCHER"); | 4333 | "SEARCHER"); |
4316 | _print_parity(bp, SRC_REG_SRC_PRTY_STS); | 4334 | _print_parity(bp, SRC_REG_SRC_PRTY_STS); |
4317 | } | 4335 | break; |
4318 | break; | 4336 | case AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR: |
4319 | case AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR: | 4337 | _print_next_block((*par_num)++, "TCM"); |
4320 | if (print) { | 4338 | _print_parity(bp, TCM_REG_TCM_PRTY_STS); |
4321 | _print_next_block(par_num++, "TCM"); | 4339 | break; |
4322 | _print_parity(bp, | 4340 | case AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR: |
4323 | TCM_REG_TCM_PRTY_STS); | 4341 | _print_next_block((*par_num)++, |
4324 | } | 4342 | "TSEMI"); |
4325 | break; | ||
4326 | case AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR: | ||
4327 | if (print) { | ||
4328 | _print_next_block(par_num++, "TSEMI"); | ||
4329 | _print_parity(bp, | 4343 | _print_parity(bp, |
4330 | TSEM_REG_TSEM_PRTY_STS_0); | 4344 | TSEM_REG_TSEM_PRTY_STS_0); |
4331 | _print_parity(bp, | 4345 | _print_parity(bp, |
4332 | TSEM_REG_TSEM_PRTY_STS_1); | 4346 | TSEM_REG_TSEM_PRTY_STS_1); |
4333 | } | 4347 | break; |
4334 | break; | 4348 | case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR: |
4335 | case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR: | 4349 | _print_next_block((*par_num)++, "XPB"); |
4336 | if (print) { | ||
4337 | _print_next_block(par_num++, "XPB"); | ||
4338 | _print_parity(bp, GRCBASE_XPB + | 4350 | _print_parity(bp, GRCBASE_XPB + |
4339 | PB_REG_PB_PRTY_STS); | 4351 | PB_REG_PB_PRTY_STS); |
4352 | break; | ||
4340 | } | 4353 | } |
4341 | break; | ||
4342 | } | 4354 | } |
4343 | 4355 | ||
4344 | /* Clear the bit */ | 4356 | /* Clear the bit */ |
@@ -4346,53 +4358,59 @@ static int bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig, | |||
4346 | } | 4358 | } |
4347 | } | 4359 | } |
4348 | 4360 | ||
4349 | return par_num; | 4361 | return res; |
4350 | } | 4362 | } |
4351 | 4363 | ||
4352 | static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | 4364 | static bool bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, |
4353 | int par_num, bool *global, | 4365 | int *par_num, bool *global, |
4354 | bool print) | 4366 | bool print) |
4355 | { | 4367 | { |
4356 | int i = 0; | 4368 | u32 cur_bit; |
4357 | u32 cur_bit = 0; | 4369 | bool res; |
4370 | int i; | ||
4371 | |||
4372 | res = false; | ||
4373 | |||
4358 | for (i = 0; sig; i++) { | 4374 | for (i = 0; sig; i++) { |
4359 | cur_bit = ((u32)0x1 << i); | 4375 | cur_bit = (0x1UL << i); |
4360 | if (sig & cur_bit) { | 4376 | if (sig & cur_bit) { |
4377 | res |= true; /* Each bit is real error! */ | ||
4361 | switch (cur_bit) { | 4378 | switch (cur_bit) { |
4362 | case AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR: | 4379 | case AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR: |
4363 | if (print) { | 4380 | if (print) { |
4364 | _print_next_block(par_num++, "PBF"); | 4381 | _print_next_block((*par_num)++, "PBF"); |
4365 | _print_parity(bp, PBF_REG_PBF_PRTY_STS); | 4382 | _print_parity(bp, PBF_REG_PBF_PRTY_STS); |
4366 | } | 4383 | } |
4367 | break; | 4384 | break; |
4368 | case AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR: | 4385 | case AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR: |
4369 | if (print) { | 4386 | if (print) { |
4370 | _print_next_block(par_num++, "QM"); | 4387 | _print_next_block((*par_num)++, "QM"); |
4371 | _print_parity(bp, QM_REG_QM_PRTY_STS); | 4388 | _print_parity(bp, QM_REG_QM_PRTY_STS); |
4372 | } | 4389 | } |
4373 | break; | 4390 | break; |
4374 | case AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR: | 4391 | case AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR: |
4375 | if (print) { | 4392 | if (print) { |
4376 | _print_next_block(par_num++, "TM"); | 4393 | _print_next_block((*par_num)++, "TM"); |
4377 | _print_parity(bp, TM_REG_TM_PRTY_STS); | 4394 | _print_parity(bp, TM_REG_TM_PRTY_STS); |
4378 | } | 4395 | } |
4379 | break; | 4396 | break; |
4380 | case AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR: | 4397 | case AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR: |
4381 | if (print) { | 4398 | if (print) { |
4382 | _print_next_block(par_num++, "XSDM"); | 4399 | _print_next_block((*par_num)++, "XSDM"); |
4383 | _print_parity(bp, | 4400 | _print_parity(bp, |
4384 | XSDM_REG_XSDM_PRTY_STS); | 4401 | XSDM_REG_XSDM_PRTY_STS); |
4385 | } | 4402 | } |
4386 | break; | 4403 | break; |
4387 | case AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR: | 4404 | case AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR: |
4388 | if (print) { | 4405 | if (print) { |
4389 | _print_next_block(par_num++, "XCM"); | 4406 | _print_next_block((*par_num)++, "XCM"); |
4390 | _print_parity(bp, XCM_REG_XCM_PRTY_STS); | 4407 | _print_parity(bp, XCM_REG_XCM_PRTY_STS); |
4391 | } | 4408 | } |
4392 | break; | 4409 | break; |
4393 | case AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR: | 4410 | case AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR: |
4394 | if (print) { | 4411 | if (print) { |
4395 | _print_next_block(par_num++, "XSEMI"); | 4412 | _print_next_block((*par_num)++, |
4413 | "XSEMI"); | ||
4396 | _print_parity(bp, | 4414 | _print_parity(bp, |
4397 | XSEM_REG_XSEM_PRTY_STS_0); | 4415 | XSEM_REG_XSEM_PRTY_STS_0); |
4398 | _print_parity(bp, | 4416 | _print_parity(bp, |
@@ -4401,7 +4419,7 @@ static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |||
4401 | break; | 4419 | break; |
4402 | case AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR: | 4420 | case AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR: |
4403 | if (print) { | 4421 | if (print) { |
4404 | _print_next_block(par_num++, | 4422 | _print_next_block((*par_num)++, |
4405 | "DOORBELLQ"); | 4423 | "DOORBELLQ"); |
4406 | _print_parity(bp, | 4424 | _print_parity(bp, |
4407 | DORQ_REG_DORQ_PRTY_STS); | 4425 | DORQ_REG_DORQ_PRTY_STS); |
@@ -4409,7 +4427,7 @@ static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |||
4409 | break; | 4427 | break; |
4410 | case AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR: | 4428 | case AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR: |
4411 | if (print) { | 4429 | if (print) { |
4412 | _print_next_block(par_num++, "NIG"); | 4430 | _print_next_block((*par_num)++, "NIG"); |
4413 | if (CHIP_IS_E1x(bp)) { | 4431 | if (CHIP_IS_E1x(bp)) { |
4414 | _print_parity(bp, | 4432 | _print_parity(bp, |
4415 | NIG_REG_NIG_PRTY_STS); | 4433 | NIG_REG_NIG_PRTY_STS); |
@@ -4423,32 +4441,34 @@ static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |||
4423 | break; | 4441 | break; |
4424 | case AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR: | 4442 | case AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR: |
4425 | if (print) | 4443 | if (print) |
4426 | _print_next_block(par_num++, | 4444 | _print_next_block((*par_num)++, |
4427 | "VAUX PCI CORE"); | 4445 | "VAUX PCI CORE"); |
4428 | *global = true; | 4446 | *global = true; |
4429 | break; | 4447 | break; |
4430 | case AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR: | 4448 | case AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR: |
4431 | if (print) { | 4449 | if (print) { |
4432 | _print_next_block(par_num++, "DEBUG"); | 4450 | _print_next_block((*par_num)++, |
4451 | "DEBUG"); | ||
4433 | _print_parity(bp, DBG_REG_DBG_PRTY_STS); | 4452 | _print_parity(bp, DBG_REG_DBG_PRTY_STS); |
4434 | } | 4453 | } |
4435 | break; | 4454 | break; |
4436 | case AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR: | 4455 | case AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR: |
4437 | if (print) { | 4456 | if (print) { |
4438 | _print_next_block(par_num++, "USDM"); | 4457 | _print_next_block((*par_num)++, "USDM"); |
4439 | _print_parity(bp, | 4458 | _print_parity(bp, |
4440 | USDM_REG_USDM_PRTY_STS); | 4459 | USDM_REG_USDM_PRTY_STS); |
4441 | } | 4460 | } |
4442 | break; | 4461 | break; |
4443 | case AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR: | 4462 | case AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR: |
4444 | if (print) { | 4463 | if (print) { |
4445 | _print_next_block(par_num++, "UCM"); | 4464 | _print_next_block((*par_num)++, "UCM"); |
4446 | _print_parity(bp, UCM_REG_UCM_PRTY_STS); | 4465 | _print_parity(bp, UCM_REG_UCM_PRTY_STS); |
4447 | } | 4466 | } |
4448 | break; | 4467 | break; |
4449 | case AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR: | 4468 | case AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR: |
4450 | if (print) { | 4469 | if (print) { |
4451 | _print_next_block(par_num++, "USEMI"); | 4470 | _print_next_block((*par_num)++, |
4471 | "USEMI"); | ||
4452 | _print_parity(bp, | 4472 | _print_parity(bp, |
4453 | USEM_REG_USEM_PRTY_STS_0); | 4473 | USEM_REG_USEM_PRTY_STS_0); |
4454 | _print_parity(bp, | 4474 | _print_parity(bp, |
@@ -4457,21 +4477,21 @@ static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |||
4457 | break; | 4477 | break; |
4458 | case AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR: | 4478 | case AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR: |
4459 | if (print) { | 4479 | if (print) { |
4460 | _print_next_block(par_num++, "UPB"); | 4480 | _print_next_block((*par_num)++, "UPB"); |
4461 | _print_parity(bp, GRCBASE_UPB + | 4481 | _print_parity(bp, GRCBASE_UPB + |
4462 | PB_REG_PB_PRTY_STS); | 4482 | PB_REG_PB_PRTY_STS); |
4463 | } | 4483 | } |
4464 | break; | 4484 | break; |
4465 | case AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR: | 4485 | case AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR: |
4466 | if (print) { | 4486 | if (print) { |
4467 | _print_next_block(par_num++, "CSDM"); | 4487 | _print_next_block((*par_num)++, "CSDM"); |
4468 | _print_parity(bp, | 4488 | _print_parity(bp, |
4469 | CSDM_REG_CSDM_PRTY_STS); | 4489 | CSDM_REG_CSDM_PRTY_STS); |
4470 | } | 4490 | } |
4471 | break; | 4491 | break; |
4472 | case AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR: | 4492 | case AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR: |
4473 | if (print) { | 4493 | if (print) { |
4474 | _print_next_block(par_num++, "CCM"); | 4494 | _print_next_block((*par_num)++, "CCM"); |
4475 | _print_parity(bp, CCM_REG_CCM_PRTY_STS); | 4495 | _print_parity(bp, CCM_REG_CCM_PRTY_STS); |
4476 | } | 4496 | } |
4477 | break; | 4497 | break; |
@@ -4482,80 +4502,73 @@ static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |||
4482 | } | 4502 | } |
4483 | } | 4503 | } |
4484 | 4504 | ||
4485 | return par_num; | 4505 | return res; |
4486 | } | 4506 | } |
4487 | 4507 | ||
4488 | static int bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig, | 4508 | static bool bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig, |
4489 | int par_num, bool print) | 4509 | int *par_num, bool print) |
4490 | { | 4510 | { |
4491 | int i = 0; | 4511 | u32 cur_bit; |
4492 | u32 cur_bit = 0; | 4512 | bool res; |
4513 | int i; | ||
4514 | |||
4515 | res = false; | ||
4516 | |||
4493 | for (i = 0; sig; i++) { | 4517 | for (i = 0; sig; i++) { |
4494 | cur_bit = ((u32)0x1 << i); | 4518 | cur_bit = (0x1UL << i); |
4495 | if (sig & cur_bit) { | 4519 | if (sig & cur_bit) { |
4496 | switch (cur_bit) { | 4520 | res |= true; /* Each bit is real error! */ |
4497 | case AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR: | 4521 | if (print) { |
4498 | if (print) { | 4522 | switch (cur_bit) { |
4499 | _print_next_block(par_num++, "CSEMI"); | 4523 | case AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR: |
4524 | _print_next_block((*par_num)++, | ||
4525 | "CSEMI"); | ||
4500 | _print_parity(bp, | 4526 | _print_parity(bp, |
4501 | CSEM_REG_CSEM_PRTY_STS_0); | 4527 | CSEM_REG_CSEM_PRTY_STS_0); |
4502 | _print_parity(bp, | 4528 | _print_parity(bp, |
4503 | CSEM_REG_CSEM_PRTY_STS_1); | 4529 | CSEM_REG_CSEM_PRTY_STS_1); |
4504 | } | 4530 | break; |
4505 | break; | 4531 | case AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR: |
4506 | case AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR: | 4532 | _print_next_block((*par_num)++, "PXP"); |
4507 | if (print) { | ||
4508 | _print_next_block(par_num++, "PXP"); | ||
4509 | _print_parity(bp, PXP_REG_PXP_PRTY_STS); | 4533 | _print_parity(bp, PXP_REG_PXP_PRTY_STS); |
4510 | _print_parity(bp, | 4534 | _print_parity(bp, |
4511 | PXP2_REG_PXP2_PRTY_STS_0); | 4535 | PXP2_REG_PXP2_PRTY_STS_0); |
4512 | _print_parity(bp, | 4536 | _print_parity(bp, |
4513 | PXP2_REG_PXP2_PRTY_STS_1); | 4537 | PXP2_REG_PXP2_PRTY_STS_1); |
4514 | } | 4538 | break; |
4515 | break; | 4539 | case AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR: |
4516 | case AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR: | 4540 | _print_next_block((*par_num)++, |
4517 | if (print) | 4541 | "PXPPCICLOCKCLIENT"); |
4518 | _print_next_block(par_num++, | 4542 | break; |
4519 | "PXPPCICLOCKCLIENT"); | 4543 | case AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR: |
4520 | break; | 4544 | _print_next_block((*par_num)++, "CFC"); |
4521 | case AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR: | ||
4522 | if (print) { | ||
4523 | _print_next_block(par_num++, "CFC"); | ||
4524 | _print_parity(bp, | 4545 | _print_parity(bp, |
4525 | CFC_REG_CFC_PRTY_STS); | 4546 | CFC_REG_CFC_PRTY_STS); |
4526 | } | 4547 | break; |
4527 | break; | 4548 | case AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR: |
4528 | case AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR: | 4549 | _print_next_block((*par_num)++, "CDU"); |
4529 | if (print) { | ||
4530 | _print_next_block(par_num++, "CDU"); | ||
4531 | _print_parity(bp, CDU_REG_CDU_PRTY_STS); | 4550 | _print_parity(bp, CDU_REG_CDU_PRTY_STS); |
4532 | } | 4551 | break; |
4533 | break; | 4552 | case AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR: |
4534 | case AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR: | 4553 | _print_next_block((*par_num)++, "DMAE"); |
4535 | if (print) { | ||
4536 | _print_next_block(par_num++, "DMAE"); | ||
4537 | _print_parity(bp, | 4554 | _print_parity(bp, |
4538 | DMAE_REG_DMAE_PRTY_STS); | 4555 | DMAE_REG_DMAE_PRTY_STS); |
4539 | } | 4556 | break; |
4540 | break; | 4557 | case AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR: |
4541 | case AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR: | 4558 | _print_next_block((*par_num)++, "IGU"); |
4542 | if (print) { | ||
4543 | _print_next_block(par_num++, "IGU"); | ||
4544 | if (CHIP_IS_E1x(bp)) | 4559 | if (CHIP_IS_E1x(bp)) |
4545 | _print_parity(bp, | 4560 | _print_parity(bp, |
4546 | HC_REG_HC_PRTY_STS); | 4561 | HC_REG_HC_PRTY_STS); |
4547 | else | 4562 | else |
4548 | _print_parity(bp, | 4563 | _print_parity(bp, |
4549 | IGU_REG_IGU_PRTY_STS); | 4564 | IGU_REG_IGU_PRTY_STS); |
4550 | } | 4565 | break; |
4551 | break; | 4566 | case AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR: |
4552 | case AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR: | 4567 | _print_next_block((*par_num)++, "MISC"); |
4553 | if (print) { | ||
4554 | _print_next_block(par_num++, "MISC"); | ||
4555 | _print_parity(bp, | 4568 | _print_parity(bp, |
4556 | MISC_REG_MISC_PRTY_STS); | 4569 | MISC_REG_MISC_PRTY_STS); |
4570 | break; | ||
4557 | } | 4571 | } |
4558 | break; | ||
4559 | } | 4572 | } |
4560 | 4573 | ||
4561 | /* Clear the bit */ | 4574 | /* Clear the bit */ |
@@ -4563,40 +4576,49 @@ static int bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig, | |||
4563 | } | 4576 | } |
4564 | } | 4577 | } |
4565 | 4578 | ||
4566 | return par_num; | 4579 | return res; |
4567 | } | 4580 | } |
4568 | 4581 | ||
4569 | static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, | 4582 | static bool bnx2x_check_blocks_with_parity3(struct bnx2x *bp, u32 sig, |
4570 | bool *global, bool print) | 4583 | int *par_num, bool *global, |
4584 | bool print) | ||
4571 | { | 4585 | { |
4572 | int i = 0; | 4586 | bool res = false; |
4573 | u32 cur_bit = 0; | 4587 | u32 cur_bit; |
4588 | int i; | ||
4589 | |||
4574 | for (i = 0; sig; i++) { | 4590 | for (i = 0; sig; i++) { |
4575 | cur_bit = ((u32)0x1 << i); | 4591 | cur_bit = (0x1UL << i); |
4576 | if (sig & cur_bit) { | 4592 | if (sig & cur_bit) { |
4577 | switch (cur_bit) { | 4593 | switch (cur_bit) { |
4578 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY: | 4594 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY: |
4579 | if (print) | 4595 | if (print) |
4580 | _print_next_block(par_num++, "MCP ROM"); | 4596 | _print_next_block((*par_num)++, |
4597 | "MCP ROM"); | ||
4581 | *global = true; | 4598 | *global = true; |
4599 | res |= true; | ||
4582 | break; | 4600 | break; |
4583 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY: | 4601 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY: |
4584 | if (print) | 4602 | if (print) |
4585 | _print_next_block(par_num++, | 4603 | _print_next_block((*par_num)++, |
4586 | "MCP UMP RX"); | 4604 | "MCP UMP RX"); |
4587 | *global = true; | 4605 | *global = true; |
4606 | res |= true; | ||
4588 | break; | 4607 | break; |
4589 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY: | 4608 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY: |
4590 | if (print) | 4609 | if (print) |
4591 | _print_next_block(par_num++, | 4610 | _print_next_block((*par_num)++, |
4592 | "MCP UMP TX"); | 4611 | "MCP UMP TX"); |
4593 | *global = true; | 4612 | *global = true; |
4613 | res |= true; | ||
4594 | break; | 4614 | break; |
4595 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY: | 4615 | case AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY: |
4596 | if (print) | 4616 | if (print) |
4597 | _print_next_block(par_num++, | 4617 | _print_next_block((*par_num)++, |
4598 | "MCP SCPAD"); | 4618 | "MCP SCPAD"); |
4599 | *global = true; | 4619 | /* clear latched SCPAD PATIRY from MCP */ |
4620 | REG_WR(bp, MISC_REG_AEU_CLR_LATCH_SIGNAL, | ||
4621 | 1UL << 10); | ||
4600 | break; | 4622 | break; |
4601 | } | 4623 | } |
4602 | 4624 | ||
@@ -4605,45 +4627,50 @@ static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, | |||
4605 | } | 4627 | } |
4606 | } | 4628 | } |
4607 | 4629 | ||
4608 | return par_num; | 4630 | return res; |
4609 | } | 4631 | } |
4610 | 4632 | ||
4611 | static int bnx2x_check_blocks_with_parity4(struct bnx2x *bp, u32 sig, | 4633 | static bool bnx2x_check_blocks_with_parity4(struct bnx2x *bp, u32 sig, |
4612 | int par_num, bool print) | 4634 | int *par_num, bool print) |
4613 | { | 4635 | { |
4614 | int i = 0; | 4636 | u32 cur_bit; |
4615 | u32 cur_bit = 0; | 4637 | bool res; |
4638 | int i; | ||
4639 | |||
4640 | res = false; | ||
4641 | |||
4616 | for (i = 0; sig; i++) { | 4642 | for (i = 0; sig; i++) { |
4617 | cur_bit = ((u32)0x1 << i); | 4643 | cur_bit = (0x1UL << i); |
4618 | if (sig & cur_bit) { | 4644 | if (sig & cur_bit) { |
4619 | switch (cur_bit) { | 4645 | res |= true; /* Each bit is real error! */ |
4620 | case AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR: | 4646 | if (print) { |
4621 | if (print) { | 4647 | switch (cur_bit) { |
4622 | _print_next_block(par_num++, "PGLUE_B"); | 4648 | case AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR: |
4649 | _print_next_block((*par_num)++, | ||
4650 | "PGLUE_B"); | ||
4623 | _print_parity(bp, | 4651 | _print_parity(bp, |
4624 | PGLUE_B_REG_PGLUE_B_PRTY_STS); | 4652 | PGLUE_B_REG_PGLUE_B_PRTY_STS); |
4625 | } | 4653 | break; |
4626 | break; | 4654 | case AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR: |
4627 | case AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR: | 4655 | _print_next_block((*par_num)++, "ATC"); |
4628 | if (print) { | ||
4629 | _print_next_block(par_num++, "ATC"); | ||
4630 | _print_parity(bp, | 4656 | _print_parity(bp, |
4631 | ATC_REG_ATC_PRTY_STS); | 4657 | ATC_REG_ATC_PRTY_STS); |
4658 | break; | ||
4632 | } | 4659 | } |
4633 | break; | ||
4634 | } | 4660 | } |
4635 | |||
4636 | /* Clear the bit */ | 4661 | /* Clear the bit */ |
4637 | sig &= ~cur_bit; | 4662 | sig &= ~cur_bit; |
4638 | } | 4663 | } |
4639 | } | 4664 | } |
4640 | 4665 | ||
4641 | return par_num; | 4666 | return res; |
4642 | } | 4667 | } |
4643 | 4668 | ||
4644 | static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, | 4669 | static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, |
4645 | u32 *sig) | 4670 | u32 *sig) |
4646 | { | 4671 | { |
4672 | bool res = false; | ||
4673 | |||
4647 | if ((sig[0] & HW_PRTY_ASSERT_SET_0) || | 4674 | if ((sig[0] & HW_PRTY_ASSERT_SET_0) || |
4648 | (sig[1] & HW_PRTY_ASSERT_SET_1) || | 4675 | (sig[1] & HW_PRTY_ASSERT_SET_1) || |
4649 | (sig[2] & HW_PRTY_ASSERT_SET_2) || | 4676 | (sig[2] & HW_PRTY_ASSERT_SET_2) || |
@@ -4660,23 +4687,22 @@ static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, | |||
4660 | if (print) | 4687 | if (print) |
4661 | netdev_err(bp->dev, | 4688 | netdev_err(bp->dev, |
4662 | "Parity errors detected in blocks: "); | 4689 | "Parity errors detected in blocks: "); |
4663 | par_num = bnx2x_check_blocks_with_parity0(bp, | 4690 | res |= bnx2x_check_blocks_with_parity0(bp, |
4664 | sig[0] & HW_PRTY_ASSERT_SET_0, par_num, print); | 4691 | sig[0] & HW_PRTY_ASSERT_SET_0, &par_num, print); |
4665 | par_num = bnx2x_check_blocks_with_parity1(bp, | 4692 | res |= bnx2x_check_blocks_with_parity1(bp, |
4666 | sig[1] & HW_PRTY_ASSERT_SET_1, par_num, global, print); | 4693 | sig[1] & HW_PRTY_ASSERT_SET_1, &par_num, global, print); |
4667 | par_num = bnx2x_check_blocks_with_parity2(bp, | 4694 | res |= bnx2x_check_blocks_with_parity2(bp, |
4668 | sig[2] & HW_PRTY_ASSERT_SET_2, par_num, print); | 4695 | sig[2] & HW_PRTY_ASSERT_SET_2, &par_num, print); |
4669 | par_num = bnx2x_check_blocks_with_parity3( | 4696 | res |= bnx2x_check_blocks_with_parity3(bp, |
4670 | sig[3] & HW_PRTY_ASSERT_SET_3, par_num, global, print); | 4697 | sig[3] & HW_PRTY_ASSERT_SET_3, &par_num, global, print); |
4671 | par_num = bnx2x_check_blocks_with_parity4(bp, | 4698 | res |= bnx2x_check_blocks_with_parity4(bp, |
4672 | sig[4] & HW_PRTY_ASSERT_SET_4, par_num, print); | 4699 | sig[4] & HW_PRTY_ASSERT_SET_4, &par_num, print); |
4673 | 4700 | ||
4674 | if (print) | 4701 | if (print) |
4675 | pr_cont("\n"); | 4702 | pr_cont("\n"); |
4703 | } | ||
4676 | 4704 | ||
4677 | return true; | 4705 | return res; |
4678 | } else | ||
4679 | return false; | ||
4680 | } | 4706 | } |
4681 | 4707 | ||
4682 | /** | 4708 | /** |
@@ -7126,7 +7152,7 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
7126 | int port = BP_PORT(bp); | 7152 | int port = BP_PORT(bp); |
7127 | int init_phase = port ? PHASE_PORT1 : PHASE_PORT0; | 7153 | int init_phase = port ? PHASE_PORT1 : PHASE_PORT0; |
7128 | u32 low, high; | 7154 | u32 low, high; |
7129 | u32 val; | 7155 | u32 val, reg; |
7130 | 7156 | ||
7131 | DP(NETIF_MSG_HW, "starting port init port %d\n", port); | 7157 | DP(NETIF_MSG_HW, "starting port init port %d\n", port); |
7132 | 7158 | ||
@@ -7271,6 +7297,17 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
7271 | val |= CHIP_IS_E1(bp) ? 0 : 0x10; | 7297 | val |= CHIP_IS_E1(bp) ? 0 : 0x10; |
7272 | REG_WR(bp, MISC_REG_AEU_MASK_ATTN_FUNC_0 + port*4, val); | 7298 | REG_WR(bp, MISC_REG_AEU_MASK_ATTN_FUNC_0 + port*4, val); |
7273 | 7299 | ||
7300 | /* SCPAD_PARITY should NOT trigger close the gates */ | ||
7301 | reg = port ? MISC_REG_AEU_ENABLE4_NIG_1 : MISC_REG_AEU_ENABLE4_NIG_0; | ||
7302 | REG_WR(bp, reg, | ||
7303 | REG_RD(bp, reg) & | ||
7304 | ~AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY); | ||
7305 | |||
7306 | reg = port ? MISC_REG_AEU_ENABLE4_PXP_1 : MISC_REG_AEU_ENABLE4_PXP_0; | ||
7307 | REG_WR(bp, reg, | ||
7308 | REG_RD(bp, reg) & | ||
7309 | ~AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY); | ||
7310 | |||
7274 | bnx2x_init_block(bp, BLOCK_NIG, init_phase); | 7311 | bnx2x_init_block(bp, BLOCK_NIG, init_phase); |
7275 | 7312 | ||
7276 | if (!CHIP_IS_E1x(bp)) { | 7313 | if (!CHIP_IS_E1x(bp)) { |
@@ -11693,9 +11730,6 @@ static int bnx2x_init_bp(struct bnx2x *bp) | |||
11693 | static int bnx2x_open(struct net_device *dev) | 11730 | static int bnx2x_open(struct net_device *dev) |
11694 | { | 11731 | { |
11695 | struct bnx2x *bp = netdev_priv(dev); | 11732 | struct bnx2x *bp = netdev_priv(dev); |
11696 | bool global = false; | ||
11697 | int other_engine = BP_PATH(bp) ? 0 : 1; | ||
11698 | bool other_load_status, load_status; | ||
11699 | int rc; | 11733 | int rc; |
11700 | 11734 | ||
11701 | bp->stats_init = true; | 11735 | bp->stats_init = true; |
@@ -11711,6 +11745,10 @@ static int bnx2x_open(struct net_device *dev) | |||
11711 | * Parity recovery is only relevant for PF driver. | 11745 | * Parity recovery is only relevant for PF driver. |
11712 | */ | 11746 | */ |
11713 | if (IS_PF(bp)) { | 11747 | if (IS_PF(bp)) { |
11748 | int other_engine = BP_PATH(bp) ? 0 : 1; | ||
11749 | bool other_load_status, load_status; | ||
11750 | bool global = false; | ||
11751 | |||
11714 | other_load_status = bnx2x_get_load_status(bp, other_engine); | 11752 | other_load_status = bnx2x_get_load_status(bp, other_engine); |
11715 | load_status = bnx2x_get_load_status(bp, BP_PATH(bp)); | 11753 | load_status = bnx2x_get_load_status(bp, BP_PATH(bp)); |
11716 | if (!bnx2x_reset_is_done(bp, BP_PATH(bp)) || | 11754 | if (!bnx2x_reset_is_done(bp, BP_PATH(bp)) || |
@@ -12103,7 +12141,6 @@ static int bnx2x_set_coherency_mask(struct bnx2x *bp) | |||
12103 | struct device *dev = &bp->pdev->dev; | 12141 | struct device *dev = &bp->pdev->dev; |
12104 | 12142 | ||
12105 | if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) { | 12143 | if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) { |
12106 | bp->flags |= USING_DAC_FLAG; | ||
12107 | if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) { | 12144 | if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) { |
12108 | dev_err(dev, "dma_set_coherent_mask failed, aborting\n"); | 12145 | dev_err(dev, "dma_set_coherent_mask failed, aborting\n"); |
12109 | return -EIO; | 12146 | return -EIO; |
@@ -12274,8 +12311,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, | |||
12274 | NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | NETIF_F_HIGHDMA; | 12311 | NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | NETIF_F_HIGHDMA; |
12275 | 12312 | ||
12276 | dev->features |= dev->hw_features | NETIF_F_HW_VLAN_CTAG_RX; | 12313 | dev->features |= dev->hw_features | NETIF_F_HW_VLAN_CTAG_RX; |
12277 | if (bp->flags & USING_DAC_FLAG) | 12314 | dev->features |= NETIF_F_HIGHDMA; |
12278 | dev->features |= NETIF_F_HIGHDMA; | ||
12279 | 12315 | ||
12280 | /* Add Loopback capability to the device */ | 12316 | /* Add Loopback capability to the device */ |
12281 | dev->hw_features |= NETIF_F_LOOPBACK; | 12317 | dev->hw_features |= NETIF_F_LOOPBACK; |
@@ -12615,24 +12651,24 @@ static int set_max_cos_est(int chip_id) | |||
12615 | return BNX2X_MULTI_TX_COS_E1X; | 12651 | return BNX2X_MULTI_TX_COS_E1X; |
12616 | case BCM57712: | 12652 | case BCM57712: |
12617 | case BCM57712_MF: | 12653 | case BCM57712_MF: |
12618 | case BCM57712_VF: | ||
12619 | return BNX2X_MULTI_TX_COS_E2_E3A0; | 12654 | return BNX2X_MULTI_TX_COS_E2_E3A0; |
12620 | case BCM57800: | 12655 | case BCM57800: |
12621 | case BCM57800_MF: | 12656 | case BCM57800_MF: |
12622 | case BCM57800_VF: | ||
12623 | case BCM57810: | 12657 | case BCM57810: |
12624 | case BCM57810_MF: | 12658 | case BCM57810_MF: |
12625 | case BCM57840_4_10: | 12659 | case BCM57840_4_10: |
12626 | case BCM57840_2_20: | 12660 | case BCM57840_2_20: |
12627 | case BCM57840_O: | 12661 | case BCM57840_O: |
12628 | case BCM57840_MFO: | 12662 | case BCM57840_MFO: |
12629 | case BCM57810_VF: | ||
12630 | case BCM57840_MF: | 12663 | case BCM57840_MF: |
12631 | case BCM57840_VF: | ||
12632 | case BCM57811: | 12664 | case BCM57811: |
12633 | case BCM57811_MF: | 12665 | case BCM57811_MF: |
12634 | case BCM57811_VF: | ||
12635 | return BNX2X_MULTI_TX_COS_E3B0; | 12666 | return BNX2X_MULTI_TX_COS_E3B0; |
12667 | case BCM57712_VF: | ||
12668 | case BCM57800_VF: | ||
12669 | case BCM57810_VF: | ||
12670 | case BCM57840_VF: | ||
12671 | case BCM57811_VF: | ||
12636 | return 1; | 12672 | return 1; |
12637 | default: | 12673 | default: |
12638 | pr_err("Unknown board_type (%d), aborting\n", chip_id); | 12674 | pr_err("Unknown board_type (%d), aborting\n", chip_id); |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c index 122703d8127e..71fffad94aff 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c | |||
@@ -470,10 +470,10 @@ static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp, | |||
470 | bnx2x_vfop_qdtor, cmd->done); | 470 | bnx2x_vfop_qdtor, cmd->done); |
471 | return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor, | 471 | return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor, |
472 | cmd->block); | 472 | cmd->block); |
473 | } else { | ||
474 | BNX2X_ERR("VF[%d] failed to add a vfop\n", vf->abs_vfid); | ||
475 | return -ENOMEM; | ||
473 | } | 476 | } |
474 | DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop. rc %d\n", | ||
475 | vf->abs_vfid, vfop->rc); | ||
476 | return -ENOMEM; | ||
477 | } | 477 | } |
478 | 478 | ||
479 | static void | 479 | static void |
@@ -3391,14 +3391,16 @@ int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac) | |||
3391 | rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true); | 3391 | rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true); |
3392 | if (rc) { | 3392 | if (rc) { |
3393 | BNX2X_ERR("failed to delete eth macs\n"); | 3393 | BNX2X_ERR("failed to delete eth macs\n"); |
3394 | return -EINVAL; | 3394 | rc = -EINVAL; |
3395 | goto out; | ||
3395 | } | 3396 | } |
3396 | 3397 | ||
3397 | /* remove existing uc list macs */ | 3398 | /* remove existing uc list macs */ |
3398 | rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true); | 3399 | rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true); |
3399 | if (rc) { | 3400 | if (rc) { |
3400 | BNX2X_ERR("failed to delete uc_list macs\n"); | 3401 | BNX2X_ERR("failed to delete uc_list macs\n"); |
3401 | return -EINVAL; | 3402 | rc = -EINVAL; |
3403 | goto out; | ||
3402 | } | 3404 | } |
3403 | 3405 | ||
3404 | /* configure the new mac to device */ | 3406 | /* configure the new mac to device */ |
@@ -3406,6 +3408,7 @@ int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac) | |||
3406 | bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true, | 3408 | bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true, |
3407 | BNX2X_ETH_MAC, &ramrod_flags); | 3409 | BNX2X_ETH_MAC, &ramrod_flags); |
3408 | 3410 | ||
3411 | out: | ||
3409 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC); | 3412 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC); |
3410 | } | 3413 | } |
3411 | 3414 | ||
@@ -3468,7 +3471,8 @@ int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) | |||
3468 | &ramrod_flags); | 3471 | &ramrod_flags); |
3469 | if (rc) { | 3472 | if (rc) { |
3470 | BNX2X_ERR("failed to delete vlans\n"); | 3473 | BNX2X_ERR("failed to delete vlans\n"); |
3471 | return -EINVAL; | 3474 | rc = -EINVAL; |
3475 | goto out; | ||
3472 | } | 3476 | } |
3473 | 3477 | ||
3474 | /* send queue update ramrod to configure default vlan and silent | 3478 | /* send queue update ramrod to configure default vlan and silent |
@@ -3502,7 +3506,8 @@ int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) | |||
3502 | rc = bnx2x_config_vlan_mac(bp, &ramrod_param); | 3506 | rc = bnx2x_config_vlan_mac(bp, &ramrod_param); |
3503 | if (rc) { | 3507 | if (rc) { |
3504 | BNX2X_ERR("failed to configure vlan\n"); | 3508 | BNX2X_ERR("failed to configure vlan\n"); |
3505 | return -EINVAL; | 3509 | rc = -EINVAL; |
3510 | goto out; | ||
3506 | } | 3511 | } |
3507 | 3512 | ||
3508 | /* configure default vlan to vf queue and set silent | 3513 | /* configure default vlan to vf queue and set silent |
@@ -3520,18 +3525,18 @@ int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) | |||
3520 | rc = bnx2x_queue_state_change(bp, &q_params); | 3525 | rc = bnx2x_queue_state_change(bp, &q_params); |
3521 | if (rc) { | 3526 | if (rc) { |
3522 | BNX2X_ERR("Failed to configure default VLAN\n"); | 3527 | BNX2X_ERR("Failed to configure default VLAN\n"); |
3523 | return rc; | 3528 | goto out; |
3524 | } | 3529 | } |
3525 | 3530 | ||
3526 | /* clear the flag indicating that this VF needs its vlan | 3531 | /* clear the flag indicating that this VF needs its vlan |
3527 | * (will only be set if the HV configured th Vlan before vf was | 3532 | * (will only be set if the HV configured the Vlan before vf was |
3528 | * and we were called because the VF came up later | 3533 | * up and we were called because the VF came up later |
3529 | */ | 3534 | */ |
3535 | out: | ||
3530 | vf->cfg_flags &= ~VF_CFG_VLAN; | 3536 | vf->cfg_flags &= ~VF_CFG_VLAN; |
3531 | |||
3532 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN); | 3537 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN); |
3533 | } | 3538 | } |
3534 | return 0; | 3539 | return rc; |
3535 | } | 3540 | } |
3536 | 3541 | ||
3537 | /* crc is the first field in the bulletin board. Compute the crc over the | 3542 | /* crc is the first field in the bulletin board. Compute the crc over the |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c index 86436c77af03..3b75070411aa 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c | |||
@@ -196,7 +196,7 @@ static void bnx2x_hw_stats_post(struct bnx2x *bp) | |||
196 | 196 | ||
197 | } else if (bp->func_stx) { | 197 | } else if (bp->func_stx) { |
198 | *stats_comp = 0; | 198 | *stats_comp = 0; |
199 | bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); | 199 | bnx2x_issue_dmae_with_comp(bp, dmae, stats_comp); |
200 | } | 200 | } |
201 | } | 201 | } |
202 | 202 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c index 58dc89af7c6a..9199adf32d33 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c | |||
@@ -1020,7 +1020,7 @@ static int bnx2x_copy32_vf_dmae(struct bnx2x *bp, u8 from_vf, | |||
1020 | dmae.len = len32; | 1020 | dmae.len = len32; |
1021 | 1021 | ||
1022 | /* issue the command and wait for completion */ | 1022 | /* issue the command and wait for completion */ |
1023 | return bnx2x_issue_dmae_with_comp(bp, &dmae); | 1023 | return bnx2x_issue_dmae_with_comp(bp, &dmae, bnx2x_sp(bp, wb_comp)); |
1024 | } | 1024 | } |
1025 | 1025 | ||
1026 | static void bnx2x_vf_mbx_resp_single_tlv(struct bnx2x *bp, | 1026 | static void bnx2x_vf_mbx_resp_single_tlv(struct bnx2x *bp, |
diff --git a/drivers/net/ethernet/davicom/dm9000.c b/drivers/net/ethernet/davicom/dm9000.c index be8efeea51f2..7080ad6c4014 100644 --- a/drivers/net/ethernet/davicom/dm9000.c +++ b/drivers/net/ethernet/davicom/dm9000.c | |||
@@ -158,18 +158,6 @@ static inline board_info_t *to_dm9000_board(struct net_device *dev) | |||
158 | 158 | ||
159 | /* DM9000 network board routine ---------------------------- */ | 159 | /* DM9000 network board routine ---------------------------- */ |
160 | 160 | ||
161 | static void | ||
162 | dm9000_reset(board_info_t * db) | ||
163 | { | ||
164 | dev_dbg(db->dev, "resetting device\n"); | ||
165 | |||
166 | /* RESET device */ | ||
167 | writeb(DM9000_NCR, db->io_addr); | ||
168 | udelay(200); | ||
169 | writeb(NCR_RST, db->io_data); | ||
170 | udelay(200); | ||
171 | } | ||
172 | |||
173 | /* | 161 | /* |
174 | * Read a byte from I/O port | 162 | * Read a byte from I/O port |
175 | */ | 163 | */ |
@@ -191,6 +179,27 @@ iow(board_info_t * db, int reg, int value) | |||
191 | writeb(value, db->io_data); | 179 | writeb(value, db->io_data); |
192 | } | 180 | } |
193 | 181 | ||
182 | static void | ||
183 | dm9000_reset(board_info_t *db) | ||
184 | { | ||
185 | dev_dbg(db->dev, "resetting device\n"); | ||
186 | |||
187 | /* Reset DM9000, see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 | ||
188 | * The essential point is that we have to do a double reset, and the | ||
189 | * instruction is to set LBK into MAC internal loopback mode. | ||
190 | */ | ||
191 | iow(db, DM9000_NCR, 0x03); | ||
192 | udelay(100); /* Application note says at least 20 us */ | ||
193 | if (ior(db, DM9000_NCR) & 1) | ||
194 | dev_err(db->dev, "dm9000 did not respond to first reset\n"); | ||
195 | |||
196 | iow(db, DM9000_NCR, 0); | ||
197 | iow(db, DM9000_NCR, 0x03); | ||
198 | udelay(100); | ||
199 | if (ior(db, DM9000_NCR) & 1) | ||
200 | dev_err(db->dev, "dm9000 did not respond to second reset\n"); | ||
201 | } | ||
202 | |||
194 | /* routines for sending block to chip */ | 203 | /* routines for sending block to chip */ |
195 | 204 | ||
196 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | 205 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) |
@@ -744,15 +753,20 @@ static const struct ethtool_ops dm9000_ethtool_ops = { | |||
744 | static void dm9000_show_carrier(board_info_t *db, | 753 | static void dm9000_show_carrier(board_info_t *db, |
745 | unsigned carrier, unsigned nsr) | 754 | unsigned carrier, unsigned nsr) |
746 | { | 755 | { |
756 | int lpa; | ||
747 | struct net_device *ndev = db->ndev; | 757 | struct net_device *ndev = db->ndev; |
758 | struct mii_if_info *mii = &db->mii; | ||
748 | unsigned ncr = dm9000_read_locked(db, DM9000_NCR); | 759 | unsigned ncr = dm9000_read_locked(db, DM9000_NCR); |
749 | 760 | ||
750 | if (carrier) | 761 | if (carrier) { |
751 | dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n", | 762 | lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA); |
763 | dev_info(db->dev, | ||
764 | "%s: link up, %dMbps, %s-duplex, lpa 0x%04X\n", | ||
752 | ndev->name, (nsr & NSR_SPEED) ? 10 : 100, | 765 | ndev->name, (nsr & NSR_SPEED) ? 10 : 100, |
753 | (ncr & NCR_FDX) ? "full" : "half"); | 766 | (ncr & NCR_FDX) ? "full" : "half", lpa); |
754 | else | 767 | } else { |
755 | dev_info(db->dev, "%s: link down\n", ndev->name); | 768 | dev_info(db->dev, "%s: link down\n", ndev->name); |
769 | } | ||
756 | } | 770 | } |
757 | 771 | ||
758 | static void | 772 | static void |
@@ -890,9 +904,15 @@ dm9000_init_dm9000(struct net_device *dev) | |||
890 | (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0); | 904 | (dev->features & NETIF_F_RXCSUM) ? RCSR_CSUM : 0); |
891 | 905 | ||
892 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | 906 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ |
907 | iow(db, DM9000_GPR, 0); | ||
893 | 908 | ||
894 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | 909 | /* If we are dealing with DM9000B, some extra steps are required: a |
895 | dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM); /* Init */ | 910 | * manual phy reset, and setting init params. |
911 | */ | ||
912 | if (db->type == TYPE_DM9000B) { | ||
913 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); | ||
914 | dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM); | ||
915 | } | ||
896 | 916 | ||
897 | ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0; | 917 | ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0; |
898 | 918 | ||
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 186dc4a489a4..d6d810cb97c7 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -88,6 +88,7 @@ | |||
88 | 88 | ||
89 | #include <asm/io.h> | 89 | #include <asm/io.h> |
90 | #include <asm/reg.h> | 90 | #include <asm/reg.h> |
91 | #include <asm/mpc85xx.h> | ||
91 | #include <asm/irq.h> | 92 | #include <asm/irq.h> |
92 | #include <asm/uaccess.h> | 93 | #include <asm/uaccess.h> |
93 | #include <linux/module.h> | 94 | #include <linux/module.h> |
@@ -939,9 +940,8 @@ static void gfar_init_filer_table(struct gfar_private *priv) | |||
939 | } | 940 | } |
940 | } | 941 | } |
941 | 942 | ||
942 | static void gfar_detect_errata(struct gfar_private *priv) | 943 | static void __gfar_detect_errata_83xx(struct gfar_private *priv) |
943 | { | 944 | { |
944 | struct device *dev = &priv->ofdev->dev; | ||
945 | unsigned int pvr = mfspr(SPRN_PVR); | 945 | unsigned int pvr = mfspr(SPRN_PVR); |
946 | unsigned int svr = mfspr(SPRN_SVR); | 946 | unsigned int svr = mfspr(SPRN_SVR); |
947 | unsigned int mod = (svr >> 16) & 0xfff6; /* w/o E suffix */ | 947 | unsigned int mod = (svr >> 16) & 0xfff6; /* w/o E suffix */ |
@@ -957,15 +957,33 @@ static void gfar_detect_errata(struct gfar_private *priv) | |||
957 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) | 957 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) |
958 | priv->errata |= GFAR_ERRATA_76; | 958 | priv->errata |= GFAR_ERRATA_76; |
959 | 959 | ||
960 | /* MPC8313 and MPC837x all rev */ | 960 | /* MPC8313 Rev < 2.0 */ |
961 | if ((pvr == 0x80850010 && mod == 0x80b0) || | 961 | if (pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020) |
962 | (pvr == 0x80861010 && (mod & 0xfff9) == 0x80c0)) | 962 | priv->errata |= GFAR_ERRATA_12; |
963 | priv->errata |= GFAR_ERRATA_A002; | 963 | } |
964 | 964 | ||
965 | /* MPC8313 Rev < 2.0, MPC8548 rev 2.0 */ | 965 | static void __gfar_detect_errata_85xx(struct gfar_private *priv) |
966 | if ((pvr == 0x80850010 && mod == 0x80b0 && rev < 0x0020) || | 966 | { |
967 | (pvr == 0x80210020 && mod == 0x8030 && rev == 0x0020)) | 967 | unsigned int svr = mfspr(SPRN_SVR); |
968 | |||
969 | if ((SVR_SOC_VER(svr) == SVR_8548) && (SVR_REV(svr) == 0x20)) | ||
968 | priv->errata |= GFAR_ERRATA_12; | 970 | priv->errata |= GFAR_ERRATA_12; |
971 | if (((SVR_SOC_VER(svr) == SVR_P2020) && (SVR_REV(svr) < 0x20)) || | ||
972 | ((SVR_SOC_VER(svr) == SVR_P2010) && (SVR_REV(svr) < 0x20))) | ||
973 | priv->errata |= GFAR_ERRATA_76; /* aka eTSEC 20 */ | ||
974 | } | ||
975 | |||
976 | static void gfar_detect_errata(struct gfar_private *priv) | ||
977 | { | ||
978 | struct device *dev = &priv->ofdev->dev; | ||
979 | |||
980 | /* no plans to fix */ | ||
981 | priv->errata |= GFAR_ERRATA_A002; | ||
982 | |||
983 | if (pvr_version_is(PVR_VER_E500V1) || pvr_version_is(PVR_VER_E500V2)) | ||
984 | __gfar_detect_errata_85xx(priv); | ||
985 | else /* non-mpc85xx parts, i.e. e300 core based */ | ||
986 | __gfar_detect_errata_83xx(priv); | ||
969 | 987 | ||
970 | if (priv->errata) | 988 | if (priv->errata) |
971 | dev_info(dev, "enabled errata workarounds, flags: 0x%x\n", | 989 | dev_info(dev, "enabled errata workarounds, flags: 0x%x\n", |
@@ -1599,7 +1617,7 @@ static int __gfar_is_rx_idle(struct gfar_private *priv) | |||
1599 | /* Normaly TSEC should not hang on GRS commands, so we should | 1617 | /* Normaly TSEC should not hang on GRS commands, so we should |
1600 | * actually wait for IEVENT_GRSC flag. | 1618 | * actually wait for IEVENT_GRSC flag. |
1601 | */ | 1619 | */ |
1602 | if (likely(!gfar_has_errata(priv, GFAR_ERRATA_A002))) | 1620 | if (!gfar_has_errata(priv, GFAR_ERRATA_A002)) |
1603 | return 0; | 1621 | return 0; |
1604 | 1622 | ||
1605 | /* Read the eTSEC register at offset 0xD1C. If bits 7-14 are | 1623 | /* Read the eTSEC register at offset 0xD1C. If bits 7-14 are |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c index 5472cbd34028..6ca30739625f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c | |||
@@ -180,28 +180,32 @@ static int verify_block_sig(struct mlx5_cmd_prot_block *block) | |||
180 | return 0; | 180 | return 0; |
181 | } | 181 | } |
182 | 182 | ||
183 | static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token) | 183 | static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token, |
184 | int csum) | ||
184 | { | 185 | { |
185 | block->token = token; | 186 | block->token = token; |
186 | block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 2); | 187 | if (csum) { |
187 | block->sig = ~xor8_buf(block, sizeof(*block) - 1); | 188 | block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) - |
189 | sizeof(block->data) - 2); | ||
190 | block->sig = ~xor8_buf(block, sizeof(*block) - 1); | ||
191 | } | ||
188 | } | 192 | } |
189 | 193 | ||
190 | static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token) | 194 | static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token, int csum) |
191 | { | 195 | { |
192 | struct mlx5_cmd_mailbox *next = msg->next; | 196 | struct mlx5_cmd_mailbox *next = msg->next; |
193 | 197 | ||
194 | while (next) { | 198 | while (next) { |
195 | calc_block_sig(next->buf, token); | 199 | calc_block_sig(next->buf, token, csum); |
196 | next = next->next; | 200 | next = next->next; |
197 | } | 201 | } |
198 | } | 202 | } |
199 | 203 | ||
200 | static void set_signature(struct mlx5_cmd_work_ent *ent) | 204 | static void set_signature(struct mlx5_cmd_work_ent *ent, int csum) |
201 | { | 205 | { |
202 | ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay)); | 206 | ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay)); |
203 | calc_chain_sig(ent->in, ent->token); | 207 | calc_chain_sig(ent->in, ent->token, csum); |
204 | calc_chain_sig(ent->out, ent->token); | 208 | calc_chain_sig(ent->out, ent->token, csum); |
205 | } | 209 | } |
206 | 210 | ||
207 | static void poll_timeout(struct mlx5_cmd_work_ent *ent) | 211 | static void poll_timeout(struct mlx5_cmd_work_ent *ent) |
@@ -539,8 +543,7 @@ static void cmd_work_handler(struct work_struct *work) | |||
539 | lay->type = MLX5_PCI_CMD_XPORT; | 543 | lay->type = MLX5_PCI_CMD_XPORT; |
540 | lay->token = ent->token; | 544 | lay->token = ent->token; |
541 | lay->status_own = CMD_OWNER_HW; | 545 | lay->status_own = CMD_OWNER_HW; |
542 | if (!cmd->checksum_disabled) | 546 | set_signature(ent, !cmd->checksum_disabled); |
543 | set_signature(ent); | ||
544 | dump_command(dev, ent, 1); | 547 | dump_command(dev, ent, 1); |
545 | ktime_get_ts(&ent->ts1); | 548 | ktime_get_ts(&ent->ts1); |
546 | 549 | ||
@@ -773,8 +776,6 @@ static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size) | |||
773 | 776 | ||
774 | copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE); | 777 | copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE); |
775 | block = next->buf; | 778 | block = next->buf; |
776 | if (xor8_buf(block, sizeof(*block)) != 0xff) | ||
777 | return -EINVAL; | ||
778 | 779 | ||
779 | memcpy(to, block->data, copy); | 780 | memcpy(to, block->data, copy); |
780 | to += copy; | 781 | to += copy; |
@@ -1361,6 +1362,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev) | |||
1361 | goto err_map; | 1362 | goto err_map; |
1362 | } | 1363 | } |
1363 | 1364 | ||
1365 | cmd->checksum_disabled = 1; | ||
1364 | cmd->max_reg_cmds = (1 << cmd->log_sz) - 1; | 1366 | cmd->max_reg_cmds = (1 << cmd->log_sz) - 1; |
1365 | cmd->bitmask = (1 << cmd->max_reg_cmds) - 1; | 1367 | cmd->bitmask = (1 << cmd->max_reg_cmds) - 1; |
1366 | 1368 | ||
@@ -1510,7 +1512,7 @@ int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr) | |||
1510 | case MLX5_CMD_STAT_BAD_SYS_STATE_ERR: return -EIO; | 1512 | case MLX5_CMD_STAT_BAD_SYS_STATE_ERR: return -EIO; |
1511 | case MLX5_CMD_STAT_BAD_RES_ERR: return -EINVAL; | 1513 | case MLX5_CMD_STAT_BAD_RES_ERR: return -EINVAL; |
1512 | case MLX5_CMD_STAT_RES_BUSY: return -EBUSY; | 1514 | case MLX5_CMD_STAT_RES_BUSY: return -EBUSY; |
1513 | case MLX5_CMD_STAT_LIM_ERR: return -EINVAL; | 1515 | case MLX5_CMD_STAT_LIM_ERR: return -ENOMEM; |
1514 | case MLX5_CMD_STAT_BAD_RES_STATE_ERR: return -EINVAL; | 1516 | case MLX5_CMD_STAT_BAD_RES_STATE_ERR: return -EINVAL; |
1515 | case MLX5_CMD_STAT_IX_ERR: return -EINVAL; | 1517 | case MLX5_CMD_STAT_IX_ERR: return -EINVAL; |
1516 | case MLX5_CMD_STAT_NO_RES_ERR: return -EAGAIN; | 1518 | case MLX5_CMD_STAT_NO_RES_ERR: return -EAGAIN; |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c index 443cc4d7b024..2231d93cc7ad 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c | |||
@@ -366,9 +366,11 @@ int mlx5_create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq, u8 vecidx, | |||
366 | goto err_in; | 366 | goto err_in; |
367 | } | 367 | } |
368 | 368 | ||
369 | snprintf(eq->name, MLX5_MAX_EQ_NAME, "%s@pci:%s", | ||
370 | name, pci_name(dev->pdev)); | ||
369 | eq->eqn = out.eq_number; | 371 | eq->eqn = out.eq_number; |
370 | err = request_irq(table->msix_arr[vecidx].vector, mlx5_msix_handler, 0, | 372 | err = request_irq(table->msix_arr[vecidx].vector, mlx5_msix_handler, 0, |
371 | name, eq); | 373 | eq->name, eq); |
372 | if (err) | 374 | if (err) |
373 | goto err_eq; | 375 | goto err_eq; |
374 | 376 | ||
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c index b47739b0b5f6..bc0f5fb66e24 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c | |||
@@ -165,9 +165,7 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) | |||
165 | struct mlx5_cmd_set_hca_cap_mbox_in *set_ctx = NULL; | 165 | struct mlx5_cmd_set_hca_cap_mbox_in *set_ctx = NULL; |
166 | struct mlx5_cmd_query_hca_cap_mbox_in query_ctx; | 166 | struct mlx5_cmd_query_hca_cap_mbox_in query_ctx; |
167 | struct mlx5_cmd_set_hca_cap_mbox_out set_out; | 167 | struct mlx5_cmd_set_hca_cap_mbox_out set_out; |
168 | struct mlx5_profile *prof = dev->profile; | ||
169 | u64 flags; | 168 | u64 flags; |
170 | int csum = 1; | ||
171 | int err; | 169 | int err; |
172 | 170 | ||
173 | memset(&query_ctx, 0, sizeof(query_ctx)); | 171 | memset(&query_ctx, 0, sizeof(query_ctx)); |
@@ -197,20 +195,14 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) | |||
197 | memcpy(&set_ctx->hca_cap, &query_out->hca_cap, | 195 | memcpy(&set_ctx->hca_cap, &query_out->hca_cap, |
198 | sizeof(set_ctx->hca_cap)); | 196 | sizeof(set_ctx->hca_cap)); |
199 | 197 | ||
200 | if (prof->mask & MLX5_PROF_MASK_CMDIF_CSUM) { | ||
201 | csum = !!prof->cmdif_csum; | ||
202 | flags = be64_to_cpu(set_ctx->hca_cap.flags); | ||
203 | if (csum) | ||
204 | flags |= MLX5_DEV_CAP_FLAG_CMDIF_CSUM; | ||
205 | else | ||
206 | flags &= ~MLX5_DEV_CAP_FLAG_CMDIF_CSUM; | ||
207 | |||
208 | set_ctx->hca_cap.flags = cpu_to_be64(flags); | ||
209 | } | ||
210 | |||
211 | if (dev->profile->mask & MLX5_PROF_MASK_QP_SIZE) | 198 | if (dev->profile->mask & MLX5_PROF_MASK_QP_SIZE) |
212 | set_ctx->hca_cap.log_max_qp = dev->profile->log_max_qp; | 199 | set_ctx->hca_cap.log_max_qp = dev->profile->log_max_qp; |
213 | 200 | ||
201 | flags = be64_to_cpu(query_out->hca_cap.flags); | ||
202 | /* disable checksum */ | ||
203 | flags &= ~MLX5_DEV_CAP_FLAG_CMDIF_CSUM; | ||
204 | |||
205 | set_ctx->hca_cap.flags = cpu_to_be64(flags); | ||
214 | memset(&set_out, 0, sizeof(set_out)); | 206 | memset(&set_out, 0, sizeof(set_out)); |
215 | set_ctx->hca_cap.log_uar_page_sz = cpu_to_be16(PAGE_SHIFT - 12); | 207 | set_ctx->hca_cap.log_uar_page_sz = cpu_to_be16(PAGE_SHIFT - 12); |
216 | set_ctx->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_SET_HCA_CAP); | 208 | set_ctx->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_SET_HCA_CAP); |
@@ -225,9 +217,6 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) | |||
225 | if (err) | 217 | if (err) |
226 | goto query_ex; | 218 | goto query_ex; |
227 | 219 | ||
228 | if (!csum) | ||
229 | dev->cmd.checksum_disabled = 1; | ||
230 | |||
231 | query_ex: | 220 | query_ex: |
232 | kfree(query_out); | 221 | kfree(query_out); |
233 | kfree(set_ctx); | 222 | kfree(set_ctx); |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c b/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c index 3a2408d44820..7b12acf210f8 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c | |||
@@ -90,6 +90,10 @@ struct mlx5_manage_pages_outbox { | |||
90 | __be64 pas[0]; | 90 | __be64 pas[0]; |
91 | }; | 91 | }; |
92 | 92 | ||
93 | enum { | ||
94 | MAX_RECLAIM_TIME_MSECS = 5000, | ||
95 | }; | ||
96 | |||
93 | static int insert_page(struct mlx5_core_dev *dev, u64 addr, struct page *page, u16 func_id) | 97 | static int insert_page(struct mlx5_core_dev *dev, u64 addr, struct page *page, u16 func_id) |
94 | { | 98 | { |
95 | struct rb_root *root = &dev->priv.page_root; | 99 | struct rb_root *root = &dev->priv.page_root; |
@@ -279,6 +283,9 @@ static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages, | |||
279 | int err; | 283 | int err; |
280 | int i; | 284 | int i; |
281 | 285 | ||
286 | if (nclaimed) | ||
287 | *nclaimed = 0; | ||
288 | |||
282 | memset(&in, 0, sizeof(in)); | 289 | memset(&in, 0, sizeof(in)); |
283 | outlen = sizeof(*out) + npages * sizeof(out->pas[0]); | 290 | outlen = sizeof(*out) + npages * sizeof(out->pas[0]); |
284 | out = mlx5_vzalloc(outlen); | 291 | out = mlx5_vzalloc(outlen); |
@@ -388,20 +395,25 @@ static int optimal_reclaimed_pages(void) | |||
388 | 395 | ||
389 | int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev) | 396 | int mlx5_reclaim_startup_pages(struct mlx5_core_dev *dev) |
390 | { | 397 | { |
391 | unsigned long end = jiffies + msecs_to_jiffies(5000); | 398 | unsigned long end = jiffies + msecs_to_jiffies(MAX_RECLAIM_TIME_MSECS); |
392 | struct fw_page *fwp; | 399 | struct fw_page *fwp; |
393 | struct rb_node *p; | 400 | struct rb_node *p; |
401 | int nclaimed = 0; | ||
394 | int err; | 402 | int err; |
395 | 403 | ||
396 | do { | 404 | do { |
397 | p = rb_first(&dev->priv.page_root); | 405 | p = rb_first(&dev->priv.page_root); |
398 | if (p) { | 406 | if (p) { |
399 | fwp = rb_entry(p, struct fw_page, rb_node); | 407 | fwp = rb_entry(p, struct fw_page, rb_node); |
400 | err = reclaim_pages(dev, fwp->func_id, optimal_reclaimed_pages(), NULL); | 408 | err = reclaim_pages(dev, fwp->func_id, |
409 | optimal_reclaimed_pages(), | ||
410 | &nclaimed); | ||
401 | if (err) { | 411 | if (err) { |
402 | mlx5_core_warn(dev, "failed reclaiming pages (%d)\n", err); | 412 | mlx5_core_warn(dev, "failed reclaiming pages (%d)\n", err); |
403 | return err; | 413 | return err; |
404 | } | 414 | } |
415 | if (nclaimed) | ||
416 | end = jiffies + msecs_to_jiffies(MAX_RECLAIM_TIME_MSECS); | ||
405 | } | 417 | } |
406 | if (time_after(jiffies, end)) { | 418 | if (time_after(jiffies, end)) { |
407 | mlx5_core_warn(dev, "FW did not return all pages. giving up...\n"); | 419 | mlx5_core_warn(dev, "FW did not return all pages. giving up...\n"); |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c index 66355b72818c..b2a8805997ca 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | |||
@@ -691,7 +691,7 @@ static int qlcnic_set_channels(struct net_device *dev, | |||
691 | return err; | 691 | return err; |
692 | } | 692 | } |
693 | 693 | ||
694 | if (channel->tx_count) { | 694 | if (qlcnic_82xx_check(adapter) && channel->tx_count) { |
695 | err = qlcnic_validate_max_tx_rings(adapter, channel->tx_count); | 695 | err = qlcnic_validate_max_tx_rings(adapter, channel->tx_count); |
696 | if (err) | 696 | if (err) |
697 | return err; | 697 | return err; |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c index 24e6b1123d86..dcf4a4e7ce23 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c | |||
@@ -3648,11 +3648,6 @@ int qlcnic_validate_max_tx_rings(struct qlcnic_adapter *adapter, u32 txq) | |||
3648 | u8 max_hw = QLCNIC_MAX_TX_RINGS; | 3648 | u8 max_hw = QLCNIC_MAX_TX_RINGS; |
3649 | u32 max_allowed; | 3649 | u32 max_allowed; |
3650 | 3650 | ||
3651 | if (!qlcnic_82xx_check(adapter)) { | ||
3652 | netdev_err(netdev, "No Multi TX-Q support\n"); | ||
3653 | return -EINVAL; | ||
3654 | } | ||
3655 | |||
3656 | if (!qlcnic_use_msi_x && !qlcnic_use_msi) { | 3651 | if (!qlcnic_use_msi_x && !qlcnic_use_msi) { |
3657 | netdev_err(netdev, "No Multi TX-Q support in INT-x mode\n"); | 3652 | netdev_err(netdev, "No Multi TX-Q support in INT-x mode\n"); |
3658 | return -EINVAL; | 3653 | return -EINVAL; |
@@ -3692,8 +3687,7 @@ int qlcnic_validate_max_rss(struct qlcnic_adapter *adapter, | |||
3692 | u8 max_hw = adapter->ahw->max_rx_ques; | 3687 | u8 max_hw = adapter->ahw->max_rx_ques; |
3693 | u32 max_allowed; | 3688 | u32 max_allowed; |
3694 | 3689 | ||
3695 | if (qlcnic_82xx_check(adapter) && !qlcnic_use_msi_x && | 3690 | if (!qlcnic_use_msi_x && !qlcnic_use_msi) { |
3696 | !qlcnic_use_msi) { | ||
3697 | netdev_err(netdev, "No RSS support in INT-x mode\n"); | 3691 | netdev_err(netdev, "No RSS support in INT-x mode\n"); |
3698 | return -EINVAL; | 3692 | return -EINVAL; |
3699 | } | 3693 | } |
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index ee8df999494c..7258366f7e0b 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c | |||
@@ -620,16 +620,12 @@ static struct sh_eth_cpu_data sh7734_data = { | |||
620 | .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | | 620 | .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | |
621 | EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE | | 621 | EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE | |
622 | EESR_TDE | EESR_ECI, | 622 | EESR_TDE | EESR_ECI, |
623 | .fdr_value = 0x0000070f, | ||
624 | .rmcr_value = 0x00000001, | ||
625 | 623 | ||
626 | .apr = 1, | 624 | .apr = 1, |
627 | .mpr = 1, | 625 | .mpr = 1, |
628 | .tpauser = 1, | 626 | .tpauser = 1, |
629 | .bculr = 1, | 627 | .bculr = 1, |
630 | .hw_swap = 1, | 628 | .hw_swap = 1, |
631 | .rpadir = 1, | ||
632 | .rpadir_value = 2 << 16, | ||
633 | .no_trimd = 1, | 629 | .no_trimd = 1, |
634 | .no_ade = 1, | 630 | .no_ade = 1, |
635 | .tsu = 1, | 631 | .tsu = 1, |
@@ -692,12 +688,16 @@ static struct sh_eth_cpu_data r8a7740_data = { | |||
692 | .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | | 688 | .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | |
693 | EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE | | 689 | EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE | |
694 | EESR_TDE | EESR_ECI, | 690 | EESR_TDE | EESR_ECI, |
691 | .fdr_value = 0x0000070f, | ||
692 | .rmcr_value = 0x00000001, | ||
695 | 693 | ||
696 | .apr = 1, | 694 | .apr = 1, |
697 | .mpr = 1, | 695 | .mpr = 1, |
698 | .tpauser = 1, | 696 | .tpauser = 1, |
699 | .bculr = 1, | 697 | .bculr = 1, |
700 | .hw_swap = 1, | 698 | .hw_swap = 1, |
699 | .rpadir = 1, | ||
700 | .rpadir_value = 2 << 16, | ||
701 | .no_trimd = 1, | 701 | .no_trimd = 1, |
702 | .no_ade = 1, | 702 | .no_ade = 1, |
703 | .tsu = 1, | 703 | .tsu = 1, |
diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h index 5730fe2445a6..98eedb90cdc3 100644 --- a/drivers/net/ethernet/smsc/smc91x.h +++ b/drivers/net/ethernet/smsc/smc91x.h | |||
@@ -1124,8 +1124,7 @@ static const char * chip_ids[ 16 ] = { | |||
1124 | void __iomem *__ioaddr = ioaddr; \ | 1124 | void __iomem *__ioaddr = ioaddr; \ |
1125 | if (__len >= 2 && (unsigned long)__ptr & 2) { \ | 1125 | if (__len >= 2 && (unsigned long)__ptr & 2) { \ |
1126 | __len -= 2; \ | 1126 | __len -= 2; \ |
1127 | SMC_outw(*(u16 *)__ptr, ioaddr, \ | 1127 | SMC_outsw(ioaddr, DATA_REG(lp), __ptr, 1); \ |
1128 | DATA_REG(lp)); \ | ||
1129 | __ptr += 2; \ | 1128 | __ptr += 2; \ |
1130 | } \ | 1129 | } \ |
1131 | if (SMC_CAN_USE_DATACS && lp->datacs) \ | 1130 | if (SMC_CAN_USE_DATACS && lp->datacs) \ |
@@ -1133,8 +1132,7 @@ static const char * chip_ids[ 16 ] = { | |||
1133 | SMC_outsl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \ | 1132 | SMC_outsl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \ |
1134 | if (__len & 2) { \ | 1133 | if (__len & 2) { \ |
1135 | __ptr += (__len & ~3); \ | 1134 | __ptr += (__len & ~3); \ |
1136 | SMC_outw(*((u16 *)__ptr), ioaddr, \ | 1135 | SMC_outsw(ioaddr, DATA_REG(lp), __ptr, 1); \ |
1137 | DATA_REG(lp)); \ | ||
1138 | } \ | 1136 | } \ |
1139 | } else if (SMC_16BIT(lp)) \ | 1137 | } else if (SMC_16BIT(lp)) \ |
1140 | SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \ | 1138 | SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \ |
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 1fd8125e58a8..90d41d26ec6d 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c | |||
@@ -637,13 +637,6 @@ void cpsw_rx_handler(void *token, int len, int status) | |||
637 | static irqreturn_t cpsw_interrupt(int irq, void *dev_id) | 637 | static irqreturn_t cpsw_interrupt(int irq, void *dev_id) |
638 | { | 638 | { |
639 | struct cpsw_priv *priv = dev_id; | 639 | struct cpsw_priv *priv = dev_id; |
640 | u32 rx, tx, rx_thresh; | ||
641 | |||
642 | rx_thresh = __raw_readl(&priv->wr_regs->rx_thresh_stat); | ||
643 | rx = __raw_readl(&priv->wr_regs->rx_stat); | ||
644 | tx = __raw_readl(&priv->wr_regs->tx_stat); | ||
645 | if (!rx_thresh && !rx && !tx) | ||
646 | return IRQ_NONE; | ||
647 | 640 | ||
648 | cpsw_intr_disable(priv); | 641 | cpsw_intr_disable(priv); |
649 | if (priv->irq_enabled == true) { | 642 | if (priv->irq_enabled == true) { |
@@ -1171,9 +1164,9 @@ static int cpsw_ndo_open(struct net_device *ndev) | |||
1171 | } | 1164 | } |
1172 | } | 1165 | } |
1173 | 1166 | ||
1167 | napi_enable(&priv->napi); | ||
1174 | cpdma_ctlr_start(priv->dma); | 1168 | cpdma_ctlr_start(priv->dma); |
1175 | cpsw_intr_enable(priv); | 1169 | cpsw_intr_enable(priv); |
1176 | napi_enable(&priv->napi); | ||
1177 | cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); | 1170 | cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX); |
1178 | cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); | 1171 | cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX); |
1179 | 1172 | ||
diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c index fba1c489a911..41ba974bf37c 100644 --- a/drivers/net/ethernet/ti/davinci_emac.c +++ b/drivers/net/ethernet/ti/davinci_emac.c | |||
@@ -876,8 +876,7 @@ static void emac_dev_mcast_set(struct net_device *ndev) | |||
876 | netdev_mc_count(ndev) > EMAC_DEF_MAX_MULTICAST_ADDRESSES) { | 876 | netdev_mc_count(ndev) > EMAC_DEF_MAX_MULTICAST_ADDRESSES) { |
877 | mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); | 877 | mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); |
878 | emac_add_mcast(priv, EMAC_ALL_MULTI_SET, NULL); | 878 | emac_add_mcast(priv, EMAC_ALL_MULTI_SET, NULL); |
879 | } | 879 | } else if (!netdev_mc_empty(ndev)) { |
880 | if (!netdev_mc_empty(ndev)) { | ||
881 | struct netdev_hw_addr *ha; | 880 | struct netdev_hw_addr *ha; |
882 | 881 | ||
883 | mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); | 882 | mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); |
diff --git a/drivers/net/hamradio/yam.c b/drivers/net/hamradio/yam.c index ff31ff0e0c43..1971411574db 100644 --- a/drivers/net/hamradio/yam.c +++ b/drivers/net/hamradio/yam.c | |||
@@ -975,7 +975,6 @@ static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
975 | return -EINVAL; /* Cannot change this parameter when up */ | 975 | return -EINVAL; /* Cannot change this parameter when up */ |
976 | if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL) | 976 | if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL) |
977 | return -ENOBUFS; | 977 | return -ENOBUFS; |
978 | ym->bitrate = 9600; | ||
979 | if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) { | 978 | if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) { |
980 | kfree(ym); | 979 | kfree(ym); |
981 | return -EFAULT; | 980 | return -EFAULT; |
diff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c index 3569293df872..846cc19c04f2 100644 --- a/drivers/net/usb/ax88179_178a.c +++ b/drivers/net/usb/ax88179_178a.c | |||
@@ -36,8 +36,8 @@ | |||
36 | #define AX_RXHDR_L4_TYPE_TCP 16 | 36 | #define AX_RXHDR_L4_TYPE_TCP 16 |
37 | #define AX_RXHDR_L3CSUM_ERR 2 | 37 | #define AX_RXHDR_L3CSUM_ERR 2 |
38 | #define AX_RXHDR_L4CSUM_ERR 1 | 38 | #define AX_RXHDR_L4CSUM_ERR 1 |
39 | #define AX_RXHDR_CRC_ERR ((u32)BIT(31)) | 39 | #define AX_RXHDR_CRC_ERR ((u32)BIT(29)) |
40 | #define AX_RXHDR_DROP_ERR ((u32)BIT(30)) | 40 | #define AX_RXHDR_DROP_ERR ((u32)BIT(31)) |
41 | #define AX_ACCESS_MAC 0x01 | 41 | #define AX_ACCESS_MAC 0x01 |
42 | #define AX_ACCESS_PHY 0x02 | 42 | #define AX_ACCESS_PHY 0x02 |
43 | #define AX_ACCESS_EEPROM 0x04 | 43 | #define AX_ACCESS_EEPROM 0x04 |
@@ -1406,6 +1406,19 @@ static const struct driver_info sitecom_info = { | |||
1406 | .tx_fixup = ax88179_tx_fixup, | 1406 | .tx_fixup = ax88179_tx_fixup, |
1407 | }; | 1407 | }; |
1408 | 1408 | ||
1409 | static const struct driver_info samsung_info = { | ||
1410 | .description = "Samsung USB Ethernet Adapter", | ||
1411 | .bind = ax88179_bind, | ||
1412 | .unbind = ax88179_unbind, | ||
1413 | .status = ax88179_status, | ||
1414 | .link_reset = ax88179_link_reset, | ||
1415 | .reset = ax88179_reset, | ||
1416 | .stop = ax88179_stop, | ||
1417 | .flags = FLAG_ETHER | FLAG_FRAMING_AX, | ||
1418 | .rx_fixup = ax88179_rx_fixup, | ||
1419 | .tx_fixup = ax88179_tx_fixup, | ||
1420 | }; | ||
1421 | |||
1409 | static const struct usb_device_id products[] = { | 1422 | static const struct usb_device_id products[] = { |
1410 | { | 1423 | { |
1411 | /* ASIX AX88179 10/100/1000 */ | 1424 | /* ASIX AX88179 10/100/1000 */ |
@@ -1418,7 +1431,11 @@ static const struct usb_device_id products[] = { | |||
1418 | }, { | 1431 | }, { |
1419 | /* Sitecom USB 3.0 to Gigabit Adapter */ | 1432 | /* Sitecom USB 3.0 to Gigabit Adapter */ |
1420 | USB_DEVICE(0x0df6, 0x0072), | 1433 | USB_DEVICE(0x0df6, 0x0072), |
1421 | .driver_info = (unsigned long) &sitecom_info, | 1434 | .driver_info = (unsigned long)&sitecom_info, |
1435 | }, { | ||
1436 | /* Samsung USB Ethernet Adapter */ | ||
1437 | USB_DEVICE(0x04e8, 0xa100), | ||
1438 | .driver_info = (unsigned long)&samsung_info, | ||
1422 | }, | 1439 | }, |
1423 | { }, | 1440 | { }, |
1424 | }; | 1441 | }; |
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c index d03b6b6c64c0..e0a4a2b08e45 100644 --- a/drivers/net/usb/qmi_wwan.c +++ b/drivers/net/usb/qmi_wwan.c | |||
@@ -730,6 +730,7 @@ static const struct usb_device_id products[] = { | |||
730 | {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ | 730 | {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ |
731 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ | 731 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ |
732 | {QMI_FIXED_INTF(0x1bc7, 0x1201, 2)}, /* Telit LE920 */ | 732 | {QMI_FIXED_INTF(0x1bc7, 0x1201, 2)}, /* Telit LE920 */ |
733 | {QMI_FIXED_INTF(0x0b3c, 0xc005, 6)}, /* Olivetti Olicard 200 */ | ||
733 | {QMI_FIXED_INTF(0x1e2d, 0x0060, 4)}, /* Cinterion PLxx */ | 734 | {QMI_FIXED_INTF(0x1e2d, 0x0060, 4)}, /* Cinterion PLxx */ |
734 | 735 | ||
735 | /* 4. Gobi 1000 devices */ | 736 | /* 4. Gobi 1000 devices */ |
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index bf94e10a37c8..90a429b7ebad 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c | |||
@@ -1688,8 +1688,10 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod) | |||
1688 | if (dev->can_dma_sg && !(info->flags & FLAG_SEND_ZLP) && | 1688 | if (dev->can_dma_sg && !(info->flags & FLAG_SEND_ZLP) && |
1689 | !(info->flags & FLAG_MULTI_PACKET)) { | 1689 | !(info->flags & FLAG_MULTI_PACKET)) { |
1690 | dev->padding_pkt = kzalloc(1, GFP_KERNEL); | 1690 | dev->padding_pkt = kzalloc(1, GFP_KERNEL); |
1691 | if (!dev->padding_pkt) | 1691 | if (!dev->padding_pkt) { |
1692 | status = -ENOMEM; | ||
1692 | goto out4; | 1693 | goto out4; |
1694 | } | ||
1693 | } | 1695 | } |
1694 | 1696 | ||
1695 | status = register_netdev (net); | 1697 | status = register_netdev (net); |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index defec2b3c5a4..9fbdfcd1e1a0 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -938,7 +938,9 @@ static int virtnet_set_queues(struct virtnet_info *vi, u16 queue_pairs) | |||
938 | return -EINVAL; | 938 | return -EINVAL; |
939 | } else { | 939 | } else { |
940 | vi->curr_queue_pairs = queue_pairs; | 940 | vi->curr_queue_pairs = queue_pairs; |
941 | schedule_delayed_work(&vi->refill, 0); | 941 | /* virtnet_open() will refill when device is going to up. */ |
942 | if (dev->flags & IFF_UP) | ||
943 | schedule_delayed_work(&vi->refill, 0); | ||
942 | } | 944 | } |
943 | 945 | ||
944 | return 0; | 946 | return 0; |
@@ -1116,6 +1118,11 @@ static int virtnet_cpu_callback(struct notifier_block *nfb, | |||
1116 | { | 1118 | { |
1117 | struct virtnet_info *vi = container_of(nfb, struct virtnet_info, nb); | 1119 | struct virtnet_info *vi = container_of(nfb, struct virtnet_info, nb); |
1118 | 1120 | ||
1121 | mutex_lock(&vi->config_lock); | ||
1122 | |||
1123 | if (!vi->config_enable) | ||
1124 | goto done; | ||
1125 | |||
1119 | switch(action & ~CPU_TASKS_FROZEN) { | 1126 | switch(action & ~CPU_TASKS_FROZEN) { |
1120 | case CPU_ONLINE: | 1127 | case CPU_ONLINE: |
1121 | case CPU_DOWN_FAILED: | 1128 | case CPU_DOWN_FAILED: |
@@ -1128,6 +1135,9 @@ static int virtnet_cpu_callback(struct notifier_block *nfb, | |||
1128 | default: | 1135 | default: |
1129 | break; | 1136 | break; |
1130 | } | 1137 | } |
1138 | |||
1139 | done: | ||
1140 | mutex_unlock(&vi->config_lock); | ||
1131 | return NOTIFY_OK; | 1141 | return NOTIFY_OK; |
1132 | } | 1142 | } |
1133 | 1143 | ||
@@ -1733,7 +1743,9 @@ static int virtnet_restore(struct virtio_device *vdev) | |||
1733 | vi->config_enable = true; | 1743 | vi->config_enable = true; |
1734 | mutex_unlock(&vi->config_lock); | 1744 | mutex_unlock(&vi->config_lock); |
1735 | 1745 | ||
1746 | rtnl_lock(); | ||
1736 | virtnet_set_queues(vi, vi->curr_queue_pairs); | 1747 | virtnet_set_queues(vi, vi->curr_queue_pairs); |
1748 | rtnl_unlock(); | ||
1737 | 1749 | ||
1738 | return 0; | 1750 | return 0; |
1739 | } | 1751 | } |
diff --git a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c index 3f0c4f268751..bcfff0d62de4 100644 --- a/drivers/net/wan/farsync.c +++ b/drivers/net/wan/farsync.c | |||
@@ -1972,6 +1972,7 @@ fst_get_iface(struct fst_card_info *card, struct fst_port_info *port, | |||
1972 | } | 1972 | } |
1973 | 1973 | ||
1974 | i = port->index; | 1974 | i = port->index; |
1975 | memset(&sync, 0, sizeof(sync)); | ||
1975 | sync.clock_rate = FST_RDL(card, portConfig[i].lineSpeed); | 1976 | sync.clock_rate = FST_RDL(card, portConfig[i].lineSpeed); |
1976 | /* Lucky card and linux use same encoding here */ | 1977 | /* Lucky card and linux use same encoding here */ |
1977 | sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == | 1978 | sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == |
diff --git a/drivers/net/wan/wanxl.c b/drivers/net/wan/wanxl.c index 6a24a5a70cc7..4c0a69779b89 100644 --- a/drivers/net/wan/wanxl.c +++ b/drivers/net/wan/wanxl.c | |||
@@ -355,6 +355,7 @@ static int wanxl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
355 | ifr->ifr_settings.size = size; /* data size wanted */ | 355 | ifr->ifr_settings.size = size; /* data size wanted */ |
356 | return -ENOBUFS; | 356 | return -ENOBUFS; |
357 | } | 357 | } |
358 | memset(&line, 0, sizeof(line)); | ||
358 | line.clock_type = get_status(port)->clocking; | 359 | line.clock_type = get_status(port)->clocking; |
359 | line.clock_rate = 0; | 360 | line.clock_rate = 0; |
360 | line.loopback = 0; | 361 | line.loopback = 0; |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index c42b55c1face..20a2fbc1e34f 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -208,6 +208,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start) | |||
208 | struct ath_hw *ah = sc->sc_ah; | 208 | struct ath_hw *ah = sc->sc_ah; |
209 | struct ath_common *common = ath9k_hw_common(ah); | 209 | struct ath_common *common = ath9k_hw_common(ah); |
210 | unsigned long flags; | 210 | unsigned long flags; |
211 | int i; | ||
211 | 212 | ||
212 | if (ath_startrecv(sc) != 0) { | 213 | if (ath_startrecv(sc) != 0) { |
213 | ath_err(common, "Unable to restart recv logic\n"); | 214 | ath_err(common, "Unable to restart recv logic\n"); |
@@ -235,6 +236,15 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start) | |||
235 | } | 236 | } |
236 | work: | 237 | work: |
237 | ath_restart_work(sc); | 238 | ath_restart_work(sc); |
239 | |||
240 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { | ||
241 | if (!ATH_TXQ_SETUP(sc, i)) | ||
242 | continue; | ||
243 | |||
244 | spin_lock_bh(&sc->tx.txq[i].axq_lock); | ||
245 | ath_txq_schedule(sc, &sc->tx.txq[i]); | ||
246 | spin_unlock_bh(&sc->tx.txq[i].axq_lock); | ||
247 | } | ||
238 | } | 248 | } |
239 | 249 | ||
240 | ieee80211_wake_queues(sc->hw); | 250 | ieee80211_wake_queues(sc->hw); |
@@ -619,21 +629,10 @@ chip_reset: | |||
619 | 629 | ||
620 | static int ath_reset(struct ath_softc *sc) | 630 | static int ath_reset(struct ath_softc *sc) |
621 | { | 631 | { |
622 | int i, r; | 632 | int r; |
623 | 633 | ||
624 | ath9k_ps_wakeup(sc); | 634 | ath9k_ps_wakeup(sc); |
625 | |||
626 | r = ath_reset_internal(sc, NULL); | 635 | r = ath_reset_internal(sc, NULL); |
627 | |||
628 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { | ||
629 | if (!ATH_TXQ_SETUP(sc, i)) | ||
630 | continue; | ||
631 | |||
632 | spin_lock_bh(&sc->tx.txq[i].axq_lock); | ||
633 | ath_txq_schedule(sc, &sc->tx.txq[i]); | ||
634 | spin_unlock_bh(&sc->tx.txq[i].axq_lock); | ||
635 | } | ||
636 | |||
637 | ath9k_ps_restore(sc); | 636 | ath9k_ps_restore(sc); |
638 | 637 | ||
639 | return r; | 638 | return r; |
diff --git a/drivers/net/wireless/cw1200/cw1200_spi.c b/drivers/net/wireless/cw1200/cw1200_spi.c index 8057143849ce..40078f5f932e 100644 --- a/drivers/net/wireless/cw1200/cw1200_spi.c +++ b/drivers/net/wireless/cw1200/cw1200_spi.c | |||
@@ -237,7 +237,9 @@ static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id) | |||
237 | struct hwbus_priv *self = dev_id; | 237 | struct hwbus_priv *self = dev_id; |
238 | 238 | ||
239 | if (self->core) { | 239 | if (self->core) { |
240 | cw1200_spi_lock(self); | ||
240 | cw1200_irq_handler(self->core); | 241 | cw1200_irq_handler(self->core); |
242 | cw1200_spi_unlock(self); | ||
241 | return IRQ_HANDLED; | 243 | return IRQ_HANDLED; |
242 | } else { | 244 | } else { |
243 | return IRQ_NONE; | 245 | return IRQ_NONE; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index 30d45e2fc193..8ac305be68f4 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -240,6 +240,12 @@ const struct iwl_cfg iwl6035_2agn_cfg = { | |||
240 | .ht_params = &iwl6000_ht_params, | 240 | .ht_params = &iwl6000_ht_params, |
241 | }; | 241 | }; |
242 | 242 | ||
243 | const struct iwl_cfg iwl6035_2agn_sff_cfg = { | ||
244 | .name = "Intel(R) Centrino(R) Ultimate-N 6235 AGN", | ||
245 | IWL_DEVICE_6035, | ||
246 | .ht_params = &iwl6000_ht_params, | ||
247 | }; | ||
248 | |||
243 | const struct iwl_cfg iwl1030_bgn_cfg = { | 249 | const struct iwl_cfg iwl1030_bgn_cfg = { |
244 | .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN", | 250 | .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN", |
245 | IWL_DEVICE_6030, | 251 | IWL_DEVICE_6030, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-config.h b/drivers/net/wireless/iwlwifi/iwl-config.h index e4d370bff306..b03c25e14903 100644 --- a/drivers/net/wireless/iwlwifi/iwl-config.h +++ b/drivers/net/wireless/iwlwifi/iwl-config.h | |||
@@ -280,6 +280,7 @@ extern const struct iwl_cfg iwl2000_2bgn_cfg; | |||
280 | extern const struct iwl_cfg iwl2000_2bgn_d_cfg; | 280 | extern const struct iwl_cfg iwl2000_2bgn_d_cfg; |
281 | extern const struct iwl_cfg iwl2030_2bgn_cfg; | 281 | extern const struct iwl_cfg iwl2030_2bgn_cfg; |
282 | extern const struct iwl_cfg iwl6035_2agn_cfg; | 282 | extern const struct iwl_cfg iwl6035_2agn_cfg; |
283 | extern const struct iwl_cfg iwl6035_2agn_sff_cfg; | ||
283 | extern const struct iwl_cfg iwl105_bgn_cfg; | 284 | extern const struct iwl_cfg iwl105_bgn_cfg; |
284 | extern const struct iwl_cfg iwl105_bgn_d_cfg; | 285 | extern const struct iwl_cfg iwl105_bgn_d_cfg; |
285 | extern const struct iwl_cfg iwl135_bgn_cfg; | 286 | extern const struct iwl_cfg iwl135_bgn_cfg; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.h b/drivers/net/wireless/iwlwifi/iwl-trans.h index dd57a36ecb10..80b47508647c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans.h +++ b/drivers/net/wireless/iwlwifi/iwl-trans.h | |||
@@ -601,8 +601,10 @@ static inline int iwl_trans_send_cmd(struct iwl_trans *trans, | |||
601 | { | 601 | { |
602 | int ret; | 602 | int ret; |
603 | 603 | ||
604 | WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE, | 604 | if (trans->state != IWL_TRANS_FW_ALIVE) { |
605 | "%s bad state = %d", __func__, trans->state); | 605 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); |
606 | return -EIO; | ||
607 | } | ||
606 | 608 | ||
607 | if (!(cmd->flags & CMD_ASYNC)) | 609 | if (!(cmd->flags & CMD_ASYNC)) |
608 | lock_map_acquire_read(&trans->sync_cmd_lockdep_map); | 610 | lock_map_acquire_read(&trans->sync_cmd_lockdep_map); |
diff --git a/drivers/net/wireless/iwlwifi/mvm/power.c b/drivers/net/wireless/iwlwifi/mvm/power.c index 21407a353a3b..d58e393324ef 100644 --- a/drivers/net/wireless/iwlwifi/mvm/power.c +++ b/drivers/net/wireless/iwlwifi/mvm/power.c | |||
@@ -273,7 +273,10 @@ static void iwl_mvm_power_build_cmd(struct iwl_mvm *mvm, | |||
273 | if (!mvmvif->queue_params[ac].uapsd) | 273 | if (!mvmvif->queue_params[ac].uapsd) |
274 | continue; | 274 | continue; |
275 | 275 | ||
276 | cmd->flags |= cpu_to_le16(POWER_FLAGS_ADVANCE_PM_ENA_MSK); | 276 | if (mvm->cur_ucode != IWL_UCODE_WOWLAN) |
277 | cmd->flags |= | ||
278 | cpu_to_le16(POWER_FLAGS_ADVANCE_PM_ENA_MSK); | ||
279 | |||
277 | cmd->uapsd_ac_flags |= BIT(ac); | 280 | cmd->uapsd_ac_flags |= BIT(ac); |
278 | 281 | ||
279 | /* QNDP TID - the highest TID with no admission control */ | 282 | /* QNDP TID - the highest TID with no admission control */ |
diff --git a/drivers/net/wireless/iwlwifi/mvm/scan.c b/drivers/net/wireless/iwlwifi/mvm/scan.c index 9a7ab8495300..621fb71f282a 100644 --- a/drivers/net/wireless/iwlwifi/mvm/scan.c +++ b/drivers/net/wireless/iwlwifi/mvm/scan.c | |||
@@ -394,6 +394,11 @@ static bool iwl_mvm_scan_abort_notif(struct iwl_notif_wait_data *notif_wait, | |||
394 | return false; | 394 | return false; |
395 | } | 395 | } |
396 | 396 | ||
397 | /* | ||
398 | * If scan cannot be aborted, it means that we had a | ||
399 | * SCAN_COMPLETE_NOTIFICATION in the pipe and it called | ||
400 | * ieee80211_scan_completed already. | ||
401 | */ | ||
397 | IWL_DEBUG_SCAN(mvm, "Scan cannot be aborted, exit now: %d\n", | 402 | IWL_DEBUG_SCAN(mvm, "Scan cannot be aborted, exit now: %d\n", |
398 | *resp); | 403 | *resp); |
399 | return true; | 404 | return true; |
@@ -417,14 +422,19 @@ void iwl_mvm_cancel_scan(struct iwl_mvm *mvm) | |||
417 | SCAN_COMPLETE_NOTIFICATION }; | 422 | SCAN_COMPLETE_NOTIFICATION }; |
418 | int ret; | 423 | int ret; |
419 | 424 | ||
425 | if (mvm->scan_status == IWL_MVM_SCAN_NONE) | ||
426 | return; | ||
427 | |||
420 | iwl_init_notification_wait(&mvm->notif_wait, &wait_scan_abort, | 428 | iwl_init_notification_wait(&mvm->notif_wait, &wait_scan_abort, |
421 | scan_abort_notif, | 429 | scan_abort_notif, |
422 | ARRAY_SIZE(scan_abort_notif), | 430 | ARRAY_SIZE(scan_abort_notif), |
423 | iwl_mvm_scan_abort_notif, NULL); | 431 | iwl_mvm_scan_abort_notif, NULL); |
424 | 432 | ||
425 | ret = iwl_mvm_send_cmd_pdu(mvm, SCAN_ABORT_CMD, CMD_SYNC, 0, NULL); | 433 | ret = iwl_mvm_send_cmd_pdu(mvm, SCAN_ABORT_CMD, |
434 | CMD_SYNC | CMD_SEND_IN_RFKILL, 0, NULL); | ||
426 | if (ret) { | 435 | if (ret) { |
427 | IWL_ERR(mvm, "Couldn't send SCAN_ABORT_CMD: %d\n", ret); | 436 | IWL_ERR(mvm, "Couldn't send SCAN_ABORT_CMD: %d\n", ret); |
437 | /* mac80211's state will be cleaned in the fw_restart flow */ | ||
428 | goto out_remove_notif; | 438 | goto out_remove_notif; |
429 | } | 439 | } |
430 | 440 | ||
diff --git a/drivers/net/wireless/iwlwifi/pcie/drv.c b/drivers/net/wireless/iwlwifi/pcie/drv.c index dc02cb9792af..26108a1a29fa 100644 --- a/drivers/net/wireless/iwlwifi/pcie/drv.c +++ b/drivers/net/wireless/iwlwifi/pcie/drv.c | |||
@@ -139,13 +139,16 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { | |||
139 | 139 | ||
140 | /* 6x00 Series */ | 140 | /* 6x00 Series */ |
141 | {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)}, | 141 | {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)}, |
142 | {IWL_PCI_DEVICE(0x422B, 0x1108, iwl6000_3agn_cfg)}, | ||
142 | {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)}, | 143 | {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)}, |
144 | {IWL_PCI_DEVICE(0x422B, 0x1128, iwl6000_3agn_cfg)}, | ||
143 | {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)}, | 145 | {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)}, |
144 | {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)}, | 146 | {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)}, |
145 | {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)}, | 147 | {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)}, |
146 | {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)}, | 148 | {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)}, |
147 | {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)}, | 149 | {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)}, |
148 | {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)}, | 150 | {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)}, |
151 | {IWL_PCI_DEVICE(0x4238, 0x1118, iwl6000_3agn_cfg)}, | ||
149 | {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)}, | 152 | {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)}, |
150 | {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)}, | 153 | {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)}, |
151 | 154 | ||
@@ -153,12 +156,16 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { | |||
153 | {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)}, | 156 | {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)}, |
154 | {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)}, | 157 | {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)}, |
155 | {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)}, | 158 | {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)}, |
159 | {IWL_PCI_DEVICE(0x0082, 0x1308, iwl6005_2agn_cfg)}, | ||
156 | {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)}, | 160 | {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)}, |
157 | {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)}, | 161 | {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)}, |
162 | {IWL_PCI_DEVICE(0x0082, 0x1328, iwl6005_2agn_cfg)}, | ||
158 | {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)}, | 163 | {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)}, |
164 | {IWL_PCI_DEVICE(0x0085, 0x1318, iwl6005_2agn_cfg)}, | ||
159 | {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)}, | 165 | {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)}, |
160 | {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)}, | 166 | {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)}, |
161 | {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)}, | 167 | {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)}, |
168 | {IWL_PCI_DEVICE(0x0085, 0xC228, iwl6005_2agn_sff_cfg)}, | ||
162 | {IWL_PCI_DEVICE(0x0082, 0x4820, iwl6005_2agn_d_cfg)}, | 169 | {IWL_PCI_DEVICE(0x0082, 0x4820, iwl6005_2agn_d_cfg)}, |
163 | {IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_2agn_mow1_cfg)},/* low 5GHz active */ | 170 | {IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_2agn_mow1_cfg)},/* low 5GHz active */ |
164 | {IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_2agn_mow2_cfg)},/* high 5GHz active */ | 171 | {IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_2agn_mow2_cfg)},/* high 5GHz active */ |
@@ -240,8 +247,11 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { | |||
240 | 247 | ||
241 | /* 6x35 Series */ | 248 | /* 6x35 Series */ |
242 | {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)}, | 249 | {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)}, |
250 | {IWL_PCI_DEVICE(0x088E, 0x406A, iwl6035_2agn_sff_cfg)}, | ||
243 | {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)}, | 251 | {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)}, |
252 | {IWL_PCI_DEVICE(0x088F, 0x426A, iwl6035_2agn_sff_cfg)}, | ||
244 | {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)}, | 253 | {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)}, |
254 | {IWL_PCI_DEVICE(0x088E, 0x446A, iwl6035_2agn_sff_cfg)}, | ||
245 | {IWL_PCI_DEVICE(0x088E, 0x4860, iwl6035_2agn_cfg)}, | 255 | {IWL_PCI_DEVICE(0x088E, 0x4860, iwl6035_2agn_cfg)}, |
246 | {IWL_PCI_DEVICE(0x088F, 0x5260, iwl6035_2agn_cfg)}, | 256 | {IWL_PCI_DEVICE(0x088F, 0x5260, iwl6035_2agn_cfg)}, |
247 | 257 | ||
@@ -260,54 +270,86 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { | |||
260 | #if IS_ENABLED(CONFIG_IWLMVM) | 270 | #if IS_ENABLED(CONFIG_IWLMVM) |
261 | /* 7000 Series */ | 271 | /* 7000 Series */ |
262 | {IWL_PCI_DEVICE(0x08B1, 0x4070, iwl7260_2ac_cfg)}, | 272 | {IWL_PCI_DEVICE(0x08B1, 0x4070, iwl7260_2ac_cfg)}, |
273 | {IWL_PCI_DEVICE(0x08B1, 0x4072, iwl7260_2ac_cfg)}, | ||
263 | {IWL_PCI_DEVICE(0x08B1, 0x4170, iwl7260_2ac_cfg)}, | 274 | {IWL_PCI_DEVICE(0x08B1, 0x4170, iwl7260_2ac_cfg)}, |
264 | {IWL_PCI_DEVICE(0x08B1, 0x4060, iwl7260_2n_cfg)}, | 275 | {IWL_PCI_DEVICE(0x08B1, 0x4060, iwl7260_2n_cfg)}, |
276 | {IWL_PCI_DEVICE(0x08B1, 0x406A, iwl7260_2n_cfg)}, | ||
265 | {IWL_PCI_DEVICE(0x08B1, 0x4160, iwl7260_2n_cfg)}, | 277 | {IWL_PCI_DEVICE(0x08B1, 0x4160, iwl7260_2n_cfg)}, |
266 | {IWL_PCI_DEVICE(0x08B1, 0x4062, iwl7260_n_cfg)}, | 278 | {IWL_PCI_DEVICE(0x08B1, 0x4062, iwl7260_n_cfg)}, |
267 | {IWL_PCI_DEVICE(0x08B1, 0x4162, iwl7260_n_cfg)}, | 279 | {IWL_PCI_DEVICE(0x08B1, 0x4162, iwl7260_n_cfg)}, |
268 | {IWL_PCI_DEVICE(0x08B2, 0x4270, iwl7260_2ac_cfg)}, | 280 | {IWL_PCI_DEVICE(0x08B2, 0x4270, iwl7260_2ac_cfg)}, |
281 | {IWL_PCI_DEVICE(0x08B2, 0x4272, iwl7260_2ac_cfg)}, | ||
269 | {IWL_PCI_DEVICE(0x08B2, 0x4260, iwl7260_2n_cfg)}, | 282 | {IWL_PCI_DEVICE(0x08B2, 0x4260, iwl7260_2n_cfg)}, |
283 | {IWL_PCI_DEVICE(0x08B2, 0x426A, iwl7260_2n_cfg)}, | ||
270 | {IWL_PCI_DEVICE(0x08B2, 0x4262, iwl7260_n_cfg)}, | 284 | {IWL_PCI_DEVICE(0x08B2, 0x4262, iwl7260_n_cfg)}, |
271 | {IWL_PCI_DEVICE(0x08B1, 0x4470, iwl7260_2ac_cfg)}, | 285 | {IWL_PCI_DEVICE(0x08B1, 0x4470, iwl7260_2ac_cfg)}, |
286 | {IWL_PCI_DEVICE(0x08B1, 0x4472, iwl7260_2ac_cfg)}, | ||
272 | {IWL_PCI_DEVICE(0x08B1, 0x4460, iwl7260_2n_cfg)}, | 287 | {IWL_PCI_DEVICE(0x08B1, 0x4460, iwl7260_2n_cfg)}, |
288 | {IWL_PCI_DEVICE(0x08B1, 0x446A, iwl7260_2n_cfg)}, | ||
273 | {IWL_PCI_DEVICE(0x08B1, 0x4462, iwl7260_n_cfg)}, | 289 | {IWL_PCI_DEVICE(0x08B1, 0x4462, iwl7260_n_cfg)}, |
274 | {IWL_PCI_DEVICE(0x08B1, 0x4870, iwl7260_2ac_cfg)}, | 290 | {IWL_PCI_DEVICE(0x08B1, 0x4870, iwl7260_2ac_cfg)}, |
275 | {IWL_PCI_DEVICE(0x08B1, 0x486E, iwl7260_2ac_cfg)}, | 291 | {IWL_PCI_DEVICE(0x08B1, 0x486E, iwl7260_2ac_cfg)}, |
276 | {IWL_PCI_DEVICE(0x08B1, 0x4A70, iwl7260_2ac_cfg_high_temp)}, | 292 | {IWL_PCI_DEVICE(0x08B1, 0x4A70, iwl7260_2ac_cfg_high_temp)}, |
277 | {IWL_PCI_DEVICE(0x08B1, 0x4A6E, iwl7260_2ac_cfg_high_temp)}, | 293 | {IWL_PCI_DEVICE(0x08B1, 0x4A6E, iwl7260_2ac_cfg_high_temp)}, |
278 | {IWL_PCI_DEVICE(0x08B1, 0x4A6C, iwl7260_2ac_cfg_high_temp)}, | 294 | {IWL_PCI_DEVICE(0x08B1, 0x4A6C, iwl7260_2ac_cfg_high_temp)}, |
295 | {IWL_PCI_DEVICE(0x08B1, 0x4570, iwl7260_2ac_cfg)}, | ||
296 | {IWL_PCI_DEVICE(0x08B1, 0x4560, iwl7260_2n_cfg)}, | ||
297 | {IWL_PCI_DEVICE(0x08B2, 0x4370, iwl7260_2ac_cfg)}, | ||
298 | {IWL_PCI_DEVICE(0x08B2, 0x4360, iwl7260_2n_cfg)}, | ||
299 | {IWL_PCI_DEVICE(0x08B1, 0x5070, iwl7260_2ac_cfg)}, | ||
279 | {IWL_PCI_DEVICE(0x08B1, 0x4020, iwl7260_2n_cfg)}, | 300 | {IWL_PCI_DEVICE(0x08B1, 0x4020, iwl7260_2n_cfg)}, |
301 | {IWL_PCI_DEVICE(0x08B1, 0x402A, iwl7260_2n_cfg)}, | ||
280 | {IWL_PCI_DEVICE(0x08B2, 0x4220, iwl7260_2n_cfg)}, | 302 | {IWL_PCI_DEVICE(0x08B2, 0x4220, iwl7260_2n_cfg)}, |
281 | {IWL_PCI_DEVICE(0x08B1, 0x4420, iwl7260_2n_cfg)}, | 303 | {IWL_PCI_DEVICE(0x08B1, 0x4420, iwl7260_2n_cfg)}, |
282 | {IWL_PCI_DEVICE(0x08B1, 0xC070, iwl7260_2ac_cfg)}, | 304 | {IWL_PCI_DEVICE(0x08B1, 0xC070, iwl7260_2ac_cfg)}, |
305 | {IWL_PCI_DEVICE(0x08B1, 0xC072, iwl7260_2ac_cfg)}, | ||
283 | {IWL_PCI_DEVICE(0x08B1, 0xC170, iwl7260_2ac_cfg)}, | 306 | {IWL_PCI_DEVICE(0x08B1, 0xC170, iwl7260_2ac_cfg)}, |
284 | {IWL_PCI_DEVICE(0x08B1, 0xC060, iwl7260_2n_cfg)}, | 307 | {IWL_PCI_DEVICE(0x08B1, 0xC060, iwl7260_2n_cfg)}, |
308 | {IWL_PCI_DEVICE(0x08B1, 0xC06A, iwl7260_2n_cfg)}, | ||
285 | {IWL_PCI_DEVICE(0x08B1, 0xC160, iwl7260_2n_cfg)}, | 309 | {IWL_PCI_DEVICE(0x08B1, 0xC160, iwl7260_2n_cfg)}, |
286 | {IWL_PCI_DEVICE(0x08B1, 0xC062, iwl7260_n_cfg)}, | 310 | {IWL_PCI_DEVICE(0x08B1, 0xC062, iwl7260_n_cfg)}, |
287 | {IWL_PCI_DEVICE(0x08B1, 0xC162, iwl7260_n_cfg)}, | 311 | {IWL_PCI_DEVICE(0x08B1, 0xC162, iwl7260_n_cfg)}, |
312 | {IWL_PCI_DEVICE(0x08B1, 0xC770, iwl7260_2ac_cfg)}, | ||
313 | {IWL_PCI_DEVICE(0x08B1, 0xC760, iwl7260_2n_cfg)}, | ||
288 | {IWL_PCI_DEVICE(0x08B2, 0xC270, iwl7260_2ac_cfg)}, | 314 | {IWL_PCI_DEVICE(0x08B2, 0xC270, iwl7260_2ac_cfg)}, |
315 | {IWL_PCI_DEVICE(0x08B2, 0xC272, iwl7260_2ac_cfg)}, | ||
289 | {IWL_PCI_DEVICE(0x08B2, 0xC260, iwl7260_2n_cfg)}, | 316 | {IWL_PCI_DEVICE(0x08B2, 0xC260, iwl7260_2n_cfg)}, |
317 | {IWL_PCI_DEVICE(0x08B2, 0xC26A, iwl7260_n_cfg)}, | ||
290 | {IWL_PCI_DEVICE(0x08B2, 0xC262, iwl7260_n_cfg)}, | 318 | {IWL_PCI_DEVICE(0x08B2, 0xC262, iwl7260_n_cfg)}, |
291 | {IWL_PCI_DEVICE(0x08B1, 0xC470, iwl7260_2ac_cfg)}, | 319 | {IWL_PCI_DEVICE(0x08B1, 0xC470, iwl7260_2ac_cfg)}, |
320 | {IWL_PCI_DEVICE(0x08B1, 0xC472, iwl7260_2ac_cfg)}, | ||
292 | {IWL_PCI_DEVICE(0x08B1, 0xC460, iwl7260_2n_cfg)}, | 321 | {IWL_PCI_DEVICE(0x08B1, 0xC460, iwl7260_2n_cfg)}, |
293 | {IWL_PCI_DEVICE(0x08B1, 0xC462, iwl7260_n_cfg)}, | 322 | {IWL_PCI_DEVICE(0x08B1, 0xC462, iwl7260_n_cfg)}, |
323 | {IWL_PCI_DEVICE(0x08B1, 0xC570, iwl7260_2ac_cfg)}, | ||
324 | {IWL_PCI_DEVICE(0x08B1, 0xC560, iwl7260_2n_cfg)}, | ||
325 | {IWL_PCI_DEVICE(0x08B2, 0xC370, iwl7260_2ac_cfg)}, | ||
326 | {IWL_PCI_DEVICE(0x08B1, 0xC360, iwl7260_2n_cfg)}, | ||
294 | {IWL_PCI_DEVICE(0x08B1, 0xC020, iwl7260_2n_cfg)}, | 327 | {IWL_PCI_DEVICE(0x08B1, 0xC020, iwl7260_2n_cfg)}, |
328 | {IWL_PCI_DEVICE(0x08B1, 0xC02A, iwl7260_2n_cfg)}, | ||
295 | {IWL_PCI_DEVICE(0x08B2, 0xC220, iwl7260_2n_cfg)}, | 329 | {IWL_PCI_DEVICE(0x08B2, 0xC220, iwl7260_2n_cfg)}, |
296 | {IWL_PCI_DEVICE(0x08B1, 0xC420, iwl7260_2n_cfg)}, | 330 | {IWL_PCI_DEVICE(0x08B1, 0xC420, iwl7260_2n_cfg)}, |
297 | 331 | ||
298 | /* 3160 Series */ | 332 | /* 3160 Series */ |
299 | {IWL_PCI_DEVICE(0x08B3, 0x0070, iwl3160_2ac_cfg)}, | 333 | {IWL_PCI_DEVICE(0x08B3, 0x0070, iwl3160_2ac_cfg)}, |
334 | {IWL_PCI_DEVICE(0x08B3, 0x0072, iwl3160_2ac_cfg)}, | ||
300 | {IWL_PCI_DEVICE(0x08B3, 0x0170, iwl3160_2ac_cfg)}, | 335 | {IWL_PCI_DEVICE(0x08B3, 0x0170, iwl3160_2ac_cfg)}, |
336 | {IWL_PCI_DEVICE(0x08B3, 0x0172, iwl3160_2ac_cfg)}, | ||
301 | {IWL_PCI_DEVICE(0x08B3, 0x0060, iwl3160_2n_cfg)}, | 337 | {IWL_PCI_DEVICE(0x08B3, 0x0060, iwl3160_2n_cfg)}, |
302 | {IWL_PCI_DEVICE(0x08B3, 0x0062, iwl3160_n_cfg)}, | 338 | {IWL_PCI_DEVICE(0x08B3, 0x0062, iwl3160_n_cfg)}, |
303 | {IWL_PCI_DEVICE(0x08B4, 0x0270, iwl3160_2ac_cfg)}, | 339 | {IWL_PCI_DEVICE(0x08B4, 0x0270, iwl3160_2ac_cfg)}, |
340 | {IWL_PCI_DEVICE(0x08B4, 0x0272, iwl3160_2ac_cfg)}, | ||
304 | {IWL_PCI_DEVICE(0x08B3, 0x0470, iwl3160_2ac_cfg)}, | 341 | {IWL_PCI_DEVICE(0x08B3, 0x0470, iwl3160_2ac_cfg)}, |
342 | {IWL_PCI_DEVICE(0x08B3, 0x0472, iwl3160_2ac_cfg)}, | ||
343 | {IWL_PCI_DEVICE(0x08B4, 0x0370, iwl3160_2ac_cfg)}, | ||
305 | {IWL_PCI_DEVICE(0x08B3, 0x8070, iwl3160_2ac_cfg)}, | 344 | {IWL_PCI_DEVICE(0x08B3, 0x8070, iwl3160_2ac_cfg)}, |
345 | {IWL_PCI_DEVICE(0x08B3, 0x8072, iwl3160_2ac_cfg)}, | ||
306 | {IWL_PCI_DEVICE(0x08B3, 0x8170, iwl3160_2ac_cfg)}, | 346 | {IWL_PCI_DEVICE(0x08B3, 0x8170, iwl3160_2ac_cfg)}, |
347 | {IWL_PCI_DEVICE(0x08B3, 0x8172, iwl3160_2ac_cfg)}, | ||
307 | {IWL_PCI_DEVICE(0x08B3, 0x8060, iwl3160_2n_cfg)}, | 348 | {IWL_PCI_DEVICE(0x08B3, 0x8060, iwl3160_2n_cfg)}, |
308 | {IWL_PCI_DEVICE(0x08B3, 0x8062, iwl3160_n_cfg)}, | 349 | {IWL_PCI_DEVICE(0x08B3, 0x8062, iwl3160_n_cfg)}, |
309 | {IWL_PCI_DEVICE(0x08B4, 0x8270, iwl3160_2ac_cfg)}, | 350 | {IWL_PCI_DEVICE(0x08B4, 0x8270, iwl3160_2ac_cfg)}, |
310 | {IWL_PCI_DEVICE(0x08B3, 0x8470, iwl3160_2ac_cfg)}, | 351 | {IWL_PCI_DEVICE(0x08B3, 0x8470, iwl3160_2ac_cfg)}, |
352 | {IWL_PCI_DEVICE(0x08B3, 0x8570, iwl3160_2ac_cfg)}, | ||
311 | #endif /* CONFIG_IWLMVM */ | 353 | #endif /* CONFIG_IWLMVM */ |
312 | 354 | ||
313 | {0} | 355 | {0} |
diff --git a/drivers/net/wireless/iwlwifi/pcie/tx.c b/drivers/net/wireless/iwlwifi/pcie/tx.c index f45eb29c2ede..1424335163b9 100644 --- a/drivers/net/wireless/iwlwifi/pcie/tx.c +++ b/drivers/net/wireless/iwlwifi/pcie/tx.c | |||
@@ -1102,6 +1102,8 @@ void iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int txq_id, int fifo, | |||
1102 | * non-AGG queue. | 1102 | * non-AGG queue. |
1103 | */ | 1103 | */ |
1104 | iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); | 1104 | iwl_clear_bits_prph(trans, SCD_AGGR_SEL, BIT(txq_id)); |
1105 | |||
1106 | ssn = trans_pcie->txq[txq_id].q.read_ptr; | ||
1105 | } | 1107 | } |
1106 | 1108 | ||
1107 | /* Place first TFD at index corresponding to start sequence number. | 1109 | /* Place first TFD at index corresponding to start sequence number. |
diff --git a/drivers/net/wireless/mwifiex/join.c b/drivers/net/wireless/mwifiex/join.c index 717fbe2e0e5a..4e4686e6ac09 100644 --- a/drivers/net/wireless/mwifiex/join.c +++ b/drivers/net/wireless/mwifiex/join.c | |||
@@ -1422,13 +1422,19 @@ static int mwifiex_deauthenticate_infra(struct mwifiex_private *priv, u8 *mac) | |||
1422 | */ | 1422 | */ |
1423 | int mwifiex_deauthenticate(struct mwifiex_private *priv, u8 *mac) | 1423 | int mwifiex_deauthenticate(struct mwifiex_private *priv, u8 *mac) |
1424 | { | 1424 | { |
1425 | int ret = 0; | ||
1426 | |||
1425 | if (!priv->media_connected) | 1427 | if (!priv->media_connected) |
1426 | return 0; | 1428 | return 0; |
1427 | 1429 | ||
1428 | switch (priv->bss_mode) { | 1430 | switch (priv->bss_mode) { |
1429 | case NL80211_IFTYPE_STATION: | 1431 | case NL80211_IFTYPE_STATION: |
1430 | case NL80211_IFTYPE_P2P_CLIENT: | 1432 | case NL80211_IFTYPE_P2P_CLIENT: |
1431 | return mwifiex_deauthenticate_infra(priv, mac); | 1433 | ret = mwifiex_deauthenticate_infra(priv, mac); |
1434 | if (ret) | ||
1435 | cfg80211_disconnected(priv->netdev, 0, NULL, 0, | ||
1436 | GFP_KERNEL); | ||
1437 | break; | ||
1432 | case NL80211_IFTYPE_ADHOC: | 1438 | case NL80211_IFTYPE_ADHOC: |
1433 | return mwifiex_send_cmd_sync(priv, | 1439 | return mwifiex_send_cmd_sync(priv, |
1434 | HostCmd_CMD_802_11_AD_HOC_STOP, | 1440 | HostCmd_CMD_802_11_AD_HOC_STOP, |
@@ -1440,7 +1446,7 @@ int mwifiex_deauthenticate(struct mwifiex_private *priv, u8 *mac) | |||
1440 | break; | 1446 | break; |
1441 | } | 1447 | } |
1442 | 1448 | ||
1443 | return 0; | 1449 | return ret; |
1444 | } | 1450 | } |
1445 | EXPORT_SYMBOL_GPL(mwifiex_deauthenticate); | 1451 | EXPORT_SYMBOL_GPL(mwifiex_deauthenticate); |
1446 | 1452 | ||
diff --git a/drivers/net/wireless/mwifiex/sta_event.c b/drivers/net/wireless/mwifiex/sta_event.c index 8b057524b252..8c351f71f72f 100644 --- a/drivers/net/wireless/mwifiex/sta_event.c +++ b/drivers/net/wireless/mwifiex/sta_event.c | |||
@@ -118,7 +118,8 @@ mwifiex_reset_connect_state(struct mwifiex_private *priv, u16 reason_code) | |||
118 | dev_dbg(adapter->dev, | 118 | dev_dbg(adapter->dev, |
119 | "info: successfully disconnected from %pM: reason code %d\n", | 119 | "info: successfully disconnected from %pM: reason code %d\n", |
120 | priv->cfg_bssid, reason_code); | 120 | priv->cfg_bssid, reason_code); |
121 | if (priv->bss_mode == NL80211_IFTYPE_STATION) { | 121 | if (priv->bss_mode == NL80211_IFTYPE_STATION || |
122 | priv->bss_mode == NL80211_IFTYPE_P2P_CLIENT) { | ||
122 | cfg80211_disconnected(priv->netdev, reason_code, NULL, 0, | 123 | cfg80211_disconnected(priv->netdev, reason_code, NULL, 0, |
123 | GFP_KERNEL); | 124 | GFP_KERNEL); |
124 | } | 125 | } |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c index 04c7e57dbce2..25e50ffc44ec 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c | |||
@@ -343,7 +343,8 @@ bool rtl92cu_rx_query_desc(struct ieee80211_hw *hw, | |||
343 | (bool)GET_RX_DESC_PAGGR(pdesc)); | 343 | (bool)GET_RX_DESC_PAGGR(pdesc)); |
344 | rx_status->mactime = GET_RX_DESC_TSFL(pdesc); | 344 | rx_status->mactime = GET_RX_DESC_TSFL(pdesc); |
345 | if (phystatus) { | 345 | if (phystatus) { |
346 | p_drvinfo = (struct rx_fwinfo_92c *)(pdesc + RTL_RX_DESC_SIZE); | 346 | p_drvinfo = (struct rx_fwinfo_92c *)(skb->data + |
347 | stats->rx_bufshift); | ||
347 | rtl92c_translate_rx_signal_stuff(hw, skb, stats, pdesc, | 348 | rtl92c_translate_rx_signal_stuff(hw, skb, stats, pdesc, |
348 | p_drvinfo); | 349 | p_drvinfo); |
349 | } | 350 | } |