diff options
author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2011-07-19 20:56:21 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-08-04 07:59:07 -0400 |
commit | 945a51517cc0bd9e461f2018624dfc1faef9ddee (patch) | |
tree | 5782ffe27f3fb8f5b4cbc19ffe7b74bff36c6a05 /drivers/net | |
parent | d3e614577198757d5854caa912e88f2d4296479b (diff) |
intel drivers: repair missing flush operations
after review of all intel drivers, found several instances where
drivers had the incorrect pattern of:
memory mapped write();
delay();
which should always be:
memory mapped write();
write flush(); /* aka memory mapped read */
delay();
explanation:
The reason for including the flush is that writes can be held
(posted) in PCI/PCIe bridges, but the read always has to complete
synchronously and therefore has to flush all pending writes to a
device. If a write is held and followed by a delay, the delay
means nothing because the write may not have reached hardware
(maybe even not until the next read)
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/e1000/e1000_ethtool.c | 6 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_hw.c | 3 | ||||
-rw-r--r-- | drivers/net/e1000e/es2lan.c | 2 | ||||
-rw-r--r-- | drivers/net/e1000e/ethtool.c | 9 | ||||
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 4 | ||||
-rw-r--r-- | drivers/net/e1000e/lib.c | 1 | ||||
-rw-r--r-- | drivers/net/e1000e/phy.c | 2 | ||||
-rw-r--r-- | drivers/net/igb/e1000_nvm.c | 1 | ||||
-rw-r--r-- | drivers/net/igb/igb_ethtool.c | 5 | ||||
-rw-r--r-- | drivers/net/igb/igb_main.c | 2 | ||||
-rw-r--r-- | drivers/net/igbvf/netdev.c | 2 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_ee.c | 9 | ||||
-rw-r--r-- | drivers/net/ixgb/ixgb_hw.c | 2 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.c | 1 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_ethtool.c | 5 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 1 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_phy.c | 3 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_x540.c | 1 |
18 files changed, 59 insertions, 0 deletions
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index c5f0f04219f3..5548d464261a 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -838,6 +838,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
838 | 838 | ||
839 | /* Disable all the interrupts */ | 839 | /* Disable all the interrupts */ |
840 | ew32(IMC, 0xFFFFFFFF); | 840 | ew32(IMC, 0xFFFFFFFF); |
841 | E1000_WRITE_FLUSH(); | ||
841 | msleep(10); | 842 | msleep(10); |
842 | 843 | ||
843 | /* Test each interrupt */ | 844 | /* Test each interrupt */ |
@@ -856,6 +857,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
856 | adapter->test_icr = 0; | 857 | adapter->test_icr = 0; |
857 | ew32(IMC, mask); | 858 | ew32(IMC, mask); |
858 | ew32(ICS, mask); | 859 | ew32(ICS, mask); |
860 | E1000_WRITE_FLUSH(); | ||
859 | msleep(10); | 861 | msleep(10); |
860 | 862 | ||
861 | if (adapter->test_icr & mask) { | 863 | if (adapter->test_icr & mask) { |
@@ -873,6 +875,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
873 | adapter->test_icr = 0; | 875 | adapter->test_icr = 0; |
874 | ew32(IMS, mask); | 876 | ew32(IMS, mask); |
875 | ew32(ICS, mask); | 877 | ew32(ICS, mask); |
878 | E1000_WRITE_FLUSH(); | ||
876 | msleep(10); | 879 | msleep(10); |
877 | 880 | ||
878 | if (!(adapter->test_icr & mask)) { | 881 | if (!(adapter->test_icr & mask)) { |
@@ -890,6 +893,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
890 | adapter->test_icr = 0; | 893 | adapter->test_icr = 0; |
891 | ew32(IMC, ~mask & 0x00007FFF); | 894 | ew32(IMC, ~mask & 0x00007FFF); |
892 | ew32(ICS, ~mask & 0x00007FFF); | 895 | ew32(ICS, ~mask & 0x00007FFF); |
896 | E1000_WRITE_FLUSH(); | ||
893 | msleep(10); | 897 | msleep(10); |
894 | 898 | ||
895 | if (adapter->test_icr) { | 899 | if (adapter->test_icr) { |
@@ -901,6 +905,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
901 | 905 | ||
902 | /* Disable all the interrupts */ | 906 | /* Disable all the interrupts */ |
903 | ew32(IMC, 0xFFFFFFFF); | 907 | ew32(IMC, 0xFFFFFFFF); |
908 | E1000_WRITE_FLUSH(); | ||
904 | msleep(10); | 909 | msleep(10); |
905 | 910 | ||
906 | /* Unhook test interrupt handler */ | 911 | /* Unhook test interrupt handler */ |
@@ -1394,6 +1399,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter) | |||
1394 | if (unlikely(++k == txdr->count)) k = 0; | 1399 | if (unlikely(++k == txdr->count)) k = 0; |
1395 | } | 1400 | } |
1396 | ew32(TDT, k); | 1401 | ew32(TDT, k); |
1402 | E1000_WRITE_FLUSH(); | ||
1397 | msleep(200); | 1403 | msleep(200); |
1398 | time = jiffies; /* set the start time for the receive */ | 1404 | time = jiffies; /* set the start time for the receive */ |
1399 | good_cnt = 0; | 1405 | good_cnt = 0; |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 1698622af434..8545c7aa93eb 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -446,6 +446,7 @@ s32 e1000_reset_hw(struct e1000_hw *hw) | |||
446 | /* Must reset the PHY before resetting the MAC */ | 446 | /* Must reset the PHY before resetting the MAC */ |
447 | if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { | 447 | if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { |
448 | ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST)); | 448 | ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST)); |
449 | E1000_WRITE_FLUSH(); | ||
449 | msleep(5); | 450 | msleep(5); |
450 | } | 451 | } |
451 | 452 | ||
@@ -3752,6 +3753,7 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw) | |||
3752 | /* Clear SK and CS */ | 3753 | /* Clear SK and CS */ |
3753 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); | 3754 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); |
3754 | ew32(EECD, eecd); | 3755 | ew32(EECD, eecd); |
3756 | E1000_WRITE_FLUSH(); | ||
3755 | udelay(1); | 3757 | udelay(1); |
3756 | } | 3758 | } |
3757 | 3759 | ||
@@ -3824,6 +3826,7 @@ static void e1000_release_eeprom(struct e1000_hw *hw) | |||
3824 | eecd &= ~E1000_EECD_SK; /* Lower SCK */ | 3826 | eecd &= ~E1000_EECD_SK; /* Lower SCK */ |
3825 | 3827 | ||
3826 | ew32(EECD, eecd); | 3828 | ew32(EECD, eecd); |
3829 | E1000_WRITE_FLUSH(); | ||
3827 | 3830 | ||
3828 | udelay(hw->eeprom.delay_usec); | 3831 | udelay(hw->eeprom.delay_usec); |
3829 | } else if (hw->eeprom.type == e1000_eeprom_microwire) { | 3832 | } else if (hw->eeprom.type == e1000_eeprom_microwire) { |
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c index c0ecb2d9fdb7..e4f42257c24c 100644 --- a/drivers/net/e1000e/es2lan.c +++ b/drivers/net/e1000e/es2lan.c | |||
@@ -1313,6 +1313,7 @@ static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, | |||
1313 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 1313 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
1314 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; | 1314 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; |
1315 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 1315 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
1316 | e1e_flush(); | ||
1316 | 1317 | ||
1317 | udelay(2); | 1318 | udelay(2); |
1318 | 1319 | ||
@@ -1347,6 +1348,7 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, | |||
1347 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 1348 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
1348 | E1000_KMRNCTRLSTA_OFFSET) | data; | 1349 | E1000_KMRNCTRLSTA_OFFSET) | data; |
1349 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 1350 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
1351 | e1e_flush(); | ||
1350 | 1352 | ||
1351 | udelay(2); | 1353 | udelay(2); |
1352 | 1354 | ||
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c index cb1a3623253e..72756e4e6448 100644 --- a/drivers/net/e1000e/ethtool.c +++ b/drivers/net/e1000e/ethtool.c | |||
@@ -964,6 +964,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
964 | 964 | ||
965 | /* Disable all the interrupts */ | 965 | /* Disable all the interrupts */ |
966 | ew32(IMC, 0xFFFFFFFF); | 966 | ew32(IMC, 0xFFFFFFFF); |
967 | e1e_flush(); | ||
967 | usleep_range(10000, 20000); | 968 | usleep_range(10000, 20000); |
968 | 969 | ||
969 | /* Test each interrupt */ | 970 | /* Test each interrupt */ |
@@ -996,6 +997,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
996 | adapter->test_icr = 0; | 997 | adapter->test_icr = 0; |
997 | ew32(IMC, mask); | 998 | ew32(IMC, mask); |
998 | ew32(ICS, mask); | 999 | ew32(ICS, mask); |
1000 | e1e_flush(); | ||
999 | usleep_range(10000, 20000); | 1001 | usleep_range(10000, 20000); |
1000 | 1002 | ||
1001 | if (adapter->test_icr & mask) { | 1003 | if (adapter->test_icr & mask) { |
@@ -1014,6 +1016,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
1014 | adapter->test_icr = 0; | 1016 | adapter->test_icr = 0; |
1015 | ew32(IMS, mask); | 1017 | ew32(IMS, mask); |
1016 | ew32(ICS, mask); | 1018 | ew32(ICS, mask); |
1019 | e1e_flush(); | ||
1017 | usleep_range(10000, 20000); | 1020 | usleep_range(10000, 20000); |
1018 | 1021 | ||
1019 | if (!(adapter->test_icr & mask)) { | 1022 | if (!(adapter->test_icr & mask)) { |
@@ -1032,6 +1035,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
1032 | adapter->test_icr = 0; | 1035 | adapter->test_icr = 0; |
1033 | ew32(IMC, ~mask & 0x00007FFF); | 1036 | ew32(IMC, ~mask & 0x00007FFF); |
1034 | ew32(ICS, ~mask & 0x00007FFF); | 1037 | ew32(ICS, ~mask & 0x00007FFF); |
1038 | e1e_flush(); | ||
1035 | usleep_range(10000, 20000); | 1039 | usleep_range(10000, 20000); |
1036 | 1040 | ||
1037 | if (adapter->test_icr) { | 1041 | if (adapter->test_icr) { |
@@ -1043,6 +1047,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
1043 | 1047 | ||
1044 | /* Disable all the interrupts */ | 1048 | /* Disable all the interrupts */ |
1045 | ew32(IMC, 0xFFFFFFFF); | 1049 | ew32(IMC, 0xFFFFFFFF); |
1050 | e1e_flush(); | ||
1046 | usleep_range(10000, 20000); | 1051 | usleep_range(10000, 20000); |
1047 | 1052 | ||
1048 | /* Unhook test interrupt handler */ | 1053 | /* Unhook test interrupt handler */ |
@@ -1276,6 +1281,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1276 | E1000_CTRL_FD); /* Force Duplex to FULL */ | 1281 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1277 | 1282 | ||
1278 | ew32(CTRL, ctrl_reg); | 1283 | ew32(CTRL, ctrl_reg); |
1284 | e1e_flush(); | ||
1279 | udelay(500); | 1285 | udelay(500); |
1280 | 1286 | ||
1281 | return 0; | 1287 | return 0; |
@@ -1418,6 +1424,7 @@ static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter) | |||
1418 | */ | 1424 | */ |
1419 | #define E1000_SERDES_LB_ON 0x410 | 1425 | #define E1000_SERDES_LB_ON 0x410 |
1420 | ew32(SCTL, E1000_SERDES_LB_ON); | 1426 | ew32(SCTL, E1000_SERDES_LB_ON); |
1427 | e1e_flush(); | ||
1421 | usleep_range(10000, 20000); | 1428 | usleep_range(10000, 20000); |
1422 | 1429 | ||
1423 | return 0; | 1430 | return 0; |
@@ -1513,6 +1520,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter) | |||
1513 | hw->phy.media_type == e1000_media_type_internal_serdes) { | 1520 | hw->phy.media_type == e1000_media_type_internal_serdes) { |
1514 | #define E1000_SERDES_LB_OFF 0x400 | 1521 | #define E1000_SERDES_LB_OFF 0x400 |
1515 | ew32(SCTL, E1000_SERDES_LB_OFF); | 1522 | ew32(SCTL, E1000_SERDES_LB_OFF); |
1523 | e1e_flush(); | ||
1516 | usleep_range(10000, 20000); | 1524 | usleep_range(10000, 20000); |
1517 | break; | 1525 | break; |
1518 | } | 1526 | } |
@@ -1592,6 +1600,7 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter) | |||
1592 | k = 0; | 1600 | k = 0; |
1593 | } | 1601 | } |
1594 | ew32(TDT, k); | 1602 | ew32(TDT, k); |
1603 | e1e_flush(); | ||
1595 | msleep(200); | 1604 | msleep(200); |
1596 | time = jiffies; /* set the start time for the receive */ | 1605 | time = jiffies; /* set the start time for the receive */ |
1597 | good_cnt = 0; | 1606 | good_cnt = 0; |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index c1752124f3cd..f7a75c1531ad 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -283,6 +283,7 @@ static void e1000_toggle_lanphypc_value_ich8lan(struct e1000_hw *hw) | |||
283 | ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; | 283 | ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; |
284 | ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; | 284 | ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; |
285 | ew32(CTRL, ctrl); | 285 | ew32(CTRL, ctrl); |
286 | e1e_flush(); | ||
286 | udelay(10); | 287 | udelay(10); |
287 | ctrl &= ~E1000_CTRL_LANPHYPC_OVERRIDE; | 288 | ctrl &= ~E1000_CTRL_LANPHYPC_OVERRIDE; |
288 | ew32(CTRL, ctrl); | 289 | ew32(CTRL, ctrl); |
@@ -1230,9 +1231,11 @@ s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable) | |||
1230 | ew32(CTRL, reg); | 1231 | ew32(CTRL, reg); |
1231 | 1232 | ||
1232 | ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS); | 1233 | ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS); |
1234 | e1e_flush(); | ||
1233 | udelay(20); | 1235 | udelay(20); |
1234 | ew32(CTRL, ctrl_reg); | 1236 | ew32(CTRL, ctrl_reg); |
1235 | ew32(CTRL_EXT, ctrl_ext); | 1237 | ew32(CTRL_EXT, ctrl_ext); |
1238 | e1e_flush(); | ||
1236 | udelay(20); | 1239 | udelay(20); |
1237 | 1240 | ||
1238 | out: | 1241 | out: |
@@ -3090,6 +3093,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
3090 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 3093 | ret_val = e1000_acquire_swflag_ich8lan(hw); |
3091 | e_dbg("Issuing a global reset to ich8lan\n"); | 3094 | e_dbg("Issuing a global reset to ich8lan\n"); |
3092 | ew32(CTRL, (ctrl | E1000_CTRL_RST)); | 3095 | ew32(CTRL, (ctrl | E1000_CTRL_RST)); |
3096 | /* cannot issue a flush here because it hangs the hardware */ | ||
3093 | msleep(20); | 3097 | msleep(20); |
3094 | 3098 | ||
3095 | if (!ret_val) | 3099 | if (!ret_val) |
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c index 65580b405942..7898a67d6505 100644 --- a/drivers/net/e1000e/lib.c +++ b/drivers/net/e1000e/lib.c | |||
@@ -1986,6 +1986,7 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw) | |||
1986 | /* Clear SK and CS */ | 1986 | /* Clear SK and CS */ |
1987 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); | 1987 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); |
1988 | ew32(EECD, eecd); | 1988 | ew32(EECD, eecd); |
1989 | e1e_flush(); | ||
1989 | udelay(1); | 1990 | udelay(1); |
1990 | 1991 | ||
1991 | /* | 1992 | /* |
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index 2a6ee13285b1..8666476cb9be 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -537,6 +537,7 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, | |||
537 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 537 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
538 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; | 538 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; |
539 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 539 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
540 | e1e_flush(); | ||
540 | 541 | ||
541 | udelay(2); | 542 | udelay(2); |
542 | 543 | ||
@@ -609,6 +610,7 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, | |||
609 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 610 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
610 | E1000_KMRNCTRLSTA_OFFSET) | data; | 611 | E1000_KMRNCTRLSTA_OFFSET) | data; |
611 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 612 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
613 | e1e_flush(); | ||
612 | 614 | ||
613 | udelay(2); | 615 | udelay(2); |
614 | 616 | ||
diff --git a/drivers/net/igb/e1000_nvm.c b/drivers/net/igb/e1000_nvm.c index 7dcd65cede56..40407124e722 100644 --- a/drivers/net/igb/e1000_nvm.c +++ b/drivers/net/igb/e1000_nvm.c | |||
@@ -285,6 +285,7 @@ static s32 igb_ready_nvm_eeprom(struct e1000_hw *hw) | |||
285 | /* Clear SK and CS */ | 285 | /* Clear SK and CS */ |
286 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); | 286 | eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); |
287 | wr32(E1000_EECD, eecd); | 287 | wr32(E1000_EECD, eecd); |
288 | wrfl(); | ||
288 | udelay(1); | 289 | udelay(1); |
289 | timeout = NVM_MAX_RETRY_SPI; | 290 | timeout = NVM_MAX_RETRY_SPI; |
290 | 291 | ||
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index ff244ce803ce..414b0225be89 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -1225,6 +1225,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1225 | 1225 | ||
1226 | /* Disable all the interrupts */ | 1226 | /* Disable all the interrupts */ |
1227 | wr32(E1000_IMC, ~0); | 1227 | wr32(E1000_IMC, ~0); |
1228 | wrfl(); | ||
1228 | msleep(10); | 1229 | msleep(10); |
1229 | 1230 | ||
1230 | /* Define all writable bits for ICS */ | 1231 | /* Define all writable bits for ICS */ |
@@ -1268,6 +1269,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1268 | 1269 | ||
1269 | wr32(E1000_IMC, mask); | 1270 | wr32(E1000_IMC, mask); |
1270 | wr32(E1000_ICS, mask); | 1271 | wr32(E1000_ICS, mask); |
1272 | wrfl(); | ||
1271 | msleep(10); | 1273 | msleep(10); |
1272 | 1274 | ||
1273 | if (adapter->test_icr & mask) { | 1275 | if (adapter->test_icr & mask) { |
@@ -1289,6 +1291,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1289 | 1291 | ||
1290 | wr32(E1000_IMS, mask); | 1292 | wr32(E1000_IMS, mask); |
1291 | wr32(E1000_ICS, mask); | 1293 | wr32(E1000_ICS, mask); |
1294 | wrfl(); | ||
1292 | msleep(10); | 1295 | msleep(10); |
1293 | 1296 | ||
1294 | if (!(adapter->test_icr & mask)) { | 1297 | if (!(adapter->test_icr & mask)) { |
@@ -1310,6 +1313,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1310 | 1313 | ||
1311 | wr32(E1000_IMC, ~mask); | 1314 | wr32(E1000_IMC, ~mask); |
1312 | wr32(E1000_ICS, ~mask); | 1315 | wr32(E1000_ICS, ~mask); |
1316 | wrfl(); | ||
1313 | msleep(10); | 1317 | msleep(10); |
1314 | 1318 | ||
1315 | if (adapter->test_icr & mask) { | 1319 | if (adapter->test_icr & mask) { |
@@ -1321,6 +1325,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data) | |||
1321 | 1325 | ||
1322 | /* Disable all the interrupts */ | 1326 | /* Disable all the interrupts */ |
1323 | wr32(E1000_IMC, ~0); | 1327 | wr32(E1000_IMC, ~0); |
1328 | wrfl(); | ||
1324 | msleep(10); | 1329 | msleep(10); |
1325 | 1330 | ||
1326 | /* Unhook test interrupt handler */ | 1331 | /* Unhook test interrupt handler */ |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index dc599059512a..ae3937e8cdef 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -1052,6 +1052,7 @@ msi_only: | |||
1052 | kfree(adapter->vf_data); | 1052 | kfree(adapter->vf_data); |
1053 | adapter->vf_data = NULL; | 1053 | adapter->vf_data = NULL; |
1054 | wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); | 1054 | wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); |
1055 | wrfl(); | ||
1055 | msleep(100); | 1056 | msleep(100); |
1056 | dev_info(&adapter->pdev->dev, "IOV Disabled\n"); | 1057 | dev_info(&adapter->pdev->dev, "IOV Disabled\n"); |
1057 | } | 1058 | } |
@@ -2198,6 +2199,7 @@ static void __devexit igb_remove(struct pci_dev *pdev) | |||
2198 | kfree(adapter->vf_data); | 2199 | kfree(adapter->vf_data); |
2199 | adapter->vf_data = NULL; | 2200 | adapter->vf_data = NULL; |
2200 | wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); | 2201 | wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); |
2202 | wrfl(); | ||
2201 | msleep(100); | 2203 | msleep(100); |
2202 | dev_info(&pdev->dev, "IOV Disabled\n"); | 2204 | dev_info(&pdev->dev, "IOV Disabled\n"); |
2203 | } | 2205 | } |
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c index 1330c8e932da..40ed066e3ef4 100644 --- a/drivers/net/igbvf/netdev.c +++ b/drivers/net/igbvf/netdev.c | |||
@@ -1226,6 +1226,7 @@ static void igbvf_configure_tx(struct igbvf_adapter *adapter) | |||
1226 | /* disable transmits */ | 1226 | /* disable transmits */ |
1227 | txdctl = er32(TXDCTL(0)); | 1227 | txdctl = er32(TXDCTL(0)); |
1228 | ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); | 1228 | ew32(TXDCTL(0), txdctl & ~E1000_TXDCTL_QUEUE_ENABLE); |
1229 | e1e_flush(); | ||
1229 | msleep(10); | 1230 | msleep(10); |
1230 | 1231 | ||
1231 | /* Setup the HW Tx Head and Tail descriptor pointers */ | 1232 | /* Setup the HW Tx Head and Tail descriptor pointers */ |
@@ -1306,6 +1307,7 @@ static void igbvf_configure_rx(struct igbvf_adapter *adapter) | |||
1306 | /* disable receives */ | 1307 | /* disable receives */ |
1307 | rxdctl = er32(RXDCTL(0)); | 1308 | rxdctl = er32(RXDCTL(0)); |
1308 | ew32(RXDCTL(0), rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE); | 1309 | ew32(RXDCTL(0), rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE); |
1310 | e1e_flush(); | ||
1309 | msleep(10); | 1311 | msleep(10); |
1310 | 1312 | ||
1311 | rdlen = rx_ring->count * sizeof(union e1000_adv_rx_desc); | 1313 | rdlen = rx_ring->count * sizeof(union e1000_adv_rx_desc); |
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c index c982ab9f9005..38b362b67857 100644 --- a/drivers/net/ixgb/ixgb_ee.c +++ b/drivers/net/ixgb/ixgb_ee.c | |||
@@ -57,6 +57,7 @@ ixgb_raise_clock(struct ixgb_hw *hw, | |||
57 | */ | 57 | */ |
58 | *eecd_reg = *eecd_reg | IXGB_EECD_SK; | 58 | *eecd_reg = *eecd_reg | IXGB_EECD_SK; |
59 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | 59 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); |
60 | IXGB_WRITE_FLUSH(hw); | ||
60 | udelay(50); | 61 | udelay(50); |
61 | } | 62 | } |
62 | 63 | ||
@@ -75,6 +76,7 @@ ixgb_lower_clock(struct ixgb_hw *hw, | |||
75 | */ | 76 | */ |
76 | *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; | 77 | *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; |
77 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | 78 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); |
79 | IXGB_WRITE_FLUSH(hw); | ||
78 | udelay(50); | 80 | udelay(50); |
79 | } | 81 | } |
80 | 82 | ||
@@ -112,6 +114,7 @@ ixgb_shift_out_bits(struct ixgb_hw *hw, | |||
112 | eecd_reg |= IXGB_EECD_DI; | 114 | eecd_reg |= IXGB_EECD_DI; |
113 | 115 | ||
114 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 116 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
117 | IXGB_WRITE_FLUSH(hw); | ||
115 | 118 | ||
116 | udelay(50); | 119 | udelay(50); |
117 | 120 | ||
@@ -206,21 +209,25 @@ ixgb_standby_eeprom(struct ixgb_hw *hw) | |||
206 | /* Deselect EEPROM */ | 209 | /* Deselect EEPROM */ |
207 | eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); | 210 | eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); |
208 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 211 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
212 | IXGB_WRITE_FLUSH(hw); | ||
209 | udelay(50); | 213 | udelay(50); |
210 | 214 | ||
211 | /* Clock high */ | 215 | /* Clock high */ |
212 | eecd_reg |= IXGB_EECD_SK; | 216 | eecd_reg |= IXGB_EECD_SK; |
213 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 217 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
218 | IXGB_WRITE_FLUSH(hw); | ||
214 | udelay(50); | 219 | udelay(50); |
215 | 220 | ||
216 | /* Select EEPROM */ | 221 | /* Select EEPROM */ |
217 | eecd_reg |= IXGB_EECD_CS; | 222 | eecd_reg |= IXGB_EECD_CS; |
218 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 223 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
224 | IXGB_WRITE_FLUSH(hw); | ||
219 | udelay(50); | 225 | udelay(50); |
220 | 226 | ||
221 | /* Clock low */ | 227 | /* Clock low */ |
222 | eecd_reg &= ~IXGB_EECD_SK; | 228 | eecd_reg &= ~IXGB_EECD_SK; |
223 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 229 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
230 | IXGB_WRITE_FLUSH(hw); | ||
224 | udelay(50); | 231 | udelay(50); |
225 | } | 232 | } |
226 | 233 | ||
@@ -239,11 +246,13 @@ ixgb_clock_eeprom(struct ixgb_hw *hw) | |||
239 | /* Rising edge of clock */ | 246 | /* Rising edge of clock */ |
240 | eecd_reg |= IXGB_EECD_SK; | 247 | eecd_reg |= IXGB_EECD_SK; |
241 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 248 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
249 | IXGB_WRITE_FLUSH(hw); | ||
242 | udelay(50); | 250 | udelay(50); |
243 | 251 | ||
244 | /* Falling edge of clock */ | 252 | /* Falling edge of clock */ |
245 | eecd_reg &= ~IXGB_EECD_SK; | 253 | eecd_reg &= ~IXGB_EECD_SK; |
246 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 254 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
255 | IXGB_WRITE_FLUSH(hw); | ||
247 | udelay(50); | 256 | udelay(50); |
248 | } | 257 | } |
249 | 258 | ||
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c index 6cb2e42ff4c1..3d61a9e4faf7 100644 --- a/drivers/net/ixgb/ixgb_hw.c +++ b/drivers/net/ixgb/ixgb_hw.c | |||
@@ -149,6 +149,7 @@ ixgb_adapter_stop(struct ixgb_hw *hw) | |||
149 | */ | 149 | */ |
150 | IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); | 150 | IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); |
151 | IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); | 151 | IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); |
152 | IXGB_WRITE_FLUSH(hw); | ||
152 | msleep(IXGB_DELAY_BEFORE_RESET); | 153 | msleep(IXGB_DELAY_BEFORE_RESET); |
153 | 154 | ||
154 | /* Issue a global reset to the MAC. This will reset the chip's | 155 | /* Issue a global reset to the MAC. This will reset the chip's |
@@ -1220,6 +1221,7 @@ ixgb_optics_reset_bcm(struct ixgb_hw *hw) | |||
1220 | ctrl &= ~IXGB_CTRL0_SDP2; | 1221 | ctrl &= ~IXGB_CTRL0_SDP2; |
1221 | ctrl |= IXGB_CTRL0_SDP3; | 1222 | ctrl |= IXGB_CTRL0_SDP3; |
1222 | IXGB_WRITE_REG(hw, CTRL0, ctrl); | 1223 | IXGB_WRITE_REG(hw, CTRL0, ctrl); |
1224 | IXGB_WRITE_FLUSH(hw); | ||
1223 | 1225 | ||
1224 | /* SerDes needs extra delay */ | 1226 | /* SerDes needs extra delay */ |
1225 | msleep(IXGB_SUN_PHY_RESET_DELAY); | 1227 | msleep(IXGB_SUN_PHY_RESET_DELAY); |
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c index 777051f54e53..fc1375f26fe5 100644 --- a/drivers/net/ixgbe/ixgbe_common.c +++ b/drivers/net/ixgbe/ixgbe_common.c | |||
@@ -2632,6 +2632,7 @@ s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index) | |||
2632 | autoc_reg |= IXGBE_AUTOC_AN_RESTART; | 2632 | autoc_reg |= IXGBE_AUTOC_AN_RESTART; |
2633 | autoc_reg |= IXGBE_AUTOC_FLU; | 2633 | autoc_reg |= IXGBE_AUTOC_FLU; |
2634 | IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); | 2634 | IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); |
2635 | IXGBE_WRITE_FLUSH(hw); | ||
2635 | usleep_range(10000, 20000); | 2636 | usleep_range(10000, 20000); |
2636 | } | 2637 | } |
2637 | 2638 | ||
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index dc649553a0a6..82d4244c6e10 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -1378,6 +1378,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1378 | 1378 | ||
1379 | /* Disable all the interrupts */ | 1379 | /* Disable all the interrupts */ |
1380 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); | 1380 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); |
1381 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1381 | usleep_range(10000, 20000); | 1382 | usleep_range(10000, 20000); |
1382 | 1383 | ||
1383 | /* Test each interrupt */ | 1384 | /* Test each interrupt */ |
@@ -1398,6 +1399,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1398 | ~mask & 0x00007FFF); | 1399 | ~mask & 0x00007FFF); |
1399 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, | 1400 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, |
1400 | ~mask & 0x00007FFF); | 1401 | ~mask & 0x00007FFF); |
1402 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1401 | usleep_range(10000, 20000); | 1403 | usleep_range(10000, 20000); |
1402 | 1404 | ||
1403 | if (adapter->test_icr & mask) { | 1405 | if (adapter->test_icr & mask) { |
@@ -1415,6 +1417,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1415 | adapter->test_icr = 0; | 1417 | adapter->test_icr = 0; |
1416 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); | 1418 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); |
1417 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); | 1419 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); |
1420 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1418 | usleep_range(10000, 20000); | 1421 | usleep_range(10000, 20000); |
1419 | 1422 | ||
1420 | if (!(adapter->test_icr &mask)) { | 1423 | if (!(adapter->test_icr &mask)) { |
@@ -1435,6 +1438,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1435 | ~mask & 0x00007FFF); | 1438 | ~mask & 0x00007FFF); |
1436 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, | 1439 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, |
1437 | ~mask & 0x00007FFF); | 1440 | ~mask & 0x00007FFF); |
1441 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1438 | usleep_range(10000, 20000); | 1442 | usleep_range(10000, 20000); |
1439 | 1443 | ||
1440 | if (adapter->test_icr) { | 1444 | if (adapter->test_icr) { |
@@ -1446,6 +1450,7 @@ static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1446 | 1450 | ||
1447 | /* Disable all the interrupts */ | 1451 | /* Disable all the interrupts */ |
1448 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); | 1452 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); |
1453 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1449 | usleep_range(10000, 20000); | 1454 | usleep_range(10000, 20000); |
1450 | 1455 | ||
1451 | /* Unhook test interrupt handler */ | 1456 | /* Unhook test interrupt handler */ |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 1be617545dc9..26b132bca43e 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -184,6 +184,7 @@ static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter) | |||
184 | vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); | 184 | vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); |
185 | vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; | 185 | vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; |
186 | IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); | 186 | IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); |
187 | IXGBE_WRITE_FLUSH(hw); | ||
187 | 188 | ||
188 | /* take a breather then clean up driver data */ | 189 | /* take a breather then clean up driver data */ |
189 | msleep(100); | 190 | msleep(100); |
diff --git a/drivers/net/ixgbe/ixgbe_phy.c b/drivers/net/ixgbe/ixgbe_phy.c index 735f686c3b36..f7ca3511b9fe 100644 --- a/drivers/net/ixgbe/ixgbe_phy.c +++ b/drivers/net/ixgbe/ixgbe_phy.c | |||
@@ -1585,6 +1585,7 @@ static s32 ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) | |||
1585 | *i2cctl |= IXGBE_I2C_CLK_OUT; | 1585 | *i2cctl |= IXGBE_I2C_CLK_OUT; |
1586 | 1586 | ||
1587 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); | 1587 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); |
1588 | IXGBE_WRITE_FLUSH(hw); | ||
1588 | 1589 | ||
1589 | /* SCL rise time (1000ns) */ | 1590 | /* SCL rise time (1000ns) */ |
1590 | udelay(IXGBE_I2C_T_RISE); | 1591 | udelay(IXGBE_I2C_T_RISE); |
@@ -1605,6 +1606,7 @@ static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) | |||
1605 | *i2cctl &= ~IXGBE_I2C_CLK_OUT; | 1606 | *i2cctl &= ~IXGBE_I2C_CLK_OUT; |
1606 | 1607 | ||
1607 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); | 1608 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); |
1609 | IXGBE_WRITE_FLUSH(hw); | ||
1608 | 1610 | ||
1609 | /* SCL fall time (300ns) */ | 1611 | /* SCL fall time (300ns) */ |
1610 | udelay(IXGBE_I2C_T_FALL); | 1612 | udelay(IXGBE_I2C_T_FALL); |
@@ -1628,6 +1630,7 @@ static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) | |||
1628 | *i2cctl &= ~IXGBE_I2C_DATA_OUT; | 1630 | *i2cctl &= ~IXGBE_I2C_DATA_OUT; |
1629 | 1631 | ||
1630 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); | 1632 | IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); |
1633 | IXGBE_WRITE_FLUSH(hw); | ||
1631 | 1634 | ||
1632 | /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ | 1635 | /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ |
1633 | udelay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA); | 1636 | udelay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA); |
diff --git a/drivers/net/ixgbe/ixgbe_x540.c b/drivers/net/ixgbe/ixgbe_x540.c index bec30ed91adc..2696c78e9f46 100644 --- a/drivers/net/ixgbe/ixgbe_x540.c +++ b/drivers/net/ixgbe/ixgbe_x540.c | |||
@@ -162,6 +162,7 @@ mac_reset_top: | |||
162 | ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); | 162 | ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); |
163 | ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; | 163 | ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; |
164 | IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); | 164 | IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); |
165 | IXGBE_WRITE_FLUSH(hw); | ||
165 | 166 | ||
166 | msleep(50); | 167 | msleep(50); |
167 | 168 | ||