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authorEmil Tantilov <emil.s.tantilov@intel.com>2011-02-17 06:34:53 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-03-03 06:10:01 -0500
commit26d6899ba775ed056bd73107e3f4427ff9247f75 (patch)
tree6af20ec6f856435c4814cf13bf657614e757d6c8 /drivers/net
parent1783575c1a11f726130522b851737cddda4c14c0 (diff)
ixgbe: Fill out PCIe speed and width enums with values
This patch fills in the values for bus speed and width of the ixgbe_bus_speed and ixgbe_bus_width enums. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 5ede03c84a5e..a737b1310619 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -2333,25 +2333,25 @@ enum ixgbe_bus_type {
2333/* PCI bus speeds */ 2333/* PCI bus speeds */
2334enum ixgbe_bus_speed { 2334enum ixgbe_bus_speed {
2335 ixgbe_bus_speed_unknown = 0, 2335 ixgbe_bus_speed_unknown = 0,
2336 ixgbe_bus_speed_33, 2336 ixgbe_bus_speed_33 = 33,
2337 ixgbe_bus_speed_66, 2337 ixgbe_bus_speed_66 = 66,
2338 ixgbe_bus_speed_100, 2338 ixgbe_bus_speed_100 = 100,
2339 ixgbe_bus_speed_120, 2339 ixgbe_bus_speed_120 = 120,
2340 ixgbe_bus_speed_133, 2340 ixgbe_bus_speed_133 = 133,
2341 ixgbe_bus_speed_2500, 2341 ixgbe_bus_speed_2500 = 2500,
2342 ixgbe_bus_speed_5000, 2342 ixgbe_bus_speed_5000 = 5000,
2343 ixgbe_bus_speed_reserved 2343 ixgbe_bus_speed_reserved
2344}; 2344};
2345 2345
2346/* PCI bus widths */ 2346/* PCI bus widths */
2347enum ixgbe_bus_width { 2347enum ixgbe_bus_width {
2348 ixgbe_bus_width_unknown = 0, 2348 ixgbe_bus_width_unknown = 0,
2349 ixgbe_bus_width_pcie_x1, 2349 ixgbe_bus_width_pcie_x1 = 1,
2350 ixgbe_bus_width_pcie_x2, 2350 ixgbe_bus_width_pcie_x2 = 2,
2351 ixgbe_bus_width_pcie_x4 = 4, 2351 ixgbe_bus_width_pcie_x4 = 4,
2352 ixgbe_bus_width_pcie_x8 = 8, 2352 ixgbe_bus_width_pcie_x8 = 8,
2353 ixgbe_bus_width_32, 2353 ixgbe_bus_width_32 = 32,
2354 ixgbe_bus_width_64, 2354 ixgbe_bus_width_64 = 64,
2355 ixgbe_bus_width_reserved 2355 ixgbe_bus_width_reserved
2356}; 2356};
2357 2357