aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net
diff options
context:
space:
mode:
authorMichael Chan <mchan@broadcom.com>2005-11-04 11:49:17 -0500
committerJohn W. Linville <linville@tuxdriver.com>2005-11-05 21:00:02 -0500
commit371377091dff14090cbe995d0a9291364f8583cb (patch)
treedb98dbad7e594438434963a5e28e05dae67c61ee /drivers/net
parent12d30d89e57d467e4c134906a4682719813d40ad (diff)
[PATCH] bnx2: update nvram code for 5708
Update bnx2 nvram code with support for 5708. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/bnx2.c100
-rw-r--r--drivers/net/bnx2.h10
2 files changed, 87 insertions, 23 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 671393a18469..08086a9e5411 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -79,38 +79,88 @@ static struct pci_device_id bnx2_pci_tbl[] = {
79static struct flash_spec flash_table[] = 79static struct flash_spec flash_table[] =
80{ 80{
81 /* Slow EEPROM */ 81 /* Slow EEPROM */
82 {0x00000000, 0x40030380, 0x009f0081, 0xa184a053, 0xaf000400, 82 {0x00000000, 0x40830380, 0x009f0081, 0xa184a053, 0xaf000400,
83 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE, 83 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
84 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE, 84 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
85 "EEPROM - slow"}, 85 "EEPROM - slow"},
86 /* Fast EEPROM */ 86 /* Expansion entry 0001 */
87 {0x02000000, 0x62008380, 0x009f0081, 0xa184a053, 0xaf000400, 87 {0x08000002, 0x4b808201, 0x00050081, 0x03840253, 0xaf020406,
88 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
89 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
90 "EEPROM - fast"},
91 /* ATMEL AT45DB011B (buffered flash) */
92 {0x02000003, 0x6e008173, 0x00570081, 0x68848353, 0xaf000400,
93 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
94 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
95 "Buffered flash"},
96 /* Saifun SA25F005 (non-buffered flash) */
97 /* strap, cfg1, & write1 need updates */
98 {0x01000003, 0x5f008081, 0x00050081, 0x03840253, 0xaf020406,
99 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE, 88 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
100 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE, 89 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
101 "Non-buffered flash (64kB)"}, 90 "Entry 0001"},
102 /* Saifun SA25F010 (non-buffered flash) */ 91 /* Saifun SA25F010 (non-buffered flash) */
103 /* strap, cfg1, & write1 need updates */ 92 /* strap, cfg1, & write1 need updates */
104 {0x00000001, 0x47008081, 0x00050081, 0x03840253, 0xaf020406, 93 {0x04000001, 0x47808201, 0x00050081, 0x03840253, 0xaf020406,
105 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE, 94 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
106 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2, 95 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
107 "Non-buffered flash (128kB)"}, 96 "Non-buffered flash (128kB)"},
108 /* Saifun SA25F020 (non-buffered flash) */ 97 /* Saifun SA25F020 (non-buffered flash) */
109 /* strap, cfg1, & write1 need updates */ 98 /* strap, cfg1, & write1 need updates */
110 {0x00000003, 0x4f008081, 0x00050081, 0x03840253, 0xaf020406, 99 {0x0c000003, 0x4f808201, 0x00050081, 0x03840253, 0xaf020406,
111 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE, 100 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
112 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4, 101 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
113 "Non-buffered flash (256kB)"}, 102 "Non-buffered flash (256kB)"},
103 /* Expansion entry 0100 */
104 {0x11000000, 0x53808201, 0x00050081, 0x03840253, 0xaf020406,
105 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
106 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
107 "Entry 0100"},
108 /* Entry 0101: ST M45PE10 (non-buffered flash, TetonII B0) */
109 {0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,
110 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
111 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
112 "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
113 /* Entry 0110: ST M45PE20 (non-buffered flash)*/
114 {0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
115 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
116 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
117 "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
118 /* Saifun SA25F005 (non-buffered flash) */
119 /* strap, cfg1, & write1 need updates */
120 {0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
121 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
122 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
123 "Non-buffered flash (64kB)"},
124 /* Fast EEPROM */
125 {0x22000000, 0x62808380, 0x009f0081, 0xa184a053, 0xaf000400,
126 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
127 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
128 "EEPROM - fast"},
129 /* Expansion entry 1001 */
130 {0x2a000002, 0x6b808201, 0x00050081, 0x03840253, 0xaf020406,
131 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
132 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
133 "Entry 1001"},
134 /* Expansion entry 1010 */
135 {0x26000001, 0x67808201, 0x00050081, 0x03840253, 0xaf020406,
136 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
137 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
138 "Entry 1010"},
139 /* ATMEL AT45DB011B (buffered flash) */
140 {0x2e000003, 0x6e808273, 0x00570081, 0x68848353, 0xaf000400,
141 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
142 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
143 "Buffered flash (128kB)"},
144 /* Expansion entry 1100 */
145 {0x33000000, 0x73808201, 0x00050081, 0x03840253, 0xaf020406,
146 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
147 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
148 "Entry 1100"},
149 /* Expansion entry 1101 */
150 {0x3b000002, 0x7b808201, 0x00050081, 0x03840253, 0xaf020406,
151 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
152 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
153 "Entry 1101"},
154 /* Ateml Expansion entry 1110 */
155 {0x37000001, 0x76808273, 0x00570081, 0x68848353, 0xaf000400,
156 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
157 BUFFERED_FLASH_BYTE_ADDR_MASK, 0,
158 "Entry 1110 (Atmel)"},
159 /* ATMEL AT45DB021B (buffered flash) */
160 {0x3f000003, 0x7e808273, 0x00570081, 0x68848353, 0xaf000400,
161 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
162 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE*2,
163 "Buffered flash (256kB)"},
114}; 164};
115 165
116MODULE_DEVICE_TABLE(pci, bnx2_pci_tbl); 166MODULE_DEVICE_TABLE(pci, bnx2_pci_tbl);
@@ -2529,21 +2579,27 @@ bnx2_init_nvram(struct bnx2 *bp)
2529 2579
2530 /* Flash interface has been reconfigured */ 2580 /* Flash interface has been reconfigured */
2531 for (j = 0, flash = &flash_table[0]; j < entry_count; 2581 for (j = 0, flash = &flash_table[0]; j < entry_count;
2532 j++, flash++) { 2582 j++, flash++) {
2533 2583 if ((val & FLASH_BACKUP_STRAP_MASK) ==
2534 if (val == flash->config1) { 2584 (flash->config1 & FLASH_BACKUP_STRAP_MASK)) {
2535 bp->flash_info = flash; 2585 bp->flash_info = flash;
2536 break; 2586 break;
2537 } 2587 }
2538 } 2588 }
2539 } 2589 }
2540 else { 2590 else {
2591 u32 mask;
2541 /* Not yet been reconfigured */ 2592 /* Not yet been reconfigured */
2542 2593
2594 if (val & (1 << 23))
2595 mask = FLASH_BACKUP_STRAP_MASK;
2596 else
2597 mask = FLASH_STRAP_MASK;
2598
2543 for (j = 0, flash = &flash_table[0]; j < entry_count; 2599 for (j = 0, flash = &flash_table[0]; j < entry_count;
2544 j++, flash++) { 2600 j++, flash++) {
2545 2601
2546 if ((val & FLASH_STRAP_MASK) == flash->strapping) { 2602 if ((val & mask) == (flash->strapping & mask)) {
2547 bp->flash_info = flash; 2603 bp->flash_info = flash;
2548 2604
2549 /* Request access to the flash interface. */ 2605 /* Request access to the flash interface. */
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index c0e88f850493..4a2e6ba7cd70 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -3847,7 +3847,7 @@ struct sw_bd {
3847#define BUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS) 3847#define BUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS)
3848#define BUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1) 3848#define BUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1)
3849#define BUFFERED_FLASH_PAGE_SIZE 264 3849#define BUFFERED_FLASH_PAGE_SIZE 264
3850#define BUFFERED_FLASH_TOTAL_SIZE 131072 3850#define BUFFERED_FLASH_TOTAL_SIZE 0x21000
3851 3851
3852#define SAIFUN_FLASH_PAGE_BITS 8 3852#define SAIFUN_FLASH_PAGE_BITS 8
3853#define SAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS) 3853#define SAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS)
@@ -3855,6 +3855,12 @@ struct sw_bd {
3855#define SAIFUN_FLASH_PAGE_SIZE 256 3855#define SAIFUN_FLASH_PAGE_SIZE 256
3856#define SAIFUN_FLASH_BASE_TOTAL_SIZE 65536 3856#define SAIFUN_FLASH_BASE_TOTAL_SIZE 65536
3857 3857
3858#define ST_MICRO_FLASH_PAGE_BITS 8
3859#define ST_MICRO_FLASH_PHY_PAGE_SIZE (1 << ST_MICRO_FLASH_PAGE_BITS)
3860#define ST_MICRO_FLASH_BYTE_ADDR_MASK (ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
3861#define ST_MICRO_FLASH_PAGE_SIZE 256
3862#define ST_MICRO_FLASH_BASE_TOTAL_SIZE 65536
3863
3858#define NVRAM_TIMEOUT_COUNT 30000 3864#define NVRAM_TIMEOUT_COUNT 30000
3859 3865
3860 3866
@@ -3863,6 +3869,8 @@ struct sw_bd {
3863 BNX2_NVM_CFG1_PROTECT_MODE | \ 3869 BNX2_NVM_CFG1_PROTECT_MODE | \
3864 BNX2_NVM_CFG1_FLASH_SIZE) 3870 BNX2_NVM_CFG1_FLASH_SIZE)
3865 3871
3872#define FLASH_BACKUP_STRAP_MASK (0xf << 26)
3873
3866struct flash_spec { 3874struct flash_spec {
3867 u32 strapping; 3875 u32 strapping;
3868 u32 config1; 3876 u32 config1;