diff options
author | Michael Buesch <mb@bu3sch.de> | 2008-02-13 08:31:08 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-02-29 15:37:08 -0500 |
commit | 35f0d354bf0b0c125ac814419202f8c551081fda (patch) | |
tree | 2eef4501002de33983ff1f4acda35acbcc1797bd /drivers/net | |
parent | d0f5afbe6de6b8c06f94a8a0b370252e3863afe7 (diff) |
b43: Add HostFlags HI support
This adds support for the high 16 bits of the hostflags.
No functional change.
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/b43/b43.h | 63 | ||||
-rw-r--r-- | drivers/net/wireless/b43/main.c | 20 | ||||
-rw-r--r-- | drivers/net/wireless/b43/main.h | 4 |
3 files changed, 52 insertions, 35 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h index 76ad811af399..33459d61a717 100644 --- a/drivers/net/wireless/b43/b43.h +++ b/drivers/net/wireless/b43/b43.h | |||
@@ -144,7 +144,8 @@ enum { | |||
144 | #define B43_SHM_SH_PHYTYPE 0x0052 /* PHY type */ | 144 | #define B43_SHM_SH_PHYTYPE 0x0052 /* PHY type */ |
145 | #define B43_SHM_SH_ANTSWAP 0x005C /* Antenna swap threshold */ | 145 | #define B43_SHM_SH_ANTSWAP 0x005C /* Antenna swap threshold */ |
146 | #define B43_SHM_SH_HOSTFLO 0x005E /* Hostflags for ucode options (low) */ | 146 | #define B43_SHM_SH_HOSTFLO 0x005E /* Hostflags for ucode options (low) */ |
147 | #define B43_SHM_SH_HOSTFHI 0x0060 /* Hostflags for ucode options (high) */ | 147 | #define B43_SHM_SH_HOSTFMI 0x0060 /* Hostflags for ucode options (middle) */ |
148 | #define B43_SHM_SH_HOSTFHI 0x0062 /* Hostflags for ucode options (high) */ | ||
148 | #define B43_SHM_SH_RFATT 0x0064 /* Current radio attenuation value */ | 149 | #define B43_SHM_SH_RFATT 0x0064 /* Current radio attenuation value */ |
149 | #define B43_SHM_SH_RADAR 0x0066 /* Radar register */ | 150 | #define B43_SHM_SH_RADAR 0x0066 /* Radar register */ |
150 | #define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */ | 151 | #define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */ |
@@ -232,31 +233,41 @@ enum { | |||
232 | #define B43_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4) | 233 | #define B43_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4) |
233 | 234 | ||
234 | /* HostFlags. See b43_hf_read/write() */ | 235 | /* HostFlags. See b43_hf_read/write() */ |
235 | #define B43_HF_ANTDIVHELP 0x00000001 /* ucode antenna div helper */ | 236 | #define B43_HF_ANTDIVHELP 0x000000000001ULL /* ucode antenna div helper */ |
236 | #define B43_HF_SYMW 0x00000002 /* G-PHY SYM workaround */ | 237 | #define B43_HF_SYMW 0x000000000002ULL /* G-PHY SYM workaround */ |
237 | #define B43_HF_RXPULLW 0x00000004 /* RX pullup workaround */ | 238 | #define B43_HF_RXPULLW 0x000000000004ULL /* RX pullup workaround */ |
238 | #define B43_HF_CCKBOOST 0x00000008 /* 4dB CCK power boost (exclusive with OFDM boost) */ | 239 | #define B43_HF_CCKBOOST 0x000000000008ULL /* 4dB CCK power boost (exclusive with OFDM boost) */ |
239 | #define B43_HF_BTCOEX 0x00000010 /* Bluetooth coexistance */ | 240 | #define B43_HF_BTCOEX 0x000000000010ULL /* Bluetooth coexistance */ |
240 | #define B43_HF_GDCW 0x00000020 /* G-PHY DV canceller filter bw workaround */ | 241 | #define B43_HF_GDCW 0x000000000020ULL /* G-PHY DC canceller filter bw workaround */ |
241 | #define B43_HF_OFDMPABOOST 0x00000040 /* Enable PA gain boost for OFDM */ | 242 | #define B43_HF_OFDMPABOOST 0x000000000040ULL /* Enable PA gain boost for OFDM */ |
242 | #define B43_HF_ACPR 0x00000080 /* Disable for Japan, channel 14 */ | 243 | #define B43_HF_ACPR 0x000000000080ULL /* Disable for Japan, channel 14 */ |
243 | #define B43_HF_EDCF 0x00000100 /* on if WME and MAC suspended */ | 244 | #define B43_HF_EDCF 0x000000000100ULL /* on if WME and MAC suspended */ |
244 | #define B43_HF_TSSIRPSMW 0x00000200 /* TSSI reset PSM ucode workaround */ | 245 | #define B43_HF_TSSIRPSMW 0x000000000200ULL /* TSSI reset PSM ucode workaround */ |
245 | #define B43_HF_DSCRQ 0x00000400 /* Disable slow clock request in ucode */ | 246 | #define B43_HF_20IN40IQW 0x000000000200ULL /* 20 in 40 MHz I/Q workaround (rev >= 13 only) */ |
246 | #define B43_HF_ACIW 0x00000800 /* ACI workaround: shift bits by 2 on PHY CRS */ | 247 | #define B43_HF_DSCRQ 0x000000000400ULL /* Disable slow clock request in ucode */ |
247 | #define B43_HF_2060W 0x00001000 /* 2060 radio workaround */ | 248 | #define B43_HF_ACIW 0x000000000800ULL /* ACI workaround: shift bits by 2 on PHY CRS */ |
248 | #define B43_HF_RADARW 0x00002000 /* Radar workaround */ | 249 | #define B43_HF_2060W 0x000000001000ULL /* 2060 radio workaround */ |
249 | #define B43_HF_USEDEFKEYS 0x00004000 /* Enable use of default keys */ | 250 | #define B43_HF_RADARW 0x000000002000ULL /* Radar workaround */ |
250 | #define B43_HF_BT4PRIOCOEX 0x00010000 /* Bluetooth 2-priority coexistance */ | 251 | #define B43_HF_USEDEFKEYS 0x000000004000ULL /* Enable use of default keys */ |
251 | #define B43_HF_FWKUP 0x00020000 /* Fast wake-up ucode */ | 252 | #define B43_HF_AFTERBURNER 0x000000008000ULL /* Afterburner enabled */ |
252 | #define B43_HF_VCORECALC 0x00040000 /* Force VCO recalculation when powering up synthpu */ | 253 | #define B43_HF_BT4PRIOCOEX 0x000000010000ULL /* Bluetooth 4-priority coexistance */ |
253 | #define B43_HF_PCISCW 0x00080000 /* PCI slow clock workaround */ | 254 | #define B43_HF_FWKUP 0x000000020000ULL /* Fast wake-up ucode */ |
254 | #define B43_HF_4318TSSI 0x00200000 /* 4318 TSSI */ | 255 | #define B43_HF_VCORECALC 0x000000040000ULL /* Force VCO recalculation when powering up synthpu */ |
255 | #define B43_HF_FBCMCFIFO 0x00400000 /* Flush bcast/mcast FIFO immediately */ | 256 | #define B43_HF_PCISCW 0x000000080000ULL /* PCI slow clock workaround */ |
256 | #define B43_HF_HWPCTL 0x00800000 /* Enable hardwarre power control */ | 257 | #define B43_HF_4318TSSI 0x000000200000ULL /* 4318 TSSI */ |
257 | #define B43_HF_BTCOEXALT 0x01000000 /* Bluetooth coexistance in alternate pins */ | 258 | #define B43_HF_FBCMCFIFO 0x000000400000ULL /* Flush bcast/mcast FIFO immediately */ |
258 | #define B43_HF_TXBTCHECK 0x02000000 /* Bluetooth check during transmission */ | 259 | #define B43_HF_HWPCTL 0x000000800000ULL /* Enable hardwarre power control */ |
259 | #define B43_HF_SKCFPUP 0x04000000 /* Skip CFP update */ | 260 | #define B43_HF_BTCOEXALT 0x000001000000ULL /* Bluetooth coexistance in alternate pins */ |
261 | #define B43_HF_TXBTCHECK 0x000002000000ULL /* Bluetooth check during transmission */ | ||
262 | #define B43_HF_SKCFPUP 0x000004000000ULL /* Skip CFP update */ | ||
263 | #define B43_HF_N40W 0x000008000000ULL /* N PHY 40 MHz workaround (rev >= 13 only) */ | ||
264 | #define B43_HF_ANTSEL 0x000020000000ULL /* Antenna selection (for testing antenna div.) */ | ||
265 | #define B43_HF_BT3COEXT 0x000020000000ULL /* Bluetooth 3-wire coexistence (rev >= 13 only) */ | ||
266 | #define B43_HF_BTCANT 0x000040000000ULL /* Bluetooth coexistence (antenna mode) (rev >= 13 only) */ | ||
267 | #define B43_HF_ANTSELEN 0x000100000000ULL /* Antenna selection enabled (rev >= 13 only) */ | ||
268 | #define B43_HF_ANTSELMODE 0x000200000000ULL /* Antenna selection mode (rev >= 13 only) */ | ||
269 | #define B43_HF_MLADVW 0x001000000000ULL /* N PHY ML ADV workaround (rev >= 13 only) */ | ||
270 | #define B43_HF_PR45960W 0x080000000000ULL /* PR 45960 workaround (rev >= 13 only) */ | ||
260 | 271 | ||
261 | /* MacFilter offsets. */ | 272 | /* MacFilter offsets. */ |
262 | #define B43_MACFILTER_SELF 0x0000 | 273 | #define B43_MACFILTER_SELF 0x0000 |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 071f61437c67..f745308faaad 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -465,24 +465,30 @@ out: | |||
465 | } | 465 | } |
466 | 466 | ||
467 | /* Read HostFlags */ | 467 | /* Read HostFlags */ |
468 | u32 b43_hf_read(struct b43_wldev * dev) | 468 | u64 b43_hf_read(struct b43_wldev * dev) |
469 | { | 469 | { |
470 | u32 ret; | 470 | u64 ret; |
471 | 471 | ||
472 | ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI); | 472 | ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI); |
473 | ret <<= 16; | 473 | ret <<= 16; |
474 | ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI); | ||
475 | ret <<= 16; | ||
474 | ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO); | 476 | ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO); |
475 | 477 | ||
476 | return ret; | 478 | return ret; |
477 | } | 479 | } |
478 | 480 | ||
479 | /* Write HostFlags */ | 481 | /* Write HostFlags */ |
480 | void b43_hf_write(struct b43_wldev *dev, u32 value) | 482 | void b43_hf_write(struct b43_wldev *dev, u64 value) |
481 | { | 483 | { |
482 | b43_shm_write16(dev, B43_SHM_SHARED, | 484 | u16 lo, mi, hi; |
483 | B43_SHM_SH_HOSTFLO, (value & 0x0000FFFF)); | 485 | |
484 | b43_shm_write16(dev, B43_SHM_SHARED, | 486 | lo = (value & 0x00000000FFFFULL); |
485 | B43_SHM_SH_HOSTFHI, ((value & 0xFFFF0000) >> 16)); | 487 | mi = (value & 0x0000FFFF0000ULL) >> 16; |
488 | hi = (value & 0xFFFF00000000ULL) >> 32; | ||
489 | b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO, lo); | ||
490 | b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI, mi); | ||
491 | b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI, hi); | ||
486 | } | 492 | } |
487 | 493 | ||
488 | void b43_tsf_read(struct b43_wldev *dev, u64 * tsf) | 494 | void b43_tsf_read(struct b43_wldev *dev, u64 * tsf) |
diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h index 2d52d9de9305..24a79f5d6ff5 100644 --- a/drivers/net/wireless/b43/main.h +++ b/drivers/net/wireless/b43/main.h | |||
@@ -95,8 +95,8 @@ u16 b43_shm_read16(struct b43_wldev *dev, u16 routing, u16 offset); | |||
95 | void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value); | 95 | void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value); |
96 | void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value); | 96 | void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value); |
97 | 97 | ||
98 | u32 b43_hf_read(struct b43_wldev *dev); | 98 | u64 b43_hf_read(struct b43_wldev *dev); |
99 | void b43_hf_write(struct b43_wldev *dev, u32 value); | 99 | void b43_hf_write(struct b43_wldev *dev, u64 value); |
100 | 100 | ||
101 | void b43_dummy_transmission(struct b43_wldev *dev); | 101 | void b43_dummy_transmission(struct b43_wldev *dev); |
102 | 102 | ||