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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 15:28:28 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 15:28:28 -0400
commit2e561c7b7e705b619122e5386d6f99f28f2b6e5a (patch)
treebe942c58cacd25c66cced37e1a82f269c37871de /drivers/net
parent2cfed60cc24676d65e01278dbf10d0069de02592 (diff)
parent653252c2302cdf2dfbca66a7e177f7db783f9efa (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (48 commits) net: Fix wrong interpretation of some copy_to_user() results. xfrm: alg_key_len & alg_icv_len should be unsigned [netdrvr] tehuti: move ioctl perm check closer to function start ipv6: Fix typo in net/ipv6/Kconfig via-velocity: fix vlan receipt tg3: sparse cleanup forcedeth: realtek phy crossover detection ibm_newemac: Increase MDIO timeouts gianfar: Fix skb allocation strategy netxen: reduce stack usage of netxen_nic_flash_print smc911x: test after postfix decrement fails in smc911x_{reset,drop_pkt} net drivers: fix platform driver hotplug/coldplug forcedeth: new backoff implementation ehea: make things static phylib: Add support for board-level PHY fixups [netdrvr] atlx: code movement: move atl1 parameter parsing atlx: remove flash vendor parameter korina: misc cleanup korina: fix misplaced return statement WAN: Fix confusing insmod error code for C101 too. ...
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/arm/at91_ether.c1
-rw-r--r--drivers/net/arm/ep93xx_eth.c2
-rw-r--r--drivers/net/atlx/atl1.c138
-rw-r--r--drivers/net/atlx/atlx.c177
-rw-r--r--drivers/net/ax88796.c1
-rw-r--r--drivers/net/bfin_mac.c7
-rw-r--r--drivers/net/cpmac.c2
-rw-r--r--drivers/net/dm9000.c1
-rw-r--r--drivers/net/e1000e/82571.c6
-rw-r--r--drivers/net/e1000e/defines.h3
-rw-r--r--drivers/net/e1000e/e1000.h34
-rw-r--r--drivers/net/e1000e/es2lan.c129
-rw-r--r--drivers/net/e1000e/ethtool.c49
-rw-r--r--drivers/net/e1000e/hw.h12
-rw-r--r--drivers/net/e1000e/netdev.c159
-rw-r--r--drivers/net/e1000e/phy.c73
-rw-r--r--drivers/net/ehea/ehea_main.c4
-rw-r--r--drivers/net/forcedeth.c432
-rw-r--r--drivers/net/gianfar.c104
-rw-r--r--drivers/net/ibm_newemac/core.c83
-rw-r--r--drivers/net/ibm_newemac/core.h14
-rw-r--r--drivers/net/ibm_newemac/mal.c20
-rw-r--r--drivers/net/ibm_newemac/rgmii.c2
-rw-r--r--drivers/net/ibm_newemac/tah.c2
-rw-r--r--drivers/net/ibm_newemac/zmii.c2
-rw-r--r--drivers/net/igb/igb_main.c2
-rw-r--r--drivers/net/irda/ali-ircc.c2
-rw-r--r--drivers/net/irda/pxaficp_ir.c2
-rw-r--r--drivers/net/irda/sa1100_ir.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c2
-rw-r--r--drivers/net/jazzsonic.c2
-rw-r--r--drivers/net/korina.c39
-rw-r--r--drivers/net/macb.c2
-rw-r--r--drivers/net/meth.c2
-rw-r--r--drivers/net/mv643xx_eth.c5
-rw-r--r--drivers/net/netx-eth.c2
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c15
-rw-r--r--drivers/net/niu.c371
-rw-r--r--drivers/net/niu.h12
-rw-r--r--drivers/net/phy/mdio_bus.c3
-rw-r--r--drivers/net/phy/phy.c4
-rw-r--r--drivers/net/phy/phy_device.c129
-rw-r--r--drivers/net/s2io.c128
-rw-r--r--drivers/net/s2io.h9
-rw-r--r--drivers/net/sgiseeq.c4
-rw-r--r--drivers/net/smc911x.c8
-rw-r--r--drivers/net/smc91x.c2
-rw-r--r--drivers/net/sni_82596.c2
-rw-r--r--drivers/net/tehuti.c15
-rw-r--r--drivers/net/tg3.c2
-rw-r--r--drivers/net/tsi108_eth.c2
-rw-r--r--drivers/net/typhoon.c1
-rw-r--r--drivers/net/ucc_geth.c2
-rw-r--r--drivers/net/via-velocity.c46
-rw-r--r--drivers/net/wan/c101.c6
-rw-r--r--drivers/net/wan/hdlc_fr.c4
56 files changed, 1575 insertions, 709 deletions
diff --git a/drivers/net/arm/at91_ether.c b/drivers/net/arm/at91_ether.c
index 978e20a1791b..1e39e78f1778 100644
--- a/drivers/net/arm/at91_ether.c
+++ b/drivers/net/arm/at91_ether.c
@@ -1248,3 +1248,4 @@ module_exit(at91ether_exit)
1248MODULE_LICENSE("GPL"); 1248MODULE_LICENSE("GPL");
1249MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver"); 1249MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
1250MODULE_AUTHOR("Andrew Victor"); 1250MODULE_AUTHOR("Andrew Victor");
1251MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c
index 91a6590d107b..ecd8fc6146e9 100644
--- a/drivers/net/arm/ep93xx_eth.c
+++ b/drivers/net/arm/ep93xx_eth.c
@@ -897,6 +897,7 @@ static struct platform_driver ep93xx_eth_driver = {
897 .remove = ep93xx_eth_remove, 897 .remove = ep93xx_eth_remove,
898 .driver = { 898 .driver = {
899 .name = "ep93xx-eth", 899 .name = "ep93xx-eth",
900 .owner = THIS_MODULE,
900 }, 901 },
901}; 902};
902 903
@@ -914,3 +915,4 @@ static void __exit ep93xx_eth_cleanup_module(void)
914module_init(ep93xx_eth_init_module); 915module_init(ep93xx_eth_init_module);
915module_exit(ep93xx_eth_cleanup_module); 916module_exit(ep93xx_eth_cleanup_module);
916MODULE_LICENSE("GPL"); 917MODULE_LICENSE("GPL");
918MODULE_ALIAS("platform:ep93xx-eth");
diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c
index 5586fc624688..0afe522b8f7b 100644
--- a/drivers/net/atlx/atl1.c
+++ b/drivers/net/atlx/atl1.c
@@ -91,6 +91,144 @@
91#include "atlx.c" 91#include "atlx.c"
92 92
93/* 93/*
94 * This is the only thing that needs to be changed to adjust the
95 * maximum number of ports that the driver can manage.
96 */
97#define ATL1_MAX_NIC 4
98
99#define OPTION_UNSET -1
100#define OPTION_DISABLED 0
101#define OPTION_ENABLED 1
102
103#define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
104
105/*
106 * Interrupt Moderate Timer in units of 2 us
107 *
108 * Valid Range: 10-65535
109 *
110 * Default Value: 100 (200us)
111 */
112static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
113static int num_int_mod_timer;
114module_param_array_named(int_mod_timer, int_mod_timer, int,
115 &num_int_mod_timer, 0);
116MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
117
118#define DEFAULT_INT_MOD_CNT 100 /* 200us */
119#define MAX_INT_MOD_CNT 65000
120#define MIN_INT_MOD_CNT 50
121
122struct atl1_option {
123 enum { enable_option, range_option, list_option } type;
124 char *name;
125 char *err;
126 int def;
127 union {
128 struct { /* range_option info */
129 int min;
130 int max;
131 } r;
132 struct { /* list_option info */
133 int nr;
134 struct atl1_opt_list {
135 int i;
136 char *str;
137 } *p;
138 } l;
139 } arg;
140};
141
142static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
143 struct pci_dev *pdev)
144{
145 if (*value == OPTION_UNSET) {
146 *value = opt->def;
147 return 0;
148 }
149
150 switch (opt->type) {
151 case enable_option:
152 switch (*value) {
153 case OPTION_ENABLED:
154 dev_info(&pdev->dev, "%s enabled\n", opt->name);
155 return 0;
156 case OPTION_DISABLED:
157 dev_info(&pdev->dev, "%s disabled\n", opt->name);
158 return 0;
159 }
160 break;
161 case range_option:
162 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
163 dev_info(&pdev->dev, "%s set to %i\n", opt->name,
164 *value);
165 return 0;
166 }
167 break;
168 case list_option:{
169 int i;
170 struct atl1_opt_list *ent;
171
172 for (i = 0; i < opt->arg.l.nr; i++) {
173 ent = &opt->arg.l.p[i];
174 if (*value == ent->i) {
175 if (ent->str[0] != '\0')
176 dev_info(&pdev->dev, "%s\n",
177 ent->str);
178 return 0;
179 }
180 }
181 }
182 break;
183
184 default:
185 break;
186 }
187
188 dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
189 opt->name, *value, opt->err);
190 *value = opt->def;
191 return -1;
192}
193
194/*
195 * atl1_check_options - Range Checking for Command Line Parameters
196 * @adapter: board private structure
197 *
198 * This routine checks all command line parameters for valid user
199 * input. If an invalid value is given, or if no user specified
200 * value exists, a default value is used. The final value is stored
201 * in a variable in the adapter structure.
202 */
203void __devinit atl1_check_options(struct atl1_adapter *adapter)
204{
205 struct pci_dev *pdev = adapter->pdev;
206 int bd = adapter->bd_number;
207 if (bd >= ATL1_MAX_NIC) {
208 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
209 dev_notice(&pdev->dev, "using defaults for all values\n");
210 }
211 { /* Interrupt Moderate Timer */
212 struct atl1_option opt = {
213 .type = range_option,
214 .name = "Interrupt Moderator Timer",
215 .err = "using default of "
216 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
217 .def = DEFAULT_INT_MOD_CNT,
218 .arg = {.r = {.min = MIN_INT_MOD_CNT,
219 .max = MAX_INT_MOD_CNT} }
220 };
221 int val;
222 if (num_int_mod_timer > bd) {
223 val = int_mod_timer[bd];
224 atl1_validate_option(&val, &opt, pdev);
225 adapter->imt = (u16) val;
226 } else
227 adapter->imt = (u16) (opt.def);
228 }
229}
230
231/*
94 * atl1_pci_tbl - PCI Device ID Table 232 * atl1_pci_tbl - PCI Device ID Table
95 */ 233 */
96static const struct pci_device_id atl1_pci_tbl[] = { 234static const struct pci_device_id atl1_pci_tbl[] = {
diff --git a/drivers/net/atlx/atlx.c b/drivers/net/atlx/atlx.c
index 4186326d1b94..f06b854e2501 100644
--- a/drivers/net/atlx/atlx.c
+++ b/drivers/net/atlx/atlx.c
@@ -253,181 +253,4 @@ static void atlx_restore_vlan(struct atlx_adapter *adapter)
253 atlx_vlan_rx_register(adapter->netdev, adapter->vlgrp); 253 atlx_vlan_rx_register(adapter->netdev, adapter->vlgrp);
254} 254}
255 255
256/*
257 * This is the only thing that needs to be changed to adjust the
258 * maximum number of ports that the driver can manage.
259 */
260#define ATL1_MAX_NIC 4
261
262#define OPTION_UNSET -1
263#define OPTION_DISABLED 0
264#define OPTION_ENABLED 1
265
266#define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
267
268/*
269 * Interrupt Moderate Timer in units of 2 us
270 *
271 * Valid Range: 10-65535
272 *
273 * Default Value: 100 (200us)
274 */
275static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
276static int num_int_mod_timer;
277module_param_array_named(int_mod_timer, int_mod_timer, int,
278 &num_int_mod_timer, 0);
279MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
280
281/*
282 * flash_vendor
283 *
284 * Valid Range: 0-2
285 *
286 * 0 - Atmel
287 * 1 - SST
288 * 2 - ST
289 *
290 * Default Value: 0
291 */
292static int __devinitdata flash_vendor[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
293static int num_flash_vendor;
294module_param_array_named(flash_vendor, flash_vendor, int, &num_flash_vendor, 0);
295MODULE_PARM_DESC(flash_vendor, "SPI flash vendor");
296
297#define DEFAULT_INT_MOD_CNT 100 /* 200us */
298#define MAX_INT_MOD_CNT 65000
299#define MIN_INT_MOD_CNT 50
300
301#define FLASH_VENDOR_DEFAULT 0
302#define FLASH_VENDOR_MIN 0
303#define FLASH_VENDOR_MAX 2
304
305struct atl1_option {
306 enum { enable_option, range_option, list_option } type;
307 char *name;
308 char *err;
309 int def;
310 union {
311 struct { /* range_option info */
312 int min;
313 int max;
314 } r;
315 struct { /* list_option info */
316 int nr;
317 struct atl1_opt_list {
318 int i;
319 char *str;
320 } *p;
321 } l;
322 } arg;
323};
324
325static int __devinit atl1_validate_option(int *value, struct atl1_option *opt,
326 struct pci_dev *pdev)
327{
328 if (*value == OPTION_UNSET) {
329 *value = opt->def;
330 return 0;
331 }
332
333 switch (opt->type) {
334 case enable_option:
335 switch (*value) {
336 case OPTION_ENABLED:
337 dev_info(&pdev->dev, "%s enabled\n", opt->name);
338 return 0;
339 case OPTION_DISABLED:
340 dev_info(&pdev->dev, "%s disabled\n", opt->name);
341 return 0;
342 }
343 break;
344 case range_option:
345 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
346 dev_info(&pdev->dev, "%s set to %i\n", opt->name,
347 *value);
348 return 0;
349 }
350 break;
351 case list_option:{
352 int i;
353 struct atl1_opt_list *ent;
354
355 for (i = 0; i < opt->arg.l.nr; i++) {
356 ent = &opt->arg.l.p[i];
357 if (*value == ent->i) {
358 if (ent->str[0] != '\0')
359 dev_info(&pdev->dev, "%s\n",
360 ent->str);
361 return 0;
362 }
363 }
364 }
365 break;
366
367 default:
368 break;
369 }
370
371 dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
372 opt->name, *value, opt->err);
373 *value = opt->def;
374 return -1;
375}
376
377/*
378 * atl1_check_options - Range Checking for Command Line Parameters
379 * @adapter: board private structure
380 *
381 * This routine checks all command line parameters for valid user
382 * input. If an invalid value is given, or if no user specified
383 * value exists, a default value is used. The final value is stored
384 * in a variable in the adapter structure.
385 */
386void __devinit atl1_check_options(struct atl1_adapter *adapter)
387{
388 struct pci_dev *pdev = adapter->pdev;
389 int bd = adapter->bd_number;
390 if (bd >= ATL1_MAX_NIC) {
391 dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
392 dev_notice(&pdev->dev, "using defaults for all values\n");
393 }
394 { /* Interrupt Moderate Timer */
395 struct atl1_option opt = {
396 .type = range_option,
397 .name = "Interrupt Moderator Timer",
398 .err = "using default of "
399 __MODULE_STRING(DEFAULT_INT_MOD_CNT),
400 .def = DEFAULT_INT_MOD_CNT,
401 .arg = {.r = {.min = MIN_INT_MOD_CNT,
402 .max = MAX_INT_MOD_CNT} }
403 };
404 int val;
405 if (num_int_mod_timer > bd) {
406 val = int_mod_timer[bd];
407 atl1_validate_option(&val, &opt, pdev);
408 adapter->imt = (u16) val;
409 } else
410 adapter->imt = (u16) (opt.def);
411 }
412
413 { /* Flash Vendor */
414 struct atl1_option opt = {
415 .type = range_option,
416 .name = "SPI Flash Vendor",
417 .err = "using default of "
418 __MODULE_STRING(FLASH_VENDOR_DEFAULT),
419 .def = DEFAULT_INT_MOD_CNT,
420 .arg = {.r = {.min = FLASH_VENDOR_MIN,
421 .max = FLASH_VENDOR_MAX} }
422 };
423 int val;
424 if (num_flash_vendor > bd) {
425 val = flash_vendor[bd];
426 atl1_validate_option(&val, &opt, pdev);
427 adapter->hw.flash_vendor = (u8) val;
428 } else
429 adapter->hw.flash_vendor = (u8) (opt.def);
430 }
431}
432
433#endif /* ATLX_C */ 256#endif /* ATLX_C */
diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c
index 194949afacd0..0b4adf4a0f7d 100644
--- a/drivers/net/ax88796.c
+++ b/drivers/net/ax88796.c
@@ -1005,3 +1005,4 @@ module_exit(axdrv_exit);
1005MODULE_DESCRIPTION("AX88796 10/100 Ethernet platform driver"); 1005MODULE_DESCRIPTION("AX88796 10/100 Ethernet platform driver");
1006MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); 1006MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
1007MODULE_LICENSE("GPL v2"); 1007MODULE_LICENSE("GPL v2");
1008MODULE_ALIAS("platform:ax88796");
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 717dcc1aa1e9..4fec8581bfd7 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -47,6 +47,7 @@
47MODULE_AUTHOR(DRV_AUTHOR); 47MODULE_AUTHOR(DRV_AUTHOR);
48MODULE_LICENSE("GPL"); 48MODULE_LICENSE("GPL");
49MODULE_DESCRIPTION(DRV_DESC); 49MODULE_DESCRIPTION(DRV_DESC);
50MODULE_ALIAS("platform:bfin_mac");
50 51
51#if defined(CONFIG_BFIN_MAC_USE_L1) 52#if defined(CONFIG_BFIN_MAC_USE_L1)
52# define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size) 53# define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
@@ -1089,8 +1090,9 @@ static struct platform_driver bfin_mac_driver = {
1089 .resume = bfin_mac_resume, 1090 .resume = bfin_mac_resume,
1090 .suspend = bfin_mac_suspend, 1091 .suspend = bfin_mac_suspend,
1091 .driver = { 1092 .driver = {
1092 .name = DRV_NAME, 1093 .name = DRV_NAME,
1093 }, 1094 .owner = THIS_MODULE,
1095 },
1094}; 1096};
1095 1097
1096static int __init bfin_mac_init(void) 1098static int __init bfin_mac_init(void)
@@ -1106,3 +1108,4 @@ static void __exit bfin_mac_cleanup(void)
1106} 1108}
1107 1109
1108module_exit(bfin_mac_cleanup); 1110module_exit(bfin_mac_cleanup);
1111
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index 9da7ff437031..2b5740b3d182 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -42,6 +42,7 @@
42MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>"); 42MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>");
43MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)"); 43MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
44MODULE_LICENSE("GPL"); 44MODULE_LICENSE("GPL");
45MODULE_ALIAS("platform:cpmac");
45 46
46static int debug_level = 8; 47static int debug_level = 8;
47static int dumb_switch; 48static int dumb_switch;
@@ -1103,6 +1104,7 @@ static int __devexit cpmac_remove(struct platform_device *pdev)
1103 1104
1104static struct platform_driver cpmac_driver = { 1105static struct platform_driver cpmac_driver = {
1105 .driver.name = "cpmac", 1106 .driver.name = "cpmac",
1107 .driver.owner = THIS_MODULE,
1106 .probe = cpmac_probe, 1108 .probe = cpmac_probe,
1107 .remove = __devexit_p(cpmac_remove), 1109 .remove = __devexit_p(cpmac_remove),
1108}; 1110};
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index d63cc93f055d..e6fe2614ea6d 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -1418,3 +1418,4 @@ module_exit(dm9000_cleanup);
1418MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); 1418MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1419MODULE_DESCRIPTION("Davicom DM9000 network driver"); 1419MODULE_DESCRIPTION("Davicom DM9000 network driver");
1420MODULE_LICENSE("GPL"); 1420MODULE_LICENSE("GPL");
1421MODULE_ALIAS("platform:dm9000");
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index 01c88664bad3..462351ca2c81 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -1326,12 +1326,10 @@ struct e1000_info e1000_82571_info = {
1326 .mac = e1000_82571, 1326 .mac = e1000_82571,
1327 .flags = FLAG_HAS_HW_VLAN_FILTER 1327 .flags = FLAG_HAS_HW_VLAN_FILTER
1328 | FLAG_HAS_JUMBO_FRAMES 1328 | FLAG_HAS_JUMBO_FRAMES
1329 | FLAG_HAS_STATS_PTC_PRC
1330 | FLAG_HAS_WOL 1329 | FLAG_HAS_WOL
1331 | FLAG_APME_IN_CTRL3 1330 | FLAG_APME_IN_CTRL3
1332 | FLAG_RX_CSUM_ENABLED 1331 | FLAG_RX_CSUM_ENABLED
1333 | FLAG_HAS_CTRLEXT_ON_LOAD 1332 | FLAG_HAS_CTRLEXT_ON_LOAD
1334 | FLAG_HAS_STATS_ICR_ICT
1335 | FLAG_HAS_SMART_POWER_DOWN 1333 | FLAG_HAS_SMART_POWER_DOWN
1336 | FLAG_RESET_OVERWRITES_LAA /* errata */ 1334 | FLAG_RESET_OVERWRITES_LAA /* errata */
1337 | FLAG_TARC_SPEED_MODE_BIT /* errata */ 1335 | FLAG_TARC_SPEED_MODE_BIT /* errata */
@@ -1347,12 +1345,10 @@ struct e1000_info e1000_82572_info = {
1347 .mac = e1000_82572, 1345 .mac = e1000_82572,
1348 .flags = FLAG_HAS_HW_VLAN_FILTER 1346 .flags = FLAG_HAS_HW_VLAN_FILTER
1349 | FLAG_HAS_JUMBO_FRAMES 1347 | FLAG_HAS_JUMBO_FRAMES
1350 | FLAG_HAS_STATS_PTC_PRC
1351 | FLAG_HAS_WOL 1348 | FLAG_HAS_WOL
1352 | FLAG_APME_IN_CTRL3 1349 | FLAG_APME_IN_CTRL3
1353 | FLAG_RX_CSUM_ENABLED 1350 | FLAG_RX_CSUM_ENABLED
1354 | FLAG_HAS_CTRLEXT_ON_LOAD 1351 | FLAG_HAS_CTRLEXT_ON_LOAD
1355 | FLAG_HAS_STATS_ICR_ICT
1356 | FLAG_TARC_SPEED_MODE_BIT, /* errata */ 1352 | FLAG_TARC_SPEED_MODE_BIT, /* errata */
1357 .pba = 38, 1353 .pba = 38,
1358 .get_variants = e1000_get_variants_82571, 1354 .get_variants = e1000_get_variants_82571,
@@ -1365,11 +1361,9 @@ struct e1000_info e1000_82573_info = {
1365 .mac = e1000_82573, 1361 .mac = e1000_82573,
1366 .flags = FLAG_HAS_HW_VLAN_FILTER 1362 .flags = FLAG_HAS_HW_VLAN_FILTER
1367 | FLAG_HAS_JUMBO_FRAMES 1363 | FLAG_HAS_JUMBO_FRAMES
1368 | FLAG_HAS_STATS_PTC_PRC
1369 | FLAG_HAS_WOL 1364 | FLAG_HAS_WOL
1370 | FLAG_APME_IN_CTRL3 1365 | FLAG_APME_IN_CTRL3
1371 | FLAG_RX_CSUM_ENABLED 1366 | FLAG_RX_CSUM_ENABLED
1372 | FLAG_HAS_STATS_ICR_ICT
1373 | FLAG_HAS_SMART_POWER_DOWN 1367 | FLAG_HAS_SMART_POWER_DOWN
1374 | FLAG_HAS_AMT 1368 | FLAG_HAS_AMT
1375 | FLAG_HAS_ERT 1369 | FLAG_HAS_ERT
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 572cfd44397a..2a53875cddbf 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -184,6 +184,7 @@
184#define E1000_SWFW_EEP_SM 0x1 184#define E1000_SWFW_EEP_SM 0x1
185#define E1000_SWFW_PHY0_SM 0x2 185#define E1000_SWFW_PHY0_SM 0x2
186#define E1000_SWFW_PHY1_SM 0x4 186#define E1000_SWFW_PHY1_SM 0x4
187#define E1000_SWFW_CSR_SM 0x8
187 188
188/* Device Control */ 189/* Device Control */
189#define E1000_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */ 190#define E1000_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */
@@ -527,8 +528,10 @@
527#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */ 528#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */
528#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */ 529#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */
529#define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */ 530#define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */
531#define PHY_AUTONEG_EXP 0x06 /* Autoneg Expansion Reg */
530#define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */ 532#define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */
531#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */ 533#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
534#define PHY_EXT_STATUS 0x0F /* Extended Status Reg */
532 535
533/* NVM Control */ 536/* NVM Control */
534#define E1000_EECD_SK 0x00000001 /* NVM Clock */ 537#define E1000_EECD_SK 0x00000001 /* NVM Clock */
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 5a89dff52264..38bfd0d261fe 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -64,11 +64,14 @@ struct e1000_info;
64/* Tx/Rx descriptor defines */ 64/* Tx/Rx descriptor defines */
65#define E1000_DEFAULT_TXD 256 65#define E1000_DEFAULT_TXD 256
66#define E1000_MAX_TXD 4096 66#define E1000_MAX_TXD 4096
67#define E1000_MIN_TXD 80 67#define E1000_MIN_TXD 64
68 68
69#define E1000_DEFAULT_RXD 256 69#define E1000_DEFAULT_RXD 256
70#define E1000_MAX_RXD 4096 70#define E1000_MAX_RXD 4096
71#define E1000_MIN_RXD 80 71#define E1000_MIN_RXD 64
72
73#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
74#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
72 75
73/* Early Receive defines */ 76/* Early Receive defines */
74#define E1000_ERT_2048 0x100 77#define E1000_ERT_2048 0x100
@@ -147,6 +150,18 @@ struct e1000_ring {
147 struct e1000_queue_stats stats; 150 struct e1000_queue_stats stats;
148}; 151};
149 152
153/* PHY register snapshot values */
154struct e1000_phy_regs {
155 u16 bmcr; /* basic mode control register */
156 u16 bmsr; /* basic mode status register */
157 u16 advertise; /* auto-negotiation advertisement */
158 u16 lpa; /* link partner ability register */
159 u16 expansion; /* auto-negotiation expansion reg */
160 u16 ctrl1000; /* 1000BASE-T control register */
161 u16 stat1000; /* 1000BASE-T status register */
162 u16 estatus; /* extended status register */
163};
164
150/* board specific private data structure */ 165/* board specific private data structure */
151struct e1000_adapter { 166struct e1000_adapter {
152 struct timer_list watchdog_timer; 167 struct timer_list watchdog_timer;
@@ -202,8 +217,8 @@ struct e1000_adapter {
202 /* Tx stats */ 217 /* Tx stats */
203 u64 tpt_old; 218 u64 tpt_old;
204 u64 colc_old; 219 u64 colc_old;
205 u64 gotcl_old; 220 u32 gotc;
206 u32 gotcl; 221 u64 gotc_old;
207 u32 tx_timeout_count; 222 u32 tx_timeout_count;
208 u32 tx_fifo_head; 223 u32 tx_fifo_head;
209 u32 tx_head_addr; 224 u32 tx_head_addr;
@@ -227,8 +242,8 @@ struct e1000_adapter {
227 u64 hw_csum_err; 242 u64 hw_csum_err;
228 u64 hw_csum_good; 243 u64 hw_csum_good;
229 u64 rx_hdr_split; 244 u64 rx_hdr_split;
230 u64 gorcl_old; 245 u32 gorc;
231 u32 gorcl; 246 u64 gorc_old;
232 u32 alloc_rx_buff_failed; 247 u32 alloc_rx_buff_failed;
233 u32 rx_dma_failed; 248 u32 rx_dma_failed;
234 249
@@ -250,6 +265,9 @@ struct e1000_adapter {
250 struct e1000_phy_info phy_info; 265 struct e1000_phy_info phy_info;
251 struct e1000_phy_stats phy_stats; 266 struct e1000_phy_stats phy_stats;
252 267
268 /* Snapshot of PHY registers */
269 struct e1000_phy_regs phy_regs;
270
253 struct e1000_ring test_tx_ring; 271 struct e1000_ring test_tx_ring;
254 struct e1000_ring test_rx_ring; 272 struct e1000_ring test_rx_ring;
255 u32 test_icr; 273 u32 test_icr;
@@ -286,8 +304,6 @@ struct e1000_info {
286#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) 304#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
287#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 305#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
288#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 306#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
289#define FLAG_HAS_STATS_ICR_ICT (1 << 9)
290#define FLAG_HAS_STATS_PTC_PRC (1 << 10)
291#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 307#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
292#define FLAG_IS_QUAD_PORT_A (1 << 12) 308#define FLAG_IS_QUAD_PORT_A (1 << 12)
293#define FLAG_IS_QUAD_PORT (1 << 13) 309#define FLAG_IS_QUAD_PORT (1 << 13)
@@ -433,6 +449,8 @@ extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
433extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 449extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
434 u32 usec_interval, bool *success); 450 u32 usec_interval, bool *success);
435extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); 451extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
452extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
453extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
436extern s32 e1000e_check_downshift(struct e1000_hw *hw); 454extern s32 e1000e_check_downshift(struct e1000_hw *hw);
437 455
438static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 456static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index d59a99ae44be..dc552d7d6fac 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -41,6 +41,7 @@
41#define E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL 0x00 41#define E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL 0x00
42#define E1000_KMRNCTRLSTA_OFFSET_INB_CTRL 0x02 42#define E1000_KMRNCTRLSTA_OFFSET_INB_CTRL 0x02
43#define E1000_KMRNCTRLSTA_OFFSET_HD_CTRL 0x10 43#define E1000_KMRNCTRLSTA_OFFSET_HD_CTRL 0x10
44#define E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE 0x1F
44 45
45#define E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS 0x0008 46#define E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS 0x0008
46#define E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS 0x0800 47#define E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS 0x0800
@@ -48,6 +49,7 @@
48 49
49#define E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT 0x0004 50#define E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT 0x0004
50#define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT 0x0000 51#define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT 0x0000
52#define E1000_KMRNCTRLSTA_OPMODE_E_IDLE 0x2000
51 53
52#define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */ 54#define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */
53#define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN 0x00010000 55#define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN 0x00010000
@@ -85,6 +87,9 @@
85/* Kumeran Mode Control Register (Page 193, Register 16) */ 87/* Kumeran Mode Control Register (Page 193, Register 16) */
86#define GG82563_KMCR_PASS_FALSE_CARRIER 0x0800 88#define GG82563_KMCR_PASS_FALSE_CARRIER 0x0800
87 89
90/* Max number of times Kumeran read/write should be validated */
91#define GG82563_MAX_KMRN_RETRY 0x5
92
88/* Power Management Control Register (Page 193, Register 20) */ 93/* Power Management Control Register (Page 193, Register 20) */
89#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE 0x0001 94#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE 0x0001
90 /* 1=Enable SERDES Electrical Idle */ 95 /* 1=Enable SERDES Electrical Idle */
@@ -270,6 +275,7 @@ static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
270 u16 mask; 275 u16 mask;
271 276
272 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM; 277 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
278 mask |= E1000_SWFW_CSR_SM;
273 279
274 return e1000_acquire_swfw_sync_80003es2lan(hw, mask); 280 return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
275} 281}
@@ -286,6 +292,8 @@ static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
286 u16 mask; 292 u16 mask;
287 293
288 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM; 294 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
295 mask |= E1000_SWFW_CSR_SM;
296
289 e1000_release_swfw_sync_80003es2lan(hw, mask); 297 e1000_release_swfw_sync_80003es2lan(hw, mask);
290} 298}
291 299
@@ -410,20 +418,27 @@ static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
410 u32 page_select; 418 u32 page_select;
411 u16 temp; 419 u16 temp;
412 420
421 ret_val = e1000_acquire_phy_80003es2lan(hw);
422 if (ret_val)
423 return ret_val;
424
413 /* Select Configuration Page */ 425 /* Select Configuration Page */
414 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) 426 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
415 page_select = GG82563_PHY_PAGE_SELECT; 427 page_select = GG82563_PHY_PAGE_SELECT;
416 else 428 } else {
417 /* 429 /*
418 * Use Alternative Page Select register to access 430 * Use Alternative Page Select register to access
419 * registers 30 and 31 431 * registers 30 and 31
420 */ 432 */
421 page_select = GG82563_PHY_PAGE_SELECT_ALT; 433 page_select = GG82563_PHY_PAGE_SELECT_ALT;
434 }
422 435
423 temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT); 436 temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
424 ret_val = e1000e_write_phy_reg_m88(hw, page_select, temp); 437 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
425 if (ret_val) 438 if (ret_val) {
439 e1000_release_phy_80003es2lan(hw);
426 return ret_val; 440 return ret_val;
441 }
427 442
428 /* 443 /*
429 * The "ready" bit in the MDIC register may be incorrectly set 444 * The "ready" bit in the MDIC register may be incorrectly set
@@ -433,20 +448,21 @@ static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
433 udelay(200); 448 udelay(200);
434 449
435 /* ...and verify the command was successful. */ 450 /* ...and verify the command was successful. */
436 ret_val = e1000e_read_phy_reg_m88(hw, page_select, &temp); 451 ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
437 452
438 if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) { 453 if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
439 ret_val = -E1000_ERR_PHY; 454 ret_val = -E1000_ERR_PHY;
455 e1000_release_phy_80003es2lan(hw);
440 return ret_val; 456 return ret_val;
441 } 457 }
442 458
443 udelay(200); 459 udelay(200);
444 460
445 ret_val = e1000e_read_phy_reg_m88(hw, 461 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
446 MAX_PHY_REG_ADDRESS & offset, 462 data);
447 data);
448 463
449 udelay(200); 464 udelay(200);
465 e1000_release_phy_80003es2lan(hw);
450 466
451 return ret_val; 467 return ret_val;
452} 468}
@@ -467,20 +483,27 @@ static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
467 u32 page_select; 483 u32 page_select;
468 u16 temp; 484 u16 temp;
469 485
486 ret_val = e1000_acquire_phy_80003es2lan(hw);
487 if (ret_val)
488 return ret_val;
489
470 /* Select Configuration Page */ 490 /* Select Configuration Page */
471 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) 491 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
472 page_select = GG82563_PHY_PAGE_SELECT; 492 page_select = GG82563_PHY_PAGE_SELECT;
473 else 493 } else {
474 /* 494 /*
475 * Use Alternative Page Select register to access 495 * Use Alternative Page Select register to access
476 * registers 30 and 31 496 * registers 30 and 31
477 */ 497 */
478 page_select = GG82563_PHY_PAGE_SELECT_ALT; 498 page_select = GG82563_PHY_PAGE_SELECT_ALT;
499 }
479 500
480 temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT); 501 temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
481 ret_val = e1000e_write_phy_reg_m88(hw, page_select, temp); 502 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
482 if (ret_val) 503 if (ret_val) {
504 e1000_release_phy_80003es2lan(hw);
483 return ret_val; 505 return ret_val;
506 }
484 507
485 508
486 /* 509 /*
@@ -491,18 +514,20 @@ static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
491 udelay(200); 514 udelay(200);
492 515
493 /* ...and verify the command was successful. */ 516 /* ...and verify the command was successful. */
494 ret_val = e1000e_read_phy_reg_m88(hw, page_select, &temp); 517 ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
495 518
496 if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) 519 if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
520 e1000_release_phy_80003es2lan(hw);
497 return -E1000_ERR_PHY; 521 return -E1000_ERR_PHY;
522 }
498 523
499 udelay(200); 524 udelay(200);
500 525
501 ret_val = e1000e_write_phy_reg_m88(hw, 526 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
502 MAX_PHY_REG_ADDRESS & offset, 527 data);
503 data);
504 528
505 udelay(200); 529 udelay(200);
530 e1000_release_phy_80003es2lan(hw);
506 531
507 return ret_val; 532 return ret_val;
508} 533}
@@ -882,10 +907,10 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
882 struct e1000_phy_info *phy = &hw->phy; 907 struct e1000_phy_info *phy = &hw->phy;
883 s32 ret_val; 908 s32 ret_val;
884 u32 ctrl_ext; 909 u32 ctrl_ext;
885 u16 data; 910 u32 i = 0;
911 u16 data, data2;
886 912
887 ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, 913 ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
888 &data);
889 if (ret_val) 914 if (ret_val)
890 return ret_val; 915 return ret_val;
891 916
@@ -893,8 +918,7 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
893 /* Use 25MHz for both link down and 1000Base-T for Tx clock. */ 918 /* Use 25MHz for both link down and 1000Base-T for Tx clock. */
894 data |= GG82563_MSCR_TX_CLK_1000MBPS_25; 919 data |= GG82563_MSCR_TX_CLK_1000MBPS_25;
895 920
896 ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL, 921 ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL, data);
897 data);
898 if (ret_val) 922 if (ret_val)
899 return ret_val; 923 return ret_val;
900 924
@@ -954,6 +978,18 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
954 if (ret_val) 978 if (ret_val)
955 return ret_val; 979 return ret_val;
956 980
981 ret_val = e1000e_read_kmrn_reg(hw,
982 E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
983 &data);
984 if (ret_val)
985 return ret_val;
986 data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
987 ret_val = e1000e_write_kmrn_reg(hw,
988 E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
989 data);
990 if (ret_val)
991 return ret_val;
992
957 ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL_2, &data); 993 ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL_2, &data);
958 if (ret_val) 994 if (ret_val)
959 return ret_val; 995 return ret_val;
@@ -983,9 +1019,18 @@ static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
983 if (ret_val) 1019 if (ret_val)
984 return ret_val; 1020 return ret_val;
985 1021
986 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &data); 1022 do {
987 if (ret_val) 1023 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
988 return ret_val; 1024 &data);
1025 if (ret_val)
1026 return ret_val;
1027
1028 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
1029 &data2);
1030 if (ret_val)
1031 return ret_val;
1032 i++;
1033 } while ((data != data2) && (i < GG82563_MAX_KMRN_RETRY));
989 1034
990 data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; 1035 data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
991 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, data); 1036 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, data);
@@ -1074,7 +1119,8 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
1074{ 1119{
1075 s32 ret_val; 1120 s32 ret_val;
1076 u32 tipg; 1121 u32 tipg;
1077 u16 reg_data; 1122 u32 i = 0;
1123 u16 reg_data, reg_data2;
1078 1124
1079 reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT; 1125 reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
1080 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL, 1126 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
@@ -1088,9 +1134,16 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
1088 tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN; 1134 tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN;
1089 ew32(TIPG, tipg); 1135 ew32(TIPG, tipg);
1090 1136
1091 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data); 1137 do {
1092 if (ret_val) 1138 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data);
1093 return ret_val; 1139 if (ret_val)
1140 return ret_val;
1141
1142 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data2);
1143 if (ret_val)
1144 return ret_val;
1145 i++;
1146 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1094 1147
1095 if (duplex == HALF_DUPLEX) 1148 if (duplex == HALF_DUPLEX)
1096 reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER; 1149 reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
@@ -1112,8 +1165,9 @@ static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
1112static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw) 1165static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
1113{ 1166{
1114 s32 ret_val; 1167 s32 ret_val;
1115 u16 reg_data; 1168 u16 reg_data, reg_data2;
1116 u32 tipg; 1169 u32 tipg;
1170 u32 i = 0;
1117 1171
1118 reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT; 1172 reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
1119 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL, 1173 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
@@ -1127,9 +1181,16 @@ static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
1127 tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN; 1181 tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
1128 ew32(TIPG, tipg); 1182 ew32(TIPG, tipg);
1129 1183
1130 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data); 1184 do {
1131 if (ret_val) 1185 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data);
1132 return ret_val; 1186 if (ret_val)
1187 return ret_val;
1188
1189 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &reg_data2);
1190 if (ret_val)
1191 return ret_val;
1192 i++;
1193 } while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
1133 1194
1134 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; 1195 reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
1135 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data); 1196 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
@@ -1231,12 +1292,10 @@ struct e1000_info e1000_es2_info = {
1231 .mac = e1000_80003es2lan, 1292 .mac = e1000_80003es2lan,
1232 .flags = FLAG_HAS_HW_VLAN_FILTER 1293 .flags = FLAG_HAS_HW_VLAN_FILTER
1233 | FLAG_HAS_JUMBO_FRAMES 1294 | FLAG_HAS_JUMBO_FRAMES
1234 | FLAG_HAS_STATS_PTC_PRC
1235 | FLAG_HAS_WOL 1295 | FLAG_HAS_WOL
1236 | FLAG_APME_IN_CTRL3 1296 | FLAG_APME_IN_CTRL3
1237 | FLAG_RX_CSUM_ENABLED 1297 | FLAG_RX_CSUM_ENABLED
1238 | FLAG_HAS_CTRLEXT_ON_LOAD 1298 | FLAG_HAS_CTRLEXT_ON_LOAD
1239 | FLAG_HAS_STATS_ICR_ICT
1240 | FLAG_RX_NEEDS_RESTART /* errata */ 1299 | FLAG_RX_NEEDS_RESTART /* errata */
1241 | FLAG_TARC_SET_BIT_ZERO /* errata */ 1300 | FLAG_TARC_SET_BIT_ZERO /* errata */
1242 | FLAG_APME_CHECK_PORT_B 1301 | FLAG_APME_CHECK_PORT_B
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index 6d1b257bbda6..ce045acce63e 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -46,8 +46,8 @@ struct e1000_stats {
46static const struct e1000_stats e1000_gstrings_stats[] = { 46static const struct e1000_stats e1000_gstrings_stats[] = {
47 { "rx_packets", E1000_STAT(stats.gprc) }, 47 { "rx_packets", E1000_STAT(stats.gprc) },
48 { "tx_packets", E1000_STAT(stats.gptc) }, 48 { "tx_packets", E1000_STAT(stats.gptc) },
49 { "rx_bytes", E1000_STAT(stats.gorcl) }, 49 { "rx_bytes", E1000_STAT(stats.gorc) },
50 { "tx_bytes", E1000_STAT(stats.gotcl) }, 50 { "tx_bytes", E1000_STAT(stats.gotc) },
51 { "rx_broadcast", E1000_STAT(stats.bprc) }, 51 { "rx_broadcast", E1000_STAT(stats.bprc) },
52 { "tx_broadcast", E1000_STAT(stats.bptc) }, 52 { "tx_broadcast", E1000_STAT(stats.bptc) },
53 { "rx_multicast", E1000_STAT(stats.mprc) }, 53 { "rx_multicast", E1000_STAT(stats.mprc) },
@@ -83,7 +83,7 @@ static const struct e1000_stats e1000_gstrings_stats[] = {
83 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, 83 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
84 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, 84 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
85 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, 85 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
86 { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, 86 { "rx_long_byte_count", E1000_STAT(stats.gorc) },
87 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, 87 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
88 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, 88 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
89 { "rx_header_split", E1000_STAT(rx_hdr_split) }, 89 { "rx_header_split", E1000_STAT(rx_hdr_split) },
@@ -1770,6 +1770,47 @@ static int e1000_phys_id(struct net_device *netdev, u32 data)
1770 return 0; 1770 return 0;
1771} 1771}
1772 1772
1773static int e1000_get_coalesce(struct net_device *netdev,
1774 struct ethtool_coalesce *ec)
1775{
1776 struct e1000_adapter *adapter = netdev_priv(netdev);
1777
1778 if (adapter->itr_setting <= 3)
1779 ec->rx_coalesce_usecs = adapter->itr_setting;
1780 else
1781 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1782
1783 return 0;
1784}
1785
1786static int e1000_set_coalesce(struct net_device *netdev,
1787 struct ethtool_coalesce *ec)
1788{
1789 struct e1000_adapter *adapter = netdev_priv(netdev);
1790 struct e1000_hw *hw = &adapter->hw;
1791
1792 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
1793 ((ec->rx_coalesce_usecs > 3) &&
1794 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1795 (ec->rx_coalesce_usecs == 2))
1796 return -EINVAL;
1797
1798 if (ec->rx_coalesce_usecs <= 3) {
1799 adapter->itr = 20000;
1800 adapter->itr_setting = ec->rx_coalesce_usecs;
1801 } else {
1802 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1803 adapter->itr_setting = adapter->itr & ~3;
1804 }
1805
1806 if (adapter->itr_setting != 0)
1807 ew32(ITR, 1000000000 / (adapter->itr * 256));
1808 else
1809 ew32(ITR, 0);
1810
1811 return 0;
1812}
1813
1773static int e1000_nway_reset(struct net_device *netdev) 1814static int e1000_nway_reset(struct net_device *netdev)
1774{ 1815{
1775 struct e1000_adapter *adapter = netdev_priv(netdev); 1816 struct e1000_adapter *adapter = netdev_priv(netdev);
@@ -1845,6 +1886,8 @@ static const struct ethtool_ops e1000_ethtool_ops = {
1845 .phys_id = e1000_phys_id, 1886 .phys_id = e1000_phys_id,
1846 .get_ethtool_stats = e1000_get_ethtool_stats, 1887 .get_ethtool_stats = e1000_get_ethtool_stats,
1847 .get_sset_count = e1000e_get_sset_count, 1888 .get_sset_count = e1000e_get_sset_count,
1889 .get_coalesce = e1000_get_coalesce,
1890 .set_coalesce = e1000_set_coalesce,
1848}; 1891};
1849 1892
1850void e1000e_set_ethtool_ops(struct net_device *netdev) 1893void e1000e_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 53f1ac6327fa..a930e6d9cf02 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -592,10 +592,8 @@ struct e1000_hw_stats {
592 u64 bprc; 592 u64 bprc;
593 u64 mprc; 593 u64 mprc;
594 u64 gptc; 594 u64 gptc;
595 u64 gorcl; 595 u64 gorc;
596 u64 gorch; 596 u64 gotc;
597 u64 gotcl;
598 u64 gotch;
599 u64 rnbc; 597 u64 rnbc;
600 u64 ruc; 598 u64 ruc;
601 u64 rfc; 599 u64 rfc;
@@ -604,10 +602,8 @@ struct e1000_hw_stats {
604 u64 mgprc; 602 u64 mgprc;
605 u64 mgpdc; 603 u64 mgpdc;
606 u64 mgptc; 604 u64 mgptc;
607 u64 torl; 605 u64 tor;
608 u64 torh; 606 u64 tot;
609 u64 totl;
610 u64 toth;
611 u64 tpr; 607 u64 tpr;
612 u64 tpt; 608 u64 tpt;
613 u64 ptc64; 609 u64 ptc64;
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index c8dc47fd132a..8991ab8911e2 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -46,7 +46,7 @@
46 46
47#include "e1000.h" 47#include "e1000.h"
48 48
49#define DRV_VERSION "0.2.0" 49#define DRV_VERSION "0.2.1"
50char e1000e_driver_name[] = "e1000e"; 50char e1000e_driver_name[] = "e1000e";
51const char e1000e_driver_version[] = DRV_VERSION; 51const char e1000e_driver_version[] = DRV_VERSION;
52 52
@@ -466,10 +466,10 @@ next_desc:
466 if (cleaned_count) 466 if (cleaned_count)
467 adapter->alloc_rx_buf(adapter, cleaned_count); 467 adapter->alloc_rx_buf(adapter, cleaned_count);
468 468
469 adapter->total_rx_packets += total_rx_packets;
470 adapter->total_rx_bytes += total_rx_bytes; 469 adapter->total_rx_bytes += total_rx_bytes;
471 adapter->net_stats.rx_packets += total_rx_packets; 470 adapter->total_rx_packets += total_rx_packets;
472 adapter->net_stats.rx_bytes += total_rx_bytes; 471 adapter->net_stats.rx_bytes += total_rx_bytes;
472 adapter->net_stats.rx_packets += total_rx_packets;
473 return cleaned; 473 return cleaned;
474} 474}
475 475
@@ -606,8 +606,8 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
606 } 606 }
607 adapter->total_tx_bytes += total_tx_bytes; 607 adapter->total_tx_bytes += total_tx_bytes;
608 adapter->total_tx_packets += total_tx_packets; 608 adapter->total_tx_packets += total_tx_packets;
609 adapter->net_stats.tx_packets += total_tx_packets;
610 adapter->net_stats.tx_bytes += total_tx_bytes; 609 adapter->net_stats.tx_bytes += total_tx_bytes;
610 adapter->net_stats.tx_packets += total_tx_packets;
611 return cleaned; 611 return cleaned;
612} 612}
613 613
@@ -775,10 +775,10 @@ next_desc:
775 if (cleaned_count) 775 if (cleaned_count)
776 adapter->alloc_rx_buf(adapter, cleaned_count); 776 adapter->alloc_rx_buf(adapter, cleaned_count);
777 777
778 adapter->total_rx_packets += total_rx_packets;
779 adapter->total_rx_bytes += total_rx_bytes; 778 adapter->total_rx_bytes += total_rx_bytes;
780 adapter->net_stats.rx_packets += total_rx_packets; 779 adapter->total_rx_packets += total_rx_packets;
781 adapter->net_stats.rx_bytes += total_rx_bytes; 780 adapter->net_stats.rx_bytes += total_rx_bytes;
781 adapter->net_stats.rx_packets += total_rx_packets;
782 return cleaned; 782 return cleaned;
783} 783}
784 784
@@ -2506,56 +2506,27 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
2506 2506
2507 adapter->stats.crcerrs += er32(CRCERRS); 2507 adapter->stats.crcerrs += er32(CRCERRS);
2508 adapter->stats.gprc += er32(GPRC); 2508 adapter->stats.gprc += er32(GPRC);
2509 adapter->stats.gorcl += er32(GORCL); 2509 adapter->stats.gorc += er32(GORCL);
2510 adapter->stats.gorch += er32(GORCH); 2510 er32(GORCH); /* Clear gorc */
2511 adapter->stats.bprc += er32(BPRC); 2511 adapter->stats.bprc += er32(BPRC);
2512 adapter->stats.mprc += er32(MPRC); 2512 adapter->stats.mprc += er32(MPRC);
2513 adapter->stats.roc += er32(ROC); 2513 adapter->stats.roc += er32(ROC);
2514 2514
2515 if (adapter->flags & FLAG_HAS_STATS_PTC_PRC) {
2516 adapter->stats.prc64 += er32(PRC64);
2517 adapter->stats.prc127 += er32(PRC127);
2518 adapter->stats.prc255 += er32(PRC255);
2519 adapter->stats.prc511 += er32(PRC511);
2520 adapter->stats.prc1023 += er32(PRC1023);
2521 adapter->stats.prc1522 += er32(PRC1522);
2522 adapter->stats.symerrs += er32(SYMERRS);
2523 adapter->stats.sec += er32(SEC);
2524 }
2525
2526 adapter->stats.mpc += er32(MPC); 2515 adapter->stats.mpc += er32(MPC);
2527 adapter->stats.scc += er32(SCC); 2516 adapter->stats.scc += er32(SCC);
2528 adapter->stats.ecol += er32(ECOL); 2517 adapter->stats.ecol += er32(ECOL);
2529 adapter->stats.mcc += er32(MCC); 2518 adapter->stats.mcc += er32(MCC);
2530 adapter->stats.latecol += er32(LATECOL); 2519 adapter->stats.latecol += er32(LATECOL);
2531 adapter->stats.dc += er32(DC); 2520 adapter->stats.dc += er32(DC);
2532 adapter->stats.rlec += er32(RLEC);
2533 adapter->stats.xonrxc += er32(XONRXC); 2521 adapter->stats.xonrxc += er32(XONRXC);
2534 adapter->stats.xontxc += er32(XONTXC); 2522 adapter->stats.xontxc += er32(XONTXC);
2535 adapter->stats.xoffrxc += er32(XOFFRXC); 2523 adapter->stats.xoffrxc += er32(XOFFRXC);
2536 adapter->stats.xofftxc += er32(XOFFTXC); 2524 adapter->stats.xofftxc += er32(XOFFTXC);
2537 adapter->stats.fcruc += er32(FCRUC);
2538 adapter->stats.gptc += er32(GPTC); 2525 adapter->stats.gptc += er32(GPTC);
2539 adapter->stats.gotcl += er32(GOTCL); 2526 adapter->stats.gotc += er32(GOTCL);
2540 adapter->stats.gotch += er32(GOTCH); 2527 er32(GOTCH); /* Clear gotc */
2541 adapter->stats.rnbc += er32(RNBC); 2528 adapter->stats.rnbc += er32(RNBC);
2542 adapter->stats.ruc += er32(RUC); 2529 adapter->stats.ruc += er32(RUC);
2543 adapter->stats.rfc += er32(RFC);
2544 adapter->stats.rjc += er32(RJC);
2545 adapter->stats.torl += er32(TORL);
2546 adapter->stats.torh += er32(TORH);
2547 adapter->stats.totl += er32(TOTL);
2548 adapter->stats.toth += er32(TOTH);
2549 adapter->stats.tpr += er32(TPR);
2550
2551 if (adapter->flags & FLAG_HAS_STATS_PTC_PRC) {
2552 adapter->stats.ptc64 += er32(PTC64);
2553 adapter->stats.ptc127 += er32(PTC127);
2554 adapter->stats.ptc255 += er32(PTC255);
2555 adapter->stats.ptc511 += er32(PTC511);
2556 adapter->stats.ptc1023 += er32(PTC1023);
2557 adapter->stats.ptc1522 += er32(PTC1522);
2558 }
2559 2530
2560 adapter->stats.mptc += er32(MPTC); 2531 adapter->stats.mptc += er32(MPTC);
2561 adapter->stats.bptc += er32(BPTC); 2532 adapter->stats.bptc += er32(BPTC);
@@ -2574,19 +2545,6 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
2574 adapter->stats.tsctc += er32(TSCTC); 2545 adapter->stats.tsctc += er32(TSCTC);
2575 adapter->stats.tsctfc += er32(TSCTFC); 2546 adapter->stats.tsctfc += er32(TSCTFC);
2576 2547
2577 adapter->stats.iac += er32(IAC);
2578
2579 if (adapter->flags & FLAG_HAS_STATS_ICR_ICT) {
2580 adapter->stats.icrxoc += er32(ICRXOC);
2581 adapter->stats.icrxptc += er32(ICRXPTC);
2582 adapter->stats.icrxatc += er32(ICRXATC);
2583 adapter->stats.ictxptc += er32(ICTXPTC);
2584 adapter->stats.ictxatc += er32(ICTXATC);
2585 adapter->stats.ictxqec += er32(ICTXQEC);
2586 adapter->stats.ictxqmtc += er32(ICTXQMTC);
2587 adapter->stats.icrxdmtc += er32(ICRXDMTC);
2588 }
2589
2590 /* Fill out the OS statistics structure */ 2548 /* Fill out the OS statistics structure */
2591 adapter->net_stats.multicast = adapter->stats.mprc; 2549 adapter->net_stats.multicast = adapter->stats.mprc;
2592 adapter->net_stats.collisions = adapter->stats.colc; 2550 adapter->net_stats.collisions = adapter->stats.colc;
@@ -2633,6 +2591,54 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
2633 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags); 2591 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2634} 2592}
2635 2593
2594/**
2595 * e1000_phy_read_status - Update the PHY register status snapshot
2596 * @adapter: board private structure
2597 **/
2598static void e1000_phy_read_status(struct e1000_adapter *adapter)
2599{
2600 struct e1000_hw *hw = &adapter->hw;
2601 struct e1000_phy_regs *phy = &adapter->phy_regs;
2602 int ret_val;
2603 unsigned long irq_flags;
2604
2605
2606 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2607
2608 if ((er32(STATUS) & E1000_STATUS_LU) &&
2609 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
2610 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
2611 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
2612 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
2613 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
2614 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
2615 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
2616 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
2617 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
2618 if (ret_val)
2619 ndev_warn(adapter->netdev,
2620 "Error reading PHY register\n");
2621 } else {
2622 /*
2623 * Do not read PHY registers if link is not up
2624 * Set values to typical power-on defaults
2625 */
2626 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
2627 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
2628 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
2629 BMSR_ERCAP);
2630 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
2631 ADVERTISE_ALL | ADVERTISE_CSMA);
2632 phy->lpa = 0;
2633 phy->expansion = EXPANSION_ENABLENPAGE;
2634 phy->ctrl1000 = ADVERTISE_1000FULL;
2635 phy->stat1000 = 0;
2636 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
2637 }
2638
2639 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2640}
2641
2636static void e1000_print_link_info(struct e1000_adapter *adapter) 2642static void e1000_print_link_info(struct e1000_adapter *adapter)
2637{ 2643{
2638 struct e1000_hw *hw = &adapter->hw; 2644 struct e1000_hw *hw = &adapter->hw;
@@ -2745,6 +2751,7 @@ static void e1000_watchdog_task(struct work_struct *work)
2745 if (!netif_carrier_ok(netdev)) { 2751 if (!netif_carrier_ok(netdev)) {
2746 bool txb2b = 1; 2752 bool txb2b = 1;
2747 /* update snapshot of PHY registers on LSC */ 2753 /* update snapshot of PHY registers on LSC */
2754 e1000_phy_read_status(adapter);
2748 mac->ops.get_link_up_info(&adapter->hw, 2755 mac->ops.get_link_up_info(&adapter->hw,
2749 &adapter->link_speed, 2756 &adapter->link_speed,
2750 &adapter->link_duplex); 2757 &adapter->link_duplex);
@@ -2842,10 +2849,10 @@ link_up:
2842 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 2849 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2843 adapter->colc_old = adapter->stats.colc; 2850 adapter->colc_old = adapter->stats.colc;
2844 2851
2845 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; 2852 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2846 adapter->gorcl_old = adapter->stats.gorcl; 2853 adapter->gorc_old = adapter->stats.gorc;
2847 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; 2854 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2848 adapter->gotcl_old = adapter->stats.gotcl; 2855 adapter->gotc_old = adapter->stats.gotc;
2849 2856
2850 e1000e_update_adaptive(&adapter->hw); 2857 e1000e_update_adaptive(&adapter->hw);
2851 2858
@@ -3500,7 +3507,6 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
3500{ 3507{
3501 struct e1000_adapter *adapter = netdev_priv(netdev); 3508 struct e1000_adapter *adapter = netdev_priv(netdev);
3502 struct mii_ioctl_data *data = if_mii(ifr); 3509 struct mii_ioctl_data *data = if_mii(ifr);
3503 unsigned long irq_flags;
3504 3510
3505 if (adapter->hw.phy.media_type != e1000_media_type_copper) 3511 if (adapter->hw.phy.media_type != e1000_media_type_copper)
3506 return -EOPNOTSUPP; 3512 return -EOPNOTSUPP;
@@ -3512,13 +3518,40 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
3512 case SIOCGMIIREG: 3518 case SIOCGMIIREG:
3513 if (!capable(CAP_NET_ADMIN)) 3519 if (!capable(CAP_NET_ADMIN))
3514 return -EPERM; 3520 return -EPERM;
3515 spin_lock_irqsave(&adapter->stats_lock, irq_flags); 3521 switch (data->reg_num & 0x1F) {
3516 if (e1e_rphy(&adapter->hw, data->reg_num & 0x1F, 3522 case MII_BMCR:
3517 &data->val_out)) { 3523 data->val_out = adapter->phy_regs.bmcr;
3518 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags); 3524 break;
3525 case MII_BMSR:
3526 data->val_out = adapter->phy_regs.bmsr;
3527 break;
3528 case MII_PHYSID1:
3529 data->val_out = (adapter->hw.phy.id >> 16);
3530 break;
3531 case MII_PHYSID2:
3532 data->val_out = (adapter->hw.phy.id & 0xFFFF);
3533 break;
3534 case MII_ADVERTISE:
3535 data->val_out = adapter->phy_regs.advertise;
3536 break;
3537 case MII_LPA:
3538 data->val_out = adapter->phy_regs.lpa;
3539 break;
3540 case MII_EXPANSION:
3541 data->val_out = adapter->phy_regs.expansion;
3542 break;
3543 case MII_CTRL1000:
3544 data->val_out = adapter->phy_regs.ctrl1000;
3545 break;
3546 case MII_STAT1000:
3547 data->val_out = adapter->phy_regs.stat1000;
3548 break;
3549 case MII_ESTATUS:
3550 data->val_out = adapter->phy_regs.estatus;
3551 break;
3552 default:
3519 return -EIO; 3553 return -EIO;
3520 } 3554 }
3521 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
3522 break; 3555 break;
3523 case SIOCSMIIREG: 3556 case SIOCSMIIREG:
3524 default: 3557 default:
@@ -3774,6 +3807,7 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
3774 return PCI_ERS_RESULT_DISCONNECT; 3807 return PCI_ERS_RESULT_DISCONNECT;
3775 } 3808 }
3776 pci_set_master(pdev); 3809 pci_set_master(pdev);
3810 pci_restore_state(pdev);
3777 3811
3778 pci_enable_wake(pdev, PCI_D3hot, 0); 3812 pci_enable_wake(pdev, PCI_D3hot, 0);
3779 pci_enable_wake(pdev, PCI_D3cold, 0); 3813 pci_enable_wake(pdev, PCI_D3cold, 0);
@@ -3900,6 +3934,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
3900 goto err_pci_reg; 3934 goto err_pci_reg;
3901 3935
3902 pci_set_master(pdev); 3936 pci_set_master(pdev);
3937 pci_save_state(pdev);
3903 3938
3904 err = -ENOMEM; 3939 err = -ENOMEM;
3905 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 3940 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index 3a4574caa75b..e102332a6bee 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -116,7 +116,7 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
116} 116}
117 117
118/** 118/**
119 * e1000_read_phy_reg_mdic - Read MDI control register 119 * e1000e_read_phy_reg_mdic - Read MDI control register
120 * @hw: pointer to the HW structure 120 * @hw: pointer to the HW structure
121 * @offset: register offset to be read 121 * @offset: register offset to be read
122 * @data: pointer to the read data 122 * @data: pointer to the read data
@@ -124,7 +124,7 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
124 * Reads the MDI control register in the PHY at offset and stores the 124 * Reads the MDI control register in the PHY at offset and stores the
125 * information read to data. 125 * information read to data.
126 **/ 126 **/
127static s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) 127s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
128{ 128{
129 struct e1000_phy_info *phy = &hw->phy; 129 struct e1000_phy_info *phy = &hw->phy;
130 u32 i, mdic = 0; 130 u32 i, mdic = 0;
@@ -150,7 +150,7 @@ static s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
150 * Increasing the time out as testing showed failures with 150 * Increasing the time out as testing showed failures with
151 * the lower time out 151 * the lower time out
152 */ 152 */
153 for (i = 0; i < 64; i++) { 153 for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
154 udelay(50); 154 udelay(50);
155 mdic = er32(MDIC); 155 mdic = er32(MDIC);
156 if (mdic & E1000_MDIC_READY) 156 if (mdic & E1000_MDIC_READY)
@@ -170,14 +170,14 @@ static s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
170} 170}
171 171
172/** 172/**
173 * e1000_write_phy_reg_mdic - Write MDI control register 173 * e1000e_write_phy_reg_mdic - Write MDI control register
174 * @hw: pointer to the HW structure 174 * @hw: pointer to the HW structure
175 * @offset: register offset to write to 175 * @offset: register offset to write to
176 * @data: data to write to register at offset 176 * @data: data to write to register at offset
177 * 177 *
178 * Writes data to MDI control register in the PHY at offset. 178 * Writes data to MDI control register in the PHY at offset.
179 **/ 179 **/
180static s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) 180s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
181{ 181{
182 struct e1000_phy_info *phy = &hw->phy; 182 struct e1000_phy_info *phy = &hw->phy;
183 u32 i, mdic = 0; 183 u32 i, mdic = 0;
@@ -199,9 +199,13 @@ static s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
199 199
200 ew32(MDIC, mdic); 200 ew32(MDIC, mdic);
201 201
202 /* Poll the ready bit to see if the MDI read completed */ 202 /*
203 for (i = 0; i < E1000_GEN_POLL_TIMEOUT; i++) { 203 * Poll the ready bit to see if the MDI read completed
204 udelay(5); 204 * Increasing the time out as testing showed failures with
205 * the lower time out
206 */
207 for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
208 udelay(50);
205 mdic = er32(MDIC); 209 mdic = er32(MDIC);
206 if (mdic & E1000_MDIC_READY) 210 if (mdic & E1000_MDIC_READY)
207 break; 211 break;
@@ -210,6 +214,10 @@ static s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
210 hw_dbg(hw, "MDI Write did not complete\n"); 214 hw_dbg(hw, "MDI Write did not complete\n");
211 return -E1000_ERR_PHY; 215 return -E1000_ERR_PHY;
212 } 216 }
217 if (mdic & E1000_MDIC_ERROR) {
218 hw_dbg(hw, "MDI Error\n");
219 return -E1000_ERR_PHY;
220 }
213 221
214 return 0; 222 return 0;
215} 223}
@@ -232,9 +240,8 @@ s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)
232 if (ret_val) 240 if (ret_val)
233 return ret_val; 241 return ret_val;
234 242
235 ret_val = e1000_read_phy_reg_mdic(hw, 243 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
236 MAX_PHY_REG_ADDRESS & offset, 244 data);
237 data);
238 245
239 hw->phy.ops.release_phy(hw); 246 hw->phy.ops.release_phy(hw);
240 247
@@ -258,9 +265,8 @@ s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
258 if (ret_val) 265 if (ret_val)
259 return ret_val; 266 return ret_val;
260 267
261 ret_val = e1000_write_phy_reg_mdic(hw, 268 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
262 MAX_PHY_REG_ADDRESS & offset, 269 data);
263 data);
264 270
265 hw->phy.ops.release_phy(hw); 271 hw->phy.ops.release_phy(hw);
266 272
@@ -286,18 +292,17 @@ s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
286 return ret_val; 292 return ret_val;
287 293
288 if (offset > MAX_PHY_MULTI_PAGE_REG) { 294 if (offset > MAX_PHY_MULTI_PAGE_REG) {
289 ret_val = e1000_write_phy_reg_mdic(hw, 295 ret_val = e1000e_write_phy_reg_mdic(hw,
290 IGP01E1000_PHY_PAGE_SELECT, 296 IGP01E1000_PHY_PAGE_SELECT,
291 (u16)offset); 297 (u16)offset);
292 if (ret_val) { 298 if (ret_val) {
293 hw->phy.ops.release_phy(hw); 299 hw->phy.ops.release_phy(hw);
294 return ret_val; 300 return ret_val;
295 } 301 }
296 } 302 }
297 303
298 ret_val = e1000_read_phy_reg_mdic(hw, 304 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
299 MAX_PHY_REG_ADDRESS & offset, 305 data);
300 data);
301 306
302 hw->phy.ops.release_phy(hw); 307 hw->phy.ops.release_phy(hw);
303 308
@@ -322,18 +327,17 @@ s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
322 return ret_val; 327 return ret_val;
323 328
324 if (offset > MAX_PHY_MULTI_PAGE_REG) { 329 if (offset > MAX_PHY_MULTI_PAGE_REG) {
325 ret_val = e1000_write_phy_reg_mdic(hw, 330 ret_val = e1000e_write_phy_reg_mdic(hw,
326 IGP01E1000_PHY_PAGE_SELECT, 331 IGP01E1000_PHY_PAGE_SELECT,
327 (u16)offset); 332 (u16)offset);
328 if (ret_val) { 333 if (ret_val) {
329 hw->phy.ops.release_phy(hw); 334 hw->phy.ops.release_phy(hw);
330 return ret_val; 335 return ret_val;
331 } 336 }
332 } 337 }
333 338
334 ret_val = e1000_write_phy_reg_mdic(hw, 339 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
335 MAX_PHY_REG_ADDRESS & offset, 340 data);
336 data);
337 341
338 hw->phy.ops.release_phy(hw); 342 hw->phy.ops.release_phy(hw);
339 343
@@ -420,7 +424,9 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
420 if (ret_val) 424 if (ret_val)
421 return ret_val; 425 return ret_val;
422 426
423 phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX; 427 /* For newer PHYs this bit is downshift enable */
428 if (phy->type == e1000_phy_m88)
429 phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
424 430
425 /* 431 /*
426 * Options: 432 * Options:
@@ -463,7 +469,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
463 if (ret_val) 469 if (ret_val)
464 return ret_val; 470 return ret_val;
465 471
466 if (phy->revision < 4) { 472 if ((phy->type == e1000_phy_m88) && (phy->revision < 4)) {
467 /* 473 /*
468 * Force TX_CLK in the Extended PHY Specific Control Register 474 * Force TX_CLK in the Extended PHY Specific Control Register
469 * to 25MHz clock. 475 * to 25MHz clock.
@@ -518,8 +524,11 @@ s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw)
518 return ret_val; 524 return ret_val;
519 } 525 }
520 526
521 /* Wait 15ms for MAC to configure PHY from NVM settings. */ 527 /*
522 msleep(15); 528 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
529 * timeout issues when LFS is enabled.
530 */
531 msleep(100);
523 532
524 /* disable lplu d0 during driver init */ 533 /* disable lplu d0 during driver init */
525 ret_val = e1000_set_d0_lplu_state(hw, 0); 534 ret_val = e1000_set_d0_lplu_state(hw, 0);
@@ -1152,9 +1161,7 @@ s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active)
1152 1161
1153 if (!active) { 1162 if (!active) {
1154 data &= ~IGP02E1000_PM_D3_LPLU; 1163 data &= ~IGP02E1000_PM_D3_LPLU;
1155 ret_val = e1e_wphy(hw, 1164 ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
1156 IGP02E1000_PHY_POWER_MGMT,
1157 data);
1158 if (ret_val) 1165 if (ret_val)
1159 return ret_val; 1166 return ret_val;
1160 /* 1167 /*
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c
index 9ff7538b7595..f9bc21c74b59 100644
--- a/drivers/net/ehea/ehea_main.c
+++ b/drivers/net/ehea/ehea_main.c
@@ -2611,7 +2611,7 @@ static int ehea_stop(struct net_device *dev)
2611 return ret; 2611 return ret;
2612} 2612}
2613 2613
2614void ehea_purge_sq(struct ehea_qp *orig_qp) 2614static void ehea_purge_sq(struct ehea_qp *orig_qp)
2615{ 2615{
2616 struct ehea_qp qp = *orig_qp; 2616 struct ehea_qp qp = *orig_qp;
2617 struct ehea_qp_init_attr *init_attr = &qp.init_attr; 2617 struct ehea_qp_init_attr *init_attr = &qp.init_attr;
@@ -2625,7 +2625,7 @@ void ehea_purge_sq(struct ehea_qp *orig_qp)
2625 } 2625 }
2626} 2626}
2627 2627
2628void ehea_flush_sq(struct ehea_port *port) 2628static void ehea_flush_sq(struct ehea_port *port)
2629{ 2629{
2630 int i; 2630 int i;
2631 2631
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 8c4214b0ee1f..35f66d4a4595 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -96,6 +96,7 @@
96#define DEV_HAS_PAUSEFRAME_TX_V2 0x10000 /* device supports tx pause frames version 2 */ 96#define DEV_HAS_PAUSEFRAME_TX_V2 0x10000 /* device supports tx pause frames version 2 */
97#define DEV_HAS_PAUSEFRAME_TX_V3 0x20000 /* device supports tx pause frames version 3 */ 97#define DEV_HAS_PAUSEFRAME_TX_V3 0x20000 /* device supports tx pause frames version 3 */
98#define DEV_NEED_TX_LIMIT 0x40000 /* device needs to limit tx */ 98#define DEV_NEED_TX_LIMIT 0x40000 /* device needs to limit tx */
99#define DEV_HAS_GEAR_MODE 0x80000 /* device supports gear mode */
99 100
100enum { 101enum {
101 NvRegIrqStatus = 0x000, 102 NvRegIrqStatus = 0x000,
@@ -174,11 +175,13 @@ enum {
174 NvRegReceiverStatus = 0x98, 175 NvRegReceiverStatus = 0x98,
175#define NVREG_RCVSTAT_BUSY 0x01 176#define NVREG_RCVSTAT_BUSY 0x01
176 177
177 NvRegRandomSeed = 0x9c, 178 NvRegSlotTime = 0x9c,
178#define NVREG_RNDSEED_MASK 0x00ff 179#define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000
179#define NVREG_RNDSEED_FORCE 0x7f00 180#define NVREG_SLOTTIME_10_100_FULL 0x00007f00
180#define NVREG_RNDSEED_FORCE2 0x2d00 181#define NVREG_SLOTTIME_1000_FULL 0x0003ff00
181#define NVREG_RNDSEED_FORCE3 0x7400 182#define NVREG_SLOTTIME_HALF 0x0000ff00
183#define NVREG_SLOTTIME_DEFAULT 0x00007f00
184#define NVREG_SLOTTIME_MASK 0x000000ff
182 185
183 NvRegTxDeferral = 0xA0, 186 NvRegTxDeferral = 0xA0,
184#define NVREG_TX_DEFERRAL_DEFAULT 0x15050f 187#define NVREG_TX_DEFERRAL_DEFAULT 0x15050f
@@ -201,6 +204,11 @@ enum {
201 204
202 NvRegPhyInterface = 0xC0, 205 NvRegPhyInterface = 0xC0,
203#define PHY_RGMII 0x10000000 206#define PHY_RGMII 0x10000000
207 NvRegBackOffControl = 0xC4,
208#define NVREG_BKOFFCTRL_DEFAULT 0x70000000
209#define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff
210#define NVREG_BKOFFCTRL_SELECT 24
211#define NVREG_BKOFFCTRL_GEAR 12
204 212
205 NvRegTxRingPhysAddr = 0x100, 213 NvRegTxRingPhysAddr = 0x100,
206 NvRegRxRingPhysAddr = 0x104, 214 NvRegRxRingPhysAddr = 0x104,
@@ -352,6 +360,7 @@ union ring_type {
352 360
353#define NV_TX_LASTPACKET (1<<16) 361#define NV_TX_LASTPACKET (1<<16)
354#define NV_TX_RETRYERROR (1<<19) 362#define NV_TX_RETRYERROR (1<<19)
363#define NV_TX_RETRYCOUNT_MASK (0xF<<20)
355#define NV_TX_FORCED_INTERRUPT (1<<24) 364#define NV_TX_FORCED_INTERRUPT (1<<24)
356#define NV_TX_DEFERRED (1<<26) 365#define NV_TX_DEFERRED (1<<26)
357#define NV_TX_CARRIERLOST (1<<27) 366#define NV_TX_CARRIERLOST (1<<27)
@@ -362,6 +371,7 @@ union ring_type {
362 371
363#define NV_TX2_LASTPACKET (1<<29) 372#define NV_TX2_LASTPACKET (1<<29)
364#define NV_TX2_RETRYERROR (1<<18) 373#define NV_TX2_RETRYERROR (1<<18)
374#define NV_TX2_RETRYCOUNT_MASK (0xF<<19)
365#define NV_TX2_FORCED_INTERRUPT (1<<30) 375#define NV_TX2_FORCED_INTERRUPT (1<<30)
366#define NV_TX2_DEFERRED (1<<25) 376#define NV_TX2_DEFERRED (1<<25)
367#define NV_TX2_CARRIERLOST (1<<26) 377#define NV_TX2_CARRIERLOST (1<<26)
@@ -473,16 +483,22 @@ union ring_type {
473#define DESC_VER_3 3 483#define DESC_VER_3 3
474 484
475/* PHY defines */ 485/* PHY defines */
476#define PHY_OUI_MARVELL 0x5043 486#define PHY_OUI_MARVELL 0x5043
477#define PHY_OUI_CICADA 0x03f1 487#define PHY_OUI_CICADA 0x03f1
478#define PHY_OUI_VITESSE 0x01c1 488#define PHY_OUI_VITESSE 0x01c1
479#define PHY_OUI_REALTEK 0x0732 489#define PHY_OUI_REALTEK 0x0732
490#define PHY_OUI_REALTEK2 0x0020
480#define PHYID1_OUI_MASK 0x03ff 491#define PHYID1_OUI_MASK 0x03ff
481#define PHYID1_OUI_SHFT 6 492#define PHYID1_OUI_SHFT 6
482#define PHYID2_OUI_MASK 0xfc00 493#define PHYID2_OUI_MASK 0xfc00
483#define PHYID2_OUI_SHFT 10 494#define PHYID2_OUI_SHFT 10
484#define PHYID2_MODEL_MASK 0x03f0 495#define PHYID2_MODEL_MASK 0x03f0
485#define PHY_MODEL_MARVELL_E3016 0x220 496#define PHY_MODEL_REALTEK_8211 0x0110
497#define PHY_REV_MASK 0x0001
498#define PHY_REV_REALTEK_8211B 0x0000
499#define PHY_REV_REALTEK_8211C 0x0001
500#define PHY_MODEL_REALTEK_8201 0x0200
501#define PHY_MODEL_MARVELL_E3016 0x0220
486#define PHY_MARVELL_E3016_INITMASK 0x0300 502#define PHY_MARVELL_E3016_INITMASK 0x0300
487#define PHY_CICADA_INIT1 0x0f000 503#define PHY_CICADA_INIT1 0x0f000
488#define PHY_CICADA_INIT2 0x0e00 504#define PHY_CICADA_INIT2 0x0e00
@@ -509,10 +525,18 @@ union ring_type {
509#define PHY_REALTEK_INIT_REG1 0x1f 525#define PHY_REALTEK_INIT_REG1 0x1f
510#define PHY_REALTEK_INIT_REG2 0x19 526#define PHY_REALTEK_INIT_REG2 0x19
511#define PHY_REALTEK_INIT_REG3 0x13 527#define PHY_REALTEK_INIT_REG3 0x13
528#define PHY_REALTEK_INIT_REG4 0x14
529#define PHY_REALTEK_INIT_REG5 0x18
530#define PHY_REALTEK_INIT_REG6 0x11
512#define PHY_REALTEK_INIT1 0x0000 531#define PHY_REALTEK_INIT1 0x0000
513#define PHY_REALTEK_INIT2 0x8e00 532#define PHY_REALTEK_INIT2 0x8e00
514#define PHY_REALTEK_INIT3 0x0001 533#define PHY_REALTEK_INIT3 0x0001
515#define PHY_REALTEK_INIT4 0xad17 534#define PHY_REALTEK_INIT4 0xad17
535#define PHY_REALTEK_INIT5 0xfb54
536#define PHY_REALTEK_INIT6 0xf5c7
537#define PHY_REALTEK_INIT7 0x1000
538#define PHY_REALTEK_INIT8 0x0003
539#define PHY_REALTEK_INIT_MSK1 0x0003
516 540
517#define PHY_GIGABIT 0x0100 541#define PHY_GIGABIT 0x0100
518 542
@@ -691,6 +715,7 @@ struct fe_priv {
691 int wolenabled; 715 int wolenabled;
692 unsigned int phy_oui; 716 unsigned int phy_oui;
693 unsigned int phy_model; 717 unsigned int phy_model;
718 unsigned int phy_rev;
694 u16 gigabit; 719 u16 gigabit;
695 int intr_test; 720 int intr_test;
696 int recover_error; 721 int recover_error;
@@ -704,6 +729,7 @@ struct fe_priv {
704 u32 txrxctl_bits; 729 u32 txrxctl_bits;
705 u32 vlanctl_bits; 730 u32 vlanctl_bits;
706 u32 driver_data; 731 u32 driver_data;
732 u32 device_id;
707 u32 register_size; 733 u32 register_size;
708 int rx_csum; 734 int rx_csum;
709 u32 mac_in_use; 735 u32 mac_in_use;
@@ -814,6 +840,16 @@ enum {
814}; 840};
815static int dma_64bit = NV_DMA_64BIT_ENABLED; 841static int dma_64bit = NV_DMA_64BIT_ENABLED;
816 842
843/*
844 * Crossover Detection
845 * Realtek 8201 phy + some OEM boards do not work properly.
846 */
847enum {
848 NV_CROSSOVER_DETECTION_DISABLED,
849 NV_CROSSOVER_DETECTION_ENABLED
850};
851static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED;
852
817static inline struct fe_priv *get_nvpriv(struct net_device *dev) 853static inline struct fe_priv *get_nvpriv(struct net_device *dev)
818{ 854{
819 return netdev_priv(dev); 855 return netdev_priv(dev);
@@ -1078,25 +1114,53 @@ static int phy_init(struct net_device *dev)
1078 } 1114 }
1079 } 1115 }
1080 if (np->phy_oui == PHY_OUI_REALTEK) { 1116 if (np->phy_oui == PHY_OUI_REALTEK) {
1081 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { 1117 if (np->phy_model == PHY_MODEL_REALTEK_8211 &&
1082 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1118 np->phy_rev == PHY_REV_REALTEK_8211B) {
1083 return PHY_ERROR; 1119 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1084 } 1120 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1085 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { 1121 return PHY_ERROR;
1086 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1122 }
1087 return PHY_ERROR; 1123 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) {
1088 } 1124 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1089 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { 1125 return PHY_ERROR;
1090 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1126 }
1091 return PHY_ERROR; 1127 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1092 } 1128 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1093 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { 1129 return PHY_ERROR;
1094 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1130 }
1095 return PHY_ERROR; 1131 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) {
1132 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1133 return PHY_ERROR;
1134 }
1135 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) {
1136 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1137 return PHY_ERROR;
1138 }
1139 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) {
1140 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1141 return PHY_ERROR;
1142 }
1143 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1144 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1145 return PHY_ERROR;
1146 }
1096 } 1147 }
1097 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { 1148 if (np->phy_model == PHY_MODEL_REALTEK_8201) {
1098 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1149 if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 ||
1099 return PHY_ERROR; 1150 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 ||
1151 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 ||
1152 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 ||
1153 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 ||
1154 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 ||
1155 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 ||
1156 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) {
1157 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1158 phy_reserved |= PHY_REALTEK_INIT7;
1159 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) {
1160 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1161 return PHY_ERROR;
1162 }
1163 }
1100 } 1164 }
1101 } 1165 }
1102 1166
@@ -1236,26 +1300,71 @@ static int phy_init(struct net_device *dev)
1236 } 1300 }
1237 } 1301 }
1238 if (np->phy_oui == PHY_OUI_REALTEK) { 1302 if (np->phy_oui == PHY_OUI_REALTEK) {
1239 /* reset could have cleared these out, set them back */ 1303 if (np->phy_model == PHY_MODEL_REALTEK_8211 &&
1240 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { 1304 np->phy_rev == PHY_REV_REALTEK_8211B) {
1241 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1305 /* reset could have cleared these out, set them back */
1242 return PHY_ERROR; 1306 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1243 } 1307 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1244 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) { 1308 return PHY_ERROR;
1245 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1309 }
1246 return PHY_ERROR; 1310 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) {
1247 } 1311 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1248 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) { 1312 return PHY_ERROR;
1249 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1313 }
1250 return PHY_ERROR; 1314 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1251 } 1315 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1252 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) { 1316 return PHY_ERROR;
1253 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1317 }
1254 return PHY_ERROR; 1318 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) {
1319 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1320 return PHY_ERROR;
1321 }
1322 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) {
1323 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1324 return PHY_ERROR;
1325 }
1326 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) {
1327 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1328 return PHY_ERROR;
1329 }
1330 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1331 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1332 return PHY_ERROR;
1333 }
1255 } 1334 }
1256 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) { 1335 if (np->phy_model == PHY_MODEL_REALTEK_8201) {
1257 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev)); 1336 if (np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_32 ||
1258 return PHY_ERROR; 1337 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_33 ||
1338 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_34 ||
1339 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_35 ||
1340 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_36 ||
1341 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_37 ||
1342 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_38 ||
1343 np->device_id == PCI_DEVICE_ID_NVIDIA_NVENET_39) {
1344 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1345 phy_reserved |= PHY_REALTEK_INIT7;
1346 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) {
1347 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1348 return PHY_ERROR;
1349 }
1350 }
1351 if (phy_cross == NV_CROSSOVER_DETECTION_DISABLED) {
1352 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1353 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1354 return PHY_ERROR;
1355 }
1356 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ);
1357 phy_reserved &= ~PHY_REALTEK_INIT_MSK1;
1358 phy_reserved |= PHY_REALTEK_INIT3;
1359 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved)) {
1360 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1361 return PHY_ERROR;
1362 }
1363 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1364 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1365 return PHY_ERROR;
1366 }
1367 }
1259 } 1368 }
1260 } 1369 }
1261 1370
@@ -1769,6 +1878,115 @@ static inline u32 nv_get_empty_tx_slots(struct fe_priv *np)
1769 return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size)); 1878 return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size));
1770} 1879}
1771 1880
1881static void nv_legacybackoff_reseed(struct net_device *dev)
1882{
1883 u8 __iomem *base = get_hwbase(dev);
1884 u32 reg;
1885 u32 low;
1886 int tx_status = 0;
1887
1888 reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK;
1889 get_random_bytes(&low, sizeof(low));
1890 reg |= low & NVREG_SLOTTIME_MASK;
1891
1892 /* Need to stop tx before change takes effect.
1893 * Caller has already gained np->lock.
1894 */
1895 tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START;
1896 if (tx_status)
1897 nv_stop_tx(dev);
1898 nv_stop_rx(dev);
1899 writel(reg, base + NvRegSlotTime);
1900 if (tx_status)
1901 nv_start_tx(dev);
1902 nv_start_rx(dev);
1903}
1904
1905/* Gear Backoff Seeds */
1906#define BACKOFF_SEEDSET_ROWS 8
1907#define BACKOFF_SEEDSET_LFSRS 15
1908
1909/* Known Good seed sets */
1910static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
1911 {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
1912 {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974},
1913 {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
1914 {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974},
1915 {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984},
1916 {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984},
1917 {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84},
1918 {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184}};
1919
1920static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
1921 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
1922 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
1923 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397},
1924 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
1925 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
1926 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
1927 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
1928 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395}};
1929
1930static void nv_gear_backoff_reseed(struct net_device *dev)
1931{
1932 u8 __iomem *base = get_hwbase(dev);
1933 u32 miniseed1, miniseed2, miniseed2_reversed, miniseed3, miniseed3_reversed;
1934 u32 temp, seedset, combinedSeed;
1935 int i;
1936
1937 /* Setup seed for free running LFSR */
1938 /* We are going to read the time stamp counter 3 times
1939 and swizzle bits around to increase randomness */
1940 get_random_bytes(&miniseed1, sizeof(miniseed1));
1941 miniseed1 &= 0x0fff;
1942 if (miniseed1 == 0)
1943 miniseed1 = 0xabc;
1944
1945 get_random_bytes(&miniseed2, sizeof(miniseed2));
1946 miniseed2 &= 0x0fff;
1947 if (miniseed2 == 0)
1948 miniseed2 = 0xabc;
1949 miniseed2_reversed =
1950 ((miniseed2 & 0xF00) >> 8) |
1951 (miniseed2 & 0x0F0) |
1952 ((miniseed2 & 0x00F) << 8);
1953
1954 get_random_bytes(&miniseed3, sizeof(miniseed3));
1955 miniseed3 &= 0x0fff;
1956 if (miniseed3 == 0)
1957 miniseed3 = 0xabc;
1958 miniseed3_reversed =
1959 ((miniseed3 & 0xF00) >> 8) |
1960 (miniseed3 & 0x0F0) |
1961 ((miniseed3 & 0x00F) << 8);
1962
1963 combinedSeed = ((miniseed1 ^ miniseed2_reversed) << 12) |
1964 (miniseed2 ^ miniseed3_reversed);
1965
1966 /* Seeds can not be zero */
1967 if ((combinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0)
1968 combinedSeed |= 0x08;
1969 if ((combinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0)
1970 combinedSeed |= 0x8000;
1971
1972 /* No need to disable tx here */
1973 temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT);
1974 temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK;
1975 temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR;
1976 writel(temp,base + NvRegBackOffControl);
1977
1978 /* Setup seeds for all gear LFSRs. */
1979 get_random_bytes(&seedset, sizeof(seedset));
1980 seedset = seedset % BACKOFF_SEEDSET_ROWS;
1981 for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++)
1982 {
1983 temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT);
1984 temp |= main_seedset[seedset][i-1] & 0x3ff;
1985 temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR);
1986 writel(temp, base + NvRegBackOffControl);
1987 }
1988}
1989
1772/* 1990/*
1773 * nv_start_xmit: dev->hard_start_xmit function 1991 * nv_start_xmit: dev->hard_start_xmit function
1774 * Called with netif_tx_lock held. 1992 * Called with netif_tx_lock held.
@@ -2088,6 +2306,8 @@ static void nv_tx_done(struct net_device *dev)
2088 dev->stats.tx_fifo_errors++; 2306 dev->stats.tx_fifo_errors++;
2089 if (flags & NV_TX_CARRIERLOST) 2307 if (flags & NV_TX_CARRIERLOST)
2090 dev->stats.tx_carrier_errors++; 2308 dev->stats.tx_carrier_errors++;
2309 if ((flags & NV_TX_RETRYERROR) && !(flags & NV_TX_RETRYCOUNT_MASK))
2310 nv_legacybackoff_reseed(dev);
2091 dev->stats.tx_errors++; 2311 dev->stats.tx_errors++;
2092 } else { 2312 } else {
2093 dev->stats.tx_packets++; 2313 dev->stats.tx_packets++;
@@ -2103,6 +2323,8 @@ static void nv_tx_done(struct net_device *dev)
2103 dev->stats.tx_fifo_errors++; 2323 dev->stats.tx_fifo_errors++;
2104 if (flags & NV_TX2_CARRIERLOST) 2324 if (flags & NV_TX2_CARRIERLOST)
2105 dev->stats.tx_carrier_errors++; 2325 dev->stats.tx_carrier_errors++;
2326 if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK))
2327 nv_legacybackoff_reseed(dev);
2106 dev->stats.tx_errors++; 2328 dev->stats.tx_errors++;
2107 } else { 2329 } else {
2108 dev->stats.tx_packets++; 2330 dev->stats.tx_packets++;
@@ -2144,6 +2366,15 @@ static void nv_tx_done_optimized(struct net_device *dev, int limit)
2144 if (flags & NV_TX2_LASTPACKET) { 2366 if (flags & NV_TX2_LASTPACKET) {
2145 if (!(flags & NV_TX2_ERROR)) 2367 if (!(flags & NV_TX2_ERROR))
2146 dev->stats.tx_packets++; 2368 dev->stats.tx_packets++;
2369 else {
2370 if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) {
2371 if (np->driver_data & DEV_HAS_GEAR_MODE)
2372 nv_gear_backoff_reseed(dev);
2373 else
2374 nv_legacybackoff_reseed(dev);
2375 }
2376 }
2377
2147 dev_kfree_skb_any(np->get_tx_ctx->skb); 2378 dev_kfree_skb_any(np->get_tx_ctx->skb);
2148 np->get_tx_ctx->skb = NULL; 2379 np->get_tx_ctx->skb = NULL;
2149 2380
@@ -2905,15 +3136,14 @@ set_speed:
2905 } 3136 }
2906 3137
2907 if (np->gigabit == PHY_GIGABIT) { 3138 if (np->gigabit == PHY_GIGABIT) {
2908 phyreg = readl(base + NvRegRandomSeed); 3139 phyreg = readl(base + NvRegSlotTime);
2909 phyreg &= ~(0x3FF00); 3140 phyreg &= ~(0x3FF00);
2910 if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) 3141 if (((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) ||
2911 phyreg |= NVREG_RNDSEED_FORCE3; 3142 ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100))
2912 else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100) 3143 phyreg |= NVREG_SLOTTIME_10_100_FULL;
2913 phyreg |= NVREG_RNDSEED_FORCE2;
2914 else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000) 3144 else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
2915 phyreg |= NVREG_RNDSEED_FORCE; 3145 phyreg |= NVREG_SLOTTIME_1000_FULL;
2916 writel(phyreg, base + NvRegRandomSeed); 3146 writel(phyreg, base + NvRegSlotTime);
2917 } 3147 }
2918 3148
2919 phyreg = readl(base + NvRegPhyInterface); 3149 phyreg = readl(base + NvRegPhyInterface);
@@ -4843,6 +5073,7 @@ static int nv_open(struct net_device *dev)
4843 u8 __iomem *base = get_hwbase(dev); 5073 u8 __iomem *base = get_hwbase(dev);
4844 int ret = 1; 5074 int ret = 1;
4845 int oom, i; 5075 int oom, i;
5076 u32 low;
4846 5077
4847 dprintk(KERN_DEBUG "nv_open: begin\n"); 5078 dprintk(KERN_DEBUG "nv_open: begin\n");
4848 5079
@@ -4902,8 +5133,20 @@ static int nv_open(struct net_device *dev)
4902 writel(np->rx_buf_sz, base + NvRegOffloadConfig); 5133 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
4903 5134
4904 writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus); 5135 writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
4905 get_random_bytes(&i, sizeof(i)); 5136
4906 writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed); 5137 get_random_bytes(&low, sizeof(low));
5138 low &= NVREG_SLOTTIME_MASK;
5139 if (np->desc_ver == DESC_VER_1) {
5140 writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime);
5141 } else {
5142 if (!(np->driver_data & DEV_HAS_GEAR_MODE)) {
5143 /* setup legacy backoff */
5144 writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime);
5145 } else {
5146 writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime);
5147 nv_gear_backoff_reseed(dev);
5148 }
5149 }
4907 writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral); 5150 writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
4908 writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral); 5151 writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
4909 if (poll_interval == -1) { 5152 if (poll_interval == -1) {
@@ -5110,6 +5353,8 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5110 5353
5111 /* copy of driver data */ 5354 /* copy of driver data */
5112 np->driver_data = id->driver_data; 5355 np->driver_data = id->driver_data;
5356 /* copy of device id */
5357 np->device_id = id->device;
5113 5358
5114 /* handle different descriptor versions */ 5359 /* handle different descriptor versions */
5115 if (id->driver_data & DEV_HAS_HIGH_DMA) { 5360 if (id->driver_data & DEV_HAS_HIGH_DMA) {
@@ -5399,6 +5644,14 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5399 pci_name(pci_dev), id1, id2, phyaddr); 5644 pci_name(pci_dev), id1, id2, phyaddr);
5400 np->phyaddr = phyaddr; 5645 np->phyaddr = phyaddr;
5401 np->phy_oui = id1 | id2; 5646 np->phy_oui = id1 | id2;
5647
5648 /* Realtek hardcoded phy id1 to all zero's on certain phys */
5649 if (np->phy_oui == PHY_OUI_REALTEK2)
5650 np->phy_oui = PHY_OUI_REALTEK;
5651 /* Setup phy revision for Realtek */
5652 if (np->phy_oui == PHY_OUI_REALTEK && np->phy_model == PHY_MODEL_REALTEK_8211)
5653 np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK;
5654
5402 break; 5655 break;
5403 } 5656 }
5404 if (i == 33) { 5657 if (i == 33) {
@@ -5477,6 +5730,28 @@ out:
5477 return err; 5730 return err;
5478} 5731}
5479 5732
5733static void nv_restore_phy(struct net_device *dev)
5734{
5735 struct fe_priv *np = netdev_priv(dev);
5736 u16 phy_reserved, mii_control;
5737
5738 if (np->phy_oui == PHY_OUI_REALTEK &&
5739 np->phy_model == PHY_MODEL_REALTEK_8201 &&
5740 phy_cross == NV_CROSSOVER_DETECTION_DISABLED) {
5741 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3);
5742 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ);
5743 phy_reserved &= ~PHY_REALTEK_INIT_MSK1;
5744 phy_reserved |= PHY_REALTEK_INIT8;
5745 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved);
5746 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1);
5747
5748 /* restart auto negotiation */
5749 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
5750 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
5751 mii_rw(dev, np->phyaddr, MII_BMCR, mii_control);
5752 }
5753}
5754
5480static void __devexit nv_remove(struct pci_dev *pci_dev) 5755static void __devexit nv_remove(struct pci_dev *pci_dev)
5481{ 5756{
5482 struct net_device *dev = pci_get_drvdata(pci_dev); 5757 struct net_device *dev = pci_get_drvdata(pci_dev);
@@ -5493,6 +5768,9 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
5493 writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV, 5768 writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV,
5494 base + NvRegTransmitPoll); 5769 base + NvRegTransmitPoll);
5495 5770
5771 /* restore any phy related changes */
5772 nv_restore_phy(dev);
5773
5496 /* free all structures */ 5774 /* free all structures */
5497 free_rings(dev); 5775 free_rings(dev);
5498 iounmap(get_hwbase(dev)); 5776 iounmap(get_hwbase(dev));
@@ -5632,83 +5910,83 @@ static struct pci_device_id pci_tbl[] = {
5632 }, 5910 },
5633 { /* MCP65 Ethernet Controller */ 5911 { /* MCP65 Ethernet Controller */
5634 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20), 5912 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20),
5635 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_NEED_TX_LIMIT, 5913 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5636 }, 5914 },
5637 { /* MCP65 Ethernet Controller */ 5915 { /* MCP65 Ethernet Controller */
5638 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21), 5916 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21),
5639 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT, 5917 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5640 }, 5918 },
5641 { /* MCP65 Ethernet Controller */ 5919 { /* MCP65 Ethernet Controller */
5642 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22), 5920 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22),
5643 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT, 5921 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5644 }, 5922 },
5645 { /* MCP65 Ethernet Controller */ 5923 { /* MCP65 Ethernet Controller */
5646 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23), 5924 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23),
5647 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT, 5925 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5648 }, 5926 },
5649 { /* MCP67 Ethernet Controller */ 5927 { /* MCP67 Ethernet Controller */
5650 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24), 5928 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_24),
5651 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, 5929 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE,
5652 }, 5930 },
5653 { /* MCP67 Ethernet Controller */ 5931 { /* MCP67 Ethernet Controller */
5654 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25), 5932 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_25),
5655 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, 5933 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE,
5656 }, 5934 },
5657 { /* MCP67 Ethernet Controller */ 5935 { /* MCP67 Ethernet Controller */
5658 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26), 5936 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_26),
5659 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, 5937 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE,
5660 }, 5938 },
5661 { /* MCP67 Ethernet Controller */ 5939 { /* MCP67 Ethernet Controller */
5662 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27), 5940 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_27),
5663 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR, 5941 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE,
5664 }, 5942 },
5665 { /* MCP73 Ethernet Controller */ 5943 { /* MCP73 Ethernet Controller */
5666 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_28), 5944 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_28),
5667 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX, 5945 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE,
5668 }, 5946 },
5669 { /* MCP73 Ethernet Controller */ 5947 { /* MCP73 Ethernet Controller */
5670 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_29), 5948 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_29),
5671 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX, 5949 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE,
5672 }, 5950 },
5673 { /* MCP73 Ethernet Controller */ 5951 { /* MCP73 Ethernet Controller */
5674 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_30), 5952 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_30),
5675 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX, 5953 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE,
5676 }, 5954 },
5677 { /* MCP73 Ethernet Controller */ 5955 { /* MCP73 Ethernet Controller */
5678 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_31), 5956 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_31),
5679 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX, 5957 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE,
5680 }, 5958 },
5681 { /* MCP77 Ethernet Controller */ 5959 { /* MCP77 Ethernet Controller */
5682 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_32), 5960 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_32),
5683 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5961 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5684 }, 5962 },
5685 { /* MCP77 Ethernet Controller */ 5963 { /* MCP77 Ethernet Controller */
5686 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_33), 5964 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_33),
5687 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5965 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5688 }, 5966 },
5689 { /* MCP77 Ethernet Controller */ 5967 { /* MCP77 Ethernet Controller */
5690 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_34), 5968 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_34),
5691 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5969 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5692 }, 5970 },
5693 { /* MCP77 Ethernet Controller */ 5971 { /* MCP77 Ethernet Controller */
5694 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35), 5972 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35),
5695 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5973 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5696 }, 5974 },
5697 { /* MCP79 Ethernet Controller */ 5975 { /* MCP79 Ethernet Controller */
5698 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36), 5976 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36),
5699 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5977 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5700 }, 5978 },
5701 { /* MCP79 Ethernet Controller */ 5979 { /* MCP79 Ethernet Controller */
5702 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37), 5980 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37),
5703 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5981 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5704 }, 5982 },
5705 { /* MCP79 Ethernet Controller */ 5983 { /* MCP79 Ethernet Controller */
5706 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38), 5984 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38),
5707 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5985 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5708 }, 5986 },
5709 { /* MCP79 Ethernet Controller */ 5987 { /* MCP79 Ethernet Controller */
5710 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39), 5988 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39),
5711 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT, 5989 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE,
5712 }, 5990 },
5713 {0,}, 5991 {0,},
5714}; 5992};
@@ -5744,6 +6022,8 @@ module_param(msix, int, 0);
5744MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); 6022MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
5745module_param(dma_64bit, int, 0); 6023module_param(dma_64bit, int, 0);
5746MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); 6024MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
6025module_param(phy_cross, int, 0);
6026MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0.");
5747 6027
5748MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>"); 6028MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
5749MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver"); 6029MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index c8c3df737d73..99a4b990939f 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -98,7 +98,6 @@
98#include "gianfar_mii.h" 98#include "gianfar_mii.h"
99 99
100#define TX_TIMEOUT (1*HZ) 100#define TX_TIMEOUT (1*HZ)
101#define SKB_ALLOC_TIMEOUT 1000000
102#undef BRIEF_GFAR_ERRORS 101#undef BRIEF_GFAR_ERRORS
103#undef VERBOSE_GFAR_ERRORS 102#undef VERBOSE_GFAR_ERRORS
104 103
@@ -115,7 +114,9 @@ static int gfar_enet_open(struct net_device *dev);
115static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev); 114static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
116static void gfar_timeout(struct net_device *dev); 115static void gfar_timeout(struct net_device *dev);
117static int gfar_close(struct net_device *dev); 116static int gfar_close(struct net_device *dev);
118struct sk_buff *gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp); 117struct sk_buff *gfar_new_skb(struct net_device *dev);
118static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
119 struct sk_buff *skb);
119static int gfar_set_mac_address(struct net_device *dev); 120static int gfar_set_mac_address(struct net_device *dev);
120static int gfar_change_mtu(struct net_device *dev, int new_mtu); 121static int gfar_change_mtu(struct net_device *dev, int new_mtu);
121static irqreturn_t gfar_error(int irq, void *dev_id); 122static irqreturn_t gfar_error(int irq, void *dev_id);
@@ -783,14 +784,21 @@ int startup_gfar(struct net_device *dev)
783 784
784 rxbdp = priv->rx_bd_base; 785 rxbdp = priv->rx_bd_base;
785 for (i = 0; i < priv->rx_ring_size; i++) { 786 for (i = 0; i < priv->rx_ring_size; i++) {
786 struct sk_buff *skb = NULL; 787 struct sk_buff *skb;
787 788
788 rxbdp->status = 0; 789 skb = gfar_new_skb(dev);
789 790
790 skb = gfar_new_skb(dev, rxbdp); 791 if (!skb) {
792 printk(KERN_ERR "%s: Can't allocate RX buffers\n",
793 dev->name);
794
795 goto err_rxalloc_fail;
796 }
791 797
792 priv->rx_skbuff[i] = skb; 798 priv->rx_skbuff[i] = skb;
793 799
800 gfar_new_rxbdp(dev, rxbdp, skb);
801
794 rxbdp++; 802 rxbdp++;
795 } 803 }
796 804
@@ -916,6 +924,7 @@ rx_irq_fail:
916tx_irq_fail: 924tx_irq_fail:
917 free_irq(priv->interruptError, dev); 925 free_irq(priv->interruptError, dev);
918err_irq_fail: 926err_irq_fail:
927err_rxalloc_fail:
919rx_skb_fail: 928rx_skb_fail:
920 free_skb_resources(priv); 929 free_skb_resources(priv);
921tx_skb_fail: 930tx_skb_fail:
@@ -1328,18 +1337,37 @@ static irqreturn_t gfar_transmit(int irq, void *dev_id)
1328 return IRQ_HANDLED; 1337 return IRQ_HANDLED;
1329} 1338}
1330 1339
1331struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp) 1340static void gfar_new_rxbdp(struct net_device *dev, struct rxbd8 *bdp,
1341 struct sk_buff *skb)
1342{
1343 struct gfar_private *priv = netdev_priv(dev);
1344 u32 * status_len = (u32 *)bdp;
1345 u16 flags;
1346
1347 bdp->bufPtr = dma_map_single(&dev->dev, skb->data,
1348 priv->rx_buffer_size, DMA_FROM_DEVICE);
1349
1350 flags = RXBD_EMPTY | RXBD_INTERRUPT;
1351
1352 if (bdp == priv->rx_bd_base + priv->rx_ring_size - 1)
1353 flags |= RXBD_WRAP;
1354
1355 eieio();
1356
1357 *status_len = (u32)flags << 16;
1358}
1359
1360
1361struct sk_buff * gfar_new_skb(struct net_device *dev)
1332{ 1362{
1333 unsigned int alignamount; 1363 unsigned int alignamount;
1334 struct gfar_private *priv = netdev_priv(dev); 1364 struct gfar_private *priv = netdev_priv(dev);
1335 struct sk_buff *skb = NULL; 1365 struct sk_buff *skb = NULL;
1336 unsigned int timeout = SKB_ALLOC_TIMEOUT;
1337 1366
1338 /* We have to allocate the skb, so keep trying till we succeed */ 1367 /* We have to allocate the skb, so keep trying till we succeed */
1339 while ((!skb) && timeout--) 1368 skb = netdev_alloc_skb(dev, priv->rx_buffer_size + RXBUF_ALIGNMENT);
1340 skb = dev_alloc_skb(priv->rx_buffer_size + RXBUF_ALIGNMENT);
1341 1369
1342 if (NULL == skb) 1370 if (!skb)
1343 return NULL; 1371 return NULL;
1344 1372
1345 alignamount = RXBUF_ALIGNMENT - 1373 alignamount = RXBUF_ALIGNMENT -
@@ -1350,15 +1378,6 @@ struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp)
1350 */ 1378 */
1351 skb_reserve(skb, alignamount); 1379 skb_reserve(skb, alignamount);
1352 1380
1353 bdp->bufPtr = dma_map_single(&dev->dev, skb->data,
1354 priv->rx_buffer_size, DMA_FROM_DEVICE);
1355
1356 bdp->length = 0;
1357
1358 /* Mark the buffer empty */
1359 eieio();
1360 bdp->status |= (RXBD_EMPTY | RXBD_INTERRUPT);
1361
1362 return skb; 1381 return skb;
1363} 1382}
1364 1383
@@ -1544,10 +1563,31 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1544 bdp = priv->cur_rx; 1563 bdp = priv->cur_rx;
1545 1564
1546 while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) { 1565 while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1566 struct sk_buff *newskb;
1547 rmb(); 1567 rmb();
1568
1569 /* Add another skb for the future */
1570 newskb = gfar_new_skb(dev);
1571
1548 skb = priv->rx_skbuff[priv->skb_currx]; 1572 skb = priv->rx_skbuff[priv->skb_currx];
1549 1573
1550 if ((bdp->status & RXBD_LAST) && !(bdp->status & RXBD_ERR)) { 1574 /* We drop the frame if we failed to allocate a new buffer */
1575 if (unlikely(!newskb || !(bdp->status & RXBD_LAST) ||
1576 bdp->status & RXBD_ERR)) {
1577 count_errors(bdp->status, dev);
1578
1579 if (unlikely(!newskb))
1580 newskb = skb;
1581
1582 if (skb) {
1583 dma_unmap_single(&priv->dev->dev,
1584 bdp->bufPtr,
1585 priv->rx_buffer_size,
1586 DMA_FROM_DEVICE);
1587
1588 dev_kfree_skb_any(skb);
1589 }
1590 } else {
1551 /* Increment the number of packets */ 1591 /* Increment the number of packets */
1552 dev->stats.rx_packets++; 1592 dev->stats.rx_packets++;
1553 howmany++; 1593 howmany++;
@@ -1558,23 +1598,14 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1558 gfar_process_frame(dev, skb, pkt_len); 1598 gfar_process_frame(dev, skb, pkt_len);
1559 1599
1560 dev->stats.rx_bytes += pkt_len; 1600 dev->stats.rx_bytes += pkt_len;
1561 } else {
1562 count_errors(bdp->status, dev);
1563
1564 if (skb)
1565 dev_kfree_skb_any(skb);
1566
1567 priv->rx_skbuff[priv->skb_currx] = NULL;
1568 } 1601 }
1569 1602
1570 dev->last_rx = jiffies; 1603 dev->last_rx = jiffies;
1571 1604
1572 /* Clear the status flags for this buffer */ 1605 priv->rx_skbuff[priv->skb_currx] = newskb;
1573 bdp->status &= ~RXBD_STATS;
1574 1606
1575 /* Add another skb for the future */ 1607 /* Setup the new bdp */
1576 skb = gfar_new_skb(dev, bdp); 1608 gfar_new_rxbdp(dev, bdp, newskb);
1577 priv->rx_skbuff[priv->skb_currx] = skb;
1578 1609
1579 /* Update to the next pointer */ 1610 /* Update to the next pointer */
1580 if (bdp->status & RXBD_WRAP) 1611 if (bdp->status & RXBD_WRAP)
@@ -1584,9 +1615,8 @@ int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1584 1615
1585 /* update to point at the next skb */ 1616 /* update to point at the next skb */
1586 priv->skb_currx = 1617 priv->skb_currx =
1587 (priv->skb_currx + 1618 (priv->skb_currx + 1) &
1588 1) & RX_RING_MOD_MASK(priv->rx_ring_size); 1619 RX_RING_MOD_MASK(priv->rx_ring_size);
1589
1590 } 1620 }
1591 1621
1592 /* Update the current rxbd pointer to be the next one */ 1622 /* Update the current rxbd pointer to be the next one */
@@ -2001,12 +2031,16 @@ static irqreturn_t gfar_error(int irq, void *dev_id)
2001 return IRQ_HANDLED; 2031 return IRQ_HANDLED;
2002} 2032}
2003 2033
2034/* work with hotplug and coldplug */
2035MODULE_ALIAS("platform:fsl-gianfar");
2036
2004/* Structure for a device driver */ 2037/* Structure for a device driver */
2005static struct platform_driver gfar_driver = { 2038static struct platform_driver gfar_driver = {
2006 .probe = gfar_probe, 2039 .probe = gfar_probe,
2007 .remove = gfar_remove, 2040 .remove = gfar_remove,
2008 .driver = { 2041 .driver = {
2009 .name = "fsl-gianfar", 2042 .name = "fsl-gianfar",
2043 .owner = THIS_MODULE,
2010 }, 2044 },
2011}; 2045};
2012 2046
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index 378a23963495..5d2108c5ac7c 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -43,6 +43,8 @@
43#include <asm/io.h> 43#include <asm/io.h>
44#include <asm/dma.h> 44#include <asm/dma.h>
45#include <asm/uaccess.h> 45#include <asm/uaccess.h>
46#include <asm/dcr.h>
47#include <asm/dcr-regs.h>
46 48
47#include "core.h" 49#include "core.h"
48 50
@@ -127,10 +129,35 @@ static struct device_node *emac_boot_list[EMAC_BOOT_LIST_SIZE];
127static inline void emac_report_timeout_error(struct emac_instance *dev, 129static inline void emac_report_timeout_error(struct emac_instance *dev,
128 const char *error) 130 const char *error)
129{ 131{
130 if (net_ratelimit()) 132 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |
133 EMAC_FTR_440EP_PHY_CLK_FIX))
134 DBG(dev, "%s" NL, error);
135 else if (net_ratelimit())
131 printk(KERN_ERR "%s: %s\n", dev->ndev->name, error); 136 printk(KERN_ERR "%s: %s\n", dev->ndev->name, error);
132} 137}
133 138
139/* EMAC PHY clock workaround:
140 * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX,
141 * which allows controlling each EMAC clock
142 */
143static inline void emac_rx_clk_tx(struct emac_instance *dev)
144{
145#ifdef CONFIG_PPC_DCR_NATIVE
146 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
147 dcri_clrset(SDR0, SDR0_MFR,
148 0, SDR0_MFR_ECS >> dev->cell_index);
149#endif
150}
151
152static inline void emac_rx_clk_default(struct emac_instance *dev)
153{
154#ifdef CONFIG_PPC_DCR_NATIVE
155 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
156 dcri_clrset(SDR0, SDR0_MFR,
157 SDR0_MFR_ECS >> dev->cell_index, 0);
158#endif
159}
160
134/* PHY polling intervals */ 161/* PHY polling intervals */
135#define PHY_POLL_LINK_ON HZ 162#define PHY_POLL_LINK_ON HZ
136#define PHY_POLL_LINK_OFF (HZ / 5) 163#define PHY_POLL_LINK_OFF (HZ / 5)
@@ -524,7 +551,10 @@ static int emac_configure(struct emac_instance *dev)
524 rx_size = dev->rx_fifo_size_gige; 551 rx_size = dev->rx_fifo_size_gige;
525 552
526 if (dev->ndev->mtu > ETH_DATA_LEN) { 553 if (dev->ndev->mtu > ETH_DATA_LEN) {
527 mr1 |= EMAC_MR1_JPSM; 554 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
555 mr1 |= EMAC4_MR1_JPSM;
556 else
557 mr1 |= EMAC_MR1_JPSM;
528 dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO; 558 dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO;
529 } else 559 } else
530 dev->stop_timeout = STOP_TIMEOUT_1000; 560 dev->stop_timeout = STOP_TIMEOUT_1000;
@@ -708,7 +738,7 @@ static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg)
708 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); 738 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
709 739
710 /* Wait for management interface to become idle */ 740 /* Wait for management interface to become idle */
711 n = 10; 741 n = 20;
712 while (!emac_phy_done(dev, in_be32(&p->stacr))) { 742 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
713 udelay(1); 743 udelay(1);
714 if (!--n) { 744 if (!--n) {
@@ -733,7 +763,7 @@ static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg)
733 out_be32(&p->stacr, r); 763 out_be32(&p->stacr, r);
734 764
735 /* Wait for read to complete */ 765 /* Wait for read to complete */
736 n = 100; 766 n = 200;
737 while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) { 767 while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) {
738 udelay(1); 768 udelay(1);
739 if (!--n) { 769 if (!--n) {
@@ -780,7 +810,7 @@ static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg,
780 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); 810 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
781 811
782 /* Wait for management interface to be idle */ 812 /* Wait for management interface to be idle */
783 n = 10; 813 n = 20;
784 while (!emac_phy_done(dev, in_be32(&p->stacr))) { 814 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
785 udelay(1); 815 udelay(1);
786 if (!--n) { 816 if (!--n) {
@@ -806,7 +836,7 @@ static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg,
806 out_be32(&p->stacr, r); 836 out_be32(&p->stacr, r);
807 837
808 /* Wait for write to complete */ 838 /* Wait for write to complete */
809 n = 100; 839 n = 200;
810 while (!emac_phy_done(dev, in_be32(&p->stacr))) { 840 while (!emac_phy_done(dev, in_be32(&p->stacr))) {
811 udelay(1); 841 udelay(1);
812 if (!--n) { 842 if (!--n) {
@@ -1094,9 +1124,11 @@ static int emac_open(struct net_device *ndev)
1094 int link_poll_interval; 1124 int link_poll_interval;
1095 if (dev->phy.def->ops->poll_link(&dev->phy)) { 1125 if (dev->phy.def->ops->poll_link(&dev->phy)) {
1096 dev->phy.def->ops->read_link(&dev->phy); 1126 dev->phy.def->ops->read_link(&dev->phy);
1127 emac_rx_clk_default(dev);
1097 netif_carrier_on(dev->ndev); 1128 netif_carrier_on(dev->ndev);
1098 link_poll_interval = PHY_POLL_LINK_ON; 1129 link_poll_interval = PHY_POLL_LINK_ON;
1099 } else { 1130 } else {
1131 emac_rx_clk_tx(dev);
1100 netif_carrier_off(dev->ndev); 1132 netif_carrier_off(dev->ndev);
1101 link_poll_interval = PHY_POLL_LINK_OFF; 1133 link_poll_interval = PHY_POLL_LINK_OFF;
1102 } 1134 }
@@ -1174,6 +1206,7 @@ static void emac_link_timer(struct work_struct *work)
1174 1206
1175 if (dev->phy.def->ops->poll_link(&dev->phy)) { 1207 if (dev->phy.def->ops->poll_link(&dev->phy)) {
1176 if (!netif_carrier_ok(dev->ndev)) { 1208 if (!netif_carrier_ok(dev->ndev)) {
1209 emac_rx_clk_default(dev);
1177 /* Get new link parameters */ 1210 /* Get new link parameters */
1178 dev->phy.def->ops->read_link(&dev->phy); 1211 dev->phy.def->ops->read_link(&dev->phy);
1179 1212
@@ -1186,6 +1219,7 @@ static void emac_link_timer(struct work_struct *work)
1186 link_poll_interval = PHY_POLL_LINK_ON; 1219 link_poll_interval = PHY_POLL_LINK_ON;
1187 } else { 1220 } else {
1188 if (netif_carrier_ok(dev->ndev)) { 1221 if (netif_carrier_ok(dev->ndev)) {
1222 emac_rx_clk_tx(dev);
1189 netif_carrier_off(dev->ndev); 1223 netif_carrier_off(dev->ndev);
1190 netif_tx_disable(dev->ndev); 1224 netif_tx_disable(dev->ndev);
1191 emac_reinitialize(dev); 1225 emac_reinitialize(dev);
@@ -2237,7 +2271,7 @@ static int __devinit emac_of_bus_notify(struct notifier_block *nb,
2237 return 0; 2271 return 0;
2238} 2272}
2239 2273
2240static struct notifier_block emac_of_bus_notifier = { 2274static struct notifier_block emac_of_bus_notifier __devinitdata = {
2241 .notifier_call = emac_of_bus_notify 2275 .notifier_call = emac_of_bus_notify
2242}; 2276};
2243 2277
@@ -2330,6 +2364,19 @@ static int __devinit emac_init_phy(struct emac_instance *dev)
2330 dev->phy.mdio_read = emac_mdio_read; 2364 dev->phy.mdio_read = emac_mdio_read;
2331 dev->phy.mdio_write = emac_mdio_write; 2365 dev->phy.mdio_write = emac_mdio_write;
2332 2366
2367 /* Enable internal clock source */
2368#ifdef CONFIG_PPC_DCR_NATIVE
2369 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2370 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2371#endif
2372 /* PHY clock workaround */
2373 emac_rx_clk_tx(dev);
2374
2375 /* Enable internal clock source on 440GX*/
2376#ifdef CONFIG_PPC_DCR_NATIVE
2377 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2378 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2379#endif
2333 /* Configure EMAC with defaults so we can at least use MDIO 2380 /* Configure EMAC with defaults so we can at least use MDIO
2334 * This is needed mostly for 440GX 2381 * This is needed mostly for 440GX
2335 */ 2382 */
@@ -2362,6 +2409,12 @@ static int __devinit emac_init_phy(struct emac_instance *dev)
2362 if (!emac_mii_phy_probe(&dev->phy, i)) 2409 if (!emac_mii_phy_probe(&dev->phy, i))
2363 break; 2410 break;
2364 } 2411 }
2412
2413 /* Enable external clock source */
2414#ifdef CONFIG_PPC_DCR_NATIVE
2415 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2416 dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0);
2417#endif
2365 mutex_unlock(&emac_phy_map_lock); 2418 mutex_unlock(&emac_phy_map_lock);
2366 if (i == 0x20) { 2419 if (i == 0x20) {
2367 printk(KERN_WARNING "%s: can't find PHY!\n", np->full_name); 2420 printk(KERN_WARNING "%s: can't find PHY!\n", np->full_name);
@@ -2487,8 +2540,15 @@ static int __devinit emac_init_config(struct emac_instance *dev)
2487 } 2540 }
2488 2541
2489 /* Check EMAC version */ 2542 /* Check EMAC version */
2490 if (of_device_is_compatible(np, "ibm,emac4")) 2543 if (of_device_is_compatible(np, "ibm,emac4")) {
2491 dev->features |= EMAC_FTR_EMAC4; 2544 dev->features |= EMAC_FTR_EMAC4;
2545 if (of_device_is_compatible(np, "ibm,emac-440gx"))
2546 dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
2547 } else {
2548 if (of_device_is_compatible(np, "ibm,emac-440ep") ||
2549 of_device_is_compatible(np, "ibm,emac-440gr"))
2550 dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2551 }
2492 2552
2493 /* Fixup some feature bits based on the device tree */ 2553 /* Fixup some feature bits based on the device tree */
2494 if (of_get_property(np, "has-inverted-stacr-oc", NULL)) 2554 if (of_get_property(np, "has-inverted-stacr-oc", NULL))
@@ -2559,8 +2619,11 @@ static int __devinit emac_probe(struct of_device *ofdev,
2559 struct device_node **blist = NULL; 2619 struct device_node **blist = NULL;
2560 int err, i; 2620 int err, i;
2561 2621
2562 /* Skip unused/unwired EMACS */ 2622 /* Skip unused/unwired EMACS. We leave the check for an unused
2563 if (of_get_property(np, "unused", NULL)) 2623 * property here for now, but new flat device trees should set a
2624 * status property to "disabled" instead.
2625 */
2626 if (of_get_property(np, "unused", NULL) || !of_device_is_available(np))
2564 return -ENODEV; 2627 return -ENODEV;
2565 2628
2566 /* Find ourselves in the bootlist if we are there */ 2629 /* Find ourselves in the bootlist if we are there */
diff --git a/drivers/net/ibm_newemac/core.h b/drivers/net/ibm_newemac/core.h
index 4e74d8287c65..1683db9870a4 100644
--- a/drivers/net/ibm_newemac/core.h
+++ b/drivers/net/ibm_newemac/core.h
@@ -301,6 +301,14 @@ struct emac_instance {
301 * Set if we have new type STACR with STAOPC 301 * Set if we have new type STACR with STAOPC
302 */ 302 */
303#define EMAC_FTR_HAS_NEW_STACR 0x00000040 303#define EMAC_FTR_HAS_NEW_STACR 0x00000040
304/*
305 * Set if we need phy clock workaround for 440gx
306 */
307#define EMAC_FTR_440GX_PHY_CLK_FIX 0x00000080
308/*
309 * Set if we need phy clock workaround for 440ep or 440gr
310 */
311#define EMAC_FTR_440EP_PHY_CLK_FIX 0x00000100
304 312
305 313
306/* Right now, we don't quite handle the always/possible masks on the 314/* Right now, we don't quite handle the always/possible masks on the
@@ -312,8 +320,8 @@ enum {
312 320
313 EMAC_FTRS_POSSIBLE = 321 EMAC_FTRS_POSSIBLE =
314#ifdef CONFIG_IBM_NEW_EMAC_EMAC4 322#ifdef CONFIG_IBM_NEW_EMAC_EMAC4
315 EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR | 323 EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
316 EMAC_FTR_STACR_OC_INVERT | 324 EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX |
317#endif 325#endif
318#ifdef CONFIG_IBM_NEW_EMAC_TAH 326#ifdef CONFIG_IBM_NEW_EMAC_TAH
319 EMAC_FTR_HAS_TAH | 327 EMAC_FTR_HAS_TAH |
@@ -324,7 +332,7 @@ enum {
324#ifdef CONFIG_IBM_NEW_EMAC_RGMII 332#ifdef CONFIG_IBM_NEW_EMAC_RGMII
325 EMAC_FTR_HAS_RGMII | 333 EMAC_FTR_HAS_RGMII |
326#endif 334#endif
327 0, 335 EMAC_FTR_440EP_PHY_CLK_FIX,
328}; 336};
329 337
330static inline int emac_has_feature(struct emac_instance *dev, 338static inline int emac_has_feature(struct emac_instance *dev,
diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c
index 6869f08c9dcb..10c267b2b961 100644
--- a/drivers/net/ibm_newemac/mal.c
+++ b/drivers/net/ibm_newemac/mal.c
@@ -61,8 +61,8 @@ int __devinit mal_register_commac(struct mal_instance *mal,
61 return 0; 61 return 0;
62} 62}
63 63
64void __devexit mal_unregister_commac(struct mal_instance *mal, 64void mal_unregister_commac(struct mal_instance *mal,
65 struct mal_commac *commac) 65 struct mal_commac *commac)
66{ 66{
67 unsigned long flags; 67 unsigned long flags;
68 68
@@ -136,6 +136,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel)
136{ 136{
137 unsigned long flags; 137 unsigned long flags;
138 138
139 /*
140 * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
141 * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
142 * for the bitmask
143 */
144 if (!(channel % 8))
145 channel >>= 3;
146
139 spin_lock_irqsave(&mal->lock, flags); 147 spin_lock_irqsave(&mal->lock, flags);
140 148
141 MAL_DBG(mal, "enable_rx(%d)" NL, channel); 149 MAL_DBG(mal, "enable_rx(%d)" NL, channel);
@@ -148,6 +156,14 @@ void mal_enable_rx_channel(struct mal_instance *mal, int channel)
148 156
149void mal_disable_rx_channel(struct mal_instance *mal, int channel) 157void mal_disable_rx_channel(struct mal_instance *mal, int channel)
150{ 158{
159 /*
160 * On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
161 * of 8, but enabling in MAL_RXCASR needs the divided by 8 value
162 * for the bitmask
163 */
164 if (!(channel % 8))
165 channel >>= 3;
166
151 set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel)); 167 set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel));
152 168
153 MAL_DBG(mal, "disable_rx(%d)" NL, channel); 169 MAL_DBG(mal, "disable_rx(%d)" NL, channel);
diff --git a/drivers/net/ibm_newemac/rgmii.c b/drivers/net/ibm_newemac/rgmii.c
index 5757788227be..e32da3de2695 100644
--- a/drivers/net/ibm_newemac/rgmii.c
+++ b/drivers/net/ibm_newemac/rgmii.c
@@ -179,7 +179,7 @@ void rgmii_put_mdio(struct of_device *ofdev, int input)
179 mutex_unlock(&dev->lock); 179 mutex_unlock(&dev->lock);
180} 180}
181 181
182void __devexit rgmii_detach(struct of_device *ofdev, int input) 182void rgmii_detach(struct of_device *ofdev, int input)
183{ 183{
184 struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev); 184 struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
185 struct rgmii_regs __iomem *p = dev->base; 185 struct rgmii_regs __iomem *p = dev->base;
diff --git a/drivers/net/ibm_newemac/tah.c b/drivers/net/ibm_newemac/tah.c
index b023d10d7e1c..30173a9fb557 100644
--- a/drivers/net/ibm_newemac/tah.c
+++ b/drivers/net/ibm_newemac/tah.c
@@ -35,7 +35,7 @@ int __devinit tah_attach(struct of_device *ofdev, int channel)
35 return 0; 35 return 0;
36} 36}
37 37
38void __devexit tah_detach(struct of_device *ofdev, int channel) 38void tah_detach(struct of_device *ofdev, int channel)
39{ 39{
40 struct tah_instance *dev = dev_get_drvdata(&ofdev->dev); 40 struct tah_instance *dev = dev_get_drvdata(&ofdev->dev);
41 41
diff --git a/drivers/net/ibm_newemac/zmii.c b/drivers/net/ibm_newemac/zmii.c
index 2ea472aeab06..17b154124943 100644
--- a/drivers/net/ibm_newemac/zmii.c
+++ b/drivers/net/ibm_newemac/zmii.c
@@ -189,7 +189,7 @@ void zmii_set_speed(struct of_device *ofdev, int input, int speed)
189 mutex_unlock(&dev->lock); 189 mutex_unlock(&dev->lock);
190} 190}
191 191
192void __devexit zmii_detach(struct of_device *ofdev, int input) 192void zmii_detach(struct of_device *ofdev, int input)
193{ 193{
194 struct zmii_instance *dev = dev_get_drvdata(&ofdev->dev); 194 struct zmii_instance *dev = dev_get_drvdata(&ofdev->dev);
195 195
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index aaee02e9e3f0..ae398f04c7b4 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -871,6 +871,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
871 goto err_pci_reg; 871 goto err_pci_reg;
872 872
873 pci_set_master(pdev); 873 pci_set_master(pdev);
874 pci_save_state(pdev);
874 875
875 err = -ENOMEM; 876 err = -ENOMEM;
876 netdev = alloc_etherdev(sizeof(struct igb_adapter)); 877 netdev = alloc_etherdev(sizeof(struct igb_adapter));
@@ -4079,6 +4080,7 @@ static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4079 return PCI_ERS_RESULT_DISCONNECT; 4080 return PCI_ERS_RESULT_DISCONNECT;
4080 } 4081 }
4081 pci_set_master(pdev); 4082 pci_set_master(pdev);
4083 pci_restore_state(pdev);
4082 4084
4083 pci_enable_wake(pdev, PCI_D3hot, 0); 4085 pci_enable_wake(pdev, PCI_D3hot, 0);
4084 pci_enable_wake(pdev, PCI_D3cold, 0); 4086 pci_enable_wake(pdev, PCI_D3cold, 0);
diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c
index 9f584521304a..083b0dd70fef 100644
--- a/drivers/net/irda/ali-ircc.c
+++ b/drivers/net/irda/ali-ircc.c
@@ -60,6 +60,7 @@ static struct platform_driver ali_ircc_driver = {
60 .resume = ali_ircc_resume, 60 .resume = ali_ircc_resume,
61 .driver = { 61 .driver = {
62 .name = ALI_IRCC_DRIVER_NAME, 62 .name = ALI_IRCC_DRIVER_NAME,
63 .owner = THIS_MODULE,
63 }, 64 },
64}; 65};
65 66
@@ -2256,6 +2257,7 @@ static void FIR2SIR(int iobase)
2256MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); 2257MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>");
2257MODULE_DESCRIPTION("ALi FIR Controller Driver"); 2258MODULE_DESCRIPTION("ALi FIR Controller Driver");
2258MODULE_LICENSE("GPL"); 2259MODULE_LICENSE("GPL");
2260MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME);
2259 2261
2260 2262
2261module_param_array(io, int, NULL, 0); 2263module_param_array(io, int, NULL, 0);
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index 8db71ab20456..d5c2d27f3ea4 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -908,6 +908,7 @@ static int pxa_irda_remove(struct platform_device *_dev)
908static struct platform_driver pxa_ir_driver = { 908static struct platform_driver pxa_ir_driver = {
909 .driver = { 909 .driver = {
910 .name = "pxa2xx-ir", 910 .name = "pxa2xx-ir",
911 .owner = THIS_MODULE,
911 }, 912 },
912 .probe = pxa_irda_probe, 913 .probe = pxa_irda_probe,
913 .remove = pxa_irda_remove, 914 .remove = pxa_irda_remove,
@@ -929,3 +930,4 @@ module_init(pxa_irda_init);
929module_exit(pxa_irda_exit); 930module_exit(pxa_irda_exit);
930 931
931MODULE_LICENSE("GPL"); 932MODULE_LICENSE("GPL");
933MODULE_ALIAS("platform:pxa2xx-ir");
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index 056639f72bec..1bc8518f9197 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -1008,6 +1008,7 @@ static struct platform_driver sa1100ir_driver = {
1008 .resume = sa1100_irda_resume, 1008 .resume = sa1100_irda_resume,
1009 .driver = { 1009 .driver = {
1010 .name = "sa11x0-ir", 1010 .name = "sa11x0-ir",
1011 .owner = THIS_MODULE,
1011 }, 1012 },
1012}; 1013};
1013 1014
@@ -1041,3 +1042,4 @@ MODULE_LICENSE("GPL");
1041MODULE_PARM_DESC(power_level, "IrDA power level, 1 (low) to 3 (high)"); 1042MODULE_PARM_DESC(power_level, "IrDA power level, 1 (low) to 3 (high)");
1042MODULE_PARM_DESC(tx_lpm, "Enable transmitter low power (1.6us) mode"); 1043MODULE_PARM_DESC(tx_lpm, "Enable transmitter low power (1.6us) mode");
1043MODULE_PARM_DESC(max_rate, "Maximum baud rate (4000000, 115200, 57600, 38400, 19200, 9600)"); 1044MODULE_PARM_DESC(max_rate, "Maximum baud rate (4000000, 115200, 57600, 38400, 19200, 9600)");
1045MODULE_ALIAS("platform:sa11x0-ir");
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index cb371a8c24a7..7b859220c255 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3431,6 +3431,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
3431 } 3431 }
3432 3432
3433 pci_set_master(pdev); 3433 pci_set_master(pdev);
3434 pci_save_state(pdev);
3434 3435
3435#ifdef CONFIG_NETDEVICES_MULTIQUEUE 3436#ifdef CONFIG_NETDEVICES_MULTIQUEUE
3436 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES); 3437 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
@@ -3721,6 +3722,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3721 return PCI_ERS_RESULT_DISCONNECT; 3722 return PCI_ERS_RESULT_DISCONNECT;
3722 } 3723 }
3723 pci_set_master(pdev); 3724 pci_set_master(pdev);
3725 pci_restore_state(pdev);
3724 3726
3725 pci_enable_wake(pdev, PCI_D3hot, 0); 3727 pci_enable_wake(pdev, PCI_D3hot, 0);
3726 pci_enable_wake(pdev, PCI_D3cold, 0); 3728 pci_enable_wake(pdev, PCI_D3cold, 0);
diff --git a/drivers/net/jazzsonic.c b/drivers/net/jazzsonic.c
index 5c154fe13859..07944820f745 100644
--- a/drivers/net/jazzsonic.c
+++ b/drivers/net/jazzsonic.c
@@ -249,6 +249,7 @@ out:
249MODULE_DESCRIPTION("Jazz SONIC ethernet driver"); 249MODULE_DESCRIPTION("Jazz SONIC ethernet driver");
250module_param(sonic_debug, int, 0); 250module_param(sonic_debug, int, 0);
251MODULE_PARM_DESC(sonic_debug, "jazzsonic debug level (1-4)"); 251MODULE_PARM_DESC(sonic_debug, "jazzsonic debug level (1-4)");
252MODULE_ALIAS("platform:jazzsonic");
252 253
253#include "sonic.c" 254#include "sonic.c"
254 255
@@ -271,6 +272,7 @@ static struct platform_driver jazz_sonic_driver = {
271 .remove = __devexit_p(jazz_sonic_device_remove), 272 .remove = __devexit_p(jazz_sonic_device_remove),
272 .driver = { 273 .driver = {
273 .name = jazz_sonic_string, 274 .name = jazz_sonic_string,
275 .owner = THIS_MODULE,
274 }, 276 },
275}; 277};
276 278
diff --git a/drivers/net/korina.c b/drivers/net/korina.c
index 1d24a73a0e1a..e18576316bda 100644
--- a/drivers/net/korina.c
+++ b/drivers/net/korina.c
@@ -883,7 +883,7 @@ static int korina_init(struct net_device *dev)
883static int korina_restart(struct net_device *dev) 883static int korina_restart(struct net_device *dev)
884{ 884{
885 struct korina_private *lp = netdev_priv(dev); 885 struct korina_private *lp = netdev_priv(dev);
886 int ret = 0; 886 int ret;
887 887
888 /* 888 /*
889 * Disable interrupts 889 * Disable interrupts
@@ -987,7 +987,7 @@ static void korina_poll_controller(struct net_device *dev)
987static int korina_open(struct net_device *dev) 987static int korina_open(struct net_device *dev)
988{ 988{
989 struct korina_private *lp = netdev_priv(dev); 989 struct korina_private *lp = netdev_priv(dev);
990 int ret = 0; 990 int ret;
991 991
992 /* Initialize */ 992 /* Initialize */
993 ret = korina_init(dev); 993 ret = korina_init(dev);
@@ -1031,6 +1031,8 @@ static int korina_open(struct net_device *dev)
1031 dev->name, lp->und_irq); 1031 dev->name, lp->und_irq);
1032 goto err_free_ovr_irq; 1032 goto err_free_ovr_irq;
1033 } 1033 }
1034out:
1035 return ret;
1034 1036
1035err_free_ovr_irq: 1037err_free_ovr_irq:
1036 free_irq(lp->ovr_irq, dev); 1038 free_irq(lp->ovr_irq, dev);
@@ -1041,8 +1043,6 @@ err_free_rx_irq:
1041err_release: 1043err_release:
1042 korina_free_ring(dev); 1044 korina_free_ring(dev);
1043 goto out; 1045 goto out;
1044out:
1045 return ret;
1046} 1046}
1047 1047
1048static int korina_close(struct net_device *dev) 1048static int korina_close(struct net_device *dev)
@@ -1082,7 +1082,7 @@ static int korina_probe(struct platform_device *pdev)
1082 struct korina_private *lp; 1082 struct korina_private *lp;
1083 struct net_device *dev; 1083 struct net_device *dev;
1084 struct resource *r; 1084 struct resource *r;
1085 int retval, err; 1085 int rc;
1086 1086
1087 dev = alloc_etherdev(sizeof(struct korina_private)); 1087 dev = alloc_etherdev(sizeof(struct korina_private));
1088 if (!dev) { 1088 if (!dev) {
@@ -1106,7 +1106,7 @@ static int korina_probe(struct platform_device *pdev)
1106 lp->eth_regs = ioremap_nocache(r->start, r->end - r->start); 1106 lp->eth_regs = ioremap_nocache(r->start, r->end - r->start);
1107 if (!lp->eth_regs) { 1107 if (!lp->eth_regs) {
1108 printk(KERN_ERR DRV_NAME "cannot remap registers\n"); 1108 printk(KERN_ERR DRV_NAME "cannot remap registers\n");
1109 retval = -ENXIO; 1109 rc = -ENXIO;
1110 goto probe_err_out; 1110 goto probe_err_out;
1111 } 1111 }
1112 1112
@@ -1114,7 +1114,7 @@ static int korina_probe(struct platform_device *pdev)
1114 lp->rx_dma_regs = ioremap_nocache(r->start, r->end - r->start); 1114 lp->rx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1115 if (!lp->rx_dma_regs) { 1115 if (!lp->rx_dma_regs) {
1116 printk(KERN_ERR DRV_NAME "cannot remap Rx DMA registers\n"); 1116 printk(KERN_ERR DRV_NAME "cannot remap Rx DMA registers\n");
1117 retval = -ENXIO; 1117 rc = -ENXIO;
1118 goto probe_err_dma_rx; 1118 goto probe_err_dma_rx;
1119 } 1119 }
1120 1120
@@ -1122,14 +1122,14 @@ static int korina_probe(struct platform_device *pdev)
1122 lp->tx_dma_regs = ioremap_nocache(r->start, r->end - r->start); 1122 lp->tx_dma_regs = ioremap_nocache(r->start, r->end - r->start);
1123 if (!lp->tx_dma_regs) { 1123 if (!lp->tx_dma_regs) {
1124 printk(KERN_ERR DRV_NAME "cannot remap Tx DMA registers\n"); 1124 printk(KERN_ERR DRV_NAME "cannot remap Tx DMA registers\n");
1125 retval = -ENXIO; 1125 rc = -ENXIO;
1126 goto probe_err_dma_tx; 1126 goto probe_err_dma_tx;
1127 } 1127 }
1128 1128
1129 lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL); 1129 lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL);
1130 if (!lp->td_ring) { 1130 if (!lp->td_ring) {
1131 printk(KERN_ERR DRV_NAME "cannot allocate descriptors\n"); 1131 printk(KERN_ERR DRV_NAME "cannot allocate descriptors\n");
1132 retval = -ENOMEM; 1132 rc = -ENXIO;
1133 goto probe_err_td_ring; 1133 goto probe_err_td_ring;
1134 } 1134 }
1135 1135
@@ -1166,14 +1166,14 @@ static int korina_probe(struct platform_device *pdev)
1166 lp->mii_if.phy_id_mask = 0x1f; 1166 lp->mii_if.phy_id_mask = 0x1f;
1167 lp->mii_if.reg_num_mask = 0x1f; 1167 lp->mii_if.reg_num_mask = 0x1f;
1168 1168
1169 err = register_netdev(dev); 1169 rc = register_netdev(dev);
1170 if (err) { 1170 if (rc < 0) {
1171 printk(KERN_ERR DRV_NAME 1171 printk(KERN_ERR DRV_NAME
1172 ": cannot register net device %d\n", err); 1172 ": cannot register net device %d\n", rc);
1173 retval = -EINVAL;
1174 goto probe_err_register; 1173 goto probe_err_register;
1175 } 1174 }
1176 return 0; 1175out:
1176 return rc;
1177 1177
1178probe_err_register: 1178probe_err_register:
1179 kfree(lp->td_ring); 1179 kfree(lp->td_ring);
@@ -1185,7 +1185,7 @@ probe_err_dma_rx:
1185 iounmap(lp->eth_regs); 1185 iounmap(lp->eth_regs);
1186probe_err_out: 1186probe_err_out:
1187 free_netdev(dev); 1187 free_netdev(dev);
1188 return retval; 1188 goto out;
1189} 1189}
1190 1190
1191static int korina_remove(struct platform_device *pdev) 1191static int korina_remove(struct platform_device *pdev)
@@ -1193,12 +1193,9 @@ static int korina_remove(struct platform_device *pdev)
1193 struct korina_device *bif = platform_get_drvdata(pdev); 1193 struct korina_device *bif = platform_get_drvdata(pdev);
1194 struct korina_private *lp = netdev_priv(bif->dev); 1194 struct korina_private *lp = netdev_priv(bif->dev);
1195 1195
1196 if (lp->eth_regs) 1196 iounmap(lp->eth_regs);
1197 iounmap(lp->eth_regs); 1197 iounmap(lp->rx_dma_regs);
1198 if (lp->rx_dma_regs) 1198 iounmap(lp->tx_dma_regs);
1199 iounmap(lp->rx_dma_regs);
1200 if (lp->tx_dma_regs)
1201 iounmap(lp->tx_dma_regs);
1202 1199
1203 platform_set_drvdata(pdev, NULL); 1200 platform_set_drvdata(pdev, NULL);
1204 unregister_netdev(bif->dev); 1201 unregister_netdev(bif->dev);
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index d513bb8a4902..92dccd43bdca 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -1281,6 +1281,7 @@ static struct platform_driver macb_driver = {
1281 .remove = __exit_p(macb_remove), 1281 .remove = __exit_p(macb_remove),
1282 .driver = { 1282 .driver = {
1283 .name = "macb", 1283 .name = "macb",
1284 .owner = THIS_MODULE,
1284 }, 1285 },
1285}; 1286};
1286 1287
@@ -1300,3 +1301,4 @@ module_exit(macb_exit);
1300MODULE_LICENSE("GPL"); 1301MODULE_LICENSE("GPL");
1301MODULE_DESCRIPTION("Atmel MACB Ethernet driver"); 1302MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1302MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); 1303MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1304MODULE_ALIAS("platform:macb");
diff --git a/drivers/net/meth.c b/drivers/net/meth.c
index cdaa8fc21809..0b32648a2136 100644
--- a/drivers/net/meth.c
+++ b/drivers/net/meth.c
@@ -830,6 +830,7 @@ static struct platform_driver meth_driver = {
830 .remove = __devexit_p(meth_remove), 830 .remove = __devexit_p(meth_remove),
831 .driver = { 831 .driver = {
832 .name = "meth", 832 .name = "meth",
833 .owner = THIS_MODULE,
833 } 834 }
834}; 835};
835 836
@@ -855,3 +856,4 @@ module_exit(meth_exit_module);
855MODULE_AUTHOR("Ilya Volynets <ilya@theIlya.com>"); 856MODULE_AUTHOR("Ilya Volynets <ilya@theIlya.com>");
856MODULE_DESCRIPTION("SGI O2 Builtin Fast Ethernet driver"); 857MODULE_DESCRIPTION("SGI O2 Builtin Fast Ethernet driver");
857MODULE_LICENSE("GPL"); 858MODULE_LICENSE("GPL");
859MODULE_ALIAS("platform:meth");
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 601ffd69ebc8..381b36e5f64c 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -2030,6 +2030,7 @@ static struct platform_driver mv643xx_eth_driver = {
2030 .shutdown = mv643xx_eth_shutdown, 2030 .shutdown = mv643xx_eth_shutdown,
2031 .driver = { 2031 .driver = {
2032 .name = MV643XX_ETH_NAME, 2032 .name = MV643XX_ETH_NAME,
2033 .owner = THIS_MODULE,
2033 }, 2034 },
2034}; 2035};
2035 2036
@@ -2038,6 +2039,7 @@ static struct platform_driver mv643xx_eth_shared_driver = {
2038 .remove = mv643xx_eth_shared_remove, 2039 .remove = mv643xx_eth_shared_remove,
2039 .driver = { 2040 .driver = {
2040 .name = MV643XX_ETH_SHARED_NAME, 2041 .name = MV643XX_ETH_SHARED_NAME,
2042 .owner = THIS_MODULE,
2041 }, 2043 },
2042}; 2044};
2043 2045
@@ -2085,7 +2087,8 @@ MODULE_LICENSE("GPL");
2085MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani" 2087MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
2086 " and Dale Farnsworth"); 2088 " and Dale Farnsworth");
2087MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX"); 2089MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
2088MODULE_ALIAS("platform:mv643xx_eth"); 2090MODULE_ALIAS("platform:" MV643XX_ETH_NAME);
2091MODULE_ALIAS("platform:" MV643XX_ETH_SHARED_NAME);
2089 2092
2090/* 2093/*
2091 * The second part is the low level driver of the gigE ethernet ports. 2094 * The second part is the low level driver of the gigE ethernet ports.
diff --git a/drivers/net/netx-eth.c b/drivers/net/netx-eth.c
index 78d34af13a1c..dc442e370850 100644
--- a/drivers/net/netx-eth.c
+++ b/drivers/net/netx-eth.c
@@ -502,4 +502,4 @@ module_exit(netx_eth_cleanup);
502 502
503MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 503MODULE_AUTHOR("Sascha Hauer, Pengutronix");
504MODULE_LICENSE("GPL"); 504MODULE_LICENSE("GPL");
505 505MODULE_ALIAS("platform:" CARDNAME);
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 05748ca6f216..af7356468251 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -1132,8 +1132,8 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
1132 u32 fw_minor = 0; 1132 u32 fw_minor = 0;
1133 u32 fw_build = 0; 1133 u32 fw_build = 0;
1134 char brd_name[NETXEN_MAX_SHORT_NAME]; 1134 char brd_name[NETXEN_MAX_SHORT_NAME];
1135 struct netxen_new_user_info user_info; 1135 char serial_num[32];
1136 int i, addr = NETXEN_USER_START; 1136 int i, addr;
1137 __le32 *ptr32; 1137 __le32 *ptr32;
1138 1138
1139 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); 1139 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
@@ -1150,10 +1150,10 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
1150 valid = 0; 1150 valid = 0;
1151 } 1151 }
1152 if (valid) { 1152 if (valid) {
1153 ptr32 = (u32 *) & user_info; 1153 ptr32 = (u32 *)&serial_num;
1154 for (i = 0; 1154 addr = NETXEN_USER_START +
1155 i < sizeof(struct netxen_new_user_info) / sizeof(u32); 1155 offsetof(struct netxen_new_user_info, serial_num);
1156 i++) { 1156 for (i = 0; i < 8; i++) {
1157 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) { 1157 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
1158 printk("%s: ERROR reading %s board userarea.\n", 1158 printk("%s: ERROR reading %s board userarea.\n",
1159 netxen_nic_driver_name, 1159 netxen_nic_driver_name,
@@ -1163,10 +1163,11 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
1163 ptr32++; 1163 ptr32++;
1164 addr += sizeof(u32); 1164 addr += sizeof(u32);
1165 } 1165 }
1166
1166 get_brd_name_by_type(board_info->board_type, brd_name); 1167 get_brd_name_by_type(board_info->board_type, brd_name);
1167 1168
1168 printk("NetXen %s Board S/N %s Chip id 0x%x\n", 1169 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
1169 brd_name, user_info.serial_num, board_info->chip_id); 1170 brd_name, serial_num, board_info->chip_id);
1170 1171
1171 printk("NetXen %s Board #%d, Chip id 0x%x\n", 1172 printk("NetXen %s Board #%d, Chip id 0x%x\n",
1172 board_info->board_type == 0x0b ? "XGB" : "GBE", 1173 board_info->board_type == 0x0b ? "XGB" : "GBE",
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index 7565c2d7f30e..4009c4ce96b4 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -33,8 +33,8 @@
33 33
34#define DRV_MODULE_NAME "niu" 34#define DRV_MODULE_NAME "niu"
35#define PFX DRV_MODULE_NAME ": " 35#define PFX DRV_MODULE_NAME ": "
36#define DRV_MODULE_VERSION "0.7" 36#define DRV_MODULE_VERSION "0.8"
37#define DRV_MODULE_RELDATE "February 18, 2008" 37#define DRV_MODULE_RELDATE "April 24, 2008"
38 38
39static char version[] __devinitdata = 39static char version[] __devinitdata =
40 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; 40 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
@@ -673,11 +673,16 @@ static int serdes_init_10g(struct niu *np)
673 } 673 }
674 674
675 if ((sig & mask) != val) { 675 if ((sig & mask) != val) {
676 if (np->flags & NIU_FLAGS_HOTPLUG_PHY) {
677 np->flags &= ~NIU_FLAGS_HOTPLUG_PHY_PRESENT;
678 return 0;
679 }
676 dev_err(np->device, PFX "Port %u signal bits [%08x] are not " 680 dev_err(np->device, PFX "Port %u signal bits [%08x] are not "
677 "[%08x]\n", np->port, (int) (sig & mask), (int) val); 681 "[%08x]\n", np->port, (int) (sig & mask), (int) val);
678 return -ENODEV; 682 return -ENODEV;
679 } 683 }
680 684 if (np->flags & NIU_FLAGS_HOTPLUG_PHY)
685 np->flags |= NIU_FLAGS_HOTPLUG_PHY_PRESENT;
681 return 0; 686 return 0;
682} 687}
683 688
@@ -998,6 +1003,28 @@ static int bcm8704_user_dev3_readback(struct niu *np, int reg)
998 return 0; 1003 return 0;
999} 1004}
1000 1005
1006static int bcm8706_init_user_dev3(struct niu *np)
1007{
1008 int err;
1009
1010
1011 err = mdio_read(np, np->phy_addr, BCM8704_USER_DEV3_ADDR,
1012 BCM8704_USER_OPT_DIGITAL_CTRL);
1013 if (err < 0)
1014 return err;
1015 err &= ~USER_ODIG_CTRL_GPIOS;
1016 err |= (0x3 << USER_ODIG_CTRL_GPIOS_SHIFT);
1017 err |= USER_ODIG_CTRL_RESV2;
1018 err = mdio_write(np, np->phy_addr, BCM8704_USER_DEV3_ADDR,
1019 BCM8704_USER_OPT_DIGITAL_CTRL, err);
1020 if (err)
1021 return err;
1022
1023 mdelay(1000);
1024
1025 return 0;
1026}
1027
1001static int bcm8704_init_user_dev3(struct niu *np) 1028static int bcm8704_init_user_dev3(struct niu *np)
1002{ 1029{
1003 int err; 1030 int err;
@@ -1127,33 +1154,11 @@ static int xcvr_init_10g_mrvl88x2011(struct niu *np)
1127 MRVL88X2011_10G_PMD_TX_DIS, MRVL88X2011_ENA_PMDTX); 1154 MRVL88X2011_10G_PMD_TX_DIS, MRVL88X2011_ENA_PMDTX);
1128} 1155}
1129 1156
1130static int xcvr_init_10g_bcm8704(struct niu *np) 1157
1158static int xcvr_diag_bcm870x(struct niu *np)
1131{ 1159{
1132 struct niu_link_config *lp = &np->link_config;
1133 u16 analog_stat0, tx_alarm_status; 1160 u16 analog_stat0, tx_alarm_status;
1134 int err; 1161 int err = 0;
1135
1136 err = bcm8704_reset(np);
1137 if (err)
1138 return err;
1139
1140 err = bcm8704_init_user_dev3(np);
1141 if (err)
1142 return err;
1143
1144 err = mdio_read(np, np->phy_addr, BCM8704_PCS_DEV_ADDR,
1145 MII_BMCR);
1146 if (err < 0)
1147 return err;
1148 err &= ~BMCR_LOOPBACK;
1149
1150 if (lp->loopback_mode == LOOPBACK_MAC)
1151 err |= BMCR_LOOPBACK;
1152
1153 err = mdio_write(np, np->phy_addr, BCM8704_PCS_DEV_ADDR,
1154 MII_BMCR, err);
1155 if (err)
1156 return err;
1157 1162
1158#if 1 1163#if 1
1159 err = mdio_read(np, np->phy_addr, BCM8704_PMA_PMD_DEV_ADDR, 1164 err = mdio_read(np, np->phy_addr, BCM8704_PMA_PMD_DEV_ADDR,
@@ -1211,6 +1216,89 @@ static int xcvr_init_10g_bcm8704(struct niu *np)
1211 return 0; 1216 return 0;
1212} 1217}
1213 1218
1219static int xcvr_10g_set_lb_bcm870x(struct niu *np)
1220{
1221 struct niu_link_config *lp = &np->link_config;
1222 int err;
1223
1224 err = mdio_read(np, np->phy_addr, BCM8704_PCS_DEV_ADDR,
1225 MII_BMCR);
1226 if (err < 0)
1227 return err;
1228
1229 err &= ~BMCR_LOOPBACK;
1230
1231 if (lp->loopback_mode == LOOPBACK_MAC)
1232 err |= BMCR_LOOPBACK;
1233
1234 err = mdio_write(np, np->phy_addr, BCM8704_PCS_DEV_ADDR,
1235 MII_BMCR, err);
1236 if (err)
1237 return err;
1238
1239 return 0;
1240}
1241
1242static int xcvr_init_10g_bcm8706(struct niu *np)
1243{
1244 int err = 0;
1245 u64 val;
1246
1247 if ((np->flags & NIU_FLAGS_HOTPLUG_PHY) &&
1248 (np->flags & NIU_FLAGS_HOTPLUG_PHY_PRESENT) == 0)
1249 return err;
1250
1251 val = nr64_mac(XMAC_CONFIG);
1252 val &= ~XMAC_CONFIG_LED_POLARITY;
1253 val |= XMAC_CONFIG_FORCE_LED_ON;
1254 nw64_mac(XMAC_CONFIG, val);
1255
1256 val = nr64(MIF_CONFIG);
1257 val |= MIF_CONFIG_INDIRECT_MODE;
1258 nw64(MIF_CONFIG, val);
1259
1260 err = bcm8704_reset(np);
1261 if (err)
1262 return err;
1263
1264 err = xcvr_10g_set_lb_bcm870x(np);
1265 if (err)
1266 return err;
1267
1268 err = bcm8706_init_user_dev3(np);
1269 if (err)
1270 return err;
1271
1272 err = xcvr_diag_bcm870x(np);
1273 if (err)
1274 return err;
1275
1276 return 0;
1277}
1278
1279static int xcvr_init_10g_bcm8704(struct niu *np)
1280{
1281 int err;
1282
1283 err = bcm8704_reset(np);
1284 if (err)
1285 return err;
1286
1287 err = bcm8704_init_user_dev3(np);
1288 if (err)
1289 return err;
1290
1291 err = xcvr_10g_set_lb_bcm870x(np);
1292 if (err)
1293 return err;
1294
1295 err = xcvr_diag_bcm870x(np);
1296 if (err)
1297 return err;
1298
1299 return 0;
1300}
1301
1214static int xcvr_init_10g(struct niu *np) 1302static int xcvr_init_10g(struct niu *np)
1215{ 1303{
1216 int phy_id, err; 1304 int phy_id, err;
@@ -1548,6 +1636,59 @@ out:
1548 return err; 1636 return err;
1549} 1637}
1550 1638
1639static int link_status_10g_bcm8706(struct niu *np, int *link_up_p)
1640{
1641 int err, link_up;
1642 link_up = 0;
1643
1644 err = mdio_read(np, np->phy_addr, BCM8704_PMA_PMD_DEV_ADDR,
1645 BCM8704_PMD_RCV_SIGDET);
1646 if (err < 0)
1647 goto out;
1648 if (!(err & PMD_RCV_SIGDET_GLOBAL)) {
1649 err = 0;
1650 goto out;
1651 }
1652
1653 err = mdio_read(np, np->phy_addr, BCM8704_PCS_DEV_ADDR,
1654 BCM8704_PCS_10G_R_STATUS);
1655 if (err < 0)
1656 goto out;
1657
1658 if (!(err & PCS_10G_R_STATUS_BLK_LOCK)) {
1659 err = 0;
1660 goto out;
1661 }
1662
1663 err = mdio_read(np, np->phy_addr, BCM8704_PHYXS_DEV_ADDR,
1664 BCM8704_PHYXS_XGXS_LANE_STAT);
1665 if (err < 0)
1666 goto out;
1667 if (err != (PHYXS_XGXS_LANE_STAT_ALINGED |
1668 PHYXS_XGXS_LANE_STAT_MAGIC |
1669 PHYXS_XGXS_LANE_STAT_PATTEST |
1670 PHYXS_XGXS_LANE_STAT_LANE3 |
1671 PHYXS_XGXS_LANE_STAT_LANE2 |
1672 PHYXS_XGXS_LANE_STAT_LANE1 |
1673 PHYXS_XGXS_LANE_STAT_LANE0)) {
1674 err = 0;
1675 np->link_config.active_speed = SPEED_INVALID;
1676 np->link_config.active_duplex = DUPLEX_INVALID;
1677 goto out;
1678 }
1679
1680 link_up = 1;
1681 np->link_config.active_speed = SPEED_10000;
1682 np->link_config.active_duplex = DUPLEX_FULL;
1683 err = 0;
1684
1685out:
1686 *link_up_p = link_up;
1687 if (np->flags & NIU_FLAGS_HOTPLUG_PHY)
1688 err = 0;
1689 return err;
1690}
1691
1551static int link_status_10g_bcom(struct niu *np, int *link_up_p) 1692static int link_status_10g_bcom(struct niu *np, int *link_up_p)
1552{ 1693{
1553 int err, link_up; 1694 int err, link_up;
@@ -1627,6 +1768,82 @@ static int link_status_10g(struct niu *np, int *link_up_p)
1627 return err; 1768 return err;
1628} 1769}
1629 1770
1771static int niu_10g_phy_present(struct niu *np)
1772{
1773 u64 sig, mask, val;
1774
1775 sig = nr64(ESR_INT_SIGNALS);
1776 switch (np->port) {
1777 case 0:
1778 mask = ESR_INT_SIGNALS_P0_BITS;
1779 val = (ESR_INT_SRDY0_P0 |
1780 ESR_INT_DET0_P0 |
1781 ESR_INT_XSRDY_P0 |
1782 ESR_INT_XDP_P0_CH3 |
1783 ESR_INT_XDP_P0_CH2 |
1784 ESR_INT_XDP_P0_CH1 |
1785 ESR_INT_XDP_P0_CH0);
1786 break;
1787
1788 case 1:
1789 mask = ESR_INT_SIGNALS_P1_BITS;
1790 val = (ESR_INT_SRDY0_P1 |
1791 ESR_INT_DET0_P1 |
1792 ESR_INT_XSRDY_P1 |
1793 ESR_INT_XDP_P1_CH3 |
1794 ESR_INT_XDP_P1_CH2 |
1795 ESR_INT_XDP_P1_CH1 |
1796 ESR_INT_XDP_P1_CH0);
1797 break;
1798
1799 default:
1800 return 0;
1801 }
1802
1803 if ((sig & mask) != val)
1804 return 0;
1805 return 1;
1806}
1807
1808static int link_status_10g_hotplug(struct niu *np, int *link_up_p)
1809{
1810 unsigned long flags;
1811 int err = 0;
1812 int phy_present;
1813 int phy_present_prev;
1814
1815 spin_lock_irqsave(&np->lock, flags);
1816
1817 if (np->link_config.loopback_mode == LOOPBACK_DISABLED) {
1818 phy_present_prev = (np->flags & NIU_FLAGS_HOTPLUG_PHY_PRESENT) ?
1819 1 : 0;
1820 phy_present = niu_10g_phy_present(np);
1821 if (phy_present != phy_present_prev) {
1822 /* state change */
1823 if (phy_present) {
1824 np->flags |= NIU_FLAGS_HOTPLUG_PHY_PRESENT;
1825 if (np->phy_ops->xcvr_init)
1826 err = np->phy_ops->xcvr_init(np);
1827 if (err) {
1828 /* debounce */
1829 np->flags &= ~NIU_FLAGS_HOTPLUG_PHY_PRESENT;
1830 }
1831 } else {
1832 np->flags &= ~NIU_FLAGS_HOTPLUG_PHY_PRESENT;
1833 *link_up_p = 0;
1834 niuwarn(LINK, "%s: Hotplug PHY Removed\n",
1835 np->dev->name);
1836 }
1837 }
1838 if (np->flags & NIU_FLAGS_HOTPLUG_PHY_PRESENT)
1839 err = link_status_10g_bcm8706(np, link_up_p);
1840 }
1841
1842 spin_unlock_irqrestore(&np->lock, flags);
1843
1844 return err;
1845}
1846
1630static int link_status_1g(struct niu *np, int *link_up_p) 1847static int link_status_1g(struct niu *np, int *link_up_p)
1631{ 1848{
1632 struct niu_link_config *lp = &np->link_config; 1849 struct niu_link_config *lp = &np->link_config;
@@ -1761,6 +1978,12 @@ static const struct niu_phy_ops phy_ops_10g_fiber = {
1761 .link_status = link_status_10g, 1978 .link_status = link_status_10g,
1762}; 1979};
1763 1980
1981static const struct niu_phy_ops phy_ops_10g_fiber_hotplug = {
1982 .serdes_init = serdes_init_10g,
1983 .xcvr_init = xcvr_init_10g_bcm8706,
1984 .link_status = link_status_10g_hotplug,
1985};
1986
1764static const struct niu_phy_ops phy_ops_10g_copper = { 1987static const struct niu_phy_ops phy_ops_10g_copper = {
1765 .serdes_init = serdes_init_10g, 1988 .serdes_init = serdes_init_10g,
1766 .link_status = link_status_10g, /* XXX */ 1989 .link_status = link_status_10g, /* XXX */
@@ -1792,6 +2015,11 @@ static const struct niu_phy_template phy_template_10g_fiber = {
1792 .phy_addr_base = 8, 2015 .phy_addr_base = 8,
1793}; 2016};
1794 2017
2018static const struct niu_phy_template phy_template_10g_fiber_hotplug = {
2019 .ops = &phy_ops_10g_fiber_hotplug,
2020 .phy_addr_base = 8,
2021};
2022
1795static const struct niu_phy_template phy_template_10g_copper = { 2023static const struct niu_phy_template phy_template_10g_copper = {
1796 .ops = &phy_ops_10g_copper, 2024 .ops = &phy_ops_10g_copper,
1797 .phy_addr_base = 10, 2025 .phy_addr_base = 10,
@@ -1996,6 +2224,13 @@ static int niu_determine_phy_disposition(struct niu *np)
1996 plat_type == PLAT_TYPE_VF_P1) 2224 plat_type == PLAT_TYPE_VF_P1)
1997 phy_addr_off = 8; 2225 phy_addr_off = 8;
1998 phy_addr_off += np->port; 2226 phy_addr_off += np->port;
2227 if (np->flags & NIU_FLAGS_HOTPLUG_PHY) {
2228 tp = &phy_template_10g_fiber_hotplug;
2229 if (np->port == 0)
2230 phy_addr_off = 8;
2231 if (np->port == 1)
2232 phy_addr_off = 12;
2233 }
1999 break; 2234 break;
2000 2235
2001 case NIU_FLAGS_10G | NIU_FLAGS_XCVR_SERDES: 2236 case NIU_FLAGS_10G | NIU_FLAGS_XCVR_SERDES:
@@ -6773,6 +7008,37 @@ static int __devinit niu_phy_type_prop_decode(struct niu *np,
6773 return 0; 7008 return 0;
6774} 7009}
6775 7010
7011/* niu board models have a trailing dash version incremented
7012 * with HW rev change. Need to ingnore the dash version while
7013 * checking for match
7014 *
7015 * for example, for the 10G card the current vpd.board_model
7016 * is 501-5283-04, of which -04 is the dash version and have
7017 * to be ignored
7018 */
7019static int niu_board_model_match(struct niu *np, const char *model)
7020{
7021 return !strncmp(np->vpd.board_model, model, strlen(model));
7022}
7023
7024static int niu_pci_vpd_get_nports(struct niu *np)
7025{
7026 int ports = 0;
7027
7028 if ((niu_board_model_match(np, NIU_QGC_LP_BM_STR)) ||
7029 (niu_board_model_match(np, NIU_QGC_PEM_BM_STR)) ||
7030 (niu_board_model_match(np, NIU_ALONSO_BM_STR))) {
7031 ports = 4;
7032 } else if ((niu_board_model_match(np, NIU_2XGF_LP_BM_STR)) ||
7033 (niu_board_model_match(np, NIU_2XGF_PEM_BM_STR)) ||
7034 (niu_board_model_match(np, NIU_FOXXY_BM_STR)) ||
7035 (niu_board_model_match(np, NIU_2XGF_MRVL_BM_STR))) {
7036 ports = 2;
7037 }
7038
7039 return ports;
7040}
7041
6776static void __devinit niu_pci_vpd_validate(struct niu *np) 7042static void __devinit niu_pci_vpd_validate(struct niu *np)
6777{ 7043{
6778 struct net_device *dev = np->dev; 7044 struct net_device *dev = np->dev;
@@ -6799,6 +7065,9 @@ static void __devinit niu_pci_vpd_validate(struct niu *np)
6799 } 7065 }
6800 if (np->flags & NIU_FLAGS_10G) 7066 if (np->flags & NIU_FLAGS_10G)
6801 np->mac_xcvr = MAC_XCVR_XPCS; 7067 np->mac_xcvr = MAC_XCVR_XPCS;
7068 } else if (niu_board_model_match(np, NIU_FOXXY_BM_STR)) {
7069 np->flags |= (NIU_FLAGS_10G | NIU_FLAGS_FIBER |
7070 NIU_FLAGS_HOTPLUG_PHY);
6802 } else if (niu_phy_type_prop_decode(np, np->vpd.phy_type)) { 7071 } else if (niu_phy_type_prop_decode(np, np->vpd.phy_type)) {
6803 dev_err(np->device, PFX "Illegal phy string [%s].\n", 7072 dev_err(np->device, PFX "Illegal phy string [%s].\n",
6804 np->vpd.phy_type); 7073 np->vpd.phy_type);
@@ -6987,11 +7256,17 @@ static int __devinit niu_get_and_validate_port(struct niu *np)
6987 if (parent->plat_type == PLAT_TYPE_NIU) { 7256 if (parent->plat_type == PLAT_TYPE_NIU) {
6988 parent->num_ports = 2; 7257 parent->num_ports = 2;
6989 } else { 7258 } else {
6990 parent->num_ports = nr64(ESPC_NUM_PORTS_MACS) & 7259 parent->num_ports = niu_pci_vpd_get_nports(np);
6991 ESPC_NUM_PORTS_MACS_VAL; 7260 if (!parent->num_ports) {
6992 7261 /* Fall back to SPROM as last resort.
6993 if (!parent->num_ports) 7262 * This will fail on most cards.
6994 parent->num_ports = 4; 7263 */
7264 parent->num_ports = nr64(ESPC_NUM_PORTS_MACS) &
7265 ESPC_NUM_PORTS_MACS_VAL;
7266
7267 if (!parent->num_ports)
7268 return -ENODEV;
7269 }
6995 } 7270 }
6996 } 7271 }
6997 7272
@@ -7015,7 +7290,8 @@ static int __devinit phy_record(struct niu_parent *parent,
7015 return 0; 7290 return 0;
7016 if (type == PHY_TYPE_PMA_PMD || type == PHY_TYPE_PCS) { 7291 if (type == PHY_TYPE_PMA_PMD || type == PHY_TYPE_PCS) {
7017 if (((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_BCM8704) && 7292 if (((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_BCM8704) &&
7018 ((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_MRVL88X2011)) 7293 ((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_MRVL88X2011) &&
7294 ((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_BCM8706))
7019 return 0; 7295 return 0;
7020 } else { 7296 } else {
7021 if ((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_BCM5464R) 7297 if ((id & NIU_PHY_ID_MASK) != NIU_PHY_ID_BCM5464R)
@@ -7262,7 +7538,6 @@ static int __devinit walk_phys(struct niu *np, struct niu_parent *parent)
7262 u32 val; 7538 u32 val;
7263 int err; 7539 int err;
7264 7540
7265
7266 if (!strcmp(np->vpd.model, "SUNW,CP3220") || 7541 if (!strcmp(np->vpd.model, "SUNW,CP3220") ||
7267 !strcmp(np->vpd.model, "SUNW,CP3260")) { 7542 !strcmp(np->vpd.model, "SUNW,CP3260")) {
7268 num_10g = 0; 7543 num_10g = 0;
@@ -7273,6 +7548,12 @@ static int __devinit walk_phys(struct niu *np, struct niu_parent *parent)
7273 phy_encode(PORT_TYPE_1G, 1) | 7548 phy_encode(PORT_TYPE_1G, 1) |
7274 phy_encode(PORT_TYPE_1G, 2) | 7549 phy_encode(PORT_TYPE_1G, 2) |
7275 phy_encode(PORT_TYPE_1G, 3)); 7550 phy_encode(PORT_TYPE_1G, 3));
7551 } else if (niu_board_model_match(np, NIU_FOXXY_BM_STR)) {
7552 num_10g = 2;
7553 num_1g = 0;
7554 parent->num_ports = 2;
7555 val = (phy_encode(PORT_TYPE_10G, 0) |
7556 phy_encode(PORT_TYPE_10G, 1));
7276 } else { 7557 } else {
7277 err = fill_phy_probe_info(np, parent, info); 7558 err = fill_phy_probe_info(np, parent, info);
7278 if (err) 7559 if (err)
@@ -7733,15 +8014,16 @@ static int __devinit niu_get_invariants(struct niu *np)
7733 8014
7734 have_props = !err; 8015 have_props = !err;
7735 8016
7736 err = niu_get_and_validate_port(np);
7737 if (err)
7738 return err;
7739
7740 err = niu_init_mac_ipp_pcs_base(np); 8017 err = niu_init_mac_ipp_pcs_base(np);
7741 if (err) 8018 if (err)
7742 return err; 8019 return err;
7743 8020
7744 if (!have_props) { 8021 if (have_props) {
8022 err = niu_get_and_validate_port(np);
8023 if (err)
8024 return err;
8025
8026 } else {
7745 if (np->parent->plat_type == PLAT_TYPE_NIU) 8027 if (np->parent->plat_type == PLAT_TYPE_NIU)
7746 return -EINVAL; 8028 return -EINVAL;
7747 8029
@@ -7753,10 +8035,17 @@ static int __devinit niu_get_invariants(struct niu *np)
7753 niu_pci_vpd_fetch(np, offset); 8035 niu_pci_vpd_fetch(np, offset);
7754 nw64(ESPC_PIO_EN, 0); 8036 nw64(ESPC_PIO_EN, 0);
7755 8037
7756 if (np->flags & NIU_FLAGS_VPD_VALID) 8038 if (np->flags & NIU_FLAGS_VPD_VALID) {
7757 niu_pci_vpd_validate(np); 8039 niu_pci_vpd_validate(np);
8040 err = niu_get_and_validate_port(np);
8041 if (err)
8042 return err;
8043 }
7758 8044
7759 if (!(np->flags & NIU_FLAGS_VPD_VALID)) { 8045 if (!(np->flags & NIU_FLAGS_VPD_VALID)) {
8046 err = niu_get_and_validate_port(np);
8047 if (err)
8048 return err;
7760 err = niu_pci_probe_sprom(np); 8049 err = niu_pci_probe_sprom(np);
7761 if (err) 8050 if (err)
7762 return err; 8051 return err;
diff --git a/drivers/net/niu.h b/drivers/net/niu.h
index 336aed08b275..97ffbe137bcb 100644
--- a/drivers/net/niu.h
+++ b/drivers/net/niu.h
@@ -2537,6 +2537,7 @@ struct fcram_hash_ipv6 {
2537 2537
2538#define NIU_PHY_ID_MASK 0xfffff0f0 2538#define NIU_PHY_ID_MASK 0xfffff0f0
2539#define NIU_PHY_ID_BCM8704 0x00206030 2539#define NIU_PHY_ID_BCM8704 0x00206030
2540#define NIU_PHY_ID_BCM8706 0x00206035
2540#define NIU_PHY_ID_BCM5464R 0x002060b0 2541#define NIU_PHY_ID_BCM5464R 0x002060b0
2541#define NIU_PHY_ID_MRVL88X2011 0x01410020 2542#define NIU_PHY_ID_MRVL88X2011 0x01410020
2542 2543
@@ -2937,6 +2938,15 @@ struct rx_ring_info {
2937 2938
2938#define NIU_MAX_MTU 9216 2939#define NIU_MAX_MTU 9216
2939 2940
2941/* VPD strings */
2942#define NIU_QGC_LP_BM_STR "501-7606"
2943#define NIU_2XGF_LP_BM_STR "501-7283"
2944#define NIU_QGC_PEM_BM_STR "501-7765"
2945#define NIU_2XGF_PEM_BM_STR "501-7626"
2946#define NIU_ALONSO_BM_STR "373-0202"
2947#define NIU_FOXXY_BM_STR "501-7961"
2948#define NIU_2XGF_MRVL_BM_STR "SK-6E82"
2949
2940#define NIU_VPD_MIN_MAJOR 3 2950#define NIU_VPD_MIN_MAJOR 3
2941#define NIU_VPD_MIN_MINOR 4 2951#define NIU_VPD_MIN_MINOR 4
2942 2952
@@ -3199,6 +3209,8 @@ struct niu {
3199 struct niu_parent *parent; 3209 struct niu_parent *parent;
3200 3210
3201 u32 flags; 3211 u32 flags;
3212#define NIU_FLAGS_HOTPLUG_PHY_PRESENT 0x02000000 /* Removebale PHY detected*/
3213#define NIU_FLAGS_HOTPLUG_PHY 0x01000000 /* Removebale PHY */
3202#define NIU_FLAGS_VPD_VALID 0x00800000 /* VPD has valid version */ 3214#define NIU_FLAGS_VPD_VALID 0x00800000 /* VPD has valid version */
3203#define NIU_FLAGS_MSIX 0x00400000 /* MSI-X in use */ 3215#define NIU_FLAGS_MSIX 0x00400000 /* MSI-X in use */
3204#define NIU_FLAGS_MCAST 0x00200000 /* multicast filter enabled */ 3216#define NIU_FLAGS_MCAST 0x00200000 /* multicast filter enabled */
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index 963630c65ca9..94e0b7ed76f1 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -89,6 +89,9 @@ int mdiobus_register(struct mii_bus *bus)
89 89
90 phydev->bus = bus; 90 phydev->bus = bus;
91 91
92 /* Run all of the fixups for this PHY */
93 phy_scan_fixups(phydev);
94
92 err = device_register(&phydev->dev); 95 err = device_register(&phydev->dev);
93 96
94 if (err) { 97 if (err) {
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 12fccb1c76dc..3c18bb594957 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -406,8 +406,10 @@ int phy_mii_ioctl(struct phy_device *phydev,
406 406
407 if (mii_data->reg_num == MII_BMCR 407 if (mii_data->reg_num == MII_BMCR
408 && val & BMCR_RESET 408 && val & BMCR_RESET
409 && phydev->drv->config_init) 409 && phydev->drv->config_init) {
410 phy_scan_fixups(phydev);
410 phydev->drv->config_init(phydev); 411 phydev->drv->config_init(phydev);
412 }
411 break; 413 break;
412 414
413 default: 415 default:
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 8b1121b02f98..ddf8d51832a6 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -53,6 +53,96 @@ static void phy_device_release(struct device *dev)
53 phy_device_free(to_phy_device(dev)); 53 phy_device_free(to_phy_device(dev));
54} 54}
55 55
56static LIST_HEAD(phy_fixup_list);
57static DEFINE_MUTEX(phy_fixup_lock);
58
59/*
60 * Creates a new phy_fixup and adds it to the list
61 * @bus_id: A string which matches phydev->dev.bus_id (or PHY_ANY_ID)
62 * @phy_uid: Used to match against phydev->phy_id (the UID of the PHY)
63 * It can also be PHY_ANY_UID
64 * @phy_uid_mask: Applied to phydev->phy_id and fixup->phy_uid before
65 * comparison
66 * @run: The actual code to be run when a matching PHY is found
67 */
68int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
69 int (*run)(struct phy_device *))
70{
71 struct phy_fixup *fixup;
72
73 fixup = kzalloc(sizeof(struct phy_fixup), GFP_KERNEL);
74 if (!fixup)
75 return -ENOMEM;
76
77 strncpy(fixup->bus_id, bus_id, BUS_ID_SIZE);
78 fixup->phy_uid = phy_uid;
79 fixup->phy_uid_mask = phy_uid_mask;
80 fixup->run = run;
81
82 mutex_lock(&phy_fixup_lock);
83 list_add_tail(&fixup->list, &phy_fixup_list);
84 mutex_unlock(&phy_fixup_lock);
85
86 return 0;
87}
88EXPORT_SYMBOL(phy_register_fixup);
89
90/* Registers a fixup to be run on any PHY with the UID in phy_uid */
91int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
92 int (*run)(struct phy_device *))
93{
94 return phy_register_fixup(PHY_ANY_ID, phy_uid, phy_uid_mask, run);
95}
96EXPORT_SYMBOL(phy_register_fixup_for_uid);
97
98/* Registers a fixup to be run on the PHY with id string bus_id */
99int phy_register_fixup_for_id(const char *bus_id,
100 int (*run)(struct phy_device *))
101{
102 return phy_register_fixup(bus_id, PHY_ANY_UID, 0xffffffff, run);
103}
104EXPORT_SYMBOL(phy_register_fixup_for_id);
105
106/*
107 * Returns 1 if fixup matches phydev in bus_id and phy_uid.
108 * Fixups can be set to match any in one or more fields.
109 */
110static int phy_needs_fixup(struct phy_device *phydev, struct phy_fixup *fixup)
111{
112 if (strcmp(fixup->bus_id, phydev->dev.bus_id) != 0)
113 if (strcmp(fixup->bus_id, PHY_ANY_ID) != 0)
114 return 0;
115
116 if ((fixup->phy_uid & fixup->phy_uid_mask) !=
117 (phydev->phy_id & fixup->phy_uid_mask))
118 if (fixup->phy_uid != PHY_ANY_UID)
119 return 0;
120
121 return 1;
122}
123
124/* Runs any matching fixups for this phydev */
125int phy_scan_fixups(struct phy_device *phydev)
126{
127 struct phy_fixup *fixup;
128
129 mutex_lock(&phy_fixup_lock);
130 list_for_each_entry(fixup, &phy_fixup_list, list) {
131 if (phy_needs_fixup(phydev, fixup)) {
132 int err;
133
134 err = fixup->run(phydev);
135
136 if (err < 0)
137 return err;
138 }
139 }
140 mutex_unlock(&phy_fixup_lock);
141
142 return 0;
143}
144EXPORT_SYMBOL(phy_scan_fixups);
145
56struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) 146struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
57{ 147{
58 struct phy_device *dev; 148 struct phy_device *dev;
@@ -179,13 +269,13 @@ void phy_prepare_link(struct phy_device *phydev,
179 * choose to call only the subset of functions which provide 269 * choose to call only the subset of functions which provide
180 * the desired functionality. 270 * the desired functionality.
181 */ 271 */
182struct phy_device * phy_connect(struct net_device *dev, const char *phy_id, 272struct phy_device * phy_connect(struct net_device *dev, const char *bus_id,
183 void (*handler)(struct net_device *), u32 flags, 273 void (*handler)(struct net_device *), u32 flags,
184 phy_interface_t interface) 274 phy_interface_t interface)
185{ 275{
186 struct phy_device *phydev; 276 struct phy_device *phydev;
187 277
188 phydev = phy_attach(dev, phy_id, flags, interface); 278 phydev = phy_attach(dev, bus_id, flags, interface);
189 279
190 if (IS_ERR(phydev)) 280 if (IS_ERR(phydev))
191 return phydev; 281 return phydev;
@@ -226,7 +316,7 @@ static int phy_compare_id(struct device *dev, void *data)
226/** 316/**
227 * phy_attach - attach a network device to a particular PHY device 317 * phy_attach - attach a network device to a particular PHY device
228 * @dev: network device to attach 318 * @dev: network device to attach
229 * @phy_id: PHY device to attach 319 * @bus_id: PHY device to attach
230 * @flags: PHY device's dev_flags 320 * @flags: PHY device's dev_flags
231 * @interface: PHY device's interface 321 * @interface: PHY device's interface
232 * 322 *
@@ -238,7 +328,7 @@ static int phy_compare_id(struct device *dev, void *data)
238 * change. The phy_device is returned to the attaching driver. 328 * change. The phy_device is returned to the attaching driver.
239 */ 329 */
240struct phy_device *phy_attach(struct net_device *dev, 330struct phy_device *phy_attach(struct net_device *dev,
241 const char *phy_id, u32 flags, phy_interface_t interface) 331 const char *bus_id, u32 flags, phy_interface_t interface)
242{ 332{
243 struct bus_type *bus = &mdio_bus_type; 333 struct bus_type *bus = &mdio_bus_type;
244 struct phy_device *phydev; 334 struct phy_device *phydev;
@@ -246,12 +336,12 @@ struct phy_device *phy_attach(struct net_device *dev,
246 336
247 /* Search the list of PHY devices on the mdio bus for the 337 /* Search the list of PHY devices on the mdio bus for the
248 * PHY with the requested name */ 338 * PHY with the requested name */
249 d = bus_find_device(bus, NULL, (void *)phy_id, phy_compare_id); 339 d = bus_find_device(bus, NULL, (void *)bus_id, phy_compare_id);
250 340
251 if (d) { 341 if (d) {
252 phydev = to_phy_device(d); 342 phydev = to_phy_device(d);
253 } else { 343 } else {
254 printk(KERN_ERR "%s not found\n", phy_id); 344 printk(KERN_ERR "%s not found\n", bus_id);
255 return ERR_PTR(-ENODEV); 345 return ERR_PTR(-ENODEV);
256 } 346 }
257 347
@@ -271,7 +361,7 @@ struct phy_device *phy_attach(struct net_device *dev,
271 361
272 if (phydev->attached_dev) { 362 if (phydev->attached_dev) {
273 printk(KERN_ERR "%s: %s already attached\n", 363 printk(KERN_ERR "%s: %s already attached\n",
274 dev->name, phy_id); 364 dev->name, bus_id);
275 return ERR_PTR(-EBUSY); 365 return ERR_PTR(-EBUSY);
276 } 366 }
277 367
@@ -287,6 +377,11 @@ struct phy_device *phy_attach(struct net_device *dev,
287 if (phydev->drv->config_init) { 377 if (phydev->drv->config_init) {
288 int err; 378 int err;
289 379
380 err = phy_scan_fixups(phydev);
381
382 if (err < 0)
383 return ERR_PTR(err);
384
290 err = phydev->drv->config_init(phydev); 385 err = phydev->drv->config_init(phydev);
291 386
292 if (err < 0) 387 if (err < 0)
@@ -395,6 +490,7 @@ EXPORT_SYMBOL(genphy_config_advert);
395 */ 490 */
396int genphy_setup_forced(struct phy_device *phydev) 491int genphy_setup_forced(struct phy_device *phydev)
397{ 492{
493 int err;
398 int ctl = 0; 494 int ctl = 0;
399 495
400 phydev->pause = phydev->asym_pause = 0; 496 phydev->pause = phydev->asym_pause = 0;
@@ -407,17 +503,26 @@ int genphy_setup_forced(struct phy_device *phydev)
407 if (DUPLEX_FULL == phydev->duplex) 503 if (DUPLEX_FULL == phydev->duplex)
408 ctl |= BMCR_FULLDPLX; 504 ctl |= BMCR_FULLDPLX;
409 505
410 ctl = phy_write(phydev, MII_BMCR, ctl); 506 err = phy_write(phydev, MII_BMCR, ctl);
411 507
412 if (ctl < 0) 508 if (err < 0)
413 return ctl; 509 return err;
510
511 /*
512 * Run the fixups on this PHY, just in case the
513 * board code needs to change something after a reset
514 */
515 err = phy_scan_fixups(phydev);
516
517 if (err < 0)
518 return err;
414 519
415 /* We just reset the device, so we'd better configure any 520 /* We just reset the device, so we'd better configure any
416 * settings the PHY requires to operate */ 521 * settings the PHY requires to operate */
417 if (phydev->drv->config_init) 522 if (phydev->drv->config_init)
418 ctl = phydev->drv->config_init(phydev); 523 err = phydev->drv->config_init(phydev);
419 524
420 return ctl; 525 return err;
421} 526}
422 527
423 528
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index dcbe01b0ca0d..157fd932e951 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -86,7 +86,7 @@
86#include "s2io.h" 86#include "s2io.h"
87#include "s2io-regs.h" 87#include "s2io-regs.h"
88 88
89#define DRV_VERSION "2.0.26.20" 89#define DRV_VERSION "2.0.26.22"
90 90
91/* S2io Driver name & version. */ 91/* S2io Driver name & version. */
92static char s2io_driver_name[] = "Neterion"; 92static char s2io_driver_name[] = "Neterion";
@@ -117,20 +117,6 @@ static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
117 117
118#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \ 118#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
119 ADAPTER_STATUS_RMAC_LOCAL_FAULT))) 119 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
120#define TASKLET_IN_USE test_and_set_bit(0, (&sp->tasklet_status))
121#define PANIC 1
122#define LOW 2
123static inline int rx_buffer_level(struct s2io_nic * sp, int rxb_size, int ring)
124{
125 struct mac_info *mac_control;
126
127 mac_control = &sp->mac_control;
128 if (rxb_size <= rxd_count[sp->rxd_mode])
129 return PANIC;
130 else if ((mac_control->rings[ring].pkt_cnt - rxb_size) > 16)
131 return LOW;
132 return 0;
133}
134 120
135static inline int is_s2io_card_up(const struct s2io_nic * sp) 121static inline int is_s2io_card_up(const struct s2io_nic * sp)
136{ 122{
@@ -2458,7 +2444,7 @@ static void free_tx_buffers(struct s2io_nic *nic)
2458 for (i = 0; i < config->tx_fifo_num; i++) { 2444 for (i = 0; i < config->tx_fifo_num; i++) {
2459 unsigned long flags; 2445 unsigned long flags;
2460 spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags); 2446 spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags);
2461 for (j = 0; j < config->tx_cfg[i].fifo_len - 1; j++) { 2447 for (j = 0; j < config->tx_cfg[i].fifo_len; j++) {
2462 txdp = (struct TxD *) \ 2448 txdp = (struct TxD *) \
2463 mac_control->fifos[i].list_info[j].list_virt_addr; 2449 mac_control->fifos[i].list_info[j].list_virt_addr;
2464 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j); 2450 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
@@ -2544,7 +2530,6 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
2544 struct config_param *config; 2530 struct config_param *config;
2545 u64 tmp; 2531 u64 tmp;
2546 struct buffAdd *ba; 2532 struct buffAdd *ba;
2547 unsigned long flags;
2548 struct RxD_t *first_rxdp = NULL; 2533 struct RxD_t *first_rxdp = NULL;
2549 u64 Buffer0_ptr = 0, Buffer1_ptr = 0; 2534 u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
2550 struct RxD1 *rxdp1; 2535 struct RxD1 *rxdp1;
@@ -2592,15 +2577,7 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
2592 DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n", 2577 DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
2593 dev->name, rxdp); 2578 dev->name, rxdp);
2594 } 2579 }
2595 if(!napi) { 2580
2596 spin_lock_irqsave(&nic->put_lock, flags);
2597 mac_control->rings[ring_no].put_pos =
2598 (block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
2599 spin_unlock_irqrestore(&nic->put_lock, flags);
2600 } else {
2601 mac_control->rings[ring_no].put_pos =
2602 (block_no * (rxd_count[nic->rxd_mode] + 1)) + off;
2603 }
2604 if ((rxdp->Control_1 & RXD_OWN_XENA) && 2581 if ((rxdp->Control_1 & RXD_OWN_XENA) &&
2605 ((nic->rxd_mode == RXD_MODE_3B) && 2582 ((nic->rxd_mode == RXD_MODE_3B) &&
2606 (rxdp->Control_2 & s2BIT(0)))) { 2583 (rxdp->Control_2 & s2BIT(0)))) {
@@ -2978,7 +2955,7 @@ static void rx_intr_handler(struct ring_info *ring_data)
2978{ 2955{
2979 struct s2io_nic *nic = ring_data->nic; 2956 struct s2io_nic *nic = ring_data->nic;
2980 struct net_device *dev = (struct net_device *) nic->dev; 2957 struct net_device *dev = (struct net_device *) nic->dev;
2981 int get_block, put_block, put_offset; 2958 int get_block, put_block;
2982 struct rx_curr_get_info get_info, put_info; 2959 struct rx_curr_get_info get_info, put_info;
2983 struct RxD_t *rxdp; 2960 struct RxD_t *rxdp;
2984 struct sk_buff *skb; 2961 struct sk_buff *skb;
@@ -2987,19 +2964,11 @@ static void rx_intr_handler(struct ring_info *ring_data)
2987 struct RxD1* rxdp1; 2964 struct RxD1* rxdp1;
2988 struct RxD3* rxdp3; 2965 struct RxD3* rxdp3;
2989 2966
2990 spin_lock(&nic->rx_lock);
2991
2992 get_info = ring_data->rx_curr_get_info; 2967 get_info = ring_data->rx_curr_get_info;
2993 get_block = get_info.block_index; 2968 get_block = get_info.block_index;
2994 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info)); 2969 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
2995 put_block = put_info.block_index; 2970 put_block = put_info.block_index;
2996 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr; 2971 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
2997 if (!napi) {
2998 spin_lock(&nic->put_lock);
2999 put_offset = ring_data->put_pos;
3000 spin_unlock(&nic->put_lock);
3001 } else
3002 put_offset = ring_data->put_pos;
3003 2972
3004 while (RXD_IS_UP2DT(rxdp)) { 2973 while (RXD_IS_UP2DT(rxdp)) {
3005 /* 2974 /*
@@ -3016,7 +2985,6 @@ static void rx_intr_handler(struct ring_info *ring_data)
3016 DBG_PRINT(ERR_DBG, "%s: The skb is ", 2985 DBG_PRINT(ERR_DBG, "%s: The skb is ",
3017 dev->name); 2986 dev->name);
3018 DBG_PRINT(ERR_DBG, "Null in Rx Intr\n"); 2987 DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
3019 spin_unlock(&nic->rx_lock);
3020 return; 2988 return;
3021 } 2989 }
3022 if (nic->rxd_mode == RXD_MODE_1) { 2990 if (nic->rxd_mode == RXD_MODE_1) {
@@ -3072,8 +3040,6 @@ static void rx_intr_handler(struct ring_info *ring_data)
3072 } 3040 }
3073 } 3041 }
3074 } 3042 }
3075
3076 spin_unlock(&nic->rx_lock);
3077} 3043}
3078 3044
3079/** 3045/**
@@ -4105,7 +4071,6 @@ static int s2io_close(struct net_device *dev)
4105 do_s2io_delete_unicast_mc(sp, tmp64); 4071 do_s2io_delete_unicast_mc(sp, tmp64);
4106 } 4072 }
4107 4073
4108 /* Reset card, kill tasklet and free Tx and Rx buffers. */
4109 s2io_card_down(sp); 4074 s2io_card_down(sp);
4110 4075
4111 return 0; 4076 return 0;
@@ -4370,29 +4335,9 @@ s2io_alarm_handle(unsigned long data)
4370 4335
4371static int s2io_chk_rx_buffers(struct s2io_nic *sp, int rng_n) 4336static int s2io_chk_rx_buffers(struct s2io_nic *sp, int rng_n)
4372{ 4337{
4373 int rxb_size, level; 4338 if (fill_rx_buffers(sp, rng_n) == -ENOMEM) {
4374 4339 DBG_PRINT(INFO_DBG, "%s:Out of memory", sp->dev->name);
4375 if (!sp->lro) { 4340 DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
4376 rxb_size = atomic_read(&sp->rx_bufs_left[rng_n]);
4377 level = rx_buffer_level(sp, rxb_size, rng_n);
4378
4379 if ((level == PANIC) && (!TASKLET_IN_USE)) {
4380 int ret;
4381 DBG_PRINT(INTR_DBG, "%s: Rx BD hit ", __FUNCTION__);
4382 DBG_PRINT(INTR_DBG, "PANIC levels\n");
4383 if ((ret = fill_rx_buffers(sp, rng_n)) == -ENOMEM) {
4384 DBG_PRINT(INFO_DBG, "Out of memory in %s",
4385 __FUNCTION__);
4386 clear_bit(0, (&sp->tasklet_status));
4387 return -1;
4388 }
4389 clear_bit(0, (&sp->tasklet_status));
4390 } else if (level == LOW)
4391 tasklet_schedule(&sp->task);
4392
4393 } else if (fill_rx_buffers(sp, rng_n) == -ENOMEM) {
4394 DBG_PRINT(INFO_DBG, "%s:Out of memory", sp->dev->name);
4395 DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
4396 } 4341 }
4397 return 0; 4342 return 0;
4398} 4343}
@@ -6770,49 +6715,6 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu)
6770} 6715}
6771 6716
6772/** 6717/**
6773 * s2io_tasklet - Bottom half of the ISR.
6774 * @dev_adr : address of the device structure in dma_addr_t format.
6775 * Description:
6776 * This is the tasklet or the bottom half of the ISR. This is
6777 * an extension of the ISR which is scheduled by the scheduler to be run
6778 * when the load on the CPU is low. All low priority tasks of the ISR can
6779 * be pushed into the tasklet. For now the tasklet is used only to
6780 * replenish the Rx buffers in the Rx buffer descriptors.
6781 * Return value:
6782 * void.
6783 */
6784
6785static void s2io_tasklet(unsigned long dev_addr)
6786{
6787 struct net_device *dev = (struct net_device *) dev_addr;
6788 struct s2io_nic *sp = dev->priv;
6789 int i, ret;
6790 struct mac_info *mac_control;
6791 struct config_param *config;
6792
6793 mac_control = &sp->mac_control;
6794 config = &sp->config;
6795
6796 if (!TASKLET_IN_USE) {
6797 for (i = 0; i < config->rx_ring_num; i++) {
6798 ret = fill_rx_buffers(sp, i);
6799 if (ret == -ENOMEM) {
6800 DBG_PRINT(INFO_DBG, "%s: Out of ",
6801 dev->name);
6802 DBG_PRINT(INFO_DBG, "memory in tasklet\n");
6803 break;
6804 } else if (ret == -EFILL) {
6805 DBG_PRINT(INFO_DBG,
6806 "%s: Rx Ring %d is full\n",
6807 dev->name, i);
6808 break;
6809 }
6810 }
6811 clear_bit(0, (&sp->tasklet_status));
6812 }
6813}
6814
6815/**
6816 * s2io_set_link - Set the LInk status 6718 * s2io_set_link - Set the LInk status
6817 * @data: long pointer to device private structue 6719 * @data: long pointer to device private structue
6818 * Description: Sets the link status for the adapter 6720 * Description: Sets the link status for the adapter
@@ -7161,7 +7063,6 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
7161{ 7063{
7162 int cnt = 0; 7064 int cnt = 0;
7163 struct XENA_dev_config __iomem *bar0 = sp->bar0; 7065 struct XENA_dev_config __iomem *bar0 = sp->bar0;
7164 unsigned long flags;
7165 register u64 val64 = 0; 7066 register u64 val64 = 0;
7166 struct config_param *config; 7067 struct config_param *config;
7167 config = &sp->config; 7068 config = &sp->config;
@@ -7186,9 +7087,6 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
7186 7087
7187 s2io_rem_isr(sp); 7088 s2io_rem_isr(sp);
7188 7089
7189 /* Kill tasklet. */
7190 tasklet_kill(&sp->task);
7191
7192 /* Check if the device is Quiescent and then Reset the NIC */ 7090 /* Check if the device is Quiescent and then Reset the NIC */
7193 while(do_io) { 7091 while(do_io) {
7194 /* As per the HW requirement we need to replenish the 7092 /* As per the HW requirement we need to replenish the
@@ -7223,9 +7121,7 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
7223 free_tx_buffers(sp); 7121 free_tx_buffers(sp);
7224 7122
7225 /* Free all Rx buffers */ 7123 /* Free all Rx buffers */
7226 spin_lock_irqsave(&sp->rx_lock, flags);
7227 free_rx_buffers(sp); 7124 free_rx_buffers(sp);
7228 spin_unlock_irqrestore(&sp->rx_lock, flags);
7229 7125
7230 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state)); 7126 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
7231} 7127}
@@ -7314,9 +7210,6 @@ static int s2io_card_up(struct s2io_nic * sp)
7314 7210
7315 S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2)); 7211 S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));
7316 7212
7317 /* Enable tasklet for the device */
7318 tasklet_init(&sp->task, s2io_tasklet, (unsigned long) dev);
7319
7320 /* Enable select interrupts */ 7213 /* Enable select interrupts */
7321 en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS); 7214 en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
7322 if (sp->config.intr_type != INTA) 7215 if (sp->config.intr_type != INTA)
@@ -8119,20 +8012,15 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
8119 s2io_reset(sp); 8012 s2io_reset(sp);
8120 8013
8121 /* 8014 /*
8122 * Initialize the tasklet status and link state flags 8015 * Initialize link state flags
8123 * and the card state parameter 8016 * and the card state parameter
8124 */ 8017 */
8125 sp->tasklet_status = 0;
8126 sp->state = 0; 8018 sp->state = 0;
8127 8019
8128 /* Initialize spinlocks */ 8020 /* Initialize spinlocks */
8129 for (i = 0; i < sp->config.tx_fifo_num; i++) 8021 for (i = 0; i < sp->config.tx_fifo_num; i++)
8130 spin_lock_init(&mac_control->fifos[i].tx_lock); 8022 spin_lock_init(&mac_control->fifos[i].tx_lock);
8131 8023
8132 if (!napi)
8133 spin_lock_init(&sp->put_lock);
8134 spin_lock_init(&sp->rx_lock);
8135
8136 /* 8024 /*
8137 * SXE-002: Configure link and activity LED to init state 8025 * SXE-002: Configure link and activity LED to init state
8138 * on driver load. 8026 * on driver load.
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h
index e68fdf7e4260..ce53a02105f2 100644
--- a/drivers/net/s2io.h
+++ b/drivers/net/s2io.h
@@ -703,9 +703,6 @@ struct ring_info {
703 */ 703 */
704 struct rx_curr_get_info rx_curr_get_info; 704 struct rx_curr_get_info rx_curr_get_info;
705 705
706 /* Index to the absolute position of the put pointer of Rx ring */
707 int put_pos;
708
709 /* Buffer Address store. */ 706 /* Buffer Address store. */
710 struct buffAdd **ba; 707 struct buffAdd **ba;
711 struct s2io_nic *nic; 708 struct s2io_nic *nic;
@@ -868,8 +865,6 @@ struct s2io_nic {
868 int device_enabled_once; 865 int device_enabled_once;
869 866
870 char name[60]; 867 char name[60];
871 struct tasklet_struct task;
872 volatile unsigned long tasklet_status;
873 868
874 /* Timer that handles I/O errors/exceptions */ 869 /* Timer that handles I/O errors/exceptions */
875 struct timer_list alarm_timer; 870 struct timer_list alarm_timer;
@@ -879,8 +874,6 @@ struct s2io_nic {
879 874
880 atomic_t rx_bufs_left[MAX_RX_RINGS]; 875 atomic_t rx_bufs_left[MAX_RX_RINGS];
881 876
882 spinlock_t put_lock;
883
884#define PROMISC 1 877#define PROMISC 1
885#define ALL_MULTI 2 878#define ALL_MULTI 2
886 879
@@ -964,7 +957,6 @@ struct s2io_nic {
964 u8 lro; 957 u8 lro;
965 u16 lro_max_aggr_per_sess; 958 u16 lro_max_aggr_per_sess;
966 volatile unsigned long state; 959 volatile unsigned long state;
967 spinlock_t rx_lock;
968 u64 general_int_mask; 960 u64 general_int_mask;
969#define VPD_STRING_LEN 80 961#define VPD_STRING_LEN 80
970 u8 product_name[VPD_STRING_LEN]; 962 u8 product_name[VPD_STRING_LEN];
@@ -1094,7 +1086,6 @@ static void s2io_handle_errors(void * dev_id);
1094static int s2io_starter(void); 1086static int s2io_starter(void);
1095static void s2io_closer(void); 1087static void s2io_closer(void);
1096static void s2io_tx_watchdog(struct net_device *dev); 1088static void s2io_tx_watchdog(struct net_device *dev);
1097static void s2io_tasklet(unsigned long dev_addr);
1098static void s2io_set_multicast(struct net_device *dev); 1089static void s2io_set_multicast(struct net_device *dev);
1099static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp); 1090static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp);
1100static void s2io_link(struct s2io_nic * sp, int link); 1091static void s2io_link(struct s2io_nic * sp, int link);
diff --git a/drivers/net/sgiseeq.c b/drivers/net/sgiseeq.c
index 78994ede0cb0..6261201403cd 100644
--- a/drivers/net/sgiseeq.c
+++ b/drivers/net/sgiseeq.c
@@ -825,7 +825,8 @@ static struct platform_driver sgiseeq_driver = {
825 .probe = sgiseeq_probe, 825 .probe = sgiseeq_probe,
826 .remove = __devexit_p(sgiseeq_remove), 826 .remove = __devexit_p(sgiseeq_remove),
827 .driver = { 827 .driver = {
828 .name = "sgiseeq" 828 .name = "sgiseeq",
829 .owner = THIS_MODULE,
829 } 830 }
830}; 831};
831 832
@@ -850,3 +851,4 @@ module_exit(sgiseeq_module_exit);
850MODULE_DESCRIPTION("SGI Seeq 8003 driver"); 851MODULE_DESCRIPTION("SGI Seeq 8003 driver");
851MODULE_AUTHOR("Linux/MIPS Mailing List <linux-mips@linux-mips.org>"); 852MODULE_AUTHOR("Linux/MIPS Mailing List <linux-mips@linux-mips.org>");
852MODULE_LICENSE("GPL"); 853MODULE_LICENSE("GPL");
854MODULE_ALIAS("platform:sgiseeq");
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 76cc1d3adf71..4e2800205189 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -92,6 +92,7 @@ module_param(tx_fifo_kb, int, 0400);
92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); 92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93 93
94MODULE_LICENSE("GPL"); 94MODULE_LICENSE("GPL");
95MODULE_ALIAS("platform:smc911x");
95 96
96/* 97/*
97 * The internal workings of the driver. If you are changing anything 98 * The internal workings of the driver. If you are changing anything
@@ -243,7 +244,7 @@ static void smc911x_reset(struct net_device *dev)
243 do { 244 do {
244 udelay(10); 245 udelay(10);
245 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_; 246 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
246 } while ( timeout-- && !reg); 247 } while (--timeout && !reg);
247 if (timeout == 0) { 248 if (timeout == 0) {
248 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name); 249 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
249 return; 250 return;
@@ -267,7 +268,7 @@ static void smc911x_reset(struct net_device *dev)
267 resets++; 268 resets++;
268 break; 269 break;
269 } 270 }
270 } while ( timeout-- && (reg & HW_CFG_SRST_)); 271 } while (--timeout && (reg & HW_CFG_SRST_));
271 } 272 }
272 if (timeout == 0) { 273 if (timeout == 0) {
273 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name); 274 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
@@ -413,7 +414,7 @@ static inline void smc911x_drop_pkt(struct net_device *dev)
413 do { 414 do {
414 udelay(10); 415 udelay(10);
415 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_; 416 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
416 } while ( timeout-- && reg); 417 } while (--timeout && reg);
417 if (timeout == 0) { 418 if (timeout == 0) {
418 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name); 419 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
419 } 420 }
@@ -2262,6 +2263,7 @@ static struct platform_driver smc911x_driver = {
2262 .resume = smc911x_drv_resume, 2263 .resume = smc911x_drv_resume,
2263 .driver = { 2264 .driver = {
2264 .name = CARDNAME, 2265 .name = CARDNAME,
2266 .owner = THIS_MODULE,
2265 }, 2267 },
2266}; 2268};
2267 2269
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c
index 600b92af3334..a188e33484e6 100644
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -132,6 +132,7 @@ module_param(watchdog, int, 0400);
132MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); 132MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
133 133
134MODULE_LICENSE("GPL"); 134MODULE_LICENSE("GPL");
135MODULE_ALIAS("platform:smc91x");
135 136
136/* 137/*
137 * The internal workings of the driver. If you are changing anything 138 * The internal workings of the driver. If you are changing anything
@@ -2308,6 +2309,7 @@ static struct platform_driver smc_driver = {
2308 .resume = smc_drv_resume, 2309 .resume = smc_drv_resume,
2309 .driver = { 2310 .driver = {
2310 .name = CARDNAME, 2311 .name = CARDNAME,
2312 .owner = THIS_MODULE,
2311 }, 2313 },
2312}; 2314};
2313 2315
diff --git a/drivers/net/sni_82596.c b/drivers/net/sni_82596.c
index 2cf6794acb4f..854ccf2b4105 100644
--- a/drivers/net/sni_82596.c
+++ b/drivers/net/sni_82596.c
@@ -44,6 +44,7 @@ static const char sni_82596_string[] = "snirm_82596";
44MODULE_AUTHOR("Thomas Bogendoerfer"); 44MODULE_AUTHOR("Thomas Bogendoerfer");
45MODULE_DESCRIPTION("i82596 driver"); 45MODULE_DESCRIPTION("i82596 driver");
46MODULE_LICENSE("GPL"); 46MODULE_LICENSE("GPL");
47MODULE_ALIAS("platform:snirm_82596");
47module_param(i596_debug, int, 0); 48module_param(i596_debug, int, 0);
48MODULE_PARM_DESC(i596_debug, "82596 debug mask"); 49MODULE_PARM_DESC(i596_debug, "82596 debug mask");
49 50
@@ -166,6 +167,7 @@ static struct platform_driver sni_82596_driver = {
166 .remove = __devexit_p(sni_82596_driver_remove), 167 .remove = __devexit_p(sni_82596_driver_remove),
167 .driver = { 168 .driver = {
168 .name = sni_82596_string, 169 .name = sni_82596_string,
170 .owner = THIS_MODULE,
169 }, 171 },
170}; 172};
171 173
diff --git a/drivers/net/tehuti.c b/drivers/net/tehuti.c
index 17585e5eed53..e83b166aa6b9 100644
--- a/drivers/net/tehuti.c
+++ b/drivers/net/tehuti.c
@@ -625,6 +625,12 @@ static void __init bdx_firmware_endianess(void)
625 s_firmLoad[i] = CPU_CHIP_SWAP32(s_firmLoad[i]); 625 s_firmLoad[i] = CPU_CHIP_SWAP32(s_firmLoad[i]);
626} 626}
627 627
628static int bdx_range_check(struct bdx_priv *priv, u32 offset)
629{
630 return (offset > (u32) (BDX_REGS_SIZE / priv->nic->port_num)) ?
631 -EINVAL : 0;
632}
633
628static int bdx_ioctl_priv(struct net_device *ndev, struct ifreq *ifr, int cmd) 634static int bdx_ioctl_priv(struct net_device *ndev, struct ifreq *ifr, int cmd)
629{ 635{
630 struct bdx_priv *priv = ndev->priv; 636 struct bdx_priv *priv = ndev->priv;
@@ -643,9 +649,15 @@ static int bdx_ioctl_priv(struct net_device *ndev, struct ifreq *ifr, int cmd)
643 DBG("%d 0x%x 0x%x\n", data[0], data[1], data[2]); 649 DBG("%d 0x%x 0x%x\n", data[0], data[1], data[2]);
644 } 650 }
645 651
652 if (!capable(CAP_NET_ADMIN))
653 return -EPERM;
654
646 switch (data[0]) { 655 switch (data[0]) {
647 656
648 case BDX_OP_READ: 657 case BDX_OP_READ:
658 error = bdx_range_check(priv, data[1]);
659 if (error < 0)
660 return error;
649 data[2] = READ_REG(priv, data[1]); 661 data[2] = READ_REG(priv, data[1]);
650 DBG("read_reg(0x%x)=0x%x (dec %d)\n", data[1], data[2], 662 DBG("read_reg(0x%x)=0x%x (dec %d)\n", data[1], data[2],
651 data[2]); 663 data[2]);
@@ -655,6 +667,9 @@ static int bdx_ioctl_priv(struct net_device *ndev, struct ifreq *ifr, int cmd)
655 break; 667 break;
656 668
657 case BDX_OP_WRITE: 669 case BDX_OP_WRITE:
670 error = bdx_range_check(priv, data[1]);
671 if (error < 0)
672 return error;
658 WRITE_REG(priv, data[1], data[2]); 673 WRITE_REG(priv, data[1], data[2]);
659 DBG("write_reg(0x%x, 0x%x)\n", data[1], data[2]); 674 DBG("write_reg(0x%x, 0x%x)\n", data[1], data[2]);
660 break; 675 break;
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index bc4c62b8e81a..e3f74c9f78bd 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4017,6 +4017,8 @@ static int tg3_halt(struct tg3 *, int, int);
4017 * Invoked with tp->lock held. 4017 * Invoked with tp->lock held.
4018 */ 4018 */
4019static int tg3_restart_hw(struct tg3 *tp, int reset_phy) 4019static int tg3_restart_hw(struct tg3 *tp, int reset_phy)
4020 __releases(tp->lock)
4021 __acquires(tp->lock)
4020{ 4022{
4021 int err; 4023 int err;
4022 4024
diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c
index 6f33f84d37b0..6017d5267d08 100644
--- a/drivers/net/tsi108_eth.c
+++ b/drivers/net/tsi108_eth.c
@@ -162,6 +162,7 @@ static struct platform_driver tsi_eth_driver = {
162 .remove = tsi108_ether_remove, 162 .remove = tsi108_ether_remove,
163 .driver = { 163 .driver = {
164 .name = "tsi-ethernet", 164 .name = "tsi-ethernet",
165 .owner = THIS_MODULE,
165 }, 166 },
166}; 167};
167 168
@@ -1729,3 +1730,4 @@ module_exit(tsi108_ether_exit);
1729MODULE_AUTHOR("Tundra Semiconductor Corporation"); 1730MODULE_AUTHOR("Tundra Semiconductor Corporation");
1730MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); 1731MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1731MODULE_LICENSE("GPL"); 1732MODULE_LICENSE("GPL");
1733MODULE_ALIAS("platform:tsi-ethernet");
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index 333961bb7873..c0dd25ba7a18 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -2183,7 +2183,6 @@ typhoon_resume(struct pci_dev *pdev)
2183 } 2183 }
2184 2184
2185 netif_device_attach(dev); 2185 netif_device_attach(dev);
2186 netif_start_queue(dev);
2187 return 0; 2186 return 0;
2188 2187
2189reset: 2188reset:
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 2f11254bcc07..281ce3d39532 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -3932,7 +3932,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3932 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); 3932 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
3933 fixed_link = of_get_property(np, "fixed-link", NULL); 3933 fixed_link = of_get_property(np, "fixed-link", NULL);
3934 if (fixed_link) { 3934 if (fixed_link) {
3935 ug_info->mdio_bus = 0; 3935 snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "0");
3936 ug_info->phy_address = fixed_link[0]; 3936 ug_info->phy_address = fixed_link[0];
3937 phy = NULL; 3937 phy = NULL;
3938 } else { 3938 } else {
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index ed1afaf683a4..6b8d882d197b 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -605,7 +605,6 @@ static void __devinit velocity_get_options(struct velocity_opt *opts, int index,
605static void velocity_init_cam_filter(struct velocity_info *vptr) 605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{ 606{
607 struct mac_regs __iomem * regs = vptr->mac_regs; 607 struct mac_regs __iomem * regs = vptr->mac_regs;
608 unsigned short vid;
609 608
610 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */ 609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
611 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG); 610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
@@ -617,29 +616,33 @@ static void velocity_init_cam_filter(struct velocity_info *vptr)
617 mac_set_vlan_cam_mask(regs, vptr->vCAMmask); 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
618 mac_set_cam_mask(regs, vptr->mCAMmask); 617 mac_set_cam_mask(regs, vptr->mCAMmask);
619 618
620 /* Enable first VCAM */ 619 /* Enable VCAMs */
621 if (vptr->vlgrp) { 620 if (vptr->vlgrp) {
622 for (vid = 0; vid < VLAN_VID_MASK; vid++) { 621 unsigned int vid, i = 0;
623 if (vlan_group_get_device(vptr->vlgrp, vid)) { 622
624 /* If Tagging option is enabled and 623 if (!vlan_group_get_device(vptr->vlgrp, 0))
625 VLAN ID is not zero, then 624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
626 turn on MCFG_RTGOPT also */
627 if (vid != 0)
628 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
629 625
630 mac_set_vlan_cam(regs, 0, (u8 *) &vid); 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
631 } 632 }
632 } 633 }
633 vptr->vCAMmask[0] |= 1;
634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask); 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
635 } else {
636 u16 temp = 0;
637 mac_set_vlan_cam(regs, 0, (u8 *) &temp);
638 temp = 1;
639 mac_set_vlan_cam_mask(regs, (u8 *) &temp);
640 } 635 }
641} 636}
642 637
638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
643static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
644{ 647{
645 struct velocity_info *vptr = netdev_priv(dev); 648 struct velocity_info *vptr = netdev_priv(dev);
@@ -959,11 +962,13 @@ static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_devi
959 962
960 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid; 963 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
961 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid; 964 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
965 dev->vlan_rx_register = velocity_vlan_rx_register;
962 966
963#ifdef VELOCITY_ZERO_COPY_SUPPORT 967#ifdef VELOCITY_ZERO_COPY_SUPPORT
964 dev->features |= NETIF_F_SG; 968 dev->features |= NETIF_F_SG;
965#endif 969#endif
966 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER; 970 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
971 NETIF_F_HW_VLAN_RX;
967 972
968 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM) 973 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
969 dev->features |= NETIF_F_IP_CSUM; 974 dev->features |= NETIF_F_IP_CSUM;
@@ -1597,8 +1602,13 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1597 skb_put(skb, pkt_len - 4); 1602 skb_put(skb, pkt_len - 4);
1598 skb->protocol = eth_type_trans(skb, vptr->dev); 1603 skb->protocol = eth_type_trans(skb, vptr->dev);
1599 1604
1605 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1606 vlan_hwaccel_rx(skb, vptr->vlgrp,
1607 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1608 } else
1609 netif_rx(skb);
1610
1600 stats->rx_bytes += pkt_len; 1611 stats->rx_bytes += pkt_len;
1601 netif_rx(skb);
1602 1612
1603 return 0; 1613 return 0;
1604} 1614}
diff --git a/drivers/net/wan/c101.c b/drivers/net/wan/c101.c
index c4c8eab8574f..c2cc42f723d5 100644
--- a/drivers/net/wan/c101.c
+++ b/drivers/net/wan/c101.c
@@ -402,7 +402,7 @@ static int __init c101_init(void)
402#ifdef MODULE 402#ifdef MODULE
403 printk(KERN_INFO "c101: no card initialized\n"); 403 printk(KERN_INFO "c101: no card initialized\n");
404#endif 404#endif
405 return -ENOSYS; /* no parameters specified, abort */ 405 return -EINVAL; /* no parameters specified, abort */
406 } 406 }
407 407
408 printk(KERN_INFO "%s\n", version); 408 printk(KERN_INFO "%s\n", version);
@@ -420,11 +420,11 @@ static int __init c101_init(void)
420 c101_run(irq, ram); 420 c101_run(irq, ram);
421 421
422 if (*hw == '\x0') 422 if (*hw == '\x0')
423 return first_card ? 0 : -ENOSYS; 423 return first_card ? 0 : -EINVAL;
424 }while(*hw++ == ':'); 424 }while(*hw++ == ':');
425 425
426 printk(KERN_ERR "c101: invalid hardware parameters\n"); 426 printk(KERN_ERR "c101: invalid hardware parameters\n");
427 return first_card ? 0 : -ENOSYS; 427 return first_card ? 0 : -EINVAL;
428} 428}
429 429
430 430
diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c
index c4ab0326f911..520bb0b1a9a2 100644
--- a/drivers/net/wan/hdlc_fr.c
+++ b/drivers/net/wan/hdlc_fr.c
@@ -1090,10 +1090,6 @@ static int fr_add_pvc(struct net_device *frad, unsigned int dlci, int type)
1090 pvc_device *pvc = NULL; 1090 pvc_device *pvc = NULL;
1091 struct net_device *dev; 1091 struct net_device *dev;
1092 int result, used; 1092 int result, used;
1093 char * prefix = "pvc%d";
1094
1095 if (type == ARPHRD_ETHER)
1096 prefix = "pvceth%d";
1097 1093
1098 if ((pvc = add_pvc(frad, dlci)) == NULL) { 1094 if ((pvc = add_pvc(frad, dlci)) == NULL) {
1099 printk(KERN_WARNING "%s: Memory squeeze on fr_add_pvc()\n", 1095 printk(KERN_WARNING "%s: Memory squeeze on fr_add_pvc()\n",
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 14:33:35 -0500