aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 22:05:40 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 22:05:40 -0400
commit63a93699c6a58795b854ff573542a08367684dae (patch)
tree057ab4cbde66862c51867dde030be69a2fa7073f /drivers/net
parent16d8775700f1815076f879719ce14b33f50a3171 (diff)
parent21bd6d37cf23e643020bf28b41844ff0040c9393 (diff)
Merge branch 'remove' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'remove' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6629/2: aaec2000: remove support for mach-aaec2000 ARM: lh7a40x: remove unmaintained platform support Fix up trivial conflicts in - arch/arm/mach-{aaec2000,lh7a40x}/include/mach/memory.h (removed) - drivers/usb/gadget/Kconfig (USB_[GADGET_]LH7A40X removed, others added)
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/smc91x.h62
1 files changed, 0 insertions, 62 deletions
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index ee747919a766..68d48ab6eacf 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -206,68 +206,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
206#define RPC_LSA_DEFAULT RPC_LED_TX_RX 206#define RPC_LSA_DEFAULT RPC_LED_TX_RX
207#define RPC_LSB_DEFAULT RPC_LED_100_10 207#define RPC_LSB_DEFAULT RPC_LED_100_10
208 208
209#elif defined(CONFIG_MACH_LPD79520) || \
210 defined(CONFIG_MACH_LPD7A400) || \
211 defined(CONFIG_MACH_LPD7A404)
212
213/* The LPD7X_IOBARRIER is necessary to overcome a mismatch between the
214 * way that the CPU handles chip selects and the way that the SMC chip
215 * expects the chip select to operate. Refer to
216 * Documentation/arm/Sharp-LH/IOBarrier for details. The read from
217 * IOBARRIER is a byte, in order that we read the least-common
218 * denominator. It would be wasteful to read 32 bits from an 8-bit
219 * accessible region.
220 *
221 * There is no explicit protection against interrupts intervening
222 * between the writew and the IOBARRIER. In SMC ISR there is a
223 * preamble that performs an IOBARRIER in the extremely unlikely event
224 * that the driver interrupts itself between a writew to the chip an
225 * the IOBARRIER that follows *and* the cache is large enough that the
226 * first off-chip access while handing the interrupt is to the SMC
227 * chip. Other devices in the same address space as the SMC chip must
228 * be aware of the potential for trouble and perform a similar
229 * IOBARRIER on entry to their ISR.
230 */
231
232#include <mach/constants.h> /* IOBARRIER_VIRT */
233
234#define SMC_CAN_USE_8BIT 0
235#define SMC_CAN_USE_16BIT 1
236#define SMC_CAN_USE_32BIT 0
237#define SMC_NOWAIT 0
238#define LPD7X_IOBARRIER readb (IOBARRIER_VIRT)
239
240#define SMC_inw(a,r)\
241 ({ unsigned short v = readw ((void*) ((a) + (r))); LPD7X_IOBARRIER; v; })
242#define SMC_outw(v,a,r) ({ writew ((v), (a) + (r)); LPD7X_IOBARRIER; })
243
244#define SMC_insw LPD7_SMC_insw
245static inline void LPD7_SMC_insw (unsigned char* a, int r,
246 unsigned char* p, int l)
247{
248 unsigned short* ps = (unsigned short*) p;
249 while (l-- > 0) {
250 *ps++ = readw (a + r);
251 LPD7X_IOBARRIER;
252 }
253}
254
255#define SMC_outsw LPD7_SMC_outsw
256static inline void LPD7_SMC_outsw (unsigned char* a, int r,
257 unsigned char* p, int l)
258{
259 unsigned short* ps = (unsigned short*) p;
260 while (l-- > 0) {
261 writew (*ps++, a + r);
262 LPD7X_IOBARRIER;
263 }
264}
265
266#define SMC_INTERRUPT_PREAMBLE LPD7X_IOBARRIER
267
268#define RPC_LSA_DEFAULT RPC_LED_TX_RX
269#define RPC_LSB_DEFAULT RPC_LED_100_10
270
271#elif defined(CONFIG_ARCH_VERSATILE) 209#elif defined(CONFIG_ARCH_VERSATILE)
272 210
273#define SMC_CAN_USE_8BIT 1 211#define SMC_CAN_USE_8BIT 1