Merge branch 'remove' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'remove' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6629/2: aaec2000: remove support for mach-aaec2000
  ARM: lh7a40x: remove unmaintained platform support

Fix up trivial conflicts in
 - arch/arm/mach-{aaec2000,lh7a40x}/include/mach/memory.h (removed)
 - drivers/usb/gadget/Kconfig (USB_[GADGET_]LH7A40X removed, others added)

1 files changed, 0 insertions, 62 deletions

diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index ee747919a766..68d48ab6eacf 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -206,68 +206,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
 #define RPC_LSA_DEFAULT         RPC_LED_TX_RX
 #define RPC_LSB_DEFAULT         RPC_LED_100_10
 
-#elif   defined(CONFIG_MACH_LPD79520) ||        \
-        defined(CONFIG_MACH_LPD7A400) ||        \
-        defined(CONFIG_MACH_LPD7A404)
-
-/* The LPD7X_IOBARRIER is necessary to overcome a mismatch between the
- * way that the CPU handles chip selects and the way that the SMC chip
- * expects the chip select to operate.  Refer to
- * Documentation/arm/Sharp-LH/IOBarrier for details.  The read from
- * IOBARRIER is a byte, in order that we read the least-common
- * denominator.  It would be wasteful to read 32 bits from an 8-bit
- * accessible region.
- *
- * There is no explicit protection against interrupts intervening
- * between the writew and the IOBARRIER.  In SMC ISR there is a
- * preamble that performs an IOBARRIER in the extremely unlikely event
- * that the driver interrupts itself between a writew to the chip an
- * the IOBARRIER that follows *and* the cache is large enough that the
- * first off-chip access while handing the interrupt is to the SMC
- * chip.  Other devices in the same address space as the SMC chip must
- * be aware of the potential for trouble and perform a similar
- * IOBARRIER on entry to their ISR.
- */
-
-#include <mach/constants.h>     /* IOBARRIER_VIRT */
-
-#define SMC_CAN_USE_8BIT        0
-#define SMC_CAN_USE_16BIT       1
-#define SMC_CAN_USE_32BIT       0
-#define SMC_NOWAIT              0
-#define LPD7X_IOBARRIER         readb (IOBARRIER_VIRT)
-
-#define SMC_inw(a,r)\
-   ({ unsigned short v = readw ((void*) ((a) + (r))); LPD7X_IOBARRIER; v; })
-#define SMC_outw(v,a,r)   ({ writew ((v), (a) + (r)); LPD7X_IOBARRIER; })
-
-#define SMC_insw                LPD7_SMC_insw
-static inline void LPD7_SMC_insw (unsigned char* a, int r,
-                                  unsigned char* p, int l)
-{
-        unsigned short* ps = (unsigned short*) p;
-        while (l-- > 0) {
-                *ps++ = readw (a + r);
-                LPD7X_IOBARRIER;
-        }
-}
-
-#define SMC_outsw               LPD7_SMC_outsw
-static inline void LPD7_SMC_outsw (unsigned char* a, int r,
-                                   unsigned char* p, int l)
-{
-        unsigned short* ps = (unsigned short*) p;
-        while (l-- > 0) {
-                writew (*ps++, a + r);
-                LPD7X_IOBARRIER;
-        }
-}
-
-#define SMC_INTERRUPT_PREAMBLE  LPD7X_IOBARRIER
-
-#define RPC_LSA_DEFAULT         RPC_LED_TX_RX
-#define RPC_LSB_DEFAULT         RPC_LED_100_10
-
 #elif   defined(CONFIG_ARCH_VERSATILE)
 
 #define SMC_CAN_USE_8BIT        1