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authorJulia Lawall <Julia.Lawall@lip6.fr>2012-08-16 17:46:57 -0400
committerDavid S. Miller <davem@davemloft.net>2012-08-20 05:33:21 -0400
commit623d896b361f404de5ed24e312a58646ee04207d (patch)
tree97096e564b13dd8a91bbf19ec58ee7e29e1133fe /drivers/net
parent82a820e8d75f7f3fcd1af24609da79d7d89d5450 (diff)
drivers/net/wan/dscc4.c: fix error return code
Move up the initialization of rc so that failure of pci_alloc_consistent returns -ENOMEM as well. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier ret; expression e1,e2; @@ if (ret < 0) { ... return ret; } ... when != ret = e1 when forall *if(...) { ... when != ret = e2 * return ret; } // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wan/dscc4.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/wan/dscc4.c b/drivers/net/wan/dscc4.c
index 9eb6479306d6..ef36cafd44b7 100644
--- a/drivers/net/wan/dscc4.c
+++ b/drivers/net/wan/dscc4.c
@@ -774,14 +774,15 @@ static int __devinit dscc4_init_one(struct pci_dev *pdev,
774 } 774 }
775 /* Global interrupt queue */ 775 /* Global interrupt queue */
776 writel((u32)(((IRQ_RING_SIZE >> 5) - 1) << 20), ioaddr + IQLENR1); 776 writel((u32)(((IRQ_RING_SIZE >> 5) - 1) << 20), ioaddr + IQLENR1);
777
778 rc = -ENOMEM;
779
777 priv->iqcfg = (__le32 *) pci_alloc_consistent(pdev, 780 priv->iqcfg = (__le32 *) pci_alloc_consistent(pdev,
778 IRQ_RING_SIZE*sizeof(__le32), &priv->iqcfg_dma); 781 IRQ_RING_SIZE*sizeof(__le32), &priv->iqcfg_dma);
779 if (!priv->iqcfg) 782 if (!priv->iqcfg)
780 goto err_free_irq_5; 783 goto err_free_irq_5;
781 writel(priv->iqcfg_dma, ioaddr + IQCFG); 784 writel(priv->iqcfg_dma, ioaddr + IQCFG);
782 785
783 rc = -ENOMEM;
784
785 /* 786 /*
786 * SCC 0-3 private rx/tx irq structures 787 * SCC 0-3 private rx/tx irq structures
787 * IQRX/TXi needs to be set soon. Learned it the hard way... 788 * IQRX/TXi needs to be set soon. Learned it the hard way...