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authorAndy Fleming <afleming@freescale.com>2008-12-16 18:25:45 -0500
committerDavid S. Miller <davem@davemloft.net>2008-12-16 18:25:45 -0500
commit257d938a0c17838c740eb68f0005b041444ac2c2 (patch)
treede3625da9ab82bedf79c08e5672ff4185462356d /drivers/net
parent5eeabf5150878018d7c7092042f3b681f5b554b5 (diff)
gianfar: Use gfar_halt to stop DMA in gfar_probe
gfar_halt does everything we want to do there, including disabling TX/RX. It also doesn't unnecessarily enable DMA if it's already stopped. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/gianfar.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 2635f5bed77f..55e319fa7fe6 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -225,19 +225,7 @@ static int gfar_probe(struct platform_device *pdev)
225 225
226 /* Stop the DMA engine now, in case it was running before */ 226 /* Stop the DMA engine now, in case it was running before */
227 /* (The firmware could have used it, and left it running). */ 227 /* (The firmware could have used it, and left it running). */
228 /* To do this, we write Graceful Receive Stop and Graceful */ 228 gfar_halt(dev);
229 /* Transmit Stop, and then wait until the corresponding bits */
230 /* in IEVENT indicate the stops have completed. */
231 tempval = gfar_read(&priv->regs->dmactrl);
232 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
233 gfar_write(&priv->regs->dmactrl, tempval);
234
235 tempval = gfar_read(&priv->regs->dmactrl);
236 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
237 gfar_write(&priv->regs->dmactrl, tempval);
238
239 while (!(gfar_read(&priv->regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC)))
240 cpu_relax();
241 229
242 /* Reset MAC layer */ 230 /* Reset MAC layer */
243 gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); 231 gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);