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authorMichal Simek <monstr@monstr.eu>2009-09-22 01:24:14 -0400
committerDavid S. Miller <davem@davemloft.net>2009-09-22 17:00:04 -0400
commit95acf7d7ed95fdb9bfd5b7a71752701a0e382bd9 (patch)
tree3a82e056f0b9ff55edf4b52bb825704bccfffeb9 /drivers/net/xilinx_emaclite.c
parent07653aa3afe7b74cbddfe3bca82a898c413855b1 (diff)
net: xilinx_emaclite: Fix problem with first incoming packet
You can't ping the board or connect to it unless you send any packet out from board. Tested-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/xilinx_emaclite.c')
-rw-r--r--drivers/net/xilinx_emaclite.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index dc22782633a5..83a044dbd1d7 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -134,18 +134,15 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
134 } 134 }
135 135
136 /* Enable the Rx interrupts for the first buffer */ 136 /* Enable the Rx interrupts for the first buffer */
137 reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
138 out_be32(drvdata->base_addr + XEL_RSR_OFFSET, 137 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
139 reg_data | XEL_RSR_RECV_IE_MASK); 138 XEL_RSR_RECV_IE_MASK);
140 139
141 /* Enable the Rx interrupts for the second Buffer if 140 /* Enable the Rx interrupts for the second Buffer if
142 * configured in HW */ 141 * configured in HW */
143 if (drvdata->rx_ping_pong != 0) { 142 if (drvdata->rx_ping_pong != 0) {
144 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
145 XEL_RSR_OFFSET);
146 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + 143 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
147 XEL_RSR_OFFSET, 144 XEL_RSR_OFFSET,
148 reg_data | XEL_RSR_RECV_IE_MASK); 145 XEL_RSR_RECV_IE_MASK);
149 } 146 }
150 147
151 /* Enable the Global Interrupt Enable */ 148 /* Enable the Global Interrupt Enable */