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authorIvo van Doorn <IvDoorn@gmail.com>2007-10-06 07:34:52 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:55:15 -0400
commit5c58ee51ff8c0aca74c225e0263bc5dd2b917781 (patch)
treea08e875dade8a6f55d45419b728b2b077cec6dc0 /drivers/net/wireless
parent4f5af6eb3d17f8e343597ea99d97eb2f2905b2fb (diff)
[PATCH] rt2x00: Reorganize configuration handler
Reorganize configuration handling by creating a extra structure which contains precalculated values based on the mac80211 values which are usefull for all individual drivers. This also fixes the preamble configuration problem, up untill now preamble was never configured since by default the rate->val value was used when changing the mode. Now rate->val will only be used to set the basic rate mask. The preamble configuration will now be done correctly through the erp_ie_changed callback function. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c132
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c147
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c112
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h32
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c61
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c13
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c34
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c101
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c103
9 files changed, 358 insertions, 377 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index bfab5a165b76..31c1dd271627 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -291,90 +291,67 @@ static void rt2400pci_config_type(struct rt2x00_dev *rt2x00dev, const int type,
291 rt2x00pci_register_write(rt2x00dev, CSR14, reg); 291 rt2x00pci_register_write(rt2x00dev, CSR14, reg);
292} 292}
293 293
294static void rt2400pci_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 294static void rt2400pci_config_preamble(struct rt2x00_dev *rt2x00dev,
295 const int short_preamble,
296 const int ack_timeout,
297 const int ack_consume_time)
295{ 298{
296 struct ieee80211_conf *conf = &rt2x00dev->hw->conf; 299 int preamble_mask;
297 u32 reg; 300 u32 reg;
298 u32 preamble;
299 u16 value;
300
301 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
302 preamble = SHORT_PREAMBLE;
303 else
304 preamble = PREAMBLE;
305 301
306 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK; 302 /*
307 rt2x00pci_register_write(rt2x00dev, ARCSR1, reg); 303 * When short preamble is enabled, we should set bit 0x08
304 */
305 preamble_mask = short_preamble << 3;
308 306
309 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 307 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
310 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 308 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, ack_timeout);
311 SHORT_DIFS : DIFS) + 309 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, ack_consume_time);
312 PLCP + preamble + get_duration(ACK_SIZE, 10);
313 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, value);
314 value = SIFS + PLCP + preamble + get_duration(ACK_SIZE, 10);
315 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, value);
316 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 310 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
317 311
318 preamble = DEVICE_GET_RATE_FIELD(rate, PREAMBLE) ? 0x08 : 0x00;
319
320 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 312 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
321 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble); 313 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble_mask);
322 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04); 314 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04);
323 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10)); 315 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10));
324 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg); 316 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
325 317
326 rt2x00pci_register_read(rt2x00dev, ARCSR3, &reg); 318 rt2x00pci_register_read(rt2x00dev, ARCSR3, &reg);
327 rt2x00_set_field32(&reg, ARCSR3_SIGNAL, 0x01 | preamble); 319 rt2x00_set_field32(&reg, ARCSR3_SIGNAL, 0x01 | preamble_mask);
328 rt2x00_set_field32(&reg, ARCSR3_SERVICE, 0x04); 320 rt2x00_set_field32(&reg, ARCSR3_SERVICE, 0x04);
329 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 20)); 321 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 20));
330 rt2x00pci_register_write(rt2x00dev, ARCSR3, reg); 322 rt2x00pci_register_write(rt2x00dev, ARCSR3, reg);
331 323
332 rt2x00pci_register_read(rt2x00dev, ARCSR4, &reg); 324 rt2x00pci_register_read(rt2x00dev, ARCSR4, &reg);
333 rt2x00_set_field32(&reg, ARCSR4_SIGNAL, 0x02 | preamble); 325 rt2x00_set_field32(&reg, ARCSR4_SIGNAL, 0x02 | preamble_mask);
334 rt2x00_set_field32(&reg, ARCSR4_SERVICE, 0x04); 326 rt2x00_set_field32(&reg, ARCSR4_SERVICE, 0x04);
335 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 55)); 327 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 55));
336 rt2x00pci_register_write(rt2x00dev, ARCSR4, reg); 328 rt2x00pci_register_write(rt2x00dev, ARCSR4, reg);
337 329
338 rt2x00pci_register_read(rt2x00dev, ARCSR5, &reg); 330 rt2x00pci_register_read(rt2x00dev, ARCSR5, &reg);
339 rt2x00_set_field32(&reg, ARCSR5_SIGNAL, 0x03 | preamble); 331 rt2x00_set_field32(&reg, ARCSR5_SIGNAL, 0x03 | preamble_mask);
340 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 332 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
341 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 333 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
342 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 334 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
343} 335}
344 336
345static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev, 337static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev,
346 const int phymode) 338 const int basic_rate_mask)
347{ 339{
348 struct ieee80211_hw_mode *mode; 340 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask);
349 struct ieee80211_rate *rate;
350
351 rt2x00dev->curr_hwmode = HWMODE_B;
352
353 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
354 rate = &mode->rates[mode->num_rates - 1];
355
356 rt2400pci_config_rate(rt2x00dev, rate->val2);
357} 341}
358 342
359static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev, 343static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
360 const int index, const int channel) 344 struct rf_channel *rf)
361{ 345{
362 struct rf_channel reg;
363
364 /*
365 * Fill rf_reg structure.
366 */
367 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
368
369 /* 346 /*
370 * Switch on tuning bits. 347 * Switch on tuning bits.
371 */ 348 */
372 rt2x00_set_field32(&reg.rf1, RF1_TUNER, 1); 349 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 1);
373 rt2x00_set_field32(&reg.rf3, RF3_TUNER, 1); 350 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 1);
374 351
375 rt2400pci_rf_write(rt2x00dev, 1, reg.rf1); 352 rt2400pci_rf_write(rt2x00dev, 1, rf->rf1);
376 rt2400pci_rf_write(rt2x00dev, 2, reg.rf2); 353 rt2400pci_rf_write(rt2x00dev, 2, rf->rf2);
377 rt2400pci_rf_write(rt2x00dev, 3, reg.rf3); 354 rt2400pci_rf_write(rt2x00dev, 3, rf->rf3);
378 355
379 /* 356 /*
380 * RF2420 chipset don't need any additional actions. 357 * RF2420 chipset don't need any additional actions.
@@ -387,31 +364,31 @@ static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
387 * reference clock rate to activate auto_tune. 364 * reference clock rate to activate auto_tune.
388 * After that we set the value back to the correct channel. 365 * After that we set the value back to the correct channel.
389 */ 366 */
390 rt2400pci_rf_write(rt2x00dev, 1, reg.rf1); 367 rt2400pci_rf_write(rt2x00dev, 1, rf->rf1);
391 rt2400pci_rf_write(rt2x00dev, 2, 0x000c2a32); 368 rt2400pci_rf_write(rt2x00dev, 2, 0x000c2a32);
392 rt2400pci_rf_write(rt2x00dev, 3, reg.rf3); 369 rt2400pci_rf_write(rt2x00dev, 3, rf->rf3);
393 370
394 msleep(1); 371 msleep(1);
395 372
396 rt2400pci_rf_write(rt2x00dev, 1, reg.rf1); 373 rt2400pci_rf_write(rt2x00dev, 1, rf->rf1);
397 rt2400pci_rf_write(rt2x00dev, 2, reg.rf2); 374 rt2400pci_rf_write(rt2x00dev, 2, rf->rf2);
398 rt2400pci_rf_write(rt2x00dev, 3, reg.rf3); 375 rt2400pci_rf_write(rt2x00dev, 3, rf->rf3);
399 376
400 msleep(1); 377 msleep(1);
401 378
402 /* 379 /*
403 * Switch off tuning bits. 380 * Switch off tuning bits.
404 */ 381 */
405 rt2x00_set_field32(&reg.rf1, RF1_TUNER, 0); 382 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 0);
406 rt2x00_set_field32(&reg.rf3, RF3_TUNER, 0); 383 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 0);
407 384
408 rt2400pci_rf_write(rt2x00dev, 1, reg.rf1); 385 rt2400pci_rf_write(rt2x00dev, 1, rf->rf1);
409 rt2400pci_rf_write(rt2x00dev, 3, reg.rf3); 386 rt2400pci_rf_write(rt2x00dev, 3, rf->rf3);
410 387
411 /* 388 /*
412 * Clear false CRC during channel switch. 389 * Clear false CRC during channel switch.
413 */ 390 */
414 rt2x00pci_register_read(rt2x00dev, CNT0, &reg.rf1); 391 rt2x00pci_register_read(rt2x00dev, CNT0, &rf->rf1);
415} 392}
416 393
417static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower) 394static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower)
@@ -465,25 +442,22 @@ static void rt2400pci_config_antenna(struct rt2x00_dev *rt2x00dev,
465} 442}
466 443
467static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev, 444static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
468 int short_slot_time, int beacon_int) 445 struct rt2x00lib_conf *libconf)
469{ 446{
470 u32 reg; 447 u32 reg;
471 448
472 rt2x00pci_register_read(rt2x00dev, CSR11, &reg); 449 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
473 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, 450 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
474 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
475 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 451 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
476 452
477 rt2x00pci_register_read(rt2x00dev, CSR18, &reg); 453 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
478 rt2x00_set_field32(&reg, CSR18_SIFS, SIFS); 454 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
479 rt2x00_set_field32(&reg, CSR18_PIFS, 455 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
480 short_slot_time ? SHORT_PIFS : PIFS);
481 rt2x00pci_register_write(rt2x00dev, CSR18, reg); 456 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
482 457
483 rt2x00pci_register_read(rt2x00dev, CSR19, &reg); 458 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
484 rt2x00_set_field32(&reg, CSR19_DIFS, 459 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
485 short_slot_time ? SHORT_DIFS : DIFS); 460 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
486 rt2x00_set_field32(&reg, CSR19_EIFS, EIFS);
487 rt2x00pci_register_write(rt2x00dev, CSR19, reg); 461 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
488 462
489 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 463 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
@@ -492,30 +466,30 @@ static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
492 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 466 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
493 467
494 rt2x00pci_register_read(rt2x00dev, CSR12, &reg); 468 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
495 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL, beacon_int * 16); 469 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL,
496 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION, beacon_int * 16); 470 libconf->conf->beacon_int * 16);
471 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION,
472 libconf->conf->beacon_int * 16);
497 rt2x00pci_register_write(rt2x00dev, CSR12, reg); 473 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
498} 474}
499 475
500static void rt2400pci_config(struct rt2x00_dev *rt2x00dev, 476static void rt2400pci_config(struct rt2x00_dev *rt2x00dev,
501 const unsigned int flags, 477 const unsigned int flags,
502 struct ieee80211_conf *conf) 478 struct rt2x00lib_conf *libconf)
503{ 479{
504 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
505
506 if (flags & CONFIG_UPDATE_PHYMODE) 480 if (flags & CONFIG_UPDATE_PHYMODE)
507 rt2400pci_config_phymode(rt2x00dev, conf->phymode); 481 rt2400pci_config_phymode(rt2x00dev, libconf->basic_rates);
508 if (flags & CONFIG_UPDATE_CHANNEL) 482 if (flags & CONFIG_UPDATE_CHANNEL)
509 rt2400pci_config_channel(rt2x00dev, conf->channel_val, 483 rt2400pci_config_channel(rt2x00dev, &libconf->rf);
510 conf->channel);
511 if (flags & CONFIG_UPDATE_TXPOWER) 484 if (flags & CONFIG_UPDATE_TXPOWER)
512 rt2400pci_config_txpower(rt2x00dev, conf->power_level); 485 rt2400pci_config_txpower(rt2x00dev,
486 libconf->conf->power_level);
513 if (flags & CONFIG_UPDATE_ANTENNA) 487 if (flags & CONFIG_UPDATE_ANTENNA)
514 rt2400pci_config_antenna(rt2x00dev, conf->antenna_sel_tx, 488 rt2400pci_config_antenna(rt2x00dev,
515 conf->antenna_sel_rx); 489 libconf->conf->antenna_sel_tx,
490 libconf->conf->antenna_sel_rx);
516 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 491 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
517 rt2400pci_config_duration(rt2x00dev, short_slot_time, 492 rt2400pci_config_duration(rt2x00dev, libconf);
518 conf->beacon_int);
519} 493}
520 494
521static void rt2400pci_config_cw(struct rt2x00_dev *rt2x00dev, 495static void rt2400pci_config_cw(struct rt2x00_dev *rt2x00dev,
@@ -1609,6 +1583,7 @@ static const struct ieee80211_ops rt2400pci_mac80211_ops = {
1609 .configure_filter = rt2400pci_configure_filter, 1583 .configure_filter = rt2400pci_configure_filter,
1610 .get_stats = rt2x00mac_get_stats, 1584 .get_stats = rt2x00mac_get_stats,
1611 .set_retry_limit = rt2400pci_set_retry_limit, 1585 .set_retry_limit = rt2400pci_set_retry_limit,
1586 .erp_ie_changed = rt2x00mac_erp_ie_changed,
1612 .conf_tx = rt2400pci_conf_tx, 1587 .conf_tx = rt2400pci_conf_tx,
1613 .get_tx_stats = rt2x00mac_get_tx_stats, 1588 .get_tx_stats = rt2x00mac_get_tx_stats,
1614 .get_tsf = rt2400pci_get_tsf, 1589 .get_tsf = rt2400pci_get_tsf,
@@ -1634,6 +1609,7 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
1634 .config_mac_addr = rt2400pci_config_mac_addr, 1609 .config_mac_addr = rt2400pci_config_mac_addr,
1635 .config_bssid = rt2400pci_config_bssid, 1610 .config_bssid = rt2400pci_config_bssid,
1636 .config_type = rt2400pci_config_type, 1611 .config_type = rt2400pci_config_type,
1612 .config_preamble = rt2400pci_config_preamble,
1637 .config = rt2400pci_config, 1613 .config = rt2400pci_config,
1638}; 1614};
1639 1615
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index c8c6a848be97..ff2d63267b19 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -295,100 +295,72 @@ static void rt2500pci_config_type(struct rt2x00_dev *rt2x00dev, const int type,
295 rt2x00pci_register_write(rt2x00dev, CSR14, reg); 295 rt2x00pci_register_write(rt2x00dev, CSR14, reg);
296} 296}
297 297
298static void rt2500pci_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 298static void rt2500pci_config_preamble(struct rt2x00_dev *rt2x00dev,
299 const int short_preamble,
300 const int ack_timeout,
301 const int ack_consume_time)
299{ 302{
300 struct ieee80211_conf *conf = &rt2x00dev->hw->conf; 303 int preamble_mask;
301 u32 reg; 304 u32 reg;
302 u32 preamble;
303 u16 value;
304
305 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
306 preamble = SHORT_PREAMBLE;
307 else
308 preamble = PREAMBLE;
309 305
310 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK; 306 /*
311 rt2x00pci_register_write(rt2x00dev, ARCSR1, reg); 307 * When short preamble is enabled, we should set bit 0x08
308 */
309 preamble_mask = short_preamble << 3;
312 310
313 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 311 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
314 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 312 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, ack_timeout);
315 SHORT_DIFS : DIFS) + 313 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, ack_consume_time);
316 PLCP + preamble + get_duration(ACK_SIZE, 10);
317 rt2x00_set_field32(&reg, TXCSR1_ACK_TIMEOUT, value);
318 value = SIFS + PLCP + preamble + get_duration(ACK_SIZE, 10);
319 rt2x00_set_field32(&reg, TXCSR1_ACK_CONSUME_TIME, value);
320 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 314 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
321 315
322 preamble = DEVICE_GET_RATE_FIELD(rate, PREAMBLE) ? 0x08 : 0x00;
323
324 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg); 316 rt2x00pci_register_read(rt2x00dev, ARCSR2, &reg);
325 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble); 317 rt2x00_set_field32(&reg, ARCSR2_SIGNAL, 0x00 | preamble_mask);
326 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04); 318 rt2x00_set_field32(&reg, ARCSR2_SERVICE, 0x04);
327 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10)); 319 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10));
328 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg); 320 rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
329 321
330 rt2x00pci_register_read(rt2x00dev, ARCSR3, &reg); 322 rt2x00pci_register_read(rt2x00dev, ARCSR3, &reg);
331 rt2x00_set_field32(&reg, ARCSR3_SIGNAL, 0x01 | preamble); 323 rt2x00_set_field32(&reg, ARCSR3_SIGNAL, 0x01 | preamble_mask);
332 rt2x00_set_field32(&reg, ARCSR3_SERVICE, 0x04); 324 rt2x00_set_field32(&reg, ARCSR3_SERVICE, 0x04);
333 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 20)); 325 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 20));
334 rt2x00pci_register_write(rt2x00dev, ARCSR3, reg); 326 rt2x00pci_register_write(rt2x00dev, ARCSR3, reg);
335 327
336 rt2x00pci_register_read(rt2x00dev, ARCSR4, &reg); 328 rt2x00pci_register_read(rt2x00dev, ARCSR4, &reg);
337 rt2x00_set_field32(&reg, ARCSR4_SIGNAL, 0x02 | preamble); 329 rt2x00_set_field32(&reg, ARCSR4_SIGNAL, 0x02 | preamble_mask);
338 rt2x00_set_field32(&reg, ARCSR4_SERVICE, 0x04); 330 rt2x00_set_field32(&reg, ARCSR4_SERVICE, 0x04);
339 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 55)); 331 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 55));
340 rt2x00pci_register_write(rt2x00dev, ARCSR4, reg); 332 rt2x00pci_register_write(rt2x00dev, ARCSR4, reg);
341 333
342 rt2x00pci_register_read(rt2x00dev, ARCSR5, &reg); 334 rt2x00pci_register_read(rt2x00dev, ARCSR5, &reg);
343 rt2x00_set_field32(&reg, ARCSR5_SIGNAL, 0x03 | preamble); 335 rt2x00_set_field32(&reg, ARCSR5_SIGNAL, 0x03 | preamble_mask);
344 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 336 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
345 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 337 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
346 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 338 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
347} 339}
348 340
349static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev, 341static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev,
350 const int phymode) 342 const int basic_rate_mask)
351{ 343{
352 struct ieee80211_hw_mode *mode; 344 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask);
353 struct ieee80211_rate *rate;
354
355 if (phymode == MODE_IEEE80211A)
356 rt2x00dev->curr_hwmode = HWMODE_A;
357 else if (phymode == MODE_IEEE80211B)
358 rt2x00dev->curr_hwmode = HWMODE_B;
359 else
360 rt2x00dev->curr_hwmode = HWMODE_G;
361
362 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
363 rate = &mode->rates[mode->num_rates - 1];
364
365 rt2500pci_config_rate(rt2x00dev, rate->val2);
366} 345}
367 346
368static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev, 347static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
369 const int index, const int channel, 348 struct rf_channel *rf, const int txpower)
370 const int txpower)
371{ 349{
372 struct rf_channel reg;
373 u8 r70; 350 u8 r70;
374 351
375 /* 352 /*
376 * Fill rf_reg structure.
377 */
378 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
379
380 /*
381 * Set TXpower. 353 * Set TXpower.
382 */ 354 */
383 rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 355 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
384 356
385 /* 357 /*
386 * Switch on tuning bits. 358 * Switch on tuning bits.
387 * For RT2523 devices we do not need to update the R1 register. 359 * For RT2523 devices we do not need to update the R1 register.
388 */ 360 */
389 if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) 361 if (!rt2x00_rf(&rt2x00dev->chip, RF2523))
390 rt2x00_set_field32(&reg.rf1, RF1_TUNER, 1); 362 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 1);
391 rt2x00_set_field32(&reg.rf3, RF3_TUNER, 1); 363 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 1);
392 364
393 /* 365 /*
394 * For RT2525 we should first set the channel to half band higher. 366 * For RT2525 we should first set the channel to half band higher.
@@ -401,24 +373,24 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
401 0x00080d2e, 0x00080d3a 373 0x00080d2e, 0x00080d3a
402 }; 374 };
403 375
404 rt2500pci_rf_write(rt2x00dev, 1, reg.rf1); 376 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1);
405 rt2500pci_rf_write(rt2x00dev, 2, vals[channel - 1]); 377 rt2500pci_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
406 rt2500pci_rf_write(rt2x00dev, 3, reg.rf3); 378 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3);
407 if (reg.rf4) 379 if (rf->rf4)
408 rt2500pci_rf_write(rt2x00dev, 4, reg.rf4); 380 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4);
409 } 381 }
410 382
411 rt2500pci_rf_write(rt2x00dev, 1, reg.rf1); 383 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1);
412 rt2500pci_rf_write(rt2x00dev, 2, reg.rf2); 384 rt2500pci_rf_write(rt2x00dev, 2, rf->rf2);
413 rt2500pci_rf_write(rt2x00dev, 3, reg.rf3); 385 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3);
414 if (reg.rf4) 386 if (rf->rf4)
415 rt2500pci_rf_write(rt2x00dev, 4, reg.rf4); 387 rt2500pci_rf_write(rt2x00dev, 4, rf->rf4);
416 388
417 /* 389 /*
418 * Channel 14 requires the Japan filter bit to be set. 390 * Channel 14 requires the Japan filter bit to be set.
419 */ 391 */
420 r70 = 0x46; 392 r70 = 0x46;
421 rt2x00_set_field8(&r70, BBP_R70_JAPAN_FILTER, channel == 14); 393 rt2x00_set_field8(&r70, BBP_R70_JAPAN_FILTER, rf->channel == 14);
422 rt2500pci_bbp_write(rt2x00dev, 70, r70); 394 rt2500pci_bbp_write(rt2x00dev, 70, r70);
423 395
424 msleep(1); 396 msleep(1);
@@ -428,17 +400,17 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
428 * For RT2523 devices we do not need to update the R1 register. 400 * For RT2523 devices we do not need to update the R1 register.
429 */ 401 */
430 if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) { 402 if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) {
431 rt2x00_set_field32(&reg.rf1, RF1_TUNER, 0); 403 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 0);
432 rt2500pci_rf_write(rt2x00dev, 1, reg.rf1); 404 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1);
433 } 405 }
434 406
435 rt2x00_set_field32(&reg.rf3, RF3_TUNER, 0); 407 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 0);
436 rt2500pci_rf_write(rt2x00dev, 3, reg.rf3); 408 rt2500pci_rf_write(rt2x00dev, 3, rf->rf3);
437 409
438 /* 410 /*
439 * Clear false CRC during channel switch. 411 * Clear false CRC during channel switch.
440 */ 412 */
441 rt2x00pci_register_read(rt2x00dev, CNT0, &reg.rf1); 413 rt2x00pci_register_read(rt2x00dev, CNT0, &rf->rf1);
442} 414}
443 415
444static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev, 416static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev,
@@ -525,26 +497,22 @@ static void rt2500pci_config_antenna(struct rt2x00_dev *rt2x00dev,
525} 497}
526 498
527static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev, 499static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
528 const int short_slot_time, 500 struct rt2x00lib_conf *libconf)
529 const int beacon_int)
530{ 501{
531 u32 reg; 502 u32 reg;
532 503
533 rt2x00pci_register_read(rt2x00dev, CSR11, &reg); 504 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
534 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, 505 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
535 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
536 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 506 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
537 507
538 rt2x00pci_register_read(rt2x00dev, CSR18, &reg); 508 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
539 rt2x00_set_field32(&reg, CSR18_SIFS, SIFS); 509 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
540 rt2x00_set_field32(&reg, CSR18_PIFS, 510 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
541 short_slot_time ? SHORT_PIFS : PIFS);
542 rt2x00pci_register_write(rt2x00dev, CSR18, reg); 511 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
543 512
544 rt2x00pci_register_read(rt2x00dev, CSR19, &reg); 513 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
545 rt2x00_set_field32(&reg, CSR19_DIFS, 514 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
546 short_slot_time ? SHORT_DIFS : DIFS); 515 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
547 rt2x00_set_field32(&reg, CSR19_EIFS, EIFS);
548 rt2x00pci_register_write(rt2x00dev, CSR19, reg); 516 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
549 517
550 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 518 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
@@ -553,30 +521,31 @@ static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
553 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg); 521 rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
554 522
555 rt2x00pci_register_read(rt2x00dev, CSR12, &reg); 523 rt2x00pci_register_read(rt2x00dev, CSR12, &reg);
556 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL, beacon_int * 16); 524 rt2x00_set_field32(&reg, CSR12_BEACON_INTERVAL,
557 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION, beacon_int * 16); 525 libconf->conf->beacon_int * 16);
526 rt2x00_set_field32(&reg, CSR12_CFP_MAX_DURATION,
527 libconf->conf->beacon_int * 16);
558 rt2x00pci_register_write(rt2x00dev, CSR12, reg); 528 rt2x00pci_register_write(rt2x00dev, CSR12, reg);
559} 529}
560 530
561static void rt2500pci_config(struct rt2x00_dev *rt2x00dev, 531static void rt2500pci_config(struct rt2x00_dev *rt2x00dev,
562 const unsigned int flags, 532 const unsigned int flags,
563 struct ieee80211_conf *conf) 533 struct rt2x00lib_conf *libconf)
564{ 534{
565 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
566
567 if (flags & CONFIG_UPDATE_PHYMODE) 535 if (flags & CONFIG_UPDATE_PHYMODE)
568 rt2500pci_config_phymode(rt2x00dev, conf->phymode); 536 rt2500pci_config_phymode(rt2x00dev, libconf->basic_rates);
569 if (flags & CONFIG_UPDATE_CHANNEL) 537 if (flags & CONFIG_UPDATE_CHANNEL)
570 rt2500pci_config_channel(rt2x00dev, conf->channel_val, 538 rt2500pci_config_channel(rt2x00dev, &libconf->rf,
571 conf->channel, conf->power_level); 539 libconf->conf->power_level);
572 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 540 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
573 rt2500pci_config_txpower(rt2x00dev, conf->power_level); 541 rt2500pci_config_txpower(rt2x00dev,
542 libconf->conf->power_level);
574 if (flags & CONFIG_UPDATE_ANTENNA) 543 if (flags & CONFIG_UPDATE_ANTENNA)
575 rt2500pci_config_antenna(rt2x00dev, conf->antenna_sel_tx, 544 rt2500pci_config_antenna(rt2x00dev,
576 conf->antenna_sel_rx); 545 libconf->conf->antenna_sel_tx,
546 libconf->conf->antenna_sel_rx);
577 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 547 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
578 rt2500pci_config_duration(rt2x00dev, short_slot_time, 548 rt2500pci_config_duration(rt2x00dev, libconf);
579 conf->beacon_int);
580} 549}
581 550
582/* 551/*
@@ -1921,6 +1890,7 @@ static const struct ieee80211_ops rt2500pci_mac80211_ops = {
1921 .configure_filter = rt2500pci_configure_filter, 1890 .configure_filter = rt2500pci_configure_filter,
1922 .get_stats = rt2x00mac_get_stats, 1891 .get_stats = rt2x00mac_get_stats,
1923 .set_retry_limit = rt2500pci_set_retry_limit, 1892 .set_retry_limit = rt2500pci_set_retry_limit,
1893 .erp_ie_changed = rt2x00mac_erp_ie_changed,
1924 .conf_tx = rt2x00mac_conf_tx, 1894 .conf_tx = rt2x00mac_conf_tx,
1925 .get_tx_stats = rt2x00mac_get_tx_stats, 1895 .get_tx_stats = rt2x00mac_get_tx_stats,
1926 .get_tsf = rt2500pci_get_tsf, 1896 .get_tsf = rt2500pci_get_tsf,
@@ -1946,6 +1916,7 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = {
1946 .config_mac_addr = rt2500pci_config_mac_addr, 1916 .config_mac_addr = rt2500pci_config_mac_addr,
1947 .config_bssid = rt2500pci_config_bssid, 1917 .config_bssid = rt2500pci_config_bssid,
1948 .config_type = rt2500pci_config_type, 1918 .config_type = rt2500pci_config_type,
1919 .config_preamble = rt2500pci_config_preamble,
1949 .config = rt2500pci_config, 1920 .config = rt2500pci_config,
1950}; 1921};
1951 1922
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index ef8dffbdffed..45f8f744a12d 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -302,54 +302,39 @@ static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); 302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
303} 303}
304 304
305static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 305static void rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
306 const int short_preamble,
307 const int ack_timeout,
308 const int ack_consume_time)
306{ 309{
307 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
308 u16 reg; 310 u16 reg;
309 u16 value;
310 u16 preamble;
311
312 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
313 preamble = SHORT_PREAMBLE;
314 else
315 preamble = PREAMBLE;
316 311
317 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK; 312 /*
318 313 * When in atomic context, reschedule and let rt2x00lib
319 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg); 314 * call this function again.
315 */
316 if (in_atomic()) {
317 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
318 return;
319 }
320 320
321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg); 321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
322 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 322 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
323 SHORT_DIFS : DIFS) +
324 PLCP + preamble + get_duration(ACK_SIZE, 10);
325 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
326 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); 323 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
327 324
328 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg); 325 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
329 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 326 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
330 (preamble == SHORT_PREAMBLE)); 327 !!short_preamble);
331 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 328 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
332} 329}
333 330
334static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev, 331static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
335 const int phymode) 332 const int phymode,
333 const int basic_rate_mask)
336{ 334{
337 struct ieee80211_hw_mode *mode; 335 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
338 struct ieee80211_rate *rate;
339 336
340 if (phymode == MODE_IEEE80211A) 337 if (phymode == HWMODE_B) {
341 rt2x00dev->curr_hwmode = HWMODE_A;
342 else if (phymode == MODE_IEEE80211B)
343 rt2x00dev->curr_hwmode = HWMODE_B;
344 else
345 rt2x00dev->curr_hwmode = HWMODE_G;
346
347 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
348 rate = &mode->rates[mode->num_rates - 1];
349
350 rt2500usb_config_rate(rt2x00dev, rate->val2);
351
352 if (phymode == MODE_IEEE80211B) {
353 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b); 338 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
354 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040); 339 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
355 } else { 340 } else {
@@ -359,20 +344,12 @@ static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
359} 344}
360 345
361static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 346static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
362 const int index, const int channel, 347 struct rf_channel *rf, const int txpower)
363 const int txpower)
364{ 348{
365 struct rf_channel reg;
366
367 /*
368 * Fill rf_reg structure.
369 */
370 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
371
372 /* 349 /*
373 * Set TXpower. 350 * Set TXpower.
374 */ 351 */
375 rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 352 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
376 353
377 /* 354 /*
378 * For RT2525E we should first set the channel to half band higher. 355 * For RT2525E we should first set the channel to half band higher.
@@ -385,16 +362,16 @@ static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
385 0x00000902, 0x00000906 362 0x00000902, 0x00000906
386 }; 363 };
387 364
388 rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]); 365 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
389 if (reg.rf4) 366 if (rf->rf4)
390 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4); 367 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
391 } 368 }
392 369
393 rt2500usb_rf_write(rt2x00dev, 1, reg.rf1); 370 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
394 rt2500usb_rf_write(rt2x00dev, 2, reg.rf2); 371 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
395 rt2500usb_rf_write(rt2x00dev, 3, reg.rf3); 372 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
396 if (reg.rf4) 373 if (rf->rf4)
397 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4); 374 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
398} 375}
399 376
400static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, 377static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
@@ -484,38 +461,37 @@ static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
484} 461}
485 462
486static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, 463static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
487 const int short_slot_time, 464 struct rt2x00lib_conf *libconf)
488 const int beacon_int)
489{ 465{
490 u16 reg; 466 u16 reg;
491 467
492 rt2500usb_register_write(rt2x00dev, MAC_CSR10, 468 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
493 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
494 469
495 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg); 470 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
496 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4); 471 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
472 libconf->conf->beacon_int * 4);
497 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); 473 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
498} 474}
499 475
500static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, 476static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
501 const unsigned int flags, 477 const unsigned int flags,
502 struct ieee80211_conf *conf) 478 struct rt2x00lib_conf *libconf)
503{ 479{
504 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
505
506 if (flags & CONFIG_UPDATE_PHYMODE) 480 if (flags & CONFIG_UPDATE_PHYMODE)
507 rt2500usb_config_phymode(rt2x00dev, conf->phymode); 481 rt2500usb_config_phymode(rt2x00dev, libconf->phymode,
482 libconf->basic_rates);
508 if (flags & CONFIG_UPDATE_CHANNEL) 483 if (flags & CONFIG_UPDATE_CHANNEL)
509 rt2500usb_config_channel(rt2x00dev, conf->channel_val, 484 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
510 conf->channel, conf->power_level); 485 libconf->conf->power_level);
511 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 486 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
512 rt2500usb_config_txpower(rt2x00dev, conf->power_level); 487 rt2500usb_config_txpower(rt2x00dev,
488 libconf->conf->power_level);
513 if (flags & CONFIG_UPDATE_ANTENNA) 489 if (flags & CONFIG_UPDATE_ANTENNA)
514 rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx, 490 rt2500usb_config_antenna(rt2x00dev,
515 conf->antenna_sel_rx); 491 libconf->conf->antenna_sel_tx,
492 libconf->conf->antenna_sel_rx);
516 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 493 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
517 rt2500usb_config_duration(rt2x00dev, short_slot_time, 494 rt2500usb_config_duration(rt2x00dev, libconf);
518 conf->beacon_int);
519} 495}
520 496
521/* 497/*
@@ -1733,6 +1709,7 @@ static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1733 .config_interface = rt2x00mac_config_interface, 1709 .config_interface = rt2x00mac_config_interface,
1734 .configure_filter = rt2500usb_configure_filter, 1710 .configure_filter = rt2500usb_configure_filter,
1735 .get_stats = rt2x00mac_get_stats, 1711 .get_stats = rt2x00mac_get_stats,
1712 .erp_ie_changed = rt2x00mac_erp_ie_changed,
1736 .conf_tx = rt2x00mac_conf_tx, 1713 .conf_tx = rt2x00mac_conf_tx,
1737 .get_tx_stats = rt2x00mac_get_tx_stats, 1714 .get_tx_stats = rt2x00mac_get_tx_stats,
1738 .beacon_update = rt2500usb_beacon_update, 1715 .beacon_update = rt2500usb_beacon_update,
@@ -1754,6 +1731,7 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1754 .config_mac_addr = rt2500usb_config_mac_addr, 1731 .config_mac_addr = rt2500usb_config_mac_addr,
1755 .config_bssid = rt2500usb_config_bssid, 1732 .config_bssid = rt2500usb_config_bssid,
1756 .config_type = rt2500usb_config_type, 1733 .config_type = rt2500usb_config_type,
1734 .config_preamble = rt2500usb_config_preamble,
1757 .config = rt2500usb_config, 1735 .config = rt2500usb_config,
1758}; 1736};
1759 1737
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index a392e2a9d087..aabbe425470f 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -352,6 +352,28 @@ struct hw_mode_spec {
352}; 352};
353 353
354/* 354/*
355 * Configuration structure wrapper around the
356 * mac80211 configuration structure.
357 * When mac80211 configures the driver, rt2x00lib
358 * can precalculate values which are equal for all
359 * rt2x00 drivers. Those values can be stored in here.
360 */
361struct rt2x00lib_conf {
362 struct ieee80211_conf *conf;
363 struct rf_channel rf;
364
365 int phymode;
366
367 int basic_rates;
368 int slot_time;
369
370 short sifs;
371 short pifs;
372 short difs;
373 short eifs;
374};
375
376/*
355 * rt2x00lib callback functions. 377 * rt2x00lib callback functions.
356 */ 378 */
357struct rt2x00lib_ops { 379struct rt2x00lib_ops {
@@ -414,8 +436,12 @@ struct rt2x00lib_ops {
414 void (*config_bssid) (struct rt2x00_dev *rt2x00dev, __le32 *bssid); 436 void (*config_bssid) (struct rt2x00_dev *rt2x00dev, __le32 *bssid);
415 void (*config_type) (struct rt2x00_dev *rt2x00dev, const int type, 437 void (*config_type) (struct rt2x00_dev *rt2x00dev, const int type,
416 const int tsf_sync); 438 const int tsf_sync);
439 void (*config_preamble) (struct rt2x00_dev *rt2x00dev,
440 const int short_preamble,
441 const int ack_timeout,
442 const int ack_consume_time);
417 void (*config) (struct rt2x00_dev *rt2x00dev, const unsigned int flags, 443 void (*config) (struct rt2x00_dev *rt2x00dev, const unsigned int flags,
418 struct ieee80211_conf *conf); 444 struct rt2x00lib_conf *libconf);
419#define CONFIG_UPDATE_PHYMODE ( 1 << 1 ) 445#define CONFIG_UPDATE_PHYMODE ( 1 << 1 )
420#define CONFIG_UPDATE_CHANNEL ( 1 << 2 ) 446#define CONFIG_UPDATE_CHANNEL ( 1 << 2 )
421#define CONFIG_UPDATE_TXPOWER ( 1 << 3 ) 447#define CONFIG_UPDATE_TXPOWER ( 1 << 3 )
@@ -472,6 +498,7 @@ enum rt2x00_flags {
472 CONFIG_EXTERNAL_LNA_BG, 498 CONFIG_EXTERNAL_LNA_BG,
473 CONFIG_DOUBLE_ANTENNA, 499 CONFIG_DOUBLE_ANTENNA,
474 CONFIG_DISABLE_LINK_TUNING, 500 CONFIG_DISABLE_LINK_TUNING,
501 CONFIG_SHORT_PREAMBLE,
475}; 502};
476 503
477/* 504/*
@@ -612,6 +639,7 @@ struct rt2x00_dev {
612 */ 639 */
613 struct work_struct beacon_work; 640 struct work_struct beacon_work;
614 struct work_struct filter_work; 641 struct work_struct filter_work;
642 struct work_struct config_work;
615 643
616 /* 644 /*
617 * Data ring arrays for RX, TX and Beacon. 645 * Data ring arrays for RX, TX and Beacon.
@@ -792,6 +820,8 @@ int rt2x00mac_get_stats(struct ieee80211_hw *hw,
792 struct ieee80211_low_level_stats *stats); 820 struct ieee80211_low_level_stats *stats);
793int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw, 821int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw,
794 struct ieee80211_tx_queue_stats *stats); 822 struct ieee80211_tx_queue_stats *stats);
823void rt2x00mac_erp_ie_changed(struct ieee80211_hw *hw, u8 changes,
824 int cts_protection, int preamble);
795int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue, 825int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue,
796 const struct ieee80211_tx_queue_params *params); 826 const struct ieee80211_tx_queue_params *params);
797 827
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index f8e87aa86335..12914cf7156c 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -97,7 +97,11 @@ void rt2x00lib_config_type(struct rt2x00_dev *rt2x00dev, const int type)
97void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, 97void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
98 struct ieee80211_conf *conf, const int force_config) 98 struct ieee80211_conf *conf, const int force_config)
99{ 99{
100 struct rt2x00lib_conf libconf;
101 struct ieee80211_hw_mode *mode;
102 struct ieee80211_rate *rate;
100 int flags = 0; 103 int flags = 0;
104 int short_slot_time;
101 105
102 /* 106 /*
103 * In some situations we want to force all configurations 107 * In some situations we want to force all configurations
@@ -128,8 +132,62 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
128 flags |= CONFIG_UPDATE_SLOT_TIME; 132 flags |= CONFIG_UPDATE_SLOT_TIME;
129 flags |= CONFIG_UPDATE_BEACON_INT; 133 flags |= CONFIG_UPDATE_BEACON_INT;
130 134
135 /*
136 * We have determined what options should be updated,
137 * now precalculate device configuration values depending
138 * on what configuration options need to be updated.
139 */
131config: 140config:
132 rt2x00dev->ops->lib->config(rt2x00dev, flags, conf); 141 memset(&libconf, 0, sizeof(libconf));
142
143 if (flags & CONFIG_UPDATE_PHYMODE) {
144 switch (conf->phymode) {
145 case MODE_IEEE80211A:
146 libconf.phymode = HWMODE_A;
147 break;
148 case MODE_IEEE80211B:
149 libconf.phymode = HWMODE_B;
150 break;
151 case MODE_IEEE80211G:
152 libconf.phymode = HWMODE_G;
153 break;
154 default:
155 ERROR(rt2x00dev,
156 "Attempt to configure unsupported mode (%d)"
157 "Defaulting to 802.11b", conf->phymode);
158 libconf.phymode = HWMODE_B;
159 }
160
161 mode = &rt2x00dev->hwmodes[libconf.phymode];
162 rate = &mode->rates[mode->num_rates - 1];
163
164 libconf.basic_rates =
165 DEVICE_GET_RATE_FIELD(rate->val, RATEMASK) & DEV_BASIC_RATEMASK;
166 }
167
168 if (flags & CONFIG_UPDATE_CHANNEL) {
169 memcpy(&libconf.rf,
170 &rt2x00dev->spec.channels[conf->channel_val],
171 sizeof(libconf.rf));
172 }
173
174 if (flags & CONFIG_UPDATE_SLOT_TIME) {
175 short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
176
177 libconf.slot_time =
178 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME;
179 libconf.sifs = SIFS;
180 libconf.pifs = short_slot_time ? SHORT_PIFS : PIFS;
181 libconf.difs = short_slot_time ? SHORT_DIFS : DIFS;
182 libconf.eifs = EIFS;
183 }
184
185 libconf.conf = conf;
186
187 /*
188 * Start configuration.
189 */
190 rt2x00dev->ops->lib->config(rt2x00dev, flags, &libconf);
133 191
134 /* 192 /*
135 * Some configuration changes affect the link quality 193 * Some configuration changes affect the link quality
@@ -138,6 +196,7 @@ config:
138 if (flags & (CONFIG_UPDATE_CHANNEL | CONFIG_UPDATE_ANTENNA)) 196 if (flags & (CONFIG_UPDATE_CHANNEL | CONFIG_UPDATE_ANTENNA))
139 rt2x00lib_reset_link_tuner(rt2x00dev); 197 rt2x00lib_reset_link_tuner(rt2x00dev);
140 198
199 rt2x00dev->curr_hwmode = libconf.phymode;
141 rt2x00dev->rx_status.phymode = conf->phymode; 200 rt2x00dev->rx_status.phymode = conf->phymode;
142 rt2x00dev->rx_status.freq = conf->freq; 201 rt2x00dev->rx_status.freq = conf->freq;
143 rt2x00dev->rx_status.channel = conf->channel; 202 rt2x00dev->rx_status.channel = conf->channel;
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index e14104869172..bb6f46cfbb9f 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -142,6 +142,8 @@ void rt2x00lib_disable_radio(struct rt2x00_dev *rt2x00dev)
142 cancel_work_sync(&rt2x00dev->beacon_work); 142 cancel_work_sync(&rt2x00dev->beacon_work);
143 if (work_pending(&rt2x00dev->filter_work)) 143 if (work_pending(&rt2x00dev->filter_work))
144 cancel_work_sync(&rt2x00dev->filter_work); 144 cancel_work_sync(&rt2x00dev->filter_work);
145 if (work_pending(&rt2x00dev->config_work))
146 cancel_work_sync(&rt2x00dev->config_work);
145 147
146 /* 148 /*
147 * Stop the TX queues. 149 * Stop the TX queues.
@@ -288,6 +290,16 @@ static void rt2x00lib_packetfilter_scheduled(struct work_struct *work)
288 filter, &filter, 0, NULL); 290 filter, &filter, 0, NULL);
289} 291}
290 292
293static void rt2x00lib_configuration_scheduled(struct work_struct *work)
294{
295 struct rt2x00_dev *rt2x00dev =
296 container_of(work, struct rt2x00_dev, config_work);
297 int preamble = !test_bit(CONFIG_SHORT_PREAMBLE, &rt2x00dev->flags);
298
299 rt2x00mac_erp_ie_changed(rt2x00dev->hw,
300 IEEE80211_ERP_CHANGE_PREAMBLE, 0, preamble);
301}
302
291/* 303/*
292 * Interrupt context handlers. 304 * Interrupt context handlers.
293 */ 305 */
@@ -990,6 +1002,7 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
990 */ 1002 */
991 INIT_WORK(&rt2x00dev->beacon_work, rt2x00lib_beacondone_scheduled); 1003 INIT_WORK(&rt2x00dev->beacon_work, rt2x00lib_beacondone_scheduled);
992 INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled); 1004 INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled);
1005 INIT_WORK(&rt2x00dev->config_work, rt2x00lib_configuration_scheduled);
993 INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner); 1006 INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner);
994 1007
995 /* 1008 /*
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index f519d7396848..4a6a0bd01ff1 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -365,6 +365,40 @@ int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw,
365} 365}
366EXPORT_SYMBOL_GPL(rt2x00mac_get_tx_stats); 366EXPORT_SYMBOL_GPL(rt2x00mac_get_tx_stats);
367 367
368void rt2x00mac_erp_ie_changed(struct ieee80211_hw *hw, u8 changes,
369 int cts_protection, int preamble)
370{
371 struct rt2x00_dev *rt2x00dev = hw->priv;
372 int short_preamble;
373 int ack_timeout;
374 int ack_consume_time;
375 int difs;
376
377 /*
378 * We only support changing preamble mode.
379 */
380 if (!(changes & IEEE80211_ERP_CHANGE_PREAMBLE))
381 return;
382
383 short_preamble = !preamble;
384 preamble = !!(preamble) ? PREAMBLE : SHORT_PREAMBLE;
385
386 difs = (hw->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
387 SHORT_DIFS : DIFS;
388 ack_timeout = difs + PLCP + preamble + get_duration(ACK_SIZE, 10);
389
390 ack_consume_time = SIFS + PLCP + preamble + get_duration(ACK_SIZE, 10);
391
392 if (short_preamble)
393 __set_bit(CONFIG_SHORT_PREAMBLE, &rt2x00dev->flags);
394 else
395 __clear_bit(CONFIG_SHORT_PREAMBLE, &rt2x00dev->flags);
396
397 rt2x00dev->ops->lib->config_preamble(rt2x00dev, short_preamble,
398 ack_timeout, ack_consume_time);
399}
400EXPORT_SYMBOL_GPL(rt2x00mac_erp_ie_changed);
401
368int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue, 402int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue,
369 const struct ieee80211_tx_queue_params *params) 403 const struct ieee80211_tx_queue_params *params)
370{ 404{
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index cd22817cced5..1a869a5cbe91 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -328,62 +328,31 @@ static void rt61pci_config_type(struct rt2x00_dev *rt2x00dev, const int type,
328 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); 328 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
329} 329}
330 330
331static void rt61pci_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 331static void rt61pci_config_preamble(struct rt2x00_dev *rt2x00dev,
332 const int short_preamble,
333 const int ack_timeout,
334 const int ack_consume_time)
332{ 335{
333 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
334 u32 reg; 336 u32 reg;
335 u32 value;
336 u32 preamble;
337
338 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
339 preamble = SHORT_PREAMBLE;
340 else
341 preamble = PREAMBLE;
342
343 /*
344 * Extract the allowed ratemask from the device specific rate value,
345 * We need to set TXRX_CSR5 to the basic rate mask so we need to mask
346 * off the non-basic rates.
347 */
348 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
349
350 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, reg);
351 337
352 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 338 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
353 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 339 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
354 SHORT_DIFS : DIFS) +
355 PLCP + preamble + get_duration(ACK_SIZE, 10);
356 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, value);
357 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg); 340 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
358 341
359 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg); 342 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
360 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 343 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
361 (preamble == SHORT_PREAMBLE)); 344 !!short_preamble);
362 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 345 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
363} 346}
364 347
365static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev, 348static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev,
366 const int phymode) 349 const int basic_rate_mask)
367{ 350{
368 struct ieee80211_hw_mode *mode; 351 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
369 struct ieee80211_rate *rate;
370
371 if (phymode == MODE_IEEE80211A)
372 rt2x00dev->curr_hwmode = HWMODE_A;
373 else if (phymode == MODE_IEEE80211B)
374 rt2x00dev->curr_hwmode = HWMODE_B;
375 else
376 rt2x00dev->curr_hwmode = HWMODE_G;
377
378 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
379 rate = &mode->rates[mode->num_rates - 1];
380
381 rt61pci_config_rate(rt2x00dev, rate->val2);
382} 352}
383 353
384static void rt61pci_config_lock_channel(struct rt2x00_dev *rt2x00dev, 354static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
385 struct rf_channel *rf, 355 struct rf_channel *rf, const int txpower)
386 const int txpower)
387{ 356{
388 u8 r3; 357 u8 r3;
389 u8 r94; 358 u8 r94;
@@ -428,20 +397,6 @@ static void rt61pci_config_lock_channel(struct rt2x00_dev *rt2x00dev,
428 msleep(1); 397 msleep(1);
429} 398}
430 399
431static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
432 const int index, const int channel,
433 const int txpower)
434{
435 struct rf_channel rf;
436
437 /*
438 * Fill rf_reg structure.
439 */
440 memcpy(&rf, &rt2x00dev->spec.channels[index], sizeof(rf));
441
442 rt61pci_config_lock_channel(rt2x00dev, &rf, txpower);
443}
444
445static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev, 400static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
446 const int txpower) 401 const int txpower)
447{ 402{
@@ -452,7 +407,7 @@ static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
452 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3); 407 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
453 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4); 408 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
454 409
455 rt61pci_config_lock_channel(rt2x00dev, &rf, txpower); 410 rt61pci_config_channel(rt2x00dev, &rf, txpower);
456} 411}
457 412
458static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 413static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -714,20 +669,18 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
714} 669}
715 670
716static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev, 671static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
717 const int short_slot_time, 672 struct rt2x00lib_conf *libconf)
718 const int beacon_int)
719{ 673{
720 u32 reg; 674 u32 reg;
721 675
722 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg); 676 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
723 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, 677 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
724 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
725 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg); 678 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
726 679
727 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg); 680 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
728 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, SIFS); 681 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
729 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 682 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
730 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, EIFS); 683 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
731 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg); 684 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
732 685
733 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 686 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
@@ -739,29 +692,27 @@ static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
739 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 692 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
740 693
741 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg); 694 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
742 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, beacon_int * 16); 695 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
696 libconf->conf->beacon_int * 16);
743 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); 697 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
744} 698}
745 699
746static void rt61pci_config(struct rt2x00_dev *rt2x00dev, 700static void rt61pci_config(struct rt2x00_dev *rt2x00dev,
747 const unsigned int flags, 701 const unsigned int flags,
748 struct ieee80211_conf *conf) 702 struct rt2x00lib_conf *libconf)
749{ 703{
750 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
751
752 if (flags & CONFIG_UPDATE_PHYMODE) 704 if (flags & CONFIG_UPDATE_PHYMODE)
753 rt61pci_config_phymode(rt2x00dev, conf->phymode); 705 rt61pci_config_phymode(rt2x00dev, libconf->basic_rates);
754 if (flags & CONFIG_UPDATE_CHANNEL) 706 if (flags & CONFIG_UPDATE_CHANNEL)
755 rt61pci_config_channel(rt2x00dev, conf->channel_val, 707 rt61pci_config_channel(rt2x00dev, &libconf->rf,
756 conf->channel, conf->power_level); 708 libconf->conf->power_level);
757 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 709 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
758 rt61pci_config_txpower(rt2x00dev, conf->power_level); 710 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level);
759 if (flags & CONFIG_UPDATE_ANTENNA) 711 if (flags & CONFIG_UPDATE_ANTENNA)
760 rt61pci_config_antenna(rt2x00dev, conf->antenna_sel_tx, 712 rt61pci_config_antenna(rt2x00dev, libconf->conf->antenna_sel_tx,
761 conf->antenna_sel_rx); 713 libconf->conf->antenna_sel_rx);
762 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 714 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
763 rt61pci_config_duration(rt2x00dev, short_slot_time, 715 rt61pci_config_duration(rt2x00dev, libconf);
764 conf->beacon_int);
765} 716}
766 717
767/* 718/*
@@ -2513,6 +2464,7 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = {
2513 .configure_filter = rt61pci_configure_filter, 2464 .configure_filter = rt61pci_configure_filter,
2514 .get_stats = rt2x00mac_get_stats, 2465 .get_stats = rt2x00mac_get_stats,
2515 .set_retry_limit = rt61pci_set_retry_limit, 2466 .set_retry_limit = rt61pci_set_retry_limit,
2467 .erp_ie_changed = rt2x00mac_erp_ie_changed,
2516 .conf_tx = rt2x00mac_conf_tx, 2468 .conf_tx = rt2x00mac_conf_tx,
2517 .get_tx_stats = rt2x00mac_get_tx_stats, 2469 .get_tx_stats = rt2x00mac_get_tx_stats,
2518 .get_tsf = rt61pci_get_tsf, 2470 .get_tsf = rt61pci_get_tsf,
@@ -2539,6 +2491,7 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = {
2539 .config_mac_addr = rt61pci_config_mac_addr, 2491 .config_mac_addr = rt61pci_config_mac_addr,
2540 .config_bssid = rt61pci_config_bssid, 2492 .config_bssid = rt61pci_config_bssid,
2541 .config_type = rt61pci_config_type, 2493 .config_type = rt61pci_config_type,
2494 .config_preamble = rt61pci_config_preamble,
2542 .config = rt61pci_config, 2495 .config = rt61pci_config,
2543}; 2496};
2544 2497
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 9e1bf4d77e10..984117fe1f5e 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -308,57 +308,40 @@ static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
308 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg); 308 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
309} 309}
310 310
311static void rt73usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 311static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
312 const int short_preamble,
313 const int ack_timeout,
314 const int ack_consume_time)
312{ 315{
313 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
314 u32 reg; 316 u32 reg;
315 u32 value;
316 u32 preamble;
317 317
318 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE)) 318 /*
319 preamble = SHORT_PREAMBLE; 319 * When in atomic context, reschedule and let rt2x00lib
320 else 320 * call this function again.
321 preamble = PREAMBLE; 321 */
322 322 if (in_atomic()) {
323 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK; 323 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
324 324 return;
325 rt73usb_register_write(rt2x00dev, TXRX_CSR5, reg); 325 }
326 326
327 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg); 327 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
328 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 328 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
329 SHORT_DIFS : DIFS) +
330 PLCP + preamble + get_duration(ACK_SIZE, 10);
331 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, value);
332 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg); 329 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
333 330
334 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg); 331 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
335 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 332 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
336 (preamble == SHORT_PREAMBLE)); 333 !!short_preamble);
337 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg); 334 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
338} 335}
339 336
340static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev, 337static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
341 const int phymode) 338 const int basic_rate_mask)
342{ 339{
343 struct ieee80211_hw_mode *mode; 340 rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
344 struct ieee80211_rate *rate;
345
346 if (phymode == MODE_IEEE80211A)
347 rt2x00dev->curr_hwmode = HWMODE_A;
348 else if (phymode == MODE_IEEE80211B)
349 rt2x00dev->curr_hwmode = HWMODE_B;
350 else
351 rt2x00dev->curr_hwmode = HWMODE_G;
352
353 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
354 rate = &mode->rates[mode->num_rates - 1];
355
356 rt73usb_config_rate(rt2x00dev, rate->val2);
357} 341}
358 342
359static void rt73usb_config_lock_channel(struct rt2x00_dev *rt2x00dev, 343static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
360 struct rf_channel *rf, 344 struct rf_channel *rf, const int txpower)
361 const int txpower)
362{ 345{
363 u8 r3; 346 u8 r3;
364 u8 r94; 347 u8 r94;
@@ -399,20 +382,6 @@ static void rt73usb_config_lock_channel(struct rt2x00_dev *rt2x00dev,
399 udelay(10); 382 udelay(10);
400} 383}
401 384
402static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
403 const int index, const int channel,
404 const int txpower)
405{
406 struct rf_channel rf;
407
408 /*
409 * Fill rf_reg structure.
410 */
411 memcpy(&rf, &rt2x00dev->spec.channels[index], sizeof(rf));
412
413 rt73usb_config_lock_channel(rt2x00dev, &rf, txpower);
414}
415
416static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev, 385static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
417 const int txpower) 386 const int txpower)
418{ 387{
@@ -423,7 +392,7 @@ static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
423 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3); 392 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
424 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4); 393 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
425 394
426 rt73usb_config_lock_channel(rt2x00dev, &rf, txpower); 395 rt73usb_config_channel(rt2x00dev, &rf, txpower);
427} 396}
428 397
429static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 398static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -577,20 +546,18 @@ static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
577} 546}
578 547
579static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev, 548static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
580 const int short_slot_time, 549 struct rt2x00lib_conf *libconf)
581 const int beacon_int)
582{ 550{
583 u32 reg; 551 u32 reg;
584 552
585 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg); 553 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
586 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, 554 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
587 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
588 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg); 555 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
589 556
590 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg); 557 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
591 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, SIFS); 558 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
592 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 559 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
593 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, EIFS); 560 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
594 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg); 561 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
595 562
596 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg); 563 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
@@ -602,29 +569,27 @@ static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
602 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg); 569 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
603 570
604 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg); 571 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
605 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, beacon_int * 16); 572 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
573 libconf->conf->beacon_int * 16);
606 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg); 574 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
607} 575}
608 576
609static void rt73usb_config(struct rt2x00_dev *rt2x00dev, 577static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
610 const unsigned int flags, 578 const unsigned int flags,
611 struct ieee80211_conf *conf) 579 struct rt2x00lib_conf *libconf)
612{ 580{
613 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
614
615 if (flags & CONFIG_UPDATE_PHYMODE) 581 if (flags & CONFIG_UPDATE_PHYMODE)
616 rt73usb_config_phymode(rt2x00dev, conf->phymode); 582 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
617 if (flags & CONFIG_UPDATE_CHANNEL) 583 if (flags & CONFIG_UPDATE_CHANNEL)
618 rt73usb_config_channel(rt2x00dev, conf->channel_val, 584 rt73usb_config_channel(rt2x00dev, &libconf->rf,
619 conf->channel, conf->power_level); 585 libconf->conf->power_level);
620 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 586 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
621 rt73usb_config_txpower(rt2x00dev, conf->power_level); 587 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
622 if (flags & CONFIG_UPDATE_ANTENNA) 588 if (flags & CONFIG_UPDATE_ANTENNA)
623 rt73usb_config_antenna(rt2x00dev, conf->antenna_sel_tx, 589 rt73usb_config_antenna(rt2x00dev, libconf->conf->antenna_sel_tx,
624 conf->antenna_sel_rx); 590 libconf->conf->antenna_sel_rx);
625 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 591 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
626 rt73usb_config_duration(rt2x00dev, short_slot_time, 592 rt73usb_config_duration(rt2x00dev, libconf);
627 conf->beacon_int);
628} 593}
629 594
630/* 595/*
@@ -2002,6 +1967,7 @@ static const struct ieee80211_ops rt73usb_mac80211_ops = {
2002 .configure_filter = rt73usb_configure_filter, 1967 .configure_filter = rt73usb_configure_filter,
2003 .get_stats = rt2x00mac_get_stats, 1968 .get_stats = rt2x00mac_get_stats,
2004 .set_retry_limit = rt73usb_set_retry_limit, 1969 .set_retry_limit = rt73usb_set_retry_limit,
1970 .erp_ie_changed = rt2x00mac_erp_ie_changed,
2005 .conf_tx = rt2x00mac_conf_tx, 1971 .conf_tx = rt2x00mac_conf_tx,
2006 .get_tx_stats = rt2x00mac_get_tx_stats, 1972 .get_tx_stats = rt2x00mac_get_tx_stats,
2007#if 0 1973#if 0
@@ -2032,6 +1998,7 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2032 .config_mac_addr = rt73usb_config_mac_addr, 1998 .config_mac_addr = rt73usb_config_mac_addr,
2033 .config_bssid = rt73usb_config_bssid, 1999 .config_bssid = rt73usb_config_bssid,
2034 .config_type = rt73usb_config_type, 2000 .config_type = rt73usb_config_type,
2001 .config_preamble = rt73usb_config_preamble,
2035 .config = rt73usb_config, 2002 .config = rt73usb_config,
2036}; 2003};
2037 2004
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 02:40:25 -0500