diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2009-09-16 23:55:25 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-09-23 11:35:51 -0400 |
commit | 46fe782c97f5e54a02485ad97b2e6256386a8c8f (patch) | |
tree | 7cf464de9b45e2b600d39d5f80188b36d69bb9f0 /drivers/net/wireless | |
parent | 93b1b37f6a4de8bce17f55d9cfa10ef5c8c04e8a (diff) |
ath9k: Restore TSF after RESET
For chips requiring RTC reset, TSF has to be restored
after power on reset.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 82a24408528b..af5bb50a2e8b 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -2338,6 +2338,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2338 | struct ath9k_channel *curchan = ah->curchan; | 2338 | struct ath9k_channel *curchan = ah->curchan; |
2339 | u32 saveDefAntenna; | 2339 | u32 saveDefAntenna; |
2340 | u32 macStaId1; | 2340 | u32 macStaId1; |
2341 | u64 tsf = 0; | ||
2341 | int i, rx_chainmask, r; | 2342 | int i, rx_chainmask, r; |
2342 | 2343 | ||
2343 | ah->extprotspacing = sc->ht_extprotspacing; | 2344 | ah->extprotspacing = sc->ht_extprotspacing; |
@@ -2372,6 +2373,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2372 | 2373 | ||
2373 | macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B; | 2374 | macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B; |
2374 | 2375 | ||
2376 | /* For chips on which RTC reset is done, save TSF before it gets cleared */ | ||
2377 | if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) | ||
2378 | tsf = ath9k_hw_gettsf64(ah); | ||
2379 | |||
2375 | saveLedState = REG_READ(ah, AR_CFG_LED) & | 2380 | saveLedState = REG_READ(ah, AR_CFG_LED) & |
2376 | (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL | | 2381 | (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL | |
2377 | AR_CFG_LED_BLINK_THRESH_SEL | AR_CFG_LED_BLINK_SLOW); | 2382 | AR_CFG_LED_BLINK_THRESH_SEL | AR_CFG_LED_BLINK_SLOW); |
@@ -2398,6 +2403,10 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2398 | udelay(50); | 2403 | udelay(50); |
2399 | } | 2404 | } |
2400 | 2405 | ||
2406 | /* Restore TSF */ | ||
2407 | if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) | ||
2408 | ath9k_hw_settsf64(ah, tsf); | ||
2409 | |||
2401 | if (AR_SREV_9280_10_OR_LATER(ah)) | 2410 | if (AR_SREV_9280_10_OR_LATER(ah)) |
2402 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); | 2411 | REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE); |
2403 | 2412 | ||