diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2009-02-09 02:57:03 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-13 13:44:58 -0500 |
commit | 17d7904de85125c62c7258d7cb21207f26d04048 (patch) | |
tree | 298d52125b29534c6dfcf79d6eb643c2261e82df /drivers/net/wireless | |
parent | ee6e8d1c234e62e503f2dd8137643b24cf424886 (diff) |
ath9k: Remove all the sc_ prefixes
This patch removes the useless sc_ prefixes for all variables.
Also, refer to interfaces as VIFs and not as VAPs anymore.
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/ath9k/ath9k.h | 144 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/beacon.c | 56 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/debug.c | 130 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/hw.c | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/main.c | 302 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/recv.c | 18 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/xmit.c | 16 |
7 files changed, 330 insertions, 342 deletions
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h index 3cb7bf86410e..d60b2e726414 100644 --- a/drivers/net/wireless/ath9k/ath9k.h +++ b/drivers/net/wireless/ath9k/ath9k.h | |||
@@ -104,13 +104,13 @@ enum buffer_type { | |||
104 | }; | 104 | }; |
105 | 105 | ||
106 | struct ath_buf_state { | 106 | struct ath_buf_state { |
107 | int bfs_nframes; /* # frames in aggregate */ | 107 | int bfs_nframes; |
108 | u16 bfs_al; /* length of aggregate */ | 108 | u16 bfs_al; |
109 | u16 bfs_frmlen; /* length of frame */ | 109 | u16 bfs_frmlen; |
110 | int bfs_seqno; /* sequence number */ | 110 | int bfs_seqno; |
111 | int bfs_tidno; /* tid of this frame */ | 111 | int bfs_tidno; |
112 | int bfs_retries; /* current retries */ | 112 | int bfs_retries; |
113 | u32 bf_type; /* BUF_* (enum buffer_type) */ | 113 | u32 bf_type; |
114 | u32 bfs_keyix; | 114 | u32 bfs_keyix; |
115 | enum ath9k_key_type bfs_keytype; | 115 | enum ath9k_key_type bfs_keytype; |
116 | }; | 116 | }; |
@@ -129,10 +129,6 @@ struct ath_buf_state { | |||
129 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) | 129 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) |
130 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) | 130 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) |
131 | 131 | ||
132 | /* | ||
133 | * Abstraction of a contiguous buffer to transmit/receive. There is only | ||
134 | * a single hw descriptor encapsulated here. | ||
135 | */ | ||
136 | struct ath_buf { | 132 | struct ath_buf { |
137 | struct list_head list; | 133 | struct list_head list; |
138 | struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or | 134 | struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or |
@@ -143,22 +139,20 @@ struct ath_buf { | |||
143 | dma_addr_t bf_daddr; /* physical addr of desc */ | 139 | dma_addr_t bf_daddr; /* physical addr of desc */ |
144 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ | 140 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ |
145 | u32 bf_status; | 141 | u32 bf_status; |
146 | u16 bf_flags; /* tx descriptor flags */ | 142 | u16 bf_flags; |
147 | struct ath_buf_state bf_state; /* buffer state */ | 143 | struct ath_buf_state bf_state; |
148 | dma_addr_t bf_dmacontext; | 144 | dma_addr_t bf_dmacontext; |
149 | }; | 145 | }; |
150 | 146 | ||
151 | #define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0) | 147 | #define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0) |
152 | #define ATH_BUFSTATUS_STALE 0x00000002 | 148 | #define ATH_BUFSTATUS_STALE 0x00000002 |
153 | 149 | ||
154 | /* DMA state for tx/rx descriptors */ | ||
155 | |||
156 | struct ath_descdma { | 150 | struct ath_descdma { |
157 | const char *dd_name; | 151 | const char *dd_name; |
158 | struct ath_desc *dd_desc; /* descriptors */ | 152 | struct ath_desc *dd_desc; |
159 | dma_addr_t dd_desc_paddr; /* physical addr of dd_desc */ | 153 | dma_addr_t dd_desc_paddr; |
160 | u32 dd_desc_len; /* size of dd_desc */ | 154 | u32 dd_desc_len; |
161 | struct ath_buf *dd_bufptr; /* associated buffers */ | 155 | struct ath_buf *dd_bufptr; |
162 | dma_addr_t dd_dmacontext; | 156 | dma_addr_t dd_dmacontext; |
163 | }; | 157 | }; |
164 | 158 | ||
@@ -246,15 +240,15 @@ enum ATH_AGGR_STATUS { | |||
246 | }; | 240 | }; |
247 | 241 | ||
248 | struct ath_txq { | 242 | struct ath_txq { |
249 | u32 axq_qnum; /* hardware q number */ | 243 | u32 axq_qnum; |
250 | u32 *axq_link; /* link ptr in last TX desc */ | 244 | u32 *axq_link; |
251 | struct list_head axq_q; /* transmit queue */ | 245 | struct list_head axq_q; |
252 | spinlock_t axq_lock; | 246 | spinlock_t axq_lock; |
253 | u32 axq_depth; /* queue depth */ | 247 | u32 axq_depth; |
254 | u8 axq_aggr_depth; /* aggregates queued */ | 248 | u8 axq_aggr_depth; |
255 | u32 axq_totalqueued; /* total ever queued */ | 249 | u32 axq_totalqueued; |
256 | bool stopped; /* Is mac80211 queue stopped ? */ | 250 | bool stopped; |
257 | struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ | 251 | struct ath_buf *axq_linkbuf; |
258 | 252 | ||
259 | /* first desc of the last descriptor that contains CTS */ | 253 | /* first desc of the last descriptor that contains CTS */ |
260 | struct ath_desc *axq_lastdsWithCTS; | 254 | struct ath_desc *axq_lastdsWithCTS; |
@@ -270,45 +264,39 @@ struct ath_txq { | |||
270 | #define AGGR_ADDBA_COMPLETE BIT(2) | 264 | #define AGGR_ADDBA_COMPLETE BIT(2) |
271 | #define AGGR_ADDBA_PROGRESS BIT(3) | 265 | #define AGGR_ADDBA_PROGRESS BIT(3) |
272 | 266 | ||
273 | /* per TID aggregate tx state for a destination */ | ||
274 | struct ath_atx_tid { | 267 | struct ath_atx_tid { |
275 | struct list_head list; /* round-robin tid entry */ | 268 | struct list_head list; |
276 | struct list_head buf_q; /* pending buffers */ | 269 | struct list_head buf_q; |
277 | struct ath_node *an; | 270 | struct ath_node *an; |
278 | struct ath_atx_ac *ac; | 271 | struct ath_atx_ac *ac; |
279 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */ | 272 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; |
280 | u16 seq_start; | 273 | u16 seq_start; |
281 | u16 seq_next; | 274 | u16 seq_next; |
282 | u16 baw_size; | 275 | u16 baw_size; |
283 | int tidno; | 276 | int tidno; |
284 | int baw_head; /* first un-acked tx buffer */ | 277 | int baw_head; /* first un-acked tx buffer */ |
285 | int baw_tail; /* next unused tx buffer slot */ | 278 | int baw_tail; /* next unused tx buffer slot */ |
286 | int sched; | 279 | int sched; |
287 | int paused; | 280 | int paused; |
288 | u8 state; | 281 | u8 state; |
289 | int addba_exchangeattempts; | 282 | int addba_exchangeattempts; |
290 | }; | 283 | }; |
291 | 284 | ||
292 | /* per access-category aggregate tx state for a destination */ | ||
293 | struct ath_atx_ac { | 285 | struct ath_atx_ac { |
294 | int sched; /* dest-ac is scheduled */ | 286 | int sched; |
295 | int qnum; /* H/W queue number associated | 287 | int qnum; |
296 | with this AC */ | 288 | struct list_head list; |
297 | struct list_head list; /* round-robin txq entry */ | 289 | struct list_head tid_q; |
298 | struct list_head tid_q; /* queue of TIDs with buffers */ | ||
299 | }; | 290 | }; |
300 | 291 | ||
301 | /* per-frame tx control block */ | ||
302 | struct ath_tx_control { | 292 | struct ath_tx_control { |
303 | struct ath_txq *txq; | 293 | struct ath_txq *txq; |
304 | int if_id; | 294 | int if_id; |
305 | }; | 295 | }; |
306 | 296 | ||
307 | /* per frame tx status block */ | ||
308 | struct ath_xmit_status { | 297 | struct ath_xmit_status { |
309 | int retries; /* number of retries to successufully | 298 | int retries; |
310 | transmit this frame */ | 299 | int flags; |
311 | int flags; /* status of transmit */ | ||
312 | #define ATH_TX_ERROR 0x01 | 300 | #define ATH_TX_ERROR 0x01 |
313 | #define ATH_TX_XRETRY 0x02 | 301 | #define ATH_TX_XRETRY 0x02 |
314 | #define ATH_TX_BAR 0x04 | 302 | #define ATH_TX_BAR 0x04 |
@@ -396,21 +384,21 @@ int ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); | |||
396 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); | 384 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
397 | 385 | ||
398 | /********/ | 386 | /********/ |
399 | /* VAPs */ | 387 | /* VIFs */ |
400 | /********/ | 388 | /********/ |
401 | 389 | ||
402 | /* | 390 | /* |
403 | * Define the scheme that we select MAC address for multiple | 391 | * Define the scheme that we select MAC address for multiple |
404 | * BSS on the same radio. The very first VAP will just use the MAC | 392 | * BSS on the same radio. The very first VIF will just use the MAC |
405 | * address from the EEPROM. For the next 3 VAPs, we set the | 393 | * address from the EEPROM. For the next 3 VIFs, we set the |
406 | * U/L bit (bit 1) in MAC address, and use the next two bits as the | 394 | * U/L bit (bit 1) in MAC address, and use the next two bits as the |
407 | * index of the VAP. | 395 | * index of the VIF. |
408 | */ | 396 | */ |
409 | 397 | ||
410 | #define ATH_SET_VAP_BSSID_MASK(bssid_mask) \ | 398 | #define ATH_SET_VIF_BSSID_MASK(bssid_mask) \ |
411 | ((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02)) | 399 | ((bssid_mask)[0] &= ~(((ATH_BCBUF-1)<<2)|0x02)) |
412 | 400 | ||
413 | struct ath_vap { | 401 | struct ath_vif { |
414 | int av_bslot; | 402 | int av_bslot; |
415 | enum nl80211_iftype av_opmode; | 403 | enum nl80211_iftype av_opmode; |
416 | struct ath_buf *av_bcbuf; | 404 | struct ath_buf *av_bcbuf; |
@@ -469,7 +457,7 @@ void ath9k_beacon_tasklet(unsigned long data); | |||
469 | void ath_beacon_config(struct ath_softc *sc, int if_id); | 457 | void ath_beacon_config(struct ath_softc *sc, int if_id); |
470 | int ath_beaconq_setup(struct ath_hal *ah); | 458 | int ath_beaconq_setup(struct ath_hal *ah); |
471 | int ath_beacon_alloc(struct ath_softc *sc, int if_id); | 459 | int ath_beacon_alloc(struct ath_softc *sc, int if_id); |
472 | void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp); | 460 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); |
473 | void ath_beacon_sync(struct ath_softc *sc, int if_id); | 461 | void ath_beacon_sync(struct ath_softc *sc, int if_id); |
474 | 462 | ||
475 | /*******/ | 463 | /*******/ |
@@ -485,12 +473,12 @@ void ath_beacon_sync(struct ath_softc *sc, int if_id); | |||
485 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes between calibrations */ | 473 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes between calibrations */ |
486 | 474 | ||
487 | struct ath_ani { | 475 | struct ath_ani { |
488 | bool sc_caldone; | 476 | bool caldone; |
489 | int16_t sc_noise_floor; | 477 | int16_t noise_floor; |
490 | unsigned int sc_longcal_timer; | 478 | unsigned int longcal_timer; |
491 | unsigned int sc_shortcal_timer; | 479 | unsigned int shortcal_timer; |
492 | unsigned int sc_resetcal_timer; | 480 | unsigned int resetcal_timer; |
493 | unsigned int sc_checkani_timer; | 481 | unsigned int checkani_timer; |
494 | struct timer_list timer; | 482 | struct timer_list timer; |
495 | }; | 483 | }; |
496 | 484 | ||
@@ -591,31 +579,31 @@ struct ath_softc { | |||
591 | spinlock_t sc_resetlock; | 579 | spinlock_t sc_resetlock; |
592 | struct mutex mutex; | 580 | struct mutex mutex; |
593 | 581 | ||
594 | u8 sc_curbssid[ETH_ALEN]; | 582 | u8 curbssid[ETH_ALEN]; |
595 | u8 sc_myaddr[ETH_ALEN]; | 583 | u8 macaddr[ETH_ALEN]; |
596 | u8 sc_bssidmask[ETH_ALEN]; | 584 | u8 bssidmask[ETH_ALEN]; |
597 | u32 sc_intrstatus; | 585 | u32 intrstatus; |
598 | u32 sc_flags; /* SC_OP_* */ | 586 | u32 sc_flags; /* SC_OP_* */ |
599 | u16 sc_curtxpow; | 587 | u16 curtxpow; |
600 | u16 sc_curaid; | 588 | u16 curaid; |
601 | u16 sc_cachelsz; | 589 | u16 cachelsz; |
602 | u8 sc_nbcnvaps; | 590 | u8 nbcnvifs; |
603 | u16 sc_nvaps; | 591 | u16 nvifs; |
604 | u8 sc_tx_chainmask; | 592 | u8 tx_chainmask; |
605 | u8 sc_rx_chainmask; | 593 | u8 rx_chainmask; |
606 | u32 sc_keymax; | 594 | u32 keymax; |
607 | DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); | 595 | DECLARE_BITMAP(keymap, ATH_KEYMAX); |
608 | u8 sc_splitmic; | 596 | u8 splitmic; |
609 | atomic_t ps_usecount; | 597 | atomic_t ps_usecount; |
610 | enum ath9k_int sc_imask; | 598 | enum ath9k_int imask; |
611 | enum ath9k_ht_extprotspacing sc_ht_extprotspacing; | 599 | enum ath9k_ht_extprotspacing ht_extprotspacing; |
612 | enum ath9k_ht_macmode tx_chan_width; | 600 | enum ath9k_ht_macmode tx_chan_width; |
613 | 601 | ||
614 | struct ath_config sc_config; | 602 | struct ath_config config; |
615 | struct ath_rx rx; | 603 | struct ath_rx rx; |
616 | struct ath_tx tx; | 604 | struct ath_tx tx; |
617 | struct ath_beacon beacon; | 605 | struct ath_beacon beacon; |
618 | struct ieee80211_vif *sc_vaps[ATH_BCBUF]; | 606 | struct ieee80211_vif *vifs[ATH_BCBUF]; |
619 | struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; | 607 | struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; |
620 | struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX]; | 608 | struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX]; |
621 | struct ath_rate_table *cur_rate_table; | 609 | struct ath_rate_table *cur_rate_table; |
@@ -632,10 +620,10 @@ struct ath_softc { | |||
632 | int led_off_cnt; | 620 | int led_off_cnt; |
633 | 621 | ||
634 | struct ath_rfkill rf_kill; | 622 | struct ath_rfkill rf_kill; |
635 | struct ath_ani sc_ani; | 623 | struct ath_ani ani; |
636 | struct ath9k_node_stats sc_halstats; | 624 | struct ath9k_node_stats nodestats; |
637 | #ifdef CONFIG_ATH9K_DEBUG | 625 | #ifdef CONFIG_ATH9K_DEBUG |
638 | struct ath9k_debug sc_debug; | 626 | struct ath9k_debug debug; |
639 | #endif | 627 | #endif |
640 | struct ath_bus_ops *bus_ops; | 628 | struct ath_bus_ops *bus_ops; |
641 | }; | 629 | }; |
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c index 1f92ad7d3c72..139bba738c5f 100644 --- a/drivers/net/wireless/ath9k/beacon.c +++ b/drivers/net/wireless/ath9k/beacon.c | |||
@@ -63,7 +63,7 @@ static void ath_bstuck_process(struct ath_softc *sc) | |||
63 | * Beacons are always sent out at the lowest rate, and are not retried. | 63 | * Beacons are always sent out at the lowest rate, and are not retried. |
64 | */ | 64 | */ |
65 | static void ath_beacon_setup(struct ath_softc *sc, | 65 | static void ath_beacon_setup(struct ath_softc *sc, |
66 | struct ath_vap *avp, struct ath_buf *bf) | 66 | struct ath_vif *avp, struct ath_buf *bf) |
67 | { | 67 | { |
68 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | 68 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; |
69 | struct ath_hal *ah = sc->sc_ah; | 69 | struct ath_hal *ah = sc->sc_ah; |
@@ -96,7 +96,7 @@ static void ath_beacon_setup(struct ath_softc *sc, | |||
96 | * SWBA's | 96 | * SWBA's |
97 | * XXX assumes two antenna | 97 | * XXX assumes two antenna |
98 | */ | 98 | */ |
99 | antenna = ((sc->beacon.ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1); | 99 | antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
100 | } | 100 | } |
101 | 101 | ||
102 | ds->ds_data = bf->bf_buf_addr; | 102 | ds->ds_data = bf->bf_buf_addr; |
@@ -132,24 +132,24 @@ static void ath_beacon_setup(struct ath_softc *sc, | |||
132 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); | 132 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); |
133 | series[0].Tries = 1; | 133 | series[0].Tries = 1; |
134 | series[0].Rate = rate; | 134 | series[0].Rate = rate; |
135 | series[0].ChSel = sc->sc_tx_chainmask; | 135 | series[0].ChSel = sc->tx_chainmask; |
136 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; | 136 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; |
137 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, | 137 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, |
138 | ctsrate, ctsduration, series, 4, 0); | 138 | ctsrate, ctsduration, series, 4, 0); |
139 | } | 139 | } |
140 | 140 | ||
141 | /* Generate beacon frame and queue cab data for a vap */ | 141 | /* Generate beacon frame and queue cab data for a VIF */ |
142 | static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) | 142 | static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) |
143 | { | 143 | { |
144 | struct ath_buf *bf; | 144 | struct ath_buf *bf; |
145 | struct ath_vap *avp; | 145 | struct ath_vif *avp; |
146 | struct sk_buff *skb; | 146 | struct sk_buff *skb; |
147 | struct ath_txq *cabq; | 147 | struct ath_txq *cabq; |
148 | struct ieee80211_vif *vif; | 148 | struct ieee80211_vif *vif; |
149 | struct ieee80211_tx_info *info; | 149 | struct ieee80211_tx_info *info; |
150 | int cabq_depth; | 150 | int cabq_depth; |
151 | 151 | ||
152 | vif = sc->sc_vaps[if_id]; | 152 | vif = sc->vifs[if_id]; |
153 | ASSERT(vif); | 153 | ASSERT(vif); |
154 | 154 | ||
155 | avp = (void *)vif->drv_priv; | 155 | avp = (void *)vif->drv_priv; |
@@ -204,10 +204,10 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) | |||
204 | /* | 204 | /* |
205 | * if the CABQ traffic from previous DTIM is pending and the current | 205 | * if the CABQ traffic from previous DTIM is pending and the current |
206 | * beacon is also a DTIM. | 206 | * beacon is also a DTIM. |
207 | * 1) if there is only one vap let the cab traffic continue. | 207 | * 1) if there is only one vif let the cab traffic continue. |
208 | * 2) if there are more than one vap and we are using staggered | 208 | * 2) if there are more than one vif and we are using staggered |
209 | * beacons, then drain the cabq by dropping all the frames in | 209 | * beacons, then drain the cabq by dropping all the frames in |
210 | * the cabq so that the current vaps cab traffic can be scheduled. | 210 | * the cabq so that the current vifs cab traffic can be scheduled. |
211 | */ | 211 | */ |
212 | spin_lock_bh(&cabq->axq_lock); | 212 | spin_lock_bh(&cabq->axq_lock); |
213 | cabq_depth = cabq->axq_depth; | 213 | cabq_depth = cabq->axq_depth; |
@@ -219,7 +219,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) | |||
219 | * the lock again which is a common function and that | 219 | * the lock again which is a common function and that |
220 | * acquires txq lock inside. | 220 | * acquires txq lock inside. |
221 | */ | 221 | */ |
222 | if (sc->sc_nvaps > 1) { | 222 | if (sc->nvifs > 1) { |
223 | ath_draintxq(sc, cabq, false); | 223 | ath_draintxq(sc, cabq, false); |
224 | DPRINTF(sc, ATH_DBG_BEACON, | 224 | DPRINTF(sc, ATH_DBG_BEACON, |
225 | "flush previous cabq traffic\n"); | 225 | "flush previous cabq traffic\n"); |
@@ -250,10 +250,10 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id) | |||
250 | struct ieee80211_vif *vif; | 250 | struct ieee80211_vif *vif; |
251 | struct ath_hal *ah = sc->sc_ah; | 251 | struct ath_hal *ah = sc->sc_ah; |
252 | struct ath_buf *bf; | 252 | struct ath_buf *bf; |
253 | struct ath_vap *avp; | 253 | struct ath_vif *avp; |
254 | struct sk_buff *skb; | 254 | struct sk_buff *skb; |
255 | 255 | ||
256 | vif = sc->sc_vaps[if_id]; | 256 | vif = sc->vifs[if_id]; |
257 | ASSERT(vif); | 257 | ASSERT(vif); |
258 | 258 | ||
259 | avp = (void *)vif->drv_priv; | 259 | avp = (void *)vif->drv_priv; |
@@ -291,13 +291,13 @@ int ath_beaconq_setup(struct ath_hal *ah) | |||
291 | int ath_beacon_alloc(struct ath_softc *sc, int if_id) | 291 | int ath_beacon_alloc(struct ath_softc *sc, int if_id) |
292 | { | 292 | { |
293 | struct ieee80211_vif *vif; | 293 | struct ieee80211_vif *vif; |
294 | struct ath_vap *avp; | 294 | struct ath_vif *avp; |
295 | struct ieee80211_hdr *hdr; | 295 | struct ieee80211_hdr *hdr; |
296 | struct ath_buf *bf; | 296 | struct ath_buf *bf; |
297 | struct sk_buff *skb; | 297 | struct sk_buff *skb; |
298 | __le64 tstamp; | 298 | __le64 tstamp; |
299 | 299 | ||
300 | vif = sc->sc_vaps[if_id]; | 300 | vif = sc->vifs[if_id]; |
301 | ASSERT(vif); | 301 | ASSERT(vif); |
302 | 302 | ||
303 | avp = (void *)vif->drv_priv; | 303 | avp = (void *)vif->drv_priv; |
@@ -314,7 +314,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) | |||
314 | !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | 314 | !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) { |
315 | int slot; | 315 | int slot; |
316 | /* | 316 | /* |
317 | * Assign the vap to a beacon xmit slot. As | 317 | * Assign the vif to a beacon xmit slot. As |
318 | * above, this cannot fail to find one. | 318 | * above, this cannot fail to find one. |
319 | */ | 319 | */ |
320 | avp->av_bslot = 0; | 320 | avp->av_bslot = 0; |
@@ -335,7 +335,7 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) | |||
335 | } | 335 | } |
336 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY); | 336 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY); |
337 | sc->beacon.bslot[avp->av_bslot] = if_id; | 337 | sc->beacon.bslot[avp->av_bslot] = if_id; |
338 | sc->sc_nbcnvaps++; | 338 | sc->nbcnvifs++; |
339 | } | 339 | } |
340 | } | 340 | } |
341 | 341 | ||
@@ -384,8 +384,8 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) | |||
384 | * timestamp then convert to TSF units and handle | 384 | * timestamp then convert to TSF units and handle |
385 | * byte swapping before writing it in the frame. | 385 | * byte swapping before writing it in the frame. |
386 | * The hardware will then add this each time a beacon | 386 | * The hardware will then add this each time a beacon |
387 | * frame is sent. Note that we align vap's 1..N | 387 | * frame is sent. Note that we align vif's 1..N |
388 | * and leave vap 0 untouched. This means vap 0 | 388 | * and leave vif 0 untouched. This means vap 0 |
389 | * has a timestamp in one beacon interval while the | 389 | * has a timestamp in one beacon interval while the |
390 | * others get a timestamp aligned to the next interval. | 390 | * others get a timestamp aligned to the next interval. |
391 | */ | 391 | */ |
@@ -416,14 +416,14 @@ int ath_beacon_alloc(struct ath_softc *sc, int if_id) | |||
416 | return 0; | 416 | return 0; |
417 | } | 417 | } |
418 | 418 | ||
419 | void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp) | 419 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) |
420 | { | 420 | { |
421 | if (avp->av_bcbuf != NULL) { | 421 | if (avp->av_bcbuf != NULL) { |
422 | struct ath_buf *bf; | 422 | struct ath_buf *bf; |
423 | 423 | ||
424 | if (avp->av_bslot != -1) { | 424 | if (avp->av_bslot != -1) { |
425 | sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY; | 425 | sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY; |
426 | sc->sc_nbcnvaps--; | 426 | sc->nbcnvifs--; |
427 | } | 427 | } |
428 | 428 | ||
429 | bf = avp->av_bcbuf; | 429 | bf = avp->av_bcbuf; |
@@ -597,7 +597,7 @@ void ath9k_beacon_tasklet(unsigned long data) | |||
597 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); | 597 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); |
598 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | 598 | ath9k_hw_txstart(ah, sc->beacon.beaconq); |
599 | 599 | ||
600 | sc->beacon.ast_be_xmit += bc; /* XXX per-vap? */ | 600 | sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */ |
601 | } | 601 | } |
602 | } | 602 | } |
603 | 603 | ||
@@ -621,12 +621,12 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) | |||
621 | struct ieee80211_vif *vif; | 621 | struct ieee80211_vif *vif; |
622 | struct ath_hal *ah = sc->sc_ah; | 622 | struct ath_hal *ah = sc->sc_ah; |
623 | struct ath_beacon_config conf; | 623 | struct ath_beacon_config conf; |
624 | struct ath_vap *avp; | 624 | struct ath_vif *avp; |
625 | enum nl80211_iftype opmode; | 625 | enum nl80211_iftype opmode; |
626 | u32 nexttbtt, intval; | 626 | u32 nexttbtt, intval; |
627 | 627 | ||
628 | if (if_id != ATH_IF_ID_ANY) { | 628 | if (if_id != ATH_IF_ID_ANY) { |
629 | vif = sc->sc_vaps[if_id]; | 629 | vif = sc->vifs[if_id]; |
630 | ASSERT(vif); | 630 | ASSERT(vif); |
631 | avp = (void *)vif->drv_priv; | 631 | avp = (void *)vif->drv_priv; |
632 | opmode = avp->av_opmode; | 632 | opmode = avp->av_opmode; |
@@ -781,8 +781,8 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) | |||
781 | 781 | ||
782 | ath9k_hw_set_interrupts(ah, 0); | 782 | ath9k_hw_set_interrupts(ah, 0); |
783 | ath9k_hw_set_sta_beacon_timers(ah, &bs); | 783 | ath9k_hw_set_sta_beacon_timers(ah, &bs); |
784 | sc->sc_imask |= ATH9K_INT_BMISS; | 784 | sc->imask |= ATH9K_INT_BMISS; |
785 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 785 | ath9k_hw_set_interrupts(ah, sc->imask); |
786 | } else { | 786 | } else { |
787 | u64 tsf; | 787 | u64 tsf; |
788 | u32 tsftu; | 788 | u32 tsftu; |
@@ -819,7 +819,7 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) | |||
819 | */ | 819 | */ |
820 | intval |= ATH9K_BEACON_ENA; | 820 | intval |= ATH9K_BEACON_ENA; |
821 | if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) | 821 | if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) |
822 | sc->sc_imask |= ATH9K_INT_SWBA; | 822 | sc->imask |= ATH9K_INT_SWBA; |
823 | ath_beaconq_config(sc); | 823 | ath_beaconq_config(sc); |
824 | } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) { | 824 | } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) { |
825 | /* | 825 | /* |
@@ -827,12 +827,12 @@ void ath_beacon_config(struct ath_softc *sc, int if_id) | |||
827 | * SWBA interrupts to prepare beacon frames. | 827 | * SWBA interrupts to prepare beacon frames. |
828 | */ | 828 | */ |
829 | intval |= ATH9K_BEACON_ENA; | 829 | intval |= ATH9K_BEACON_ENA; |
830 | sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */ | 830 | sc->imask |= ATH9K_INT_SWBA; /* beacon prepare */ |
831 | ath_beaconq_config(sc); | 831 | ath_beaconq_config(sc); |
832 | } | 832 | } |
833 | ath9k_hw_beaconinit(ah, nexttbtt, intval); | 833 | ath9k_hw_beaconinit(ah, nexttbtt, intval); |
834 | sc->beacon.bmisscnt = 0; | 834 | sc->beacon.bmisscnt = 0; |
835 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 835 | ath9k_hw_set_interrupts(ah, sc->imask); |
836 | /* | 836 | /* |
837 | * When using a self-linked beacon descriptor in | 837 | * When using a self-linked beacon descriptor in |
838 | * ibss mode load it once here. | 838 | * ibss mode load it once here. |
diff --git a/drivers/net/wireless/ath9k/debug.c b/drivers/net/wireless/ath9k/debug.c index c9b47b351504..daca5ce91452 100644 --- a/drivers/net/wireless/ath9k/debug.c +++ b/drivers/net/wireless/ath9k/debug.c | |||
@@ -24,7 +24,7 @@ void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...) | |||
24 | if (!sc) | 24 | if (!sc) |
25 | return; | 25 | return; |
26 | 26 | ||
27 | if (sc->sc_debug.debug_mask & dbg_mask) { | 27 | if (sc->debug.debug_mask & dbg_mask) { |
28 | va_list args; | 28 | va_list args; |
29 | 29 | ||
30 | va_start(args, fmt); | 30 | va_start(args, fmt); |
@@ -130,41 +130,41 @@ static const struct file_operations fops_dma = { | |||
130 | void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status) | 130 | void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status) |
131 | { | 131 | { |
132 | if (status) | 132 | if (status) |
133 | sc->sc_debug.stats.istats.total++; | 133 | sc->debug.stats.istats.total++; |
134 | if (status & ATH9K_INT_RX) | 134 | if (status & ATH9K_INT_RX) |
135 | sc->sc_debug.stats.istats.rxok++; | 135 | sc->debug.stats.istats.rxok++; |
136 | if (status & ATH9K_INT_RXEOL) | 136 | if (status & ATH9K_INT_RXEOL) |
137 | sc->sc_debug.stats.istats.rxeol++; | 137 | sc->debug.stats.istats.rxeol++; |
138 | if (status & ATH9K_INT_RXORN) | 138 | if (status & ATH9K_INT_RXORN) |
139 | sc->sc_debug.stats.istats.rxorn++; | 139 | sc->debug.stats.istats.rxorn++; |
140 | if (status & ATH9K_INT_TX) | 140 | if (status & ATH9K_INT_TX) |
141 | sc->sc_debug.stats.istats.txok++; | 141 | sc->debug.stats.istats.txok++; |
142 | if (status & ATH9K_INT_TXURN) | 142 | if (status & ATH9K_INT_TXURN) |
143 | sc->sc_debug.stats.istats.txurn++; | 143 | sc->debug.stats.istats.txurn++; |
144 | if (status & ATH9K_INT_MIB) | 144 | if (status & ATH9K_INT_MIB) |
145 | sc->sc_debug.stats.istats.mib++; | 145 | sc->debug.stats.istats.mib++; |
146 | if (status & ATH9K_INT_RXPHY) | 146 | if (status & ATH9K_INT_RXPHY) |
147 | sc->sc_debug.stats.istats.rxphyerr++; | 147 | sc->debug.stats.istats.rxphyerr++; |
148 | if (status & ATH9K_INT_RXKCM) | 148 | if (status & ATH9K_INT_RXKCM) |
149 | sc->sc_debug.stats.istats.rx_keycache_miss++; | 149 | sc->debug.stats.istats.rx_keycache_miss++; |
150 | if (status & ATH9K_INT_SWBA) | 150 | if (status & ATH9K_INT_SWBA) |
151 | sc->sc_debug.stats.istats.swba++; | 151 | sc->debug.stats.istats.swba++; |
152 | if (status & ATH9K_INT_BMISS) | 152 | if (status & ATH9K_INT_BMISS) |
153 | sc->sc_debug.stats.istats.bmiss++; | 153 | sc->debug.stats.istats.bmiss++; |
154 | if (status & ATH9K_INT_BNR) | 154 | if (status & ATH9K_INT_BNR) |
155 | sc->sc_debug.stats.istats.bnr++; | 155 | sc->debug.stats.istats.bnr++; |
156 | if (status & ATH9K_INT_CST) | 156 | if (status & ATH9K_INT_CST) |
157 | sc->sc_debug.stats.istats.cst++; | 157 | sc->debug.stats.istats.cst++; |
158 | if (status & ATH9K_INT_GTT) | 158 | if (status & ATH9K_INT_GTT) |
159 | sc->sc_debug.stats.istats.gtt++; | 159 | sc->debug.stats.istats.gtt++; |
160 | if (status & ATH9K_INT_TIM) | 160 | if (status & ATH9K_INT_TIM) |
161 | sc->sc_debug.stats.istats.tim++; | 161 | sc->debug.stats.istats.tim++; |
162 | if (status & ATH9K_INT_CABEND) | 162 | if (status & ATH9K_INT_CABEND) |
163 | sc->sc_debug.stats.istats.cabend++; | 163 | sc->debug.stats.istats.cabend++; |
164 | if (status & ATH9K_INT_DTIMSYNC) | 164 | if (status & ATH9K_INT_DTIMSYNC) |
165 | sc->sc_debug.stats.istats.dtimsync++; | 165 | sc->debug.stats.istats.dtimsync++; |
166 | if (status & ATH9K_INT_DTIM) | 166 | if (status & ATH9K_INT_DTIM) |
167 | sc->sc_debug.stats.istats.dtim++; | 167 | sc->debug.stats.istats.dtim++; |
168 | } | 168 | } |
169 | 169 | ||
170 | static ssize_t read_file_interrupt(struct file *file, char __user *user_buf, | 170 | static ssize_t read_file_interrupt(struct file *file, char __user *user_buf, |
@@ -175,41 +175,41 @@ static ssize_t read_file_interrupt(struct file *file, char __user *user_buf, | |||
175 | unsigned int len = 0; | 175 | unsigned int len = 0; |
176 | 176 | ||
177 | len += snprintf(buf + len, sizeof(buf) - len, | 177 | len += snprintf(buf + len, sizeof(buf) - len, |
178 | "%8s: %10u\n", "RX", sc->sc_debug.stats.istats.rxok); | 178 | "%8s: %10u\n", "RX", sc->debug.stats.istats.rxok); |
179 | len += snprintf(buf + len, sizeof(buf) - len, | 179 | len += snprintf(buf + len, sizeof(buf) - len, |
180 | "%8s: %10u\n", "RXEOL", sc->sc_debug.stats.istats.rxeol); | 180 | "%8s: %10u\n", "RXEOL", sc->debug.stats.istats.rxeol); |
181 | len += snprintf(buf + len, sizeof(buf) - len, | 181 | len += snprintf(buf + len, sizeof(buf) - len, |
182 | "%8s: %10u\n", "RXORN", sc->sc_debug.stats.istats.rxorn); | 182 | "%8s: %10u\n", "RXORN", sc->debug.stats.istats.rxorn); |
183 | len += snprintf(buf + len, sizeof(buf) - len, | 183 | len += snprintf(buf + len, sizeof(buf) - len, |
184 | "%8s: %10u\n", "TX", sc->sc_debug.stats.istats.txok); | 184 | "%8s: %10u\n", "TX", sc->debug.stats.istats.txok); |
185 | len += snprintf(buf + len, sizeof(buf) - len, | 185 | len += snprintf(buf + len, sizeof(buf) - len, |
186 | "%8s: %10u\n", "TXURN", sc->sc_debug.stats.istats.txurn); | 186 | "%8s: %10u\n", "TXURN", sc->debug.stats.istats.txurn); |
187 | len += snprintf(buf + len, sizeof(buf) - len, | 187 | len += snprintf(buf + len, sizeof(buf) - len, |
188 | "%8s: %10u\n", "MIB", sc->sc_debug.stats.istats.mib); | 188 | "%8s: %10u\n", "MIB", sc->debug.stats.istats.mib); |
189 | len += snprintf(buf + len, sizeof(buf) - len, | 189 | len += snprintf(buf + len, sizeof(buf) - len, |
190 | "%8s: %10u\n", "RXPHY", sc->sc_debug.stats.istats.rxphyerr); | 190 | "%8s: %10u\n", "RXPHY", sc->debug.stats.istats.rxphyerr); |
191 | len += snprintf(buf + len, sizeof(buf) - len, | 191 | len += snprintf(buf + len, sizeof(buf) - len, |
192 | "%8s: %10u\n", "RXKCM", sc->sc_debug.stats.istats.rx_keycache_miss); | 192 | "%8s: %10u\n", "RXKCM", sc->debug.stats.istats.rx_keycache_miss); |
193 | len += snprintf(buf + len, sizeof(buf) - len, | 193 | len += snprintf(buf + len, sizeof(buf) - len, |
194 | "%8s: %10u\n", "SWBA", sc->sc_debug.stats.istats.swba); | 194 | "%8s: %10u\n", "SWBA", sc->debug.stats.istats.swba); |
195 | len += snprintf(buf + len, sizeof(buf) - len, | 195 | len += snprintf(buf + len, sizeof(buf) - len, |
196 | "%8s: %10u\n", "BMISS", sc->sc_debug.stats.istats.bmiss); | 196 | "%8s: %10u\n", "BMISS", sc->debug.stats.istats.bmiss); |
197 | len += snprintf(buf + len, sizeof(buf) - len, | 197 | len += snprintf(buf + len, sizeof(buf) - len, |
198 | "%8s: %10u\n", "BNR", sc->sc_debug.stats.istats.bnr); | 198 | "%8s: %10u\n", "BNR", sc->debug.stats.istats.bnr); |
199 | len += snprintf(buf + len, sizeof(buf) - len, | 199 | len += snprintf(buf + len, sizeof(buf) - len, |
200 | "%8s: %10u\n", "CST", sc->sc_debug.stats.istats.cst); | 200 | "%8s: %10u\n", "CST", sc->debug.stats.istats.cst); |
201 | len += snprintf(buf + len, sizeof(buf) - len, | 201 | len += snprintf(buf + len, sizeof(buf) - len, |
202 | "%8s: %10u\n", "GTT", sc->sc_debug.stats.istats.gtt); | 202 | "%8s: %10u\n", "GTT", sc->debug.stats.istats.gtt); |
203 | len += snprintf(buf + len, sizeof(buf) - len, | 203 | len += snprintf(buf + len, sizeof(buf) - len, |
204 | "%8s: %10u\n", "TIM", sc->sc_debug.stats.istats.tim); | 204 | "%8s: %10u\n", "TIM", sc->debug.stats.istats.tim); |
205 | len += snprintf(buf + len, sizeof(buf) - len, | 205 | len += snprintf(buf + len, sizeof(buf) - len, |
206 | "%8s: %10u\n", "CABEND", sc->sc_debug.stats.istats.cabend); | 206 | "%8s: %10u\n", "CABEND", sc->debug.stats.istats.cabend); |
207 | len += snprintf(buf + len, sizeof(buf) - len, | 207 | len += snprintf(buf + len, sizeof(buf) - len, |
208 | "%8s: %10u\n", "DTIMSYNC", sc->sc_debug.stats.istats.dtimsync); | 208 | "%8s: %10u\n", "DTIMSYNC", sc->debug.stats.istats.dtimsync); |
209 | len += snprintf(buf + len, sizeof(buf) - len, | 209 | len += snprintf(buf + len, sizeof(buf) - len, |
210 | "%8s: %10u\n", "DTIM", sc->sc_debug.stats.istats.dtim); | 210 | "%8s: %10u\n", "DTIM", sc->debug.stats.istats.dtim); |
211 | len += snprintf(buf + len, sizeof(buf) - len, | 211 | len += snprintf(buf + len, sizeof(buf) - len, |
212 | "%8s: %10u\n", "TOTAL", sc->sc_debug.stats.istats.total); | 212 | "%8s: %10u\n", "TOTAL", sc->debug.stats.istats.total); |
213 | 213 | ||
214 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 214 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
215 | } | 215 | } |
@@ -231,7 +231,7 @@ static void ath_debug_stat_11n_rc(struct ath_softc *sc, struct sk_buff *skb) | |||
231 | final_ts_idx = tx_info_priv->tx.ts_rateindex; | 231 | final_ts_idx = tx_info_priv->tx.ts_rateindex; |
232 | idx = sc->cur_rate_table->info[rates[final_ts_idx].idx].dot11rate; | 232 | idx = sc->cur_rate_table->info[rates[final_ts_idx].idx].dot11rate; |
233 | 233 | ||
234 | sc->sc_debug.stats.n_rcstats[idx].success++; | 234 | sc->debug.stats.n_rcstats[idx].success++; |
235 | } | 235 | } |
236 | 236 | ||
237 | static void ath_debug_stat_legacy_rc(struct ath_softc *sc, struct sk_buff *skb) | 237 | static void ath_debug_stat_legacy_rc(struct ath_softc *sc, struct sk_buff *skb) |
@@ -245,7 +245,7 @@ static void ath_debug_stat_legacy_rc(struct ath_softc *sc, struct sk_buff *skb) | |||
245 | final_ts_idx = tx_info_priv->tx.ts_rateindex; | 245 | final_ts_idx = tx_info_priv->tx.ts_rateindex; |
246 | idx = rates[final_ts_idx].idx; | 246 | idx = rates[final_ts_idx].idx; |
247 | 247 | ||
248 | sc->sc_debug.stats.legacy_rcstats[idx].success++; | 248 | sc->debug.stats.legacy_rcstats[idx].success++; |
249 | } | 249 | } |
250 | 250 | ||
251 | void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb) | 251 | void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb) |
@@ -263,8 +263,8 @@ void ath_debug_stat_retries(struct ath_softc *sc, int rix, | |||
263 | if (conf_is_ht(&sc->hw->conf)) { | 263 | if (conf_is_ht(&sc->hw->conf)) { |
264 | int idx = sc->cur_rate_table->info[rix].dot11rate; | 264 | int idx = sc->cur_rate_table->info[rix].dot11rate; |
265 | 265 | ||
266 | sc->sc_debug.stats.n_rcstats[idx].xretries += xretries; | 266 | sc->debug.stats.n_rcstats[idx].xretries += xretries; |
267 | sc->sc_debug.stats.n_rcstats[idx].retries += retries; | 267 | sc->debug.stats.n_rcstats[idx].retries += retries; |
268 | } | 268 | } |
269 | } | 269 | } |
270 | 270 | ||
@@ -283,9 +283,9 @@ static ssize_t ath_read_file_stat_11n_rc(struct file *file, | |||
283 | for (i = 0; i <= 15; i++) { | 283 | for (i = 0; i <= 15; i++) { |
284 | len += snprintf(buf + len, sizeof(buf) - len, | 284 | len += snprintf(buf + len, sizeof(buf) - len, |
285 | "%5s%3d: %8u %8u %8u\n", "MCS", i, | 285 | "%5s%3d: %8u %8u %8u\n", "MCS", i, |
286 | sc->sc_debug.stats.n_rcstats[i].success, | 286 | sc->debug.stats.n_rcstats[i].success, |
287 | sc->sc_debug.stats.n_rcstats[i].retries, | 287 | sc->debug.stats.n_rcstats[i].retries, |
288 | sc->sc_debug.stats.n_rcstats[i].xretries); | 288 | sc->debug.stats.n_rcstats[i].xretries); |
289 | } | 289 | } |
290 | 290 | ||
291 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 291 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
@@ -305,7 +305,7 @@ static ssize_t ath_read_file_stat_legacy_rc(struct file *file, | |||
305 | for (i = 0; i < sc->cur_rate_table->rate_cnt; i++) { | 305 | for (i = 0; i < sc->cur_rate_table->rate_cnt; i++) { |
306 | len += snprintf(buf + len, sizeof(buf) - len, "%5u: %12u\n", | 306 | len += snprintf(buf + len, sizeof(buf) - len, "%5u: %12u\n", |
307 | sc->cur_rate_table->info[i].ratekbps / 1000, | 307 | sc->cur_rate_table->info[i].ratekbps / 1000, |
308 | sc->sc_debug.stats.legacy_rcstats[i].success); | 308 | sc->debug.stats.legacy_rcstats[i].success); |
309 | } | 309 | } |
310 | 310 | ||
311 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 311 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
@@ -330,34 +330,34 @@ static const struct file_operations fops_rcstat = { | |||
330 | 330 | ||
331 | int ath9k_init_debug(struct ath_softc *sc) | 331 | int ath9k_init_debug(struct ath_softc *sc) |
332 | { | 332 | { |
333 | sc->sc_debug.debug_mask = ath9k_debug; | 333 | sc->debug.debug_mask = ath9k_debug; |
334 | 334 | ||
335 | sc->sc_debug.debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); | 335 | sc->debug.debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); |
336 | if (!sc->sc_debug.debugfs_root) | 336 | if (!sc->debug.debugfs_root) |
337 | goto err; | 337 | goto err; |
338 | 338 | ||
339 | sc->sc_debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy), | 339 | sc->debug.debugfs_phy = debugfs_create_dir(wiphy_name(sc->hw->wiphy), |
340 | sc->sc_debug.debugfs_root); | 340 | sc->debug.debugfs_root); |
341 | if (!sc->sc_debug.debugfs_phy) | 341 | if (!sc->debug.debugfs_phy) |
342 | goto err; | 342 | goto err; |
343 | 343 | ||
344 | sc->sc_debug.debugfs_dma = debugfs_create_file("dma", S_IRUGO, | 344 | sc->debug.debugfs_dma = debugfs_create_file("dma", S_IRUGO, |
345 | sc->sc_debug.debugfs_phy, sc, &fops_dma); | 345 | sc->debug.debugfs_phy, sc, &fops_dma); |
346 | if (!sc->sc_debug.debugfs_dma) | 346 | if (!sc->debug.debugfs_dma) |
347 | goto err; | 347 | goto err; |
348 | 348 | ||
349 | sc->sc_debug.debugfs_interrupt = debugfs_create_file("interrupt", | 349 | sc->debug.debugfs_interrupt = debugfs_create_file("interrupt", |
350 | S_IRUGO, | 350 | S_IRUGO, |
351 | sc->sc_debug.debugfs_phy, | 351 | sc->debug.debugfs_phy, |
352 | sc, &fops_interrupt); | 352 | sc, &fops_interrupt); |
353 | if (!sc->sc_debug.debugfs_interrupt) | 353 | if (!sc->debug.debugfs_interrupt) |
354 | goto err; | 354 | goto err; |
355 | 355 | ||
356 | sc->sc_debug.debugfs_rcstat = debugfs_create_file("rcstat", | 356 | sc->debug.debugfs_rcstat = debugfs_create_file("rcstat", |
357 | S_IRUGO, | 357 | S_IRUGO, |
358 | sc->sc_debug.debugfs_phy, | 358 | sc->debug.debugfs_phy, |
359 | sc, &fops_rcstat); | 359 | sc, &fops_rcstat); |
360 | if (!sc->sc_debug.debugfs_rcstat) | 360 | if (!sc->debug.debugfs_rcstat) |
361 | goto err; | 361 | goto err; |
362 | 362 | ||
363 | return 0; | 363 | return 0; |
@@ -368,9 +368,9 @@ err: | |||
368 | 368 | ||
369 | void ath9k_exit_debug(struct ath_softc *sc) | 369 | void ath9k_exit_debug(struct ath_softc *sc) |
370 | { | 370 | { |
371 | debugfs_remove(sc->sc_debug.debugfs_rcstat); | 371 | debugfs_remove(sc->debug.debugfs_rcstat); |
372 | debugfs_remove(sc->sc_debug.debugfs_interrupt); | 372 | debugfs_remove(sc->debug.debugfs_interrupt); |
373 | debugfs_remove(sc->sc_debug.debugfs_dma); | 373 | debugfs_remove(sc->debug.debugfs_dma); |
374 | debugfs_remove(sc->sc_debug.debugfs_phy); | 374 | debugfs_remove(sc->debug.debugfs_phy); |
375 | debugfs_remove(sc->sc_debug.debugfs_root); | 375 | debugfs_remove(sc->debug.debugfs_root); |
376 | } | 376 | } |
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c index 075ddc522c98..1a6c5acc3f0e 100644 --- a/drivers/net/wireless/ath9k/hw.c +++ b/drivers/net/wireless/ath9k/hw.c | |||
@@ -2158,9 +2158,9 @@ int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan, | |||
2158 | u32 macStaId1; | 2158 | u32 macStaId1; |
2159 | int i, rx_chainmask, r; | 2159 | int i, rx_chainmask, r; |
2160 | 2160 | ||
2161 | ahp->ah_extprotspacing = sc->sc_ht_extprotspacing; | 2161 | ahp->ah_extprotspacing = sc->ht_extprotspacing; |
2162 | ahp->ah_txchainmask = sc->sc_tx_chainmask; | 2162 | ahp->ah_txchainmask = sc->tx_chainmask; |
2163 | ahp->ah_rxchainmask = sc->sc_rx_chainmask; | 2163 | ahp->ah_rxchainmask = sc->rx_chainmask; |
2164 | 2164 | ||
2165 | if (AR_SREV_9285(ah)) { | 2165 | if (AR_SREV_9285(ah)) { |
2166 | ahp->ah_txchainmask &= 0x1; | 2166 | ahp->ah_txchainmask &= 0x1; |
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c index 2ed0bd28ffb7..dacf97afe763 100644 --- a/drivers/net/wireless/ath9k/main.c +++ b/drivers/net/wireless/ath9k/main.c | |||
@@ -140,11 +140,11 @@ static void ath_update_txpow(struct ath_softc *sc) | |||
140 | struct ath_hal *ah = sc->sc_ah; | 140 | struct ath_hal *ah = sc->sc_ah; |
141 | u32 txpow; | 141 | u32 txpow; |
142 | 142 | ||
143 | if (sc->sc_curtxpow != sc->sc_config.txpowlimit) { | 143 | if (sc->curtxpow != sc->config.txpowlimit) { |
144 | ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit); | 144 | ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit); |
145 | /* read back in case value is clamped */ | 145 | /* read back in case value is clamped */ |
146 | ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow); | 146 | ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow); |
147 | sc->sc_curtxpow = txpow; | 147 | sc->curtxpow = txpow; |
148 | } | 148 | } |
149 | } | 149 | } |
150 | 150 | ||
@@ -294,7 +294,7 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan) | |||
294 | 294 | ||
295 | ath_cache_conf_rate(sc, &hw->conf); | 295 | ath_cache_conf_rate(sc, &hw->conf); |
296 | ath_update_txpow(sc); | 296 | ath_update_txpow(sc); |
297 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 297 | ath9k_hw_set_interrupts(ah, sc->imask); |
298 | ath9k_ps_restore(sc); | 298 | ath9k_ps_restore(sc); |
299 | return 0; | 299 | return 0; |
300 | } | 300 | } |
@@ -327,42 +327,42 @@ static void ath_ani_calibrate(unsigned long data) | |||
327 | return; | 327 | return; |
328 | 328 | ||
329 | /* Long calibration runs independently of short calibration. */ | 329 | /* Long calibration runs independently of short calibration. */ |
330 | if ((timestamp - sc->sc_ani.sc_longcal_timer) >= ATH_LONG_CALINTERVAL) { | 330 | if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { |
331 | longcal = true; | 331 | longcal = true; |
332 | DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies); | 332 | DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies); |
333 | sc->sc_ani.sc_longcal_timer = timestamp; | 333 | sc->ani.longcal_timer = timestamp; |
334 | } | 334 | } |
335 | 335 | ||
336 | /* Short calibration applies only while sc_caldone is false */ | 336 | /* Short calibration applies only while caldone is false */ |
337 | if (!sc->sc_ani.sc_caldone) { | 337 | if (!sc->ani.caldone) { |
338 | if ((timestamp - sc->sc_ani.sc_shortcal_timer) >= | 338 | if ((timestamp - sc->ani.shortcal_timer) >= |
339 | ATH_SHORT_CALINTERVAL) { | 339 | ATH_SHORT_CALINTERVAL) { |
340 | shortcal = true; | 340 | shortcal = true; |
341 | DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies); | 341 | DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies); |
342 | sc->sc_ani.sc_shortcal_timer = timestamp; | 342 | sc->ani.shortcal_timer = timestamp; |
343 | sc->sc_ani.sc_resetcal_timer = timestamp; | 343 | sc->ani.resetcal_timer = timestamp; |
344 | } | 344 | } |
345 | } else { | 345 | } else { |
346 | if ((timestamp - sc->sc_ani.sc_resetcal_timer) >= | 346 | if ((timestamp - sc->ani.resetcal_timer) >= |
347 | ATH_RESTART_CALINTERVAL) { | 347 | ATH_RESTART_CALINTERVAL) { |
348 | sc->sc_ani.sc_caldone = ath9k_hw_reset_calvalid(ah); | 348 | sc->ani.caldone = ath9k_hw_reset_calvalid(ah); |
349 | if (sc->sc_ani.sc_caldone) | 349 | if (sc->ani.caldone) |
350 | sc->sc_ani.sc_resetcal_timer = timestamp; | 350 | sc->ani.resetcal_timer = timestamp; |
351 | } | 351 | } |
352 | } | 352 | } |
353 | 353 | ||
354 | /* Verify whether we must check ANI */ | 354 | /* Verify whether we must check ANI */ |
355 | if ((timestamp - sc->sc_ani.sc_checkani_timer) >= | 355 | if ((timestamp - sc->ani.checkani_timer) >= |
356 | ATH_ANI_POLLINTERVAL) { | 356 | ATH_ANI_POLLINTERVAL) { |
357 | aniflag = true; | 357 | aniflag = true; |
358 | sc->sc_ani.sc_checkani_timer = timestamp; | 358 | sc->ani.checkani_timer = timestamp; |
359 | } | 359 | } |
360 | 360 | ||
361 | /* Skip all processing if there's nothing to do. */ | 361 | /* Skip all processing if there's nothing to do. */ |
362 | if (longcal || shortcal || aniflag) { | 362 | if (longcal || shortcal || aniflag) { |
363 | /* Call ANI routine if necessary */ | 363 | /* Call ANI routine if necessary */ |
364 | if (aniflag) | 364 | if (aniflag) |
365 | ath9k_hw_ani_monitor(ah, &sc->sc_halstats, | 365 | ath9k_hw_ani_monitor(ah, &sc->nodestats, |
366 | ah->ah_curchan); | 366 | ah->ah_curchan); |
367 | 367 | ||
368 | /* Perform calibration if necessary */ | 368 | /* Perform calibration if necessary */ |
@@ -370,10 +370,10 @@ static void ath_ani_calibrate(unsigned long data) | |||
370 | bool iscaldone = false; | 370 | bool iscaldone = false; |
371 | 371 | ||
372 | if (ath9k_hw_calibrate(ah, ah->ah_curchan, | 372 | if (ath9k_hw_calibrate(ah, ah->ah_curchan, |
373 | sc->sc_rx_chainmask, longcal, | 373 | sc->rx_chainmask, longcal, |
374 | &iscaldone)) { | 374 | &iscaldone)) { |
375 | if (longcal) | 375 | if (longcal) |
376 | sc->sc_ani.sc_noise_floor = | 376 | sc->ani.noise_floor = |
377 | ath9k_hw_getchan_noise(ah, | 377 | ath9k_hw_getchan_noise(ah, |
378 | ah->ah_curchan); | 378 | ah->ah_curchan); |
379 | 379 | ||
@@ -381,14 +381,14 @@ static void ath_ani_calibrate(unsigned long data) | |||
381 | "calibrate chan %u/%x nf: %d\n", | 381 | "calibrate chan %u/%x nf: %d\n", |
382 | ah->ah_curchan->channel, | 382 | ah->ah_curchan->channel, |
383 | ah->ah_curchan->channelFlags, | 383 | ah->ah_curchan->channelFlags, |
384 | sc->sc_ani.sc_noise_floor); | 384 | sc->ani.noise_floor); |
385 | } else { | 385 | } else { |
386 | DPRINTF(sc, ATH_DBG_ANY, | 386 | DPRINTF(sc, ATH_DBG_ANY, |
387 | "calibrate chan %u/%x failed\n", | 387 | "calibrate chan %u/%x failed\n", |
388 | ah->ah_curchan->channel, | 388 | ah->ah_curchan->channel, |
389 | ah->ah_curchan->channelFlags); | 389 | ah->ah_curchan->channelFlags); |
390 | } | 390 | } |
391 | sc->sc_ani.sc_caldone = iscaldone; | 391 | sc->ani.caldone = iscaldone; |
392 | } | 392 | } |
393 | } | 393 | } |
394 | 394 | ||
@@ -400,10 +400,10 @@ static void ath_ani_calibrate(unsigned long data) | |||
400 | cal_interval = ATH_LONG_CALINTERVAL; | 400 | cal_interval = ATH_LONG_CALINTERVAL; |
401 | if (sc->sc_ah->ah_config.enable_ani) | 401 | if (sc->sc_ah->ah_config.enable_ani) |
402 | cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL); | 402 | cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL); |
403 | if (!sc->sc_ani.sc_caldone) | 403 | if (!sc->ani.caldone) |
404 | cal_interval = min(cal_interval, (u32)ATH_SHORT_CALINTERVAL); | 404 | cal_interval = min(cal_interval, (u32)ATH_SHORT_CALINTERVAL); |
405 | 405 | ||
406 | mod_timer(&sc->sc_ani.timer, jiffies + msecs_to_jiffies(cal_interval)); | 406 | mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); |
407 | } | 407 | } |
408 | 408 | ||
409 | /* | 409 | /* |
@@ -417,15 +417,15 @@ static void ath_update_chainmask(struct ath_softc *sc, int is_ht) | |||
417 | sc->sc_flags |= SC_OP_CHAINMASK_UPDATE; | 417 | sc->sc_flags |= SC_OP_CHAINMASK_UPDATE; |
418 | if (is_ht || | 418 | if (is_ht || |
419 | (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) { | 419 | (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) { |
420 | sc->sc_tx_chainmask = sc->sc_ah->ah_caps.tx_chainmask; | 420 | sc->tx_chainmask = sc->sc_ah->ah_caps.tx_chainmask; |
421 | sc->sc_rx_chainmask = sc->sc_ah->ah_caps.rx_chainmask; | 421 | sc->rx_chainmask = sc->sc_ah->ah_caps.rx_chainmask; |
422 | } else { | 422 | } else { |
423 | sc->sc_tx_chainmask = 1; | 423 | sc->tx_chainmask = 1; |
424 | sc->sc_rx_chainmask = 1; | 424 | sc->rx_chainmask = 1; |
425 | } | 425 | } |
426 | 426 | ||
427 | DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n", | 427 | DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n", |
428 | sc->sc_tx_chainmask, sc->sc_rx_chainmask); | 428 | sc->tx_chainmask, sc->rx_chainmask); |
429 | } | 429 | } |
430 | 430 | ||
431 | static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) | 431 | static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) |
@@ -453,7 +453,7 @@ static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta) | |||
453 | static void ath9k_tasklet(unsigned long data) | 453 | static void ath9k_tasklet(unsigned long data) |
454 | { | 454 | { |
455 | struct ath_softc *sc = (struct ath_softc *)data; | 455 | struct ath_softc *sc = (struct ath_softc *)data; |
456 | u32 status = sc->sc_intrstatus; | 456 | u32 status = sc->intrstatus; |
457 | 457 | ||
458 | if (status & ATH9K_INT_FATAL) { | 458 | if (status & ATH9K_INT_FATAL) { |
459 | /* need a chip reset */ | 459 | /* need a chip reset */ |
@@ -473,7 +473,7 @@ static void ath9k_tasklet(unsigned long data) | |||
473 | } | 473 | } |
474 | 474 | ||
475 | /* re-enable hardware interrupt */ | 475 | /* re-enable hardware interrupt */ |
476 | ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask); | 476 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); |
477 | } | 477 | } |
478 | 478 | ||
479 | irqreturn_t ath_isr(int irq, void *dev) | 479 | irqreturn_t ath_isr(int irq, void *dev) |
@@ -504,7 +504,7 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
504 | */ | 504 | */ |
505 | ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ | 505 | ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */ |
506 | 506 | ||
507 | status &= sc->sc_imask; /* discard unasked-for bits */ | 507 | status &= sc->imask; /* discard unasked-for bits */ |
508 | 508 | ||
509 | /* | 509 | /* |
510 | * If there are no status bits set, then this interrupt was not | 510 | * If there are no status bits set, then this interrupt was not |
@@ -513,7 +513,7 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
513 | if (!status) | 513 | if (!status) |
514 | return IRQ_NONE; | 514 | return IRQ_NONE; |
515 | 515 | ||
516 | sc->sc_intrstatus = status; | 516 | sc->intrstatus = status; |
517 | 517 | ||
518 | if (status & ATH9K_INT_FATAL) { | 518 | if (status & ATH9K_INT_FATAL) { |
519 | /* need a chip reset */ | 519 | /* need a chip reset */ |
@@ -560,8 +560,8 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
560 | * it will clear whatever condition caused | 560 | * it will clear whatever condition caused |
561 | * the interrupt. | 561 | * the interrupt. |
562 | */ | 562 | */ |
563 | ath9k_hw_procmibevent(ah, &sc->sc_halstats); | 563 | ath9k_hw_procmibevent(ah, &sc->nodestats); |
564 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 564 | ath9k_hw_set_interrupts(ah, sc->imask); |
565 | } | 565 | } |
566 | if (status & ATH9K_INT_TIM_TIMER) { | 566 | if (status & ATH9K_INT_TIM_TIMER) { |
567 | if (!(ah->ah_caps.hw_caps & | 567 | if (!(ah->ah_caps.hw_caps & |
@@ -581,7 +581,7 @@ irqreturn_t ath_isr(int irq, void *dev) | |||
581 | 581 | ||
582 | if (sched) { | 582 | if (sched) { |
583 | /* turn off every interrupt except SWBA */ | 583 | /* turn off every interrupt except SWBA */ |
584 | ath9k_hw_set_interrupts(ah, (sc->sc_imask & ATH9K_INT_SWBA)); | 584 | ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA)); |
585 | tasklet_schedule(&sc->intr_tq); | 585 | tasklet_schedule(&sc->intr_tq); |
586 | } | 586 | } |
587 | 587 | ||
@@ -656,7 +656,7 @@ static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key, | |||
656 | memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); | 656 | memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); |
657 | return ath_keyset(sc, keyix, hk, addr); | 657 | return ath_keyset(sc, keyix, hk, addr); |
658 | } | 658 | } |
659 | if (!sc->sc_splitmic) { | 659 | if (!sc->splitmic) { |
660 | /* | 660 | /* |
661 | * data key goes at first index, | 661 | * data key goes at first index, |
662 | * the hal handles the MIC keys at index+64. | 662 | * the hal handles the MIC keys at index+64. |
@@ -686,13 +686,13 @@ static int ath_reserve_key_cache_slot_tkip(struct ath_softc *sc) | |||
686 | { | 686 | { |
687 | int i; | 687 | int i; |
688 | 688 | ||
689 | for (i = IEEE80211_WEP_NKID; i < sc->sc_keymax / 2; i++) { | 689 | for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) { |
690 | if (test_bit(i, sc->sc_keymap) || | 690 | if (test_bit(i, sc->keymap) || |
691 | test_bit(i + 64, sc->sc_keymap)) | 691 | test_bit(i + 64, sc->keymap)) |
692 | continue; /* At least one part of TKIP key allocated */ | 692 | continue; /* At least one part of TKIP key allocated */ |
693 | if (sc->sc_splitmic && | 693 | if (sc->splitmic && |
694 | (test_bit(i + 32, sc->sc_keymap) || | 694 | (test_bit(i + 32, sc->keymap) || |
695 | test_bit(i + 64 + 32, sc->sc_keymap))) | 695 | test_bit(i + 64 + 32, sc->keymap))) |
696 | continue; /* At least one part of TKIP key allocated */ | 696 | continue; /* At least one part of TKIP key allocated */ |
697 | 697 | ||
698 | /* Found a free slot for a TKIP key */ | 698 | /* Found a free slot for a TKIP key */ |
@@ -706,55 +706,55 @@ static int ath_reserve_key_cache_slot(struct ath_softc *sc) | |||
706 | int i; | 706 | int i; |
707 | 707 | ||
708 | /* First, try to find slots that would not be available for TKIP. */ | 708 | /* First, try to find slots that would not be available for TKIP. */ |
709 | if (sc->sc_splitmic) { | 709 | if (sc->splitmic) { |
710 | for (i = IEEE80211_WEP_NKID; i < sc->sc_keymax / 4; i++) { | 710 | for (i = IEEE80211_WEP_NKID; i < sc->keymax / 4; i++) { |
711 | if (!test_bit(i, sc->sc_keymap) && | 711 | if (!test_bit(i, sc->keymap) && |
712 | (test_bit(i + 32, sc->sc_keymap) || | 712 | (test_bit(i + 32, sc->keymap) || |
713 | test_bit(i + 64, sc->sc_keymap) || | 713 | test_bit(i + 64, sc->keymap) || |
714 | test_bit(i + 64 + 32, sc->sc_keymap))) | 714 | test_bit(i + 64 + 32, sc->keymap))) |
715 | return i; | 715 | return i; |
716 | if (!test_bit(i + 32, sc->sc_keymap) && | 716 | if (!test_bit(i + 32, sc->keymap) && |
717 | (test_bit(i, sc->sc_keymap) || | 717 | (test_bit(i, sc->keymap) || |
718 | test_bit(i + 64, sc->sc_keymap) || | 718 | test_bit(i + 64, sc->keymap) || |
719 | test_bit(i + 64 + 32, sc->sc_keymap))) | 719 | test_bit(i + 64 + 32, sc->keymap))) |
720 | return i + 32; | 720 | return i + 32; |
721 | if (!test_bit(i + 64, sc->sc_keymap) && | 721 | if (!test_bit(i + 64, sc->keymap) && |
722 | (test_bit(i , sc->sc_keymap) || | 722 | (test_bit(i , sc->keymap) || |
723 | test_bit(i + 32, sc->sc_keymap) || | 723 | test_bit(i + 32, sc->keymap) || |
724 | test_bit(i + 64 + 32, sc->sc_keymap))) | 724 | test_bit(i + 64 + 32, sc->keymap))) |
725 | return i + 64; | 725 | return i + 64; |
726 | if (!test_bit(i + 64 + 32, sc->sc_keymap) && | 726 | if (!test_bit(i + 64 + 32, sc->keymap) && |
727 | (test_bit(i, sc->sc_keymap) || | 727 | (test_bit(i, sc->keymap) || |
728 | test_bit(i + 32, sc->sc_keymap) || | 728 | test_bit(i + 32, sc->keymap) || |
729 | test_bit(i + 64, sc->sc_keymap))) | 729 | test_bit(i + 64, sc->keymap))) |
730 | return i + 64 + 32; | 730 | return i + 64 + 32; |
731 | } | 731 | } |
732 | } else { | 732 | } else { |
733 | for (i = IEEE80211_WEP_NKID; i < sc->sc_keymax / 2; i++) { | 733 | for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) { |
734 | if (!test_bit(i, sc->sc_keymap) && | 734 | if (!test_bit(i, sc->keymap) && |
735 | test_bit(i + 64, sc->sc_keymap)) | 735 | test_bit(i + 64, sc->keymap)) |
736 | return i; | 736 | return i; |
737 | if (test_bit(i, sc->sc_keymap) && | 737 | if (test_bit(i, sc->keymap) && |
738 | !test_bit(i + 64, sc->sc_keymap)) | 738 | !test_bit(i + 64, sc->keymap)) |
739 | return i + 64; | 739 | return i + 64; |
740 | } | 740 | } |
741 | } | 741 | } |
742 | 742 | ||
743 | /* No partially used TKIP slots, pick any available slot */ | 743 | /* No partially used TKIP slots, pick any available slot */ |
744 | for (i = IEEE80211_WEP_NKID; i < sc->sc_keymax; i++) { | 744 | for (i = IEEE80211_WEP_NKID; i < sc->keymax; i++) { |
745 | /* Do not allow slots that could be needed for TKIP group keys | 745 | /* Do not allow slots that could be needed for TKIP group keys |
746 | * to be used. This limitation could be removed if we know that | 746 | * to be used. This limitation could be removed if we know that |
747 | * TKIP will not be used. */ | 747 | * TKIP will not be used. */ |
748 | if (i >= 64 && i < 64 + IEEE80211_WEP_NKID) | 748 | if (i >= 64 && i < 64 + IEEE80211_WEP_NKID) |
749 | continue; | 749 | continue; |
750 | if (sc->sc_splitmic) { | 750 | if (sc->splitmic) { |
751 | if (i >= 32 && i < 32 + IEEE80211_WEP_NKID) | 751 | if (i >= 32 && i < 32 + IEEE80211_WEP_NKID) |
752 | continue; | 752 | continue; |
753 | if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID) | 753 | if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID) |
754 | continue; | 754 | continue; |
755 | } | 755 | } |
756 | 756 | ||
757 | if (!test_bit(i, sc->sc_keymap)) | 757 | if (!test_bit(i, sc->keymap)) |
758 | return i; /* Found a free slot for a key */ | 758 | return i; /* Found a free slot for a key */ |
759 | } | 759 | } |
760 | 760 | ||
@@ -801,7 +801,7 @@ static int ath_key_config(struct ath_softc *sc, | |||
801 | return -EOPNOTSUPP; | 801 | return -EOPNOTSUPP; |
802 | mac = sta->addr; | 802 | mac = sta->addr; |
803 | 803 | ||
804 | vif = sc->sc_vaps[0]; | 804 | vif = sc->vifs[0]; |
805 | if (vif->type != NL80211_IFTYPE_AP) { | 805 | if (vif->type != NL80211_IFTYPE_AP) { |
806 | /* Only keyidx 0 should be used with unicast key, but | 806 | /* Only keyidx 0 should be used with unicast key, but |
807 | * allow this for client mode for now. */ | 807 | * allow this for client mode for now. */ |
@@ -829,12 +829,12 @@ static int ath_key_config(struct ath_softc *sc, | |||
829 | if (!ret) | 829 | if (!ret) |
830 | return -EIO; | 830 | return -EIO; |
831 | 831 | ||
832 | set_bit(idx, sc->sc_keymap); | 832 | set_bit(idx, sc->keymap); |
833 | if (key->alg == ALG_TKIP) { | 833 | if (key->alg == ALG_TKIP) { |
834 | set_bit(idx + 64, sc->sc_keymap); | 834 | set_bit(idx + 64, sc->keymap); |
835 | if (sc->sc_splitmic) { | 835 | if (sc->splitmic) { |
836 | set_bit(idx + 32, sc->sc_keymap); | 836 | set_bit(idx + 32, sc->keymap); |
837 | set_bit(idx + 64 + 32, sc->sc_keymap); | 837 | set_bit(idx + 64 + 32, sc->keymap); |
838 | } | 838 | } |
839 | } | 839 | } |
840 | 840 | ||
@@ -847,14 +847,14 @@ static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key) | |||
847 | if (key->hw_key_idx < IEEE80211_WEP_NKID) | 847 | if (key->hw_key_idx < IEEE80211_WEP_NKID) |
848 | return; | 848 | return; |
849 | 849 | ||
850 | clear_bit(key->hw_key_idx, sc->sc_keymap); | 850 | clear_bit(key->hw_key_idx, sc->keymap); |
851 | if (key->alg != ALG_TKIP) | 851 | if (key->alg != ALG_TKIP) |
852 | return; | 852 | return; |
853 | 853 | ||
854 | clear_bit(key->hw_key_idx + 64, sc->sc_keymap); | 854 | clear_bit(key->hw_key_idx + 64, sc->keymap); |
855 | if (sc->sc_splitmic) { | 855 | if (sc->splitmic) { |
856 | clear_bit(key->hw_key_idx + 32, sc->sc_keymap); | 856 | clear_bit(key->hw_key_idx + 32, sc->keymap); |
857 | clear_bit(key->hw_key_idx + 64 + 32, sc->sc_keymap); | 857 | clear_bit(key->hw_key_idx + 64 + 32, sc->keymap); |
858 | } | 858 | } |
859 | } | 859 | } |
860 | 860 | ||
@@ -876,7 +876,7 @@ static void setup_ht_cap(struct ath_softc *sc, | |||
876 | /* set up supported mcs set */ | 876 | /* set up supported mcs set */ |
877 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); | 877 | memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); |
878 | 878 | ||
879 | switch(sc->sc_rx_chainmask) { | 879 | switch(sc->rx_chainmask) { |
880 | case 1: | 880 | case 1: |
881 | ht_info->mcs.rx_mask[0] = 0xff; | 881 | ht_info->mcs.rx_mask[0] = 0xff; |
882 | break; | 882 | break; |
@@ -896,17 +896,17 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc, | |||
896 | struct ieee80211_vif *vif, | 896 | struct ieee80211_vif *vif, |
897 | struct ieee80211_bss_conf *bss_conf) | 897 | struct ieee80211_bss_conf *bss_conf) |
898 | { | 898 | { |
899 | struct ath_vap *avp = (void *)vif->drv_priv; | 899 | struct ath_vif *avp = (void *)vif->drv_priv; |
900 | 900 | ||
901 | if (bss_conf->assoc) { | 901 | if (bss_conf->assoc) { |
902 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", | 902 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", |
903 | bss_conf->aid, sc->sc_curbssid); | 903 | bss_conf->aid, sc->curbssid); |
904 | 904 | ||
905 | /* New association, store aid */ | 905 | /* New association, store aid */ |
906 | if (avp->av_opmode == NL80211_IFTYPE_STATION) { | 906 | if (avp->av_opmode == NL80211_IFTYPE_STATION) { |
907 | sc->sc_curaid = bss_conf->aid; | 907 | sc->curaid = bss_conf->aid; |
908 | ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid, | 908 | ath9k_hw_write_associd(sc->sc_ah, sc->curbssid, |
909 | sc->sc_curaid); | 909 | sc->curaid); |
910 | } | 910 | } |
911 | 911 | ||
912 | /* Configure the beacon */ | 912 | /* Configure the beacon */ |
@@ -914,18 +914,18 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc, | |||
914 | sc->sc_flags |= SC_OP_BEACONS; | 914 | sc->sc_flags |= SC_OP_BEACONS; |
915 | 915 | ||
916 | /* Reset rssi stats */ | 916 | /* Reset rssi stats */ |
917 | sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER; | 917 | sc->nodestats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER; |
918 | sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER; | 918 | sc->nodestats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER; |
919 | sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER; | 919 | sc->nodestats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER; |
920 | sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER; | 920 | sc->nodestats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER; |
921 | 921 | ||
922 | /* Start ANI */ | 922 | /* Start ANI */ |
923 | mod_timer(&sc->sc_ani.timer, | 923 | mod_timer(&sc->ani.timer, |
924 | jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); | 924 | jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); |
925 | 925 | ||
926 | } else { | 926 | } else { |
927 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISSOC\n"); | 927 | DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISSOC\n"); |
928 | sc->sc_curaid = 0; | 928 | sc->curaid = 0; |
929 | } | 929 | } |
930 | } | 930 | } |
931 | 931 | ||
@@ -1120,7 +1120,7 @@ static void ath_radio_enable(struct ath_softc *sc) | |||
1120 | ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */ | 1120 | ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */ |
1121 | 1121 | ||
1122 | /* Re-Enable interrupts */ | 1122 | /* Re-Enable interrupts */ |
1123 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 1123 | ath9k_hw_set_interrupts(ah, sc->imask); |
1124 | 1124 | ||
1125 | /* Enable LED */ | 1125 | /* Enable LED */ |
1126 | ath9k_hw_cfg_output(ah, ATH_LED_PIN, | 1126 | ath9k_hw_cfg_output(ah, ATH_LED_PIN, |
@@ -1369,7 +1369,7 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1369 | */ | 1369 | */ |
1370 | ath_read_cachesize(sc, &csz); | 1370 | ath_read_cachesize(sc, &csz); |
1371 | /* XXX assert csz is non-zero */ | 1371 | /* XXX assert csz is non-zero */ |
1372 | sc->sc_cachelsz = csz << 2; /* convert to bytes */ | 1372 | sc->cachelsz = csz << 2; /* convert to bytes */ |
1373 | 1373 | ||
1374 | ah = ath9k_hw_attach(devid, sc, sc->mem, &status); | 1374 | ah = ath9k_hw_attach(devid, sc, sc->mem, &status); |
1375 | if (ah == NULL) { | 1375 | if (ah == NULL) { |
@@ -1381,19 +1381,19 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1381 | sc->sc_ah = ah; | 1381 | sc->sc_ah = ah; |
1382 | 1382 | ||
1383 | /* Get the hardware key cache size. */ | 1383 | /* Get the hardware key cache size. */ |
1384 | sc->sc_keymax = ah->ah_caps.keycache_size; | 1384 | sc->keymax = ah->ah_caps.keycache_size; |
1385 | if (sc->sc_keymax > ATH_KEYMAX) { | 1385 | if (sc->keymax > ATH_KEYMAX) { |
1386 | DPRINTF(sc, ATH_DBG_KEYCACHE, | 1386 | DPRINTF(sc, ATH_DBG_KEYCACHE, |
1387 | "Warning, using only %u entries in %u key cache\n", | 1387 | "Warning, using only %u entries in %u key cache\n", |
1388 | ATH_KEYMAX, sc->sc_keymax); | 1388 | ATH_KEYMAX, sc->keymax); |
1389 | sc->sc_keymax = ATH_KEYMAX; | 1389 | sc->keymax = ATH_KEYMAX; |
1390 | } | 1390 | } |
1391 | 1391 | ||
1392 | /* | 1392 | /* |
1393 | * Reset the key cache since some parts do not | 1393 | * Reset the key cache since some parts do not |
1394 | * reset the contents on initial power up. | 1394 | * reset the contents on initial power up. |
1395 | */ | 1395 | */ |
1396 | for (i = 0; i < sc->sc_keymax; i++) | 1396 | for (i = 0; i < sc->keymax; i++) |
1397 | ath9k_hw_keyreset(ah, (u16) i); | 1397 | ath9k_hw_keyreset(ah, (u16) i); |
1398 | 1398 | ||
1399 | if (ath9k_regd_init(sc->sc_ah)) | 1399 | if (ath9k_regd_init(sc->sc_ah)) |
@@ -1429,7 +1429,7 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1429 | goto bad2; | 1429 | goto bad2; |
1430 | } | 1430 | } |
1431 | 1431 | ||
1432 | sc->sc_config.cabqReadytime = ATH_CABQ_READY_TIME; | 1432 | sc->config.cabqReadytime = ATH_CABQ_READY_TIME; |
1433 | ath_cabq_update(sc); | 1433 | ath_cabq_update(sc); |
1434 | 1434 | ||
1435 | for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++) | 1435 | for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++) |
@@ -1466,8 +1466,8 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1466 | /* Initializes the noise floor to a reasonable default value. | 1466 | /* Initializes the noise floor to a reasonable default value. |
1467 | * Later on this will be updated during ANI processing. */ | 1467 | * Later on this will be updated during ANI processing. */ |
1468 | 1468 | ||
1469 | sc->sc_ani.sc_noise_floor = ATH_DEFAULT_NOISE_FLOOR; | 1469 | sc->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR; |
1470 | setup_timer(&sc->sc_ani.timer, ath_ani_calibrate, (unsigned long)sc); | 1470 | setup_timer(&sc->ani.timer, ath_ani_calibrate, (unsigned long)sc); |
1471 | 1471 | ||
1472 | if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER, | 1472 | if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER, |
1473 | ATH9K_CIPHER_TKIP, NULL)) { | 1473 | ATH9K_CIPHER_TKIP, NULL)) { |
@@ -1493,14 +1493,14 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1493 | ATH9K_CIPHER_MIC, NULL) | 1493 | ATH9K_CIPHER_MIC, NULL) |
1494 | && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT, | 1494 | && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT, |
1495 | 0, NULL)) | 1495 | 0, NULL)) |
1496 | sc->sc_splitmic = 1; | 1496 | sc->splitmic = 1; |
1497 | 1497 | ||
1498 | /* turn on mcast key search if possible */ | 1498 | /* turn on mcast key search if possible */ |
1499 | if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL)) | 1499 | if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL)) |
1500 | (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1, | 1500 | (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1, |
1501 | 1, NULL); | 1501 | 1, NULL); |
1502 | 1502 | ||
1503 | sc->sc_config.txpowlimit = ATH_TXPOWER_MAX; | 1503 | sc->config.txpowlimit = ATH_TXPOWER_MAX; |
1504 | 1504 | ||
1505 | /* 11n Capabilities */ | 1505 | /* 11n Capabilities */ |
1506 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) { | 1506 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) { |
@@ -1508,17 +1508,17 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1508 | sc->sc_flags |= SC_OP_RXAGGR; | 1508 | sc->sc_flags |= SC_OP_RXAGGR; |
1509 | } | 1509 | } |
1510 | 1510 | ||
1511 | sc->sc_tx_chainmask = ah->ah_caps.tx_chainmask; | 1511 | sc->tx_chainmask = ah->ah_caps.tx_chainmask; |
1512 | sc->sc_rx_chainmask = ah->ah_caps.rx_chainmask; | 1512 | sc->rx_chainmask = ah->ah_caps.rx_chainmask; |
1513 | 1513 | ||
1514 | ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL); | 1514 | ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL); |
1515 | sc->rx.defant = ath9k_hw_getdefantenna(ah); | 1515 | sc->rx.defant = ath9k_hw_getdefantenna(ah); |
1516 | 1516 | ||
1517 | ath9k_hw_getmac(ah, sc->sc_myaddr); | 1517 | ath9k_hw_getmac(ah, sc->macaddr); |
1518 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) { | 1518 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) { |
1519 | ath9k_hw_getbssidmask(ah, sc->sc_bssidmask); | 1519 | ath9k_hw_getbssidmask(ah, sc->bssidmask); |
1520 | ATH_SET_VAP_BSSID_MASK(sc->sc_bssidmask); | 1520 | ATH_SET_VIF_BSSID_MASK(sc->bssidmask); |
1521 | ath9k_hw_setbssidmask(ah, sc->sc_bssidmask); | 1521 | ath9k_hw_setbssidmask(ah, sc->bssidmask); |
1522 | } | 1522 | } |
1523 | 1523 | ||
1524 | sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */ | 1524 | sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */ |
@@ -1528,7 +1528,7 @@ static int ath_init(u16 devid, struct ath_softc *sc) | |||
1528 | sc->beacon.bslot[i] = ATH_IF_ID_ANY; | 1528 | sc->beacon.bslot[i] = ATH_IF_ID_ANY; |
1529 | 1529 | ||
1530 | /* save MISC configurations */ | 1530 | /* save MISC configurations */ |
1531 | sc->sc_config.swBeaconProcess = 1; | 1531 | sc->config.swBeaconProcess = 1; |
1532 | 1532 | ||
1533 | /* setup channels and rates */ | 1533 | /* setup channels and rates */ |
1534 | 1534 | ||
@@ -1577,7 +1577,7 @@ int ath_attach(u16 devid, struct ath_softc *sc) | |||
1577 | 1577 | ||
1578 | /* get mac address from hardware and set in mac80211 */ | 1578 | /* get mac address from hardware and set in mac80211 */ |
1579 | 1579 | ||
1580 | SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr); | 1580 | SET_IEEE80211_PERM_ADDR(hw, sc->macaddr); |
1581 | 1581 | ||
1582 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | | 1582 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
1583 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 1583 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
@@ -1601,7 +1601,7 @@ int ath_attach(u16 devid, struct ath_softc *sc) | |||
1601 | hw->max_rates = 4; | 1601 | hw->max_rates = 4; |
1602 | hw->max_rate_tries = ATH_11N_TXMAXTRY; | 1602 | hw->max_rate_tries = ATH_11N_TXMAXTRY; |
1603 | hw->sta_data_size = sizeof(struct ath_node); | 1603 | hw->sta_data_size = sizeof(struct ath_node); |
1604 | hw->vif_data_size = sizeof(struct ath_vap); | 1604 | hw->vif_data_size = sizeof(struct ath_vif); |
1605 | 1605 | ||
1606 | hw->rate_control_algorithm = "ath9k_rate_control"; | 1606 | hw->rate_control_algorithm = "ath9k_rate_control"; |
1607 | 1607 | ||
@@ -1704,7 +1704,7 @@ int ath_reset(struct ath_softc *sc, bool retry_tx) | |||
1704 | if (sc->sc_flags & SC_OP_BEACONS) | 1704 | if (sc->sc_flags & SC_OP_BEACONS) |
1705 | ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */ | 1705 | ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */ |
1706 | 1706 | ||
1707 | ath9k_hw_set_interrupts(ah, sc->sc_imask); | 1707 | ath9k_hw_set_interrupts(ah, sc->imask); |
1708 | 1708 | ||
1709 | if (retry_tx) { | 1709 | if (retry_tx) { |
1710 | int i; | 1710 | int i; |
@@ -1987,23 +1987,23 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1987 | } | 1987 | } |
1988 | 1988 | ||
1989 | /* Setup our intr mask. */ | 1989 | /* Setup our intr mask. */ |
1990 | sc->sc_imask = ATH9K_INT_RX | ATH9K_INT_TX | 1990 | sc->imask = ATH9K_INT_RX | ATH9K_INT_TX |
1991 | | ATH9K_INT_RXEOL | ATH9K_INT_RXORN | 1991 | | ATH9K_INT_RXEOL | ATH9K_INT_RXORN |
1992 | | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL; | 1992 | | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL; |
1993 | 1993 | ||
1994 | if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_GTT) | 1994 | if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_GTT) |
1995 | sc->sc_imask |= ATH9K_INT_GTT; | 1995 | sc->imask |= ATH9K_INT_GTT; |
1996 | 1996 | ||
1997 | if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) | 1997 | if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) |
1998 | sc->sc_imask |= ATH9K_INT_CST; | 1998 | sc->imask |= ATH9K_INT_CST; |
1999 | 1999 | ||
2000 | ath_cache_conf_rate(sc, &hw->conf); | 2000 | ath_cache_conf_rate(sc, &hw->conf); |
2001 | 2001 | ||
2002 | sc->sc_flags &= ~SC_OP_INVALID; | 2002 | sc->sc_flags &= ~SC_OP_INVALID; |
2003 | 2003 | ||
2004 | /* Disable BMISS interrupt when we're not associated */ | 2004 | /* Disable BMISS interrupt when we're not associated */ |
2005 | sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); | 2005 | sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); |
2006 | ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask); | 2006 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); |
2007 | 2007 | ||
2008 | ieee80211_wake_queues(sc->hw); | 2008 | ieee80211_wake_queues(sc->hw); |
2009 | 2009 | ||
@@ -2112,12 +2112,12 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
2112 | struct ieee80211_if_init_conf *conf) | 2112 | struct ieee80211_if_init_conf *conf) |
2113 | { | 2113 | { |
2114 | struct ath_softc *sc = hw->priv; | 2114 | struct ath_softc *sc = hw->priv; |
2115 | struct ath_vap *avp = (void *)conf->vif->drv_priv; | 2115 | struct ath_vif *avp = (void *)conf->vif->drv_priv; |
2116 | enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED; | 2116 | enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED; |
2117 | 2117 | ||
2118 | /* Support only vap for now */ | 2118 | /* Support only vif for now */ |
2119 | 2119 | ||
2120 | if (sc->sc_nvaps) | 2120 | if (sc->nvifs) |
2121 | return -ENOBUFS; | 2121 | return -ENOBUFS; |
2122 | 2122 | ||
2123 | mutex_lock(&sc->mutex); | 2123 | mutex_lock(&sc->mutex); |
@@ -2138,17 +2138,17 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
2138 | return -EOPNOTSUPP; | 2138 | return -EOPNOTSUPP; |
2139 | } | 2139 | } |
2140 | 2140 | ||
2141 | DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VAP of type: %d\n", ic_opmode); | 2141 | DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VIF of type: %d\n", ic_opmode); |
2142 | 2142 | ||
2143 | /* Set the VAP opmode */ | 2143 | /* Set the VIF opmode */ |
2144 | avp->av_opmode = ic_opmode; | 2144 | avp->av_opmode = ic_opmode; |
2145 | avp->av_bslot = -1; | 2145 | avp->av_bslot = -1; |
2146 | 2146 | ||
2147 | if (ic_opmode == NL80211_IFTYPE_AP) | 2147 | if (ic_opmode == NL80211_IFTYPE_AP) |
2148 | ath9k_hw_set_tsfadjust(sc->sc_ah, 1); | 2148 | ath9k_hw_set_tsfadjust(sc->sc_ah, 1); |
2149 | 2149 | ||
2150 | sc->sc_vaps[0] = conf->vif; | 2150 | sc->vifs[0] = conf->vif; |
2151 | sc->sc_nvaps++; | 2151 | sc->nvifs++; |
2152 | 2152 | ||
2153 | /* Set the device opmode */ | 2153 | /* Set the device opmode */ |
2154 | sc->sc_ah->ah_opmode = ic_opmode; | 2154 | sc->sc_ah->ah_opmode = ic_opmode; |
@@ -2160,7 +2160,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
2160 | if (ath9k_hw_phycounters(sc->sc_ah) && | 2160 | if (ath9k_hw_phycounters(sc->sc_ah) && |
2161 | ((conf->type == NL80211_IFTYPE_STATION) || | 2161 | ((conf->type == NL80211_IFTYPE_STATION) || |
2162 | (conf->type == NL80211_IFTYPE_ADHOC))) | 2162 | (conf->type == NL80211_IFTYPE_ADHOC))) |
2163 | sc->sc_imask |= ATH9K_INT_MIB; | 2163 | sc->imask |= ATH9K_INT_MIB; |
2164 | /* | 2164 | /* |
2165 | * Some hardware processes the TIM IE and fires an | 2165 | * Some hardware processes the TIM IE and fires an |
2166 | * interrupt when the TIM bit is set. For hardware | 2166 | * interrupt when the TIM bit is set. For hardware |
@@ -2169,15 +2169,15 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
2169 | */ | 2169 | */ |
2170 | if ((sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) && | 2170 | if ((sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_ENHANCEDPM) && |
2171 | (conf->type == NL80211_IFTYPE_STATION) && | 2171 | (conf->type == NL80211_IFTYPE_STATION) && |
2172 | !sc->sc_config.swBeaconProcess) | 2172 | !sc->config.swBeaconProcess) |
2173 | sc->sc_imask |= ATH9K_INT_TIM; | 2173 | sc->imask |= ATH9K_INT_TIM; |
2174 | 2174 | ||
2175 | ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask); | 2175 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); |
2176 | 2176 | ||
2177 | if (conf->type == NL80211_IFTYPE_AP) { | 2177 | if (conf->type == NL80211_IFTYPE_AP) { |
2178 | /* TODO: is this a suitable place to start ANI for AP mode? */ | 2178 | /* TODO: is this a suitable place to start ANI for AP mode? */ |
2179 | /* Start ANI */ | 2179 | /* Start ANI */ |
2180 | mod_timer(&sc->sc_ani.timer, | 2180 | mod_timer(&sc->ani.timer, |
2181 | jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); | 2181 | jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); |
2182 | } | 2182 | } |
2183 | 2183 | ||
@@ -2190,14 +2190,14 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw, | |||
2190 | struct ieee80211_if_init_conf *conf) | 2190 | struct ieee80211_if_init_conf *conf) |
2191 | { | 2191 | { |
2192 | struct ath_softc *sc = hw->priv; | 2192 | struct ath_softc *sc = hw->priv; |
2193 | struct ath_vap *avp = (void *)conf->vif->drv_priv; | 2193 | struct ath_vif *avp = (void *)conf->vif->drv_priv; |
2194 | 2194 | ||
2195 | DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n"); | 2195 | DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n"); |
2196 | 2196 | ||
2197 | mutex_lock(&sc->mutex); | 2197 | mutex_lock(&sc->mutex); |
2198 | 2198 | ||
2199 | /* Stop ANI */ | 2199 | /* Stop ANI */ |
2200 | del_timer_sync(&sc->sc_ani.timer); | 2200 | del_timer_sync(&sc->ani.timer); |
2201 | 2201 | ||
2202 | /* Reclaim beacon resources */ | 2202 | /* Reclaim beacon resources */ |
2203 | if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP || | 2203 | if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP || |
@@ -2208,8 +2208,8 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw, | |||
2208 | 2208 | ||
2209 | sc->sc_flags &= ~SC_OP_BEACONS; | 2209 | sc->sc_flags &= ~SC_OP_BEACONS; |
2210 | 2210 | ||
2211 | sc->sc_vaps[0] = NULL; | 2211 | sc->vifs[0] = NULL; |
2212 | sc->sc_nvaps--; | 2212 | sc->nvifs--; |
2213 | 2213 | ||
2214 | mutex_unlock(&sc->mutex); | 2214 | mutex_unlock(&sc->mutex); |
2215 | } | 2215 | } |
@@ -2223,10 +2223,10 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2223 | 2223 | ||
2224 | if (changed & IEEE80211_CONF_CHANGE_PS) { | 2224 | if (changed & IEEE80211_CONF_CHANGE_PS) { |
2225 | if (conf->flags & IEEE80211_CONF_PS) { | 2225 | if (conf->flags & IEEE80211_CONF_PS) { |
2226 | if ((sc->sc_imask & ATH9K_INT_TIM_TIMER) == 0) { | 2226 | if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) { |
2227 | sc->sc_imask |= ATH9K_INT_TIM_TIMER; | 2227 | sc->imask |= ATH9K_INT_TIM_TIMER; |
2228 | ath9k_hw_set_interrupts(sc->sc_ah, | 2228 | ath9k_hw_set_interrupts(sc->sc_ah, |
2229 | sc->sc_imask); | 2229 | sc->imask); |
2230 | } | 2230 | } |
2231 | ath9k_hw_setrxabort(sc->sc_ah, 1); | 2231 | ath9k_hw_setrxabort(sc->sc_ah, 1); |
2232 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); | 2232 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); |
@@ -2234,10 +2234,10 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2234 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); | 2234 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); |
2235 | ath9k_hw_setrxabort(sc->sc_ah, 0); | 2235 | ath9k_hw_setrxabort(sc->sc_ah, 0); |
2236 | sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; | 2236 | sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; |
2237 | if (sc->sc_imask & ATH9K_INT_TIM_TIMER) { | 2237 | if (sc->imask & ATH9K_INT_TIM_TIMER) { |
2238 | sc->sc_imask &= ~ATH9K_INT_TIM_TIMER; | 2238 | sc->imask &= ~ATH9K_INT_TIM_TIMER; |
2239 | ath9k_hw_set_interrupts(sc->sc_ah, | 2239 | ath9k_hw_set_interrupts(sc->sc_ah, |
2240 | sc->sc_imask); | 2240 | sc->imask); |
2241 | } | 2241 | } |
2242 | } | 2242 | } |
2243 | } | 2243 | } |
@@ -2262,7 +2262,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
2262 | } | 2262 | } |
2263 | 2263 | ||
2264 | if (changed & IEEE80211_CONF_CHANGE_POWER) | 2264 | if (changed & IEEE80211_CONF_CHANGE_POWER) |
2265 | sc->sc_config.txpowlimit = 2 * conf->power_level; | 2265 | sc->config.txpowlimit = 2 * conf->power_level; |
2266 | 2266 | ||
2267 | mutex_unlock(&sc->mutex); | 2267 | mutex_unlock(&sc->mutex); |
2268 | 2268 | ||
@@ -2275,7 +2275,7 @@ static int ath9k_config_interface(struct ieee80211_hw *hw, | |||
2275 | { | 2275 | { |
2276 | struct ath_softc *sc = hw->priv; | 2276 | struct ath_softc *sc = hw->priv; |
2277 | struct ath_hal *ah = sc->sc_ah; | 2277 | struct ath_hal *ah = sc->sc_ah; |
2278 | struct ath_vap *avp = (void *)vif->drv_priv; | 2278 | struct ath_vif *avp = (void *)vif->drv_priv; |
2279 | u32 rfilt = 0; | 2279 | u32 rfilt = 0; |
2280 | int error, i; | 2280 | int error, i; |
2281 | 2281 | ||
@@ -2285,7 +2285,7 @@ static int ath9k_config_interface(struct ieee80211_hw *hw, | |||
2285 | ah->ah_opmode != NL80211_IFTYPE_AP) { | 2285 | ah->ah_opmode != NL80211_IFTYPE_AP) { |
2286 | ah->ah_opmode = NL80211_IFTYPE_STATION; | 2286 | ah->ah_opmode = NL80211_IFTYPE_STATION; |
2287 | ath9k_hw_setopmode(ah); | 2287 | ath9k_hw_setopmode(ah); |
2288 | ath9k_hw_write_associd(ah, sc->sc_myaddr, 0); | 2288 | ath9k_hw_write_associd(ah, sc->macaddr, 0); |
2289 | /* Request full reset to get hw opmode changed properly */ | 2289 | /* Request full reset to get hw opmode changed properly */ |
2290 | sc->sc_flags |= SC_OP_FULL_RESET; | 2290 | sc->sc_flags |= SC_OP_FULL_RESET; |
2291 | } | 2291 | } |
@@ -2296,17 +2296,17 @@ static int ath9k_config_interface(struct ieee80211_hw *hw, | |||
2296 | case NL80211_IFTYPE_STATION: | 2296 | case NL80211_IFTYPE_STATION: |
2297 | case NL80211_IFTYPE_ADHOC: | 2297 | case NL80211_IFTYPE_ADHOC: |
2298 | /* Set BSSID */ | 2298 | /* Set BSSID */ |
2299 | memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN); | 2299 | memcpy(sc->curbssid, conf->bssid, ETH_ALEN); |
2300 | sc->sc_curaid = 0; | 2300 | sc->curaid = 0; |
2301 | ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid, | 2301 | ath9k_hw_write_associd(sc->sc_ah, sc->curbssid, |
2302 | sc->sc_curaid); | 2302 | sc->curaid); |
2303 | 2303 | ||
2304 | /* Set aggregation protection mode parameters */ | 2304 | /* Set aggregation protection mode parameters */ |
2305 | sc->sc_config.ath_aggr_prot = 0; | 2305 | sc->config.ath_aggr_prot = 0; |
2306 | 2306 | ||
2307 | DPRINTF(sc, ATH_DBG_CONFIG, | 2307 | DPRINTF(sc, ATH_DBG_CONFIG, |
2308 | "RX filter 0x%x bssid %pM aid 0x%x\n", | 2308 | "RX filter 0x%x bssid %pM aid 0x%x\n", |
2309 | rfilt, sc->sc_curbssid, sc->sc_curaid); | 2309 | rfilt, sc->curbssid, sc->curaid); |
2310 | 2310 | ||
2311 | /* need to reconfigure the beacon */ | 2311 | /* need to reconfigure the beacon */ |
2312 | sc->sc_flags &= ~SC_OP_BEACONS ; | 2312 | sc->sc_flags &= ~SC_OP_BEACONS ; |
@@ -2346,7 +2346,7 @@ static int ath9k_config_interface(struct ieee80211_hw *hw, | |||
2346 | if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i)) | 2346 | if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i)) |
2347 | ath9k_hw_keysetmac(sc->sc_ah, | 2347 | ath9k_hw_keysetmac(sc->sc_ah, |
2348 | (u16)i, | 2348 | (u16)i, |
2349 | sc->sc_curbssid); | 2349 | sc->curbssid); |
2350 | } | 2350 | } |
2351 | 2351 | ||
2352 | /* Only legacy IBSS for now */ | 2352 | /* Only legacy IBSS for now */ |
diff --git a/drivers/net/wireless/ath9k/recv.c b/drivers/net/wireless/ath9k/recv.c index 69dd5e206270..e8e4a32037f9 100644 --- a/drivers/net/wireless/ath9k/recv.c +++ b/drivers/net/wireless/ath9k/recv.c | |||
@@ -97,11 +97,11 @@ static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc, u32 len) | |||
97 | * Unfortunately this means we may get 8 KB here from the | 97 | * Unfortunately this means we may get 8 KB here from the |
98 | * kernel... and that is actually what is observed on some | 98 | * kernel... and that is actually what is observed on some |
99 | * systems :( */ | 99 | * systems :( */ |
100 | skb = dev_alloc_skb(len + sc->sc_cachelsz - 1); | 100 | skb = dev_alloc_skb(len + sc->cachelsz - 1); |
101 | if (skb != NULL) { | 101 | if (skb != NULL) { |
102 | off = ((unsigned long) skb->data) % sc->sc_cachelsz; | 102 | off = ((unsigned long) skb->data) % sc->cachelsz; |
103 | if (off != 0) | 103 | if (off != 0) |
104 | skb_reserve(skb, sc->sc_cachelsz - off); | 104 | skb_reserve(skb, sc->cachelsz - off); |
105 | } else { | 105 | } else { |
106 | DPRINTF(sc, ATH_DBG_FATAL, | 106 | DPRINTF(sc, ATH_DBG_FATAL, |
107 | "skbuff alloc of size %u failed\n", len); | 107 | "skbuff alloc of size %u failed\n", len); |
@@ -210,7 +210,7 @@ static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds, | |||
210 | rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp); | 210 | rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp); |
211 | rx_status->band = sc->hw->conf.channel->band; | 211 | rx_status->band = sc->hw->conf.channel->band; |
212 | rx_status->freq = sc->hw->conf.channel->center_freq; | 212 | rx_status->freq = sc->hw->conf.channel->center_freq; |
213 | rx_status->noise = sc->sc_ani.sc_noise_floor; | 213 | rx_status->noise = sc->ani.noise_floor; |
214 | rx_status->signal = rx_status->noise + ds->ds_rxstat.rs_rssi; | 214 | rx_status->signal = rx_status->noise + ds->ds_rxstat.rs_rssi; |
215 | rx_status->antenna = ds->ds_rxstat.rs_antenna; | 215 | rx_status->antenna = ds->ds_rxstat.rs_antenna; |
216 | 216 | ||
@@ -242,13 +242,13 @@ static void ath_opmode_init(struct ath_softc *sc) | |||
242 | 242 | ||
243 | /* configure bssid mask */ | 243 | /* configure bssid mask */ |
244 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) | 244 | if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) |
245 | ath9k_hw_setbssidmask(ah, sc->sc_bssidmask); | 245 | ath9k_hw_setbssidmask(ah, sc->bssidmask); |
246 | 246 | ||
247 | /* configure operational mode */ | 247 | /* configure operational mode */ |
248 | ath9k_hw_setopmode(ah); | 248 | ath9k_hw_setopmode(ah); |
249 | 249 | ||
250 | /* Handle any link-level address change. */ | 250 | /* Handle any link-level address change. */ |
251 | ath9k_hw_setmac(ah, sc->sc_myaddr); | 251 | ath9k_hw_setmac(ah, sc->macaddr); |
252 | 252 | ||
253 | /* calculate and install multicast filter */ | 253 | /* calculate and install multicast filter */ |
254 | mfilt[0] = mfilt[1] = ~0; | 254 | mfilt[0] = mfilt[1] = ~0; |
@@ -267,11 +267,11 @@ int ath_rx_init(struct ath_softc *sc, int nbufs) | |||
267 | spin_lock_init(&sc->rx.rxbuflock); | 267 | spin_lock_init(&sc->rx.rxbuflock); |
268 | 268 | ||
269 | sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN, | 269 | sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN, |
270 | min(sc->sc_cachelsz, | 270 | min(sc->cachelsz, |
271 | (u16)64)); | 271 | (u16)64)); |
272 | 272 | ||
273 | DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", | 273 | DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", |
274 | sc->sc_cachelsz, sc->rx.bufsize); | 274 | sc->cachelsz, sc->rx.bufsize); |
275 | 275 | ||
276 | /* Initialize rx descriptors */ | 276 | /* Initialize rx descriptors */ |
277 | 277 | ||
@@ -593,7 +593,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush) | |||
593 | && !decrypt_error && skb->len >= hdrlen + 4) { | 593 | && !decrypt_error && skb->len >= hdrlen + 4) { |
594 | keyix = skb->data[hdrlen + 3] >> 6; | 594 | keyix = skb->data[hdrlen + 3] >> 6; |
595 | 595 | ||
596 | if (test_bit(keyix, sc->sc_keymap)) | 596 | if (test_bit(keyix, sc->keymap)) |
597 | rx_status.flag |= RX_FLAG_DECRYPTED; | 597 | rx_status.flag |= RX_FLAG_DECRYPTED; |
598 | } | 598 | } |
599 | if (ah->sw_mgmt_crypto && | 599 | if (ah->sw_mgmt_crypto && |
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c index 7a3ea92e2ee6..777376094a4a 100644 --- a/drivers/net/wireless/ath9k/xmit.c +++ b/drivers/net/wireless/ath9k/xmit.c | |||
@@ -970,14 +970,14 @@ int ath_cabq_update(struct ath_softc *sc) | |||
970 | /* | 970 | /* |
971 | * Ensure the readytime % is within the bounds. | 971 | * Ensure the readytime % is within the bounds. |
972 | */ | 972 | */ |
973 | if (sc->sc_config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND) | 973 | if (sc->config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND) |
974 | sc->sc_config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND; | 974 | sc->config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND; |
975 | else if (sc->sc_config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND) | 975 | else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND) |
976 | sc->sc_config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND; | 976 | sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND; |
977 | 977 | ||
978 | ath_get_beaconconfig(sc, ATH_IF_ID_ANY, &conf); | 978 | ath_get_beaconconfig(sc, ATH_IF_ID_ANY, &conf); |
979 | qi.tqi_readyTime = | 979 | qi.tqi_readyTime = |
980 | (conf.beacon_interval * sc->sc_config.cabqReadytime) / 100; | 980 | (conf.beacon_interval * sc->config.cabqReadytime) / 100; |
981 | ath_txq_update(sc, qnum, &qi); | 981 | ath_txq_update(sc, qnum, &qi); |
982 | 982 | ||
983 | return 0; | 983 | return 0; |
@@ -1471,7 +1471,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1471 | flags = ATH9K_TXDESC_RTSENA; | 1471 | flags = ATH9K_TXDESC_RTSENA; |
1472 | 1472 | ||
1473 | /* FIXME: Handle aggregation protection */ | 1473 | /* FIXME: Handle aggregation protection */ |
1474 | if (sc->sc_config.ath_aggr_prot && | 1474 | if (sc->config.ath_aggr_prot && |
1475 | (!bf_isaggr(bf) || (bf_isaggr(bf) && bf->bf_al < 8192))) { | 1475 | (!bf_isaggr(bf) || (bf_isaggr(bf) && bf->bf_al < 8192))) { |
1476 | flags = ATH9K_TXDESC_RTSENA; | 1476 | flags = ATH9K_TXDESC_RTSENA; |
1477 | } | 1477 | } |
@@ -1486,7 +1486,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1486 | 1486 | ||
1487 | rix = rates[i].idx; | 1487 | rix = rates[i].idx; |
1488 | series[i].Tries = rates[i].count; | 1488 | series[i].Tries = rates[i].count; |
1489 | series[i].ChSel = sc->sc_tx_chainmask; | 1489 | series[i].ChSel = sc->tx_chainmask; |
1490 | 1490 | ||
1491 | if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) | 1491 | if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) |
1492 | series[i].Rate = rt->info[rix].ratecode | | 1492 | series[i].Rate = rt->info[rix].ratecode | |
@@ -1513,7 +1513,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
1513 | !is_pspoll, ctsrate, | 1513 | !is_pspoll, ctsrate, |
1514 | 0, series, 4, flags); | 1514 | 0, series, 4, flags); |
1515 | 1515 | ||
1516 | if (sc->sc_config.ath_aggr_prot && flags) | 1516 | if (sc->config.ath_aggr_prot && flags) |
1517 | ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192); | 1517 | ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192); |
1518 | } | 1518 | } |
1519 | 1519 | ||