diff options
author | Jussi Kivilinna <jussi.kivilinna@mbnet.fi> | 2011-01-31 13:47:36 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-02-04 16:29:48 -0500 |
commit | 88a1159a376995e1f9ca6e9b1d4f2e4c44d79d13 (patch) | |
tree | 46f56636f8fdd0cde383848c952eb1672c936590 /drivers/net/wireless/zd1211rw | |
parent | 8b17f75ced1d45af9faed767f4cfafb13c0fe05e (diff) |
zd1211rw: fix beacon interval setup
Vendor driver uses CR_BNC_INTERVAL at various places, one is HW_EnableBeacon()
that combinies beacon interval with BSS-type flag and DTIM value in upper 16bit
of u32. The other one is HW_UpdateBcnInterval() that set_aw_pt_bi()
appears to be based on. HW_UpdateBcnInterval() takes interval argument as u16
and uses that for calculations, set_aw_pt_bi() uses u32 value that has flags
and dtim in upper part. This clearly seems wrong. Also HW_UpdateBcnInterval()
updates only lower 16bit part of CR_BNC_INTERVAL. So make set_aw_pt_bi() do
calculations on only lower u16 part of s->beacon_interval.
Also set 32bit beacon interval register before reading values from device,
as HW_EnableBeacon() on vendor driver does. This is required to make beacon
work on AP-mode, simply reading and then writing updated values is not enough
at least with zd1211b.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw')
-rw-r--r-- | drivers/net/wireless/zd1211rw/zd_chip.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c index b644ced848e7..447f2360b0ca 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.c +++ b/drivers/net/wireless/zd1211rw/zd_chip.c | |||
@@ -849,11 +849,12 @@ static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) | |||
849 | static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) | 849 | static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) |
850 | { | 850 | { |
851 | struct zd_ioreq32 reqs[3]; | 851 | struct zd_ioreq32 reqs[3]; |
852 | u16 b_interval = s->beacon_interval & 0xffff; | ||
852 | 853 | ||
853 | if (s->beacon_interval <= 5) | 854 | if (b_interval <= 5) |
854 | s->beacon_interval = 5; | 855 | b_interval = 5; |
855 | if (s->pre_tbtt < 4 || s->pre_tbtt >= s->beacon_interval) | 856 | if (s->pre_tbtt < 4 || s->pre_tbtt >= b_interval) |
856 | s->pre_tbtt = s->beacon_interval - 1; | 857 | s->pre_tbtt = b_interval - 1; |
857 | if (s->atim_wnd_period >= s->pre_tbtt) | 858 | if (s->atim_wnd_period >= s->pre_tbtt) |
858 | s->atim_wnd_period = s->pre_tbtt - 1; | 859 | s->atim_wnd_period = s->pre_tbtt - 1; |
859 | 860 | ||
@@ -862,7 +863,7 @@ static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) | |||
862 | reqs[1].addr = CR_PRE_TBTT; | 863 | reqs[1].addr = CR_PRE_TBTT; |
863 | reqs[1].value = s->pre_tbtt; | 864 | reqs[1].value = s->pre_tbtt; |
864 | reqs[2].addr = CR_BCN_INTERVAL; | 865 | reqs[2].addr = CR_BCN_INTERVAL; |
865 | reqs[2].value = s->beacon_interval; | 866 | reqs[2].value = (s->beacon_interval & ~0xffff) | b_interval; |
866 | 867 | ||
867 | return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); | 868 | return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); |
868 | } | 869 | } |
@@ -874,10 +875,13 @@ static int set_beacon_interval(struct zd_chip *chip, u32 interval) | |||
874 | struct aw_pt_bi s; | 875 | struct aw_pt_bi s; |
875 | 876 | ||
876 | ZD_ASSERT(mutex_is_locked(&chip->mutex)); | 877 | ZD_ASSERT(mutex_is_locked(&chip->mutex)); |
878 | |||
879 | r = zd_iowrite32_locked(chip, interval, CR_BCN_INTERVAL); | ||
880 | if (r) | ||
881 | return r; | ||
877 | r = get_aw_pt_bi(chip, &s); | 882 | r = get_aw_pt_bi(chip, &s); |
878 | if (r) | 883 | if (r) |
879 | return r; | 884 | return r; |
880 | s.beacon_interval = interval; | ||
881 | return set_aw_pt_bi(chip, &s); | 885 | return set_aw_pt_bi(chip, &s); |
882 | } | 886 | } |
883 | 887 | ||