diff options
author | Ulrich Kunitz <kune@deine-taler.de> | 2006-11-21 19:05:53 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-12-02 00:12:05 -0500 |
commit | 741fec53f268b691b869ffc70023319406e0cc97 (patch) | |
tree | 47ea2334fd44daaaa19b9a3d22d34466d0250069 /drivers/net/wireless/zd1211rw/zd_chip.h | |
parent | 84bc715c465f76584fc5127955fca0c61592e04b (diff) |
[PATCH] zd1211rw: cleanups
Bit-field constants in zd_chip.h are now defined using a shift expression.
The value 0x08 is now (1 << 3). The fix is intended to improve readability.
Remove misleading comment in zd_mac.c: The function already returns -EPERM
in managed mode (IW_MODE_INFRA).
Remove unused code in zd_mac.c: The unused code intended for debugging
rx_status values is no longer useful.
Added dump_stack() to ZD_ASSERT macro: Output of the stack helps to debug
assertions. Keep in mind that the ZD_ASSERT() macro only results in code,
if DEBUG is defined.
Improved comments for filter_rx()
zd_usb.c: Added driver name to module init and exit functions
Signed-off-by: Ulrich Kunitz <kune@deine-taler.de>
Signed-off-by: Daniel Drake <dsd@gentoo.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_chip.h')
-rw-r--r-- | drivers/net/wireless/zd1211rw/zd_chip.h | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h index ae59597ce4e1..f441cf40f74b 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.h +++ b/drivers/net/wireless/zd1211rw/zd_chip.h | |||
@@ -337,24 +337,24 @@ | |||
337 | #define CR_MAC_PS_STATE CTL_REG(0x050C) | 337 | #define CR_MAC_PS_STATE CTL_REG(0x050C) |
338 | 338 | ||
339 | #define CR_INTERRUPT CTL_REG(0x0510) | 339 | #define CR_INTERRUPT CTL_REG(0x0510) |
340 | #define INT_TX_COMPLETE 0x00000001 | 340 | #define INT_TX_COMPLETE (1 << 0) |
341 | #define INT_RX_COMPLETE 0x00000002 | 341 | #define INT_RX_COMPLETE (1 << 1) |
342 | #define INT_RETRY_FAIL 0x00000004 | 342 | #define INT_RETRY_FAIL (1 << 2) |
343 | #define INT_WAKEUP 0x00000008 | 343 | #define INT_WAKEUP (1 << 3) |
344 | #define INT_DTIM_NOTIFY 0x00000020 | 344 | #define INT_DTIM_NOTIFY (1 << 5) |
345 | #define INT_CFG_NEXT_BCN 0x00000040 | 345 | #define INT_CFG_NEXT_BCN (1 << 6) |
346 | #define INT_BUS_ABORT 0x00000080 | 346 | #define INT_BUS_ABORT (1 << 7) |
347 | #define INT_TX_FIFO_READY 0x00000100 | 347 | #define INT_TX_FIFO_READY (1 << 8) |
348 | #define INT_UART 0x00000200 | 348 | #define INT_UART (1 << 9) |
349 | #define INT_TX_COMPLETE_EN 0x00010000 | 349 | #define INT_TX_COMPLETE_EN (1 << 16) |
350 | #define INT_RX_COMPLETE_EN 0x00020000 | 350 | #define INT_RX_COMPLETE_EN (1 << 17) |
351 | #define INT_RETRY_FAIL_EN 0x00040000 | 351 | #define INT_RETRY_FAIL_EN (1 << 18) |
352 | #define INT_WAKEUP_EN 0x00080000 | 352 | #define INT_WAKEUP_EN (1 << 19) |
353 | #define INT_DTIM_NOTIFY_EN 0x00200000 | 353 | #define INT_DTIM_NOTIFY_EN (1 << 21) |
354 | #define INT_CFG_NEXT_BCN_EN 0x00400000 | 354 | #define INT_CFG_NEXT_BCN_EN (1 << 22) |
355 | #define INT_BUS_ABORT_EN 0x00800000 | 355 | #define INT_BUS_ABORT_EN (1 << 23) |
356 | #define INT_TX_FIFO_READY_EN 0x01000000 | 356 | #define INT_TX_FIFO_READY_EN (1 << 24) |
357 | #define INT_UART_EN 0x02000000 | 357 | #define INT_UART_EN (1 << 25) |
358 | 358 | ||
359 | #define CR_TSF_LOW_PART CTL_REG(0x0514) | 359 | #define CR_TSF_LOW_PART CTL_REG(0x0514) |
360 | #define CR_TSF_HIGH_PART CTL_REG(0x0518) | 360 | #define CR_TSF_HIGH_PART CTL_REG(0x0518) |
@@ -398,18 +398,18 @@ | |||
398 | * device will use a rate in this table that is less than or equal to the rate | 398 | * device will use a rate in this table that is less than or equal to the rate |
399 | * of the incoming frame which prompted the response */ | 399 | * of the incoming frame which prompted the response */ |
400 | #define CR_BASIC_RATE_TBL CTL_REG(0x0630) | 400 | #define CR_BASIC_RATE_TBL CTL_REG(0x0630) |
401 | #define CR_RATE_1M 0x0001 /* 802.11b */ | 401 | #define CR_RATE_1M (1 << 0) /* 802.11b */ |
402 | #define CR_RATE_2M 0x0002 /* 802.11b */ | 402 | #define CR_RATE_2M (1 << 1) /* 802.11b */ |
403 | #define CR_RATE_5_5M 0x0004 /* 802.11b */ | 403 | #define CR_RATE_5_5M (1 << 2) /* 802.11b */ |
404 | #define CR_RATE_11M 0x0008 /* 802.11b */ | 404 | #define CR_RATE_11M (1 << 3) /* 802.11b */ |
405 | #define CR_RATE_6M 0x0100 /* 802.11g */ | 405 | #define CR_RATE_6M (1 << 8) /* 802.11g */ |
406 | #define CR_RATE_9M 0x0200 /* 802.11g */ | 406 | #define CR_RATE_9M (1 << 9) /* 802.11g */ |
407 | #define CR_RATE_12M 0x0400 /* 802.11g */ | 407 | #define CR_RATE_12M (1 << 10) /* 802.11g */ |
408 | #define CR_RATE_18M 0x0800 /* 802.11g */ | 408 | #define CR_RATE_18M (1 << 11) /* 802.11g */ |
409 | #define CR_RATE_24M 0x1000 /* 802.11g */ | 409 | #define CR_RATE_24M (1 << 12) /* 802.11g */ |
410 | #define CR_RATE_36M 0x2000 /* 802.11g */ | 410 | #define CR_RATE_36M (1 << 13) /* 802.11g */ |
411 | #define CR_RATE_48M 0x4000 /* 802.11g */ | 411 | #define CR_RATE_48M (1 << 14) /* 802.11g */ |
412 | #define CR_RATE_54M 0x8000 /* 802.11g */ | 412 | #define CR_RATE_54M (1 << 15) /* 802.11g */ |
413 | #define CR_RATES_80211G 0xff00 | 413 | #define CR_RATES_80211G 0xff00 |
414 | #define CR_RATES_80211B 0x000f | 414 | #define CR_RATES_80211B 0x000f |
415 | 415 | ||
@@ -426,9 +426,9 @@ | |||
426 | /* register for controlling the LEDS */ | 426 | /* register for controlling the LEDS */ |
427 | #define CR_LED CTL_REG(0x0644) | 427 | #define CR_LED CTL_REG(0x0644) |
428 | /* masks for controlling LEDs */ | 428 | /* masks for controlling LEDs */ |
429 | #define LED1 0x0100 | 429 | #define LED1 (1 << 8) |
430 | #define LED2 0x0200 | 430 | #define LED2 (1 << 9) |
431 | #define LED_SW 0x0400 | 431 | #define LED_SW (1 << 10) |
432 | 432 | ||
433 | /* Seems to indicate that the configuration is over. | 433 | /* Seems to indicate that the configuration is over. |
434 | */ | 434 | */ |
@@ -455,18 +455,18 @@ | |||
455 | * registers, so one could argue it is a LOCK bit. But calling it | 455 | * registers, so one could argue it is a LOCK bit. But calling it |
456 | * LOCK_PHY_REGS makes it confusing. | 456 | * LOCK_PHY_REGS makes it confusing. |
457 | */ | 457 | */ |
458 | #define UNLOCK_PHY_REGS 0x0080 | 458 | #define UNLOCK_PHY_REGS (1 << 7) |
459 | 459 | ||
460 | #define CR_DEVICE_STATE CTL_REG(0x0684) | 460 | #define CR_DEVICE_STATE CTL_REG(0x0684) |
461 | #define CR_UNDERRUN_CNT CTL_REG(0x0688) | 461 | #define CR_UNDERRUN_CNT CTL_REG(0x0688) |
462 | 462 | ||
463 | #define CR_RX_FILTER CTL_REG(0x068c) | 463 | #define CR_RX_FILTER CTL_REG(0x068c) |
464 | #define RX_FILTER_ASSOC_RESPONSE 0x0002 | 464 | #define RX_FILTER_ASSOC_RESPONSE (1 << 1) |
465 | #define RX_FILTER_REASSOC_RESPONSE 0x0008 | 465 | #define RX_FILTER_REASSOC_RESPONSE (1 << 3) |
466 | #define RX_FILTER_PROBE_RESPONSE 0x0020 | 466 | #define RX_FILTER_PROBE_RESPONSE (1 << 5) |
467 | #define RX_FILTER_BEACON 0x0100 | 467 | #define RX_FILTER_BEACON (1 << 8) |
468 | #define RX_FILTER_DISASSOC 0x0400 | 468 | #define RX_FILTER_DISASSOC (1 << 10) |
469 | #define RX_FILTER_AUTH 0x0800 | 469 | #define RX_FILTER_AUTH (1 << 11) |
470 | #define AP_RX_FILTER 0x0400feff | 470 | #define AP_RX_FILTER 0x0400feff |
471 | #define STA_RX_FILTER 0x0000ffff | 471 | #define STA_RX_FILTER 0x0000ffff |
472 | 472 | ||