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authorDaniel Drake <dsd@gentoo.org>2006-12-11 20:26:11 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-05 16:58:42 -0500
commit0ce34bc8f7d906d66ce6803f63399ef9bbe54012 (patch)
tree1326f9105842fc81f89bf8ab1a435ab13a4d72d5 /drivers/net/wireless/zd1211rw/zd_chip.h
parentee30276774451d657407855d95d9393ee8bc0bac (diff)
[PATCH] zd1211rw: Remove addressing abstraction
Instead of passing our own custom 32-bit addresses around and translating them, this patch makes all our register address constants absolute and removes the translation. There are two ugly parts: - fw_reg_addr() is needed to compute addresses of firmware registers, as this is dynamic based upon firmware - inc_addr() needs a small hack to handle byte vs word addressing However, both of those are only small, and we don't use fw_regs a whole lot anyway. The bonuses here include simplicity and improved driver readability. Also, the fact that registers are now referenced by 16-bit absolute addresses (as opposed to 32-bit pseudo addresses) means that over 2kb compiled code size has been shaved off. Includes some touchups and sparse fixes from Ulrich Kunitz. Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_chip.h')
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h89
1 files changed, 49 insertions, 40 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index fa3437d6d742..b07569e391ee 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -18,7 +18,6 @@
18#ifndef _ZD_CHIP_H 18#ifndef _ZD_CHIP_H
19#define _ZD_CHIP_H 19#define _ZD_CHIP_H
20 20
21#include "zd_types.h"
22#include "zd_rf.h" 21#include "zd_rf.h"
23#include "zd_usb.h" 22#include "zd_usb.h"
24 23
@@ -27,6 +26,37 @@
27 * adds a processor for handling the USB protocol. 26 * adds a processor for handling the USB protocol.
28 */ 27 */
29 28
29/* Address space */
30enum {
31 /* CONTROL REGISTERS */
32 CR_START = 0x9000,
33
34
35 /* FIRMWARE */
36 FW_START = 0xee00,
37
38
39 /* EEPROM */
40 E2P_START = 0xf800,
41 E2P_LEN = 0x800,
42
43 /* EEPROM layout */
44 E2P_LOAD_CODE_LEN = 0xe, /* base 0xf800 */
45 E2P_LOAD_VECT_LEN = 0x9, /* base 0xf80e */
46 /* E2P_DATA indexes into this */
47 E2P_DATA_LEN = 0x7e, /* base 0xf817 */
48 E2P_BOOT_CODE_LEN = 0x760, /* base 0xf895 */
49 E2P_INTR_VECT_LEN = 0xb, /* base 0xfff5 */
50
51 /* Some precomputed offsets into the EEPROM */
52 E2P_DATA_OFFSET = E2P_LOAD_CODE_LEN + E2P_LOAD_VECT_LEN,
53 E2P_BOOT_CODE_OFFSET = E2P_DATA_OFFSET + E2P_DATA_LEN,
54};
55
56#define CTL_REG(offset) ((zd_addr_t)(CR_START + (offset)))
57#define E2P_DATA(offset) ((zd_addr_t)(E2P_START + E2P_DATA_OFFSET + (offset)))
58#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset)))
59
30/* 8-bit hardware registers */ 60/* 8-bit hardware registers */
31#define CR0 CTL_REG(0x0000) 61#define CR0 CTL_REG(0x0000)
32#define CR1 CTL_REG(0x0004) 62#define CR1 CTL_REG(0x0004)
@@ -302,7 +332,7 @@
302 332
303#define CR_MAX_PHY_REG 255 333#define CR_MAX_PHY_REG 255
304 334
305/* Taken from the ZYDAS driver, not all of them are relevant for the ZSD1211 335/* Taken from the ZYDAS driver, not all of them are relevant for the ZD1211
306 * driver. 336 * driver.
307 */ 337 */
308 338
@@ -638,50 +668,27 @@
638#define E2P_54M_INT_VALUE3 E2P_DATA(0x54) 668#define E2P_54M_INT_VALUE3 E2P_DATA(0x54)
639#define E2P_54M_INT_VALUE4 E2P_DATA(0x56) 669#define E2P_54M_INT_VALUE4 E2P_DATA(0x56)
640 670
641/* All 16 bit values */ 671/* This word contains the base address of the FW_REG_ registers below */
642#define FW_FIRMWARE_VER FW_REG(0) 672#define FWRAW_REGS_ADDR FWRAW_DATA(0x1d)
643/* non-zero if USB high speed connection */ 673
644#define FW_USB_SPEED FW_REG(1) 674/* All 16 bit values, offset from the address in FWRAW_REGS_ADDR */
645#define FW_FIX_TX_RATE FW_REG(2) 675enum {
646/* Seems to be able to control LEDs over the firmware */ 676 FW_REG_FIRMWARE_VER = 0,
647#define FW_LINK_STATUS FW_REG(3) 677 /* non-zero if USB high speed connection */
648#define FW_SOFT_RESET FW_REG(4) 678 FW_REG_USB_SPEED = 1,
649#define FW_FLASH_CHK FW_REG(5) 679 FW_REG_FIX_TX_RATE = 2,
680 /* Seems to be able to control LEDs over the firmware */
681 FW_REG_LED_LINK_STATUS = 3,
682 FW_REG_SOFT_RESET = 4,
683 FW_REG_FLASH_CHK = 5,
684};
650 685
686/* Values for FW_LINK_STATUS */
651#define FW_LINK_OFF 0x0 687#define FW_LINK_OFF 0x0
652#define FW_LINK_TX 0x1 688#define FW_LINK_TX 0x1
653/* 0x2 - link led on? */ 689/* 0x2 - link led on? */
654 690
655enum { 691enum {
656 /* CONTROL REGISTERS */
657 CR_START = 0x9000,
658
659 /* FIRMWARE */
660 FW_START = 0xee00,
661
662 /* The word at this offset contains the base address of the FW_REG
663 * registers */
664 FW_REGS_ADDR_OFFSET = 0x1d,
665
666
667 /* EEPROM */
668 E2P_START = 0xf800,
669 E2P_LEN = 0x800,
670
671 /* EEPROM layout */
672 E2P_LOAD_CODE_LEN = 0xe, /* base 0xf800 */
673 E2P_LOAD_VECT_LEN = 0x9, /* base 0xf80e */
674 /* E2P_DATA indexes into this */
675 E2P_DATA_LEN = 0x7e, /* base 0xf817 */
676 E2P_BOOT_CODE_LEN = 0x760, /* base 0xf895 */
677 E2P_INTR_VECT_LEN = 0xb, /* base 0xfff5 */
678
679 /* Some precomputed offsets into the EEPROM */
680 E2P_DATA_OFFSET = E2P_LOAD_CODE_LEN + E2P_LOAD_VECT_LEN,
681 E2P_BOOT_CODE_OFFSET = E2P_DATA_OFFSET + E2P_DATA_LEN,
682};
683
684enum {
685 /* indices for ofdm_cal_values */ 692 /* indices for ofdm_cal_values */
686 OFDM_36M_INDEX = 0, 693 OFDM_36M_INDEX = 0,
687 OFDM_48M_INDEX = 1, 694 OFDM_48M_INDEX = 1,
@@ -692,6 +699,8 @@ struct zd_chip {
692 struct zd_usb usb; 699 struct zd_usb usb;
693 struct zd_rf rf; 700 struct zd_rf rf;
694 struct mutex mutex; 701 struct mutex mutex;
702 /* Base address of FW_REG_ registers */
703 zd_addr_t fw_regs_base;
695 u8 e2p_mac[ETH_ALEN]; 704 u8 e2p_mac[ETH_ALEN];
696 /* EepSetPoint in the vendor driver */ 705 /* EepSetPoint in the vendor driver */
697 u8 pwr_cal_values[E2P_CHANNEL_COUNT]; 706 u8 pwr_cal_values[E2P_CHANNEL_COUNT];