diff options
author | Daniel Drake <dsd@gentoo.org> | 2006-08-12 12:59:22 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2006-08-14 15:43:21 -0400 |
commit | 98227a90a727029613f23c5e53554f1f4d7a1c89 (patch) | |
tree | a94d2935976ff102e9919769b3ee1906a5cc2496 /drivers/net/wireless/zd1211rw/zd_chip.c | |
parent | fe7215caa033814cee1e6808e44132b7cefb1a9e (diff) |
[PATCH] zd1211rw: Match vendor driver IFS values
The vendor driver resets the IFS value every time the channel changes,
to this one.
Signed-off-by: Daniel Drake <dsd@gentoo.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_chip.c')
-rw-r--r-- | drivers/net/wireless/zd1211rw/zd_chip.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c index 1a4e2e1f7ca5..92ddcd952423 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.c +++ b/drivers/net/wireless/zd1211rw/zd_chip.c | |||
@@ -807,7 +807,6 @@ static int zd1211_hw_init_hmac(struct zd_chip *chip) | |||
807 | { CR_ACK_TIMEOUT_EXT, 0x80 }, | 807 | { CR_ACK_TIMEOUT_EXT, 0x80 }, |
808 | { CR_ADDA_PWR_DWN, 0x00 }, | 808 | { CR_ADDA_PWR_DWN, 0x00 }, |
809 | { CR_ACK_TIME_80211, 0x100 }, | 809 | { CR_ACK_TIME_80211, 0x100 }, |
810 | { CR_IFS_VALUE, 0x547c032 }, | ||
811 | { CR_RX_PE_DELAY, 0x70 }, | 810 | { CR_RX_PE_DELAY, 0x70 }, |
812 | { CR_PS_CTRL, 0x10000000 }, | 811 | { CR_PS_CTRL, 0x10000000 }, |
813 | { CR_RTS_CTS_RATE, 0x02030203 }, | 812 | { CR_RTS_CTS_RATE, 0x02030203 }, |
@@ -854,7 +853,6 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip) | |||
854 | { CR_ACK_TIMEOUT_EXT, 0x80 }, | 853 | { CR_ACK_TIMEOUT_EXT, 0x80 }, |
855 | { CR_ADDA_PWR_DWN, 0x00 }, | 854 | { CR_ADDA_PWR_DWN, 0x00 }, |
856 | { CR_ACK_TIME_80211, 0x100 }, | 855 | { CR_ACK_TIME_80211, 0x100 }, |
857 | { CR_IFS_VALUE, 0x547c032 }, | ||
858 | { CR_RX_PE_DELAY, 0x70 }, | 856 | { CR_RX_PE_DELAY, 0x70 }, |
859 | { CR_PS_CTRL, 0x10000000 }, | 857 | { CR_PS_CTRL, 0x10000000 }, |
860 | { CR_RTS_CTS_RATE, 0x02030203 }, | 858 | { CR_RTS_CTS_RATE, 0x02030203 }, |
@@ -970,10 +968,15 @@ static int hw_init(struct zd_chip *chip) | |||
970 | r = hw_init_hmac(chip); | 968 | r = hw_init_hmac(chip); |
971 | if (r) | 969 | if (r) |
972 | return r; | 970 | return r; |
973 | r = set_beacon_interval(chip, 100); | 971 | |
972 | /* Although the vendor driver defaults to a different value during | ||
973 | * init, it overwrites the IFS value with the following every time | ||
974 | * the channel changes. We should aim to be more intelligent... */ | ||
975 | r = zd_iowrite32_locked(chip, IFS_VALUE_DEFAULT, CR_IFS_VALUE); | ||
974 | if (r) | 976 | if (r) |
975 | return r; | 977 | return r; |
976 | return 0; | 978 | |
979 | return set_beacon_interval(chip, 100); | ||
977 | } | 980 | } |
978 | 981 | ||
979 | #ifdef DEBUG | 982 | #ifdef DEBUG |