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authorLarry Finger <Larry.Finger@lwfinger.net>2008-10-31 20:19:31 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-11-21 11:06:04 -0500
commit1c740ed2210a0d124674a477ea538468aba47810 (patch)
treee65f654e382456c85bb3d8b162176357efcf0226 /drivers/net/wireless/rtl8187.h
parent55b3961953494c340b3625486f484af8ded31dd7 (diff)
Move all rtl818x files to a common directory.
This change improves the maintainability of these drivers. No functionality is changed. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rtl8187.h')
-rw-r--r--drivers/net/wireless/rtl8187.h220
1 files changed, 0 insertions, 220 deletions
diff --git a/drivers/net/wireless/rtl8187.h b/drivers/net/wireless/rtl8187.h
deleted file mode 100644
index 33725d0978b3..000000000000
--- a/drivers/net/wireless/rtl8187.h
+++ /dev/null
@@ -1,220 +0,0 @@
1/*
2 * Definitions for RTL8187 hardware
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef RTL8187_H
16#define RTL8187_H
17
18#include "rtl818x.h"
19
20#define RTL8187_EEPROM_TXPWR_BASE 0x05
21#define RTL8187_EEPROM_MAC_ADDR 0x07
22#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
23#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
24#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
25
26#define RTL8187_REQT_READ 0xC0
27#define RTL8187_REQT_WRITE 0x40
28#define RTL8187_REQ_GET_REG 0x05
29#define RTL8187_REQ_SET_REG 0x05
30
31#define RTL8187_MAX_RX 0x9C4
32
33struct rtl8187_rx_info {
34 struct urb *urb;
35 struct ieee80211_hw *dev;
36};
37
38struct rtl8187_rx_hdr {
39 __le32 flags;
40 u8 noise;
41 u8 signal;
42 u8 agc;
43 u8 reserved;
44 __le64 mac_time;
45} __attribute__((packed));
46
47struct rtl8187b_rx_hdr {
48 __le32 flags;
49 __le64 mac_time;
50 u8 sq;
51 u8 rssi;
52 u8 agc;
53 u8 flags2;
54 __le16 snr_long2end;
55 s8 pwdb_g12;
56 u8 fot;
57} __attribute__((packed));
58
59/* {rtl8187,rtl8187b}_tx_info is in skb */
60
61struct rtl8187_tx_hdr {
62 __le32 flags;
63 __le16 rts_duration;
64 __le16 len;
65 __le32 retry;
66} __attribute__((packed));
67
68struct rtl8187b_tx_hdr {
69 __le32 flags;
70 __le16 rts_duration;
71 __le16 len;
72 __le32 unused_1;
73 __le16 unused_2;
74 __le16 tx_duration;
75 __le32 unused_3;
76 __le32 retry;
77 __le32 unused_4[2];
78} __attribute__((packed));
79
80enum {
81 DEVICE_RTL8187,
82 DEVICE_RTL8187B
83};
84
85struct rtl8187_priv {
86 /* common between rtl818x drivers */
87 struct rtl818x_csr *map;
88 const struct rtl818x_rf_ops *rf;
89 struct ieee80211_vif *vif;
90 int mode;
91 /* The mutex protects the TX loopback state.
92 * Any attempt to set channels concurrently locks the device.
93 */
94 struct mutex conf_mutex;
95
96 /* rtl8187 specific */
97 struct ieee80211_channel channels[14];
98 struct ieee80211_rate rates[12];
99 struct ieee80211_supported_band band;
100 struct usb_device *udev;
101 u32 rx_conf;
102 u16 txpwr_base;
103 u8 asic_rev;
104 u8 is_rtl8187b;
105 enum {
106 RTL8187BvB,
107 RTL8187BvD,
108 RTL8187BvE
109 } hw_rev;
110 struct sk_buff_head rx_queue;
111 u8 signal;
112 u8 quality;
113 u8 noise;
114};
115
116void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
117
118static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
119 u8 *addr, u8 idx)
120{
121 u8 val;
122
123 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
124 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
125 (unsigned long)addr, idx & 0x03, &val,
126 sizeof(val), HZ / 2);
127
128 return val;
129}
130
131static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
132{
133 return rtl818x_ioread8_idx(priv, addr, 0);
134}
135
136static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
137 __le16 *addr, u8 idx)
138{
139 __le16 val;
140
141 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
142 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
143 (unsigned long)addr, idx & 0x03, &val,
144 sizeof(val), HZ / 2);
145
146 return le16_to_cpu(val);
147}
148
149static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
150{
151 return rtl818x_ioread16_idx(priv, addr, 0);
152}
153
154static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
155 __le32 *addr, u8 idx)
156{
157 __le32 val;
158
159 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
160 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
161 (unsigned long)addr, idx & 0x03, &val,
162 sizeof(val), HZ / 2);
163
164 return le32_to_cpu(val);
165}
166
167static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
168{
169 return rtl818x_ioread32_idx(priv, addr, 0);
170}
171
172static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
173 u8 *addr, u8 val, u8 idx)
174{
175 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
176 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
177 (unsigned long)addr, idx & 0x03, &val,
178 sizeof(val), HZ / 2);
179}
180
181static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
182{
183 rtl818x_iowrite8_idx(priv, addr, val, 0);
184}
185
186static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
187 __le16 *addr, u16 val, u8 idx)
188{
189 __le16 buf = cpu_to_le16(val);
190
191 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
192 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
193 (unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
194 HZ / 2);
195}
196
197static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
198 u16 val)
199{
200 rtl818x_iowrite16_idx(priv, addr, val, 0);
201}
202
203static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
204 __le32 *addr, u32 val, u8 idx)
205{
206 __le32 buf = cpu_to_le32(val);
207
208 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
209 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
210 (unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
211 HZ / 2);
212}
213
214static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
215 u32 val)
216{
217 rtl818x_iowrite32_idx(priv, addr, val, 0);
218}
219
220#endif /* RTL8187_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-07 16:33:10 -0500