diff options
author | Ivo van Doorn <ivdoorn@gmail.com> | 2010-12-13 06:36:38 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-12-13 15:23:36 -0500 |
commit | f615e9a38a8e6239d35891a05f2ac1159088780a (patch) | |
tree | 7aa1d79a6b02b222f321d5a747eff0cf6e8d1e4f /drivers/net/wireless/rt2x00/rt61pci.h | |
parent | dba5dc1ae9764902f46d5225c9ff40e4f7b614c7 (diff) |
rt2x00: Fix WMM Queue naming
The Queue names were incorrectly copied from the legacy drivers,
as a result the queue names were inversed to what was expected.
This renames the queues using this mapping:
QID_AC_BK -> QID_AC_VO (priority 0)
QID_AC_BE -> QID_AC_VI (priority 1)
QID_AC_VI -> QID_AC_BE (priority 2)
QID_AC_VO -> QID_AC_BK (priority 3)
Note that this was a naming problem only, which didn't affect
the assignment of frames to their respective queues.
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.h')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt61pci.h | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h index afc803b7959f..e3cd6db76b0e 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.h +++ b/drivers/net/wireless/rt2x00/rt61pci.h | |||
@@ -784,25 +784,25 @@ struct hw_pairwise_ta_entry { | |||
784 | */ | 784 | */ |
785 | 785 | ||
786 | /* | 786 | /* |
787 | * AC0_BASE_CSR: AC_BK base address. | 787 | * AC0_BASE_CSR: AC_VO base address. |
788 | */ | 788 | */ |
789 | #define AC0_BASE_CSR 0x3400 | 789 | #define AC0_BASE_CSR 0x3400 |
790 | #define AC0_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) | 790 | #define AC0_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) |
791 | 791 | ||
792 | /* | 792 | /* |
793 | * AC1_BASE_CSR: AC_BE base address. | 793 | * AC1_BASE_CSR: AC_VI base address. |
794 | */ | 794 | */ |
795 | #define AC1_BASE_CSR 0x3404 | 795 | #define AC1_BASE_CSR 0x3404 |
796 | #define AC1_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) | 796 | #define AC1_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) |
797 | 797 | ||
798 | /* | 798 | /* |
799 | * AC2_BASE_CSR: AC_VI base address. | 799 | * AC2_BASE_CSR: AC_BE base address. |
800 | */ | 800 | */ |
801 | #define AC2_BASE_CSR 0x3408 | 801 | #define AC2_BASE_CSR 0x3408 |
802 | #define AC2_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) | 802 | #define AC2_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) |
803 | 803 | ||
804 | /* | 804 | /* |
805 | * AC3_BASE_CSR: AC_VO base address. | 805 | * AC3_BASE_CSR: AC_BK base address. |
806 | */ | 806 | */ |
807 | #define AC3_BASE_CSR 0x340c | 807 | #define AC3_BASE_CSR 0x340c |
808 | #define AC3_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) | 808 | #define AC3_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) |
@@ -814,7 +814,7 @@ struct hw_pairwise_ta_entry { | |||
814 | #define MGMT_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) | 814 | #define MGMT_BASE_CSR_RING_REGISTER FIELD32(0xffffffff) |
815 | 815 | ||
816 | /* | 816 | /* |
817 | * TX_RING_CSR0: TX Ring size for AC_BK, AC_BE, AC_VI, AC_VO. | 817 | * TX_RING_CSR0: TX Ring size for AC_VO, AC_VI, AC_BE, AC_BK. |
818 | */ | 818 | */ |
819 | #define TX_RING_CSR0 0x3418 | 819 | #define TX_RING_CSR0 0x3418 |
820 | #define TX_RING_CSR0_AC0_RING_SIZE FIELD32(0x000000ff) | 820 | #define TX_RING_CSR0_AC0_RING_SIZE FIELD32(0x000000ff) |
@@ -833,10 +833,10 @@ struct hw_pairwise_ta_entry { | |||
833 | 833 | ||
834 | /* | 834 | /* |
835 | * AIFSN_CSR: AIFSN for each EDCA AC. | 835 | * AIFSN_CSR: AIFSN for each EDCA AC. |
836 | * AIFSN0: For AC_BK. | 836 | * AIFSN0: For AC_VO. |
837 | * AIFSN1: For AC_BE. | 837 | * AIFSN1: For AC_VI. |
838 | * AIFSN2: For AC_VI. | 838 | * AIFSN2: For AC_BE. |
839 | * AIFSN3: For AC_VO. | 839 | * AIFSN3: For AC_BK. |
840 | */ | 840 | */ |
841 | #define AIFSN_CSR 0x3420 | 841 | #define AIFSN_CSR 0x3420 |
842 | #define AIFSN_CSR_AIFSN0 FIELD32(0x0000000f) | 842 | #define AIFSN_CSR_AIFSN0 FIELD32(0x0000000f) |
@@ -846,10 +846,10 @@ struct hw_pairwise_ta_entry { | |||
846 | 846 | ||
847 | /* | 847 | /* |
848 | * CWMIN_CSR: CWmin for each EDCA AC. | 848 | * CWMIN_CSR: CWmin for each EDCA AC. |
849 | * CWMIN0: For AC_BK. | 849 | * CWMIN0: For AC_VO. |
850 | * CWMIN1: For AC_BE. | 850 | * CWMIN1: For AC_VI. |
851 | * CWMIN2: For AC_VI. | 851 | * CWMIN2: For AC_BE. |
852 | * CWMIN3: For AC_VO. | 852 | * CWMIN3: For AC_BK. |
853 | */ | 853 | */ |
854 | #define CWMIN_CSR 0x3424 | 854 | #define CWMIN_CSR 0x3424 |
855 | #define CWMIN_CSR_CWMIN0 FIELD32(0x0000000f) | 855 | #define CWMIN_CSR_CWMIN0 FIELD32(0x0000000f) |
@@ -859,10 +859,10 @@ struct hw_pairwise_ta_entry { | |||
859 | 859 | ||
860 | /* | 860 | /* |
861 | * CWMAX_CSR: CWmax for each EDCA AC. | 861 | * CWMAX_CSR: CWmax for each EDCA AC. |
862 | * CWMAX0: For AC_BK. | 862 | * CWMAX0: For AC_VO. |
863 | * CWMAX1: For AC_BE. | 863 | * CWMAX1: For AC_VI. |
864 | * CWMAX2: For AC_VI. | 864 | * CWMAX2: For AC_BE. |
865 | * CWMAX3: For AC_VO. | 865 | * CWMAX3: For AC_BK. |
866 | */ | 866 | */ |
867 | #define CWMAX_CSR 0x3428 | 867 | #define CWMAX_CSR 0x3428 |
868 | #define CWMAX_CSR_CWMAX0 FIELD32(0x0000000f) | 868 | #define CWMAX_CSR_CWMAX0 FIELD32(0x0000000f) |
@@ -883,14 +883,14 @@ struct hw_pairwise_ta_entry { | |||
883 | 883 | ||
884 | /* | 884 | /* |
885 | * TX_CNTL_CSR: KICK/Abort TX. | 885 | * TX_CNTL_CSR: KICK/Abort TX. |
886 | * KICK_TX_AC0: For AC_BK. | 886 | * KICK_TX_AC0: For AC_VO. |
887 | * KICK_TX_AC1: For AC_BE. | 887 | * KICK_TX_AC1: For AC_VI. |
888 | * KICK_TX_AC2: For AC_VI. | 888 | * KICK_TX_AC2: For AC_BE. |
889 | * KICK_TX_AC3: For AC_VO. | 889 | * KICK_TX_AC3: For AC_BK. |
890 | * ABORT_TX_AC0: For AC_BK. | 890 | * ABORT_TX_AC0: For AC_VO. |
891 | * ABORT_TX_AC1: For AC_BE. | 891 | * ABORT_TX_AC1: For AC_VI. |
892 | * ABORT_TX_AC2: For AC_VI. | 892 | * ABORT_TX_AC2: For AC_BE. |
893 | * ABORT_TX_AC3: For AC_VO. | 893 | * ABORT_TX_AC3: For AC_BK. |
894 | */ | 894 | */ |
895 | #define TX_CNTL_CSR 0x3430 | 895 | #define TX_CNTL_CSR 0x3430 |
896 | #define TX_CNTL_CSR_KICK_TX_AC0 FIELD32(0x00000001) | 896 | #define TX_CNTL_CSR_KICK_TX_AC0 FIELD32(0x00000001) |
@@ -1010,18 +1010,18 @@ struct hw_pairwise_ta_entry { | |||
1010 | #define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040) | 1010 | #define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040) |
1011 | 1011 | ||
1012 | /* | 1012 | /* |
1013 | * AC_TXOP_CSR0: AC_BK/AC_BE TXOP register. | 1013 | * AC_TXOP_CSR0: AC_VO/AC_VI TXOP register. |
1014 | * AC0_TX_OP: For AC_BK, in unit of 32us. | 1014 | * AC0_TX_OP: For AC_VO, in unit of 32us. |
1015 | * AC1_TX_OP: For AC_BE, in unit of 32us. | 1015 | * AC1_TX_OP: For AC_VI, in unit of 32us. |
1016 | */ | 1016 | */ |
1017 | #define AC_TXOP_CSR0 0x3474 | 1017 | #define AC_TXOP_CSR0 0x3474 |
1018 | #define AC_TXOP_CSR0_AC0_TX_OP FIELD32(0x0000ffff) | 1018 | #define AC_TXOP_CSR0_AC0_TX_OP FIELD32(0x0000ffff) |
1019 | #define AC_TXOP_CSR0_AC1_TX_OP FIELD32(0xffff0000) | 1019 | #define AC_TXOP_CSR0_AC1_TX_OP FIELD32(0xffff0000) |
1020 | 1020 | ||
1021 | /* | 1021 | /* |
1022 | * AC_TXOP_CSR1: AC_VO/AC_VI TXOP register. | 1022 | * AC_TXOP_CSR1: AC_BE/AC_BK TXOP register. |
1023 | * AC2_TX_OP: For AC_VI, in unit of 32us. | 1023 | * AC2_TX_OP: For AC_BE, in unit of 32us. |
1024 | * AC3_TX_OP: For AC_VO, in unit of 32us. | 1024 | * AC3_TX_OP: For AC_BK, in unit of 32us. |
1025 | */ | 1025 | */ |
1026 | #define AC_TXOP_CSR1 0x3478 | 1026 | #define AC_TXOP_CSR1 0x3478 |
1027 | #define AC_TXOP_CSR1_AC2_TX_OP FIELD32(0x0000ffff) | 1027 | #define AC_TXOP_CSR1_AC2_TX_OP FIELD32(0x0000ffff) |