diff options
author | Ivo van Doorn <ivdoorn@gmail.com> | 2008-07-08 07:45:20 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-07-09 16:16:31 -0400 |
commit | 1f90916264049a7d9e6106fd60d289c9a775d24f (patch) | |
tree | 0f07970b1b3fb7365b0fb4acccbe2e1dc7b320e6 /drivers/net/wireless/rt2x00/rt61pci.c | |
parent | adeed48090fc370afa0db8d007748ee72a40b578 (diff) |
rt2x00: Disable synchronization during initialization
As soon as init_registers() was called, the rt2400/rt2500
would start raising beacondone interrupts. Since this is highly
premature since no beacons were provided yet, we should
initialize the synchronization register to 0.
This will make all drivers initialize it to 0 regardless
if they are raising beacondone interrupts or not, since it only
makes sense to have it completely disabled.
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt61pci.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 14bc7b281659..c3afb5cbe807 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -1201,6 +1201,15 @@ static int rt61pci_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1201 | rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42); | 1201 | rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42); |
1202 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR8, reg); | 1202 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR8, reg); |
1203 | 1203 | ||
1204 | rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, ®); | ||
1205 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL, 0); | ||
1206 | rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0); | ||
1207 | rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, 0); | ||
1208 | rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0); | ||
1209 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0); | ||
1210 | rt2x00_set_field32(®, TXRX_CSR9_TIMESTAMP_COMPENSATE, 0); | ||
1211 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); | ||
1212 | |||
1204 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f); | 1213 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f); |
1205 | 1214 | ||
1206 | rt2x00pci_register_write(rt2x00dev, MAC_CSR6, 0x00000fff); | 1215 | rt2x00pci_register_write(rt2x00dev, MAC_CSR6, 0x00000fff); |