rt2x00: rework RT chipset and revision determination for PCI an SOC devices.

The recent rt2800 devices are no longer really identified by their PCI
ID's, but rather by the contents of their CSR0 register. Also for the
other chipsets is the contents of this CSR0 register important.
Change the chipset determination logic to be more aligned with the rt2800
model.
Preparation for the support of rt3070 / rt3090 based devices.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 18 insertions, 23 deletions

diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 1fed90acd198..d9daa9c406fa 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -170,25 +170,26 @@ enum rt2x00_chip_intf {
  */
 struct rt2x00_chip {
         u16 rt;
-#define RT2460          0x0101
-#define RT2560          0x0201
-#define RT2570          0x1201
-#define RT2561s         0x0301  /* Turbo */
-#define RT2561          0x0302
-#define RT2661          0x0401
-#define RT2571          0x1300
-#define RT2860          0x0601  /* 2.4GHz PCI/CB */
-#define RT2860D         0x0681  /* 2.4GHz, 5GHz PCI/CB */
-#define RT2890          0x0701  /* 2.4GHz PCIe */
-#define RT2890D         0x0781  /* 2.4GHz, 5GHz PCIe */
+#define RT2460          0x2460
+#define RT2560          0x2560
+#define RT2570          0x2570
+#define RT2661          0x2661
+#define RT2573          0x2573
+#define RT2860          0x2860  /* 2.4GHz PCI/CB */
+#define RT2870          0x2870
+#define RT2872          0x2872
 #define RT2880          0x2880  /* WSOC */
+#define RT2883          0x2883  /* WSOC */
+#define RT2890          0x2890  /* 2.4GHz PCIe */
 #define RT3052          0x3052  /* WSOC */
+#define RT3070          0x3070
+#define RT3071          0x3071
 #define RT3090          0x3090  /* 2.4GHz PCIe */
-#define RT2870          0x1600
-#define RT3070          0x1800
+#define RT3390          0x3390
+#define RT3572          0x3572
 
         u16 rf;
-        u32 rev;
+        u16 rev;
 
         enum rt2x00_chip_intf intf;
 };
@@ -918,14 +919,14 @@ static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
  * Chipset handlers
  */
 static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
-                                   const u16 rt, const u16 rf, const u32 rev)
+                                   const u16 rt, const u16 rf, const u16 rev)
 {
         rt2x00dev->chip.rt = rt;
         rt2x00dev->chip.rf = rf;
         rt2x00dev->chip.rev = rev;
 
         INFO(rt2x00dev,
-             "Chipset detected - rt: %04x, rf: %04x, rev: %08x.\n",
+             "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n",
              rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev);
 }
 
@@ -939,17 +940,11 @@ static inline char rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
         return (rt2x00dev->chip.rf == rf);
 }
 
-static inline u32 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
+static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
 {
         return rt2x00dev->chip.rev;
 }
 
-static inline bool rt2x00_check_rev(struct rt2x00_dev *rt2x00dev,
-                                    const u32 mask, const u32 rev)
-{
-        return ((rt2x00dev->chip.rev & mask) == rev);
-}
-
 static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
                                         enum rt2x00_chip_intf intf)
 {