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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-11-04 12:33:05 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-11-06 16:48:47 -0500
commitabbb505dddef31707d06ff26539639ccdfa56f45 (patch)
treefbbf70916b3538bbed0d873db79d124d5bb9f1f1 /drivers/net/wireless/rt2x00/rt2800usb.c
parente9a6269d5bcb1c7cd18cea02a9a73fac8712f2d1 (diff)
rt2800usb: add rt2800_register_[read,write]() wrappers
Part of preparations for later code unification. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800usb.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c384
1 files changed, 192 insertions, 192 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 39a652bc29dd..73e7f2bafe10 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -46,7 +46,7 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
46/* 46/*
47 * Register access. 47 * Register access.
48 * All access to the CSR registers will go through the methods 48 * All access to the CSR registers will go through the methods
49 * rt2x00usb_register_read and rt2x00usb_register_write. 49 * rt2800_register_read and rt2800_register_write.
50 * BBP and RF register require indirect register access, 50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this. 51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits, 52 * These indirect registers work with busy bits,
@@ -85,7 +85,7 @@ static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev,
85 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1); 85 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
86 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0); 86 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
87 87
88 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); 88 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
89 } 89 }
90 90
91 mutex_unlock(&rt2x00dev->csr_mutex); 91 mutex_unlock(&rt2x00dev->csr_mutex);
@@ -112,7 +112,7 @@ static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev,
112 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1); 112 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
113 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1); 113 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
114 114
115 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); 115 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
116 116
117 WAIT_FOR_BBP(rt2x00dev, &reg); 117 WAIT_FOR_BBP(rt2x00dev, &reg);
118 } 118 }
@@ -140,7 +140,7 @@ static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev,
140 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1); 140 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
141 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1); 141 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
142 142
143 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); 143 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
144 } 144 }
145 145
146 mutex_unlock(&rt2x00dev->csr_mutex); 146 mutex_unlock(&rt2x00dev->csr_mutex);
@@ -167,7 +167,7 @@ static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev,
167 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0); 167 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
168 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1); 168 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
169 169
170 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); 170 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
171 171
172 WAIT_FOR_RFCSR(rt2x00dev, &reg); 172 WAIT_FOR_RFCSR(rt2x00dev, &reg);
173 } 173 }
@@ -195,7 +195,7 @@ static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev,
195 rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0); 195 rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
196 rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1); 196 rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
197 197
198 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg); 198 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
199 rt2x00_rf_write(rt2x00dev, word, value); 199 rt2x00_rf_write(rt2x00dev, word, value);
200 } 200 }
201 201
@@ -219,11 +219,11 @@ static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
219 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token); 219 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
220 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0); 220 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
221 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1); 221 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
222 rt2x00usb_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg); 222 rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
223 223
224 reg = 0; 224 reg = 0;
225 rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command); 225 rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
226 rt2x00usb_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg); 226 rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
227 } 227 }
228 228
229 mutex_unlock(&rt2x00dev->csr_mutex); 229 mutex_unlock(&rt2x00dev->csr_mutex);
@@ -233,8 +233,8 @@ static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
233static const struct rt2x00debug rt2800usb_rt2x00debug = { 233static const struct rt2x00debug rt2800usb_rt2x00debug = {
234 .owner = THIS_MODULE, 234 .owner = THIS_MODULE,
235 .csr = { 235 .csr = {
236 .read = rt2x00usb_register_read, 236 .read = rt2800_register_read,
237 .write = rt2x00usb_register_write, 237 .write = rt2800_register_write,
238 .flags = RT2X00DEBUGFS_OFFSET, 238 .flags = RT2X00DEBUGFS_OFFSET,
239 .word_base = CSR_REG_BASE, 239 .word_base = CSR_REG_BASE,
240 .word_size = sizeof(u32), 240 .word_size = sizeof(u32),
@@ -268,7 +268,7 @@ static int rt2800usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
268{ 268{
269 u32 reg; 269 u32 reg;
270 270
271 rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg); 271 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
272 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2); 272 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
273} 273}
274 274
@@ -317,7 +317,7 @@ static int rt2800usb_blink_set(struct led_classdev *led_cdev,
317 container_of(led_cdev, struct rt2x00_led, led_dev); 317 container_of(led_cdev, struct rt2x00_led, led_dev);
318 u32 reg; 318 u32 reg;
319 319
320 rt2x00usb_register_read(led->rt2x00dev, LED_CFG, &reg); 320 rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
321 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on); 321 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
322 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off); 322 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
323 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3); 323 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
@@ -325,7 +325,7 @@ static int rt2800usb_blink_set(struct led_classdev *led_cdev,
325 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12); 325 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
326 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3); 326 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
327 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1); 327 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
328 rt2x00usb_register_write(led->rt2x00dev, LED_CFG, reg); 328 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
329 329
330 return 0; 330 return 0;
331} 331}
@@ -356,7 +356,7 @@ static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
356 356
357 offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx); 357 offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
358 358
359 rt2x00usb_register_read(rt2x00dev, offset, &reg); 359 rt2800_register_read(rt2x00dev, offset, &reg);
360 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB, 360 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
361 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)); 361 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
362 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER, 362 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
@@ -364,7 +364,7 @@ static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
364 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX, 364 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
365 (crypto->cmd == SET_KEY) * crypto->bssidx); 365 (crypto->cmd == SET_KEY) * crypto->bssidx);
366 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher); 366 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
367 rt2x00usb_register_write(rt2x00dev, offset, reg); 367 rt2800_register_write(rt2x00dev, offset, reg);
368 368
369 offset = MAC_IVEIV_ENTRY(key->hw_key_idx); 369 offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
370 370
@@ -422,10 +422,10 @@ static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
422 422
423 offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8); 423 offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
424 424
425 rt2x00usb_register_read(rt2x00dev, offset, &reg); 425 rt2800_register_read(rt2x00dev, offset, &reg);
426 rt2x00_set_field32(&reg, field, 426 rt2x00_set_field32(&reg, field,
427 (crypto->cmd == SET_KEY) * crypto->cipher); 427 (crypto->cmd == SET_KEY) * crypto->cipher);
428 rt2x00usb_register_write(rt2x00dev, offset, reg); 428 rt2800_register_write(rt2x00dev, offset, reg);
429 429
430 /* 430 /*
431 * Update WCID information 431 * Update WCID information
@@ -484,7 +484,7 @@ static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
484 * and broadcast frames will always be accepted since 484 * and broadcast frames will always be accepted since
485 * there is no filter for it at this time. 485 * there is no filter for it at this time.
486 */ 486 */
487 rt2x00usb_register_read(rt2x00dev, RX_FILTER_CFG, &reg); 487 rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
488 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR, 488 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
489 !(filter_flags & FIF_FCSFAIL)); 489 !(filter_flags & FIF_FCSFAIL));
490 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR, 490 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
@@ -513,7 +513,7 @@ static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
513 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0); 513 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
514 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL, 514 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
515 !(filter_flags & FIF_CONTROL)); 515 !(filter_flags & FIF_CONTROL));
516 rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg); 516 rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
517} 517}
518 518
519static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev, 519static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
@@ -532,16 +532,16 @@ static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
532 * bits which (when set to 0) will invalidate the entire beacon. 532 * bits which (when set to 0) will invalidate the entire beacon.
533 */ 533 */
534 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx); 534 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
535 rt2x00usb_register_write(rt2x00dev, beacon_base, 0); 535 rt2800_register_write(rt2x00dev, beacon_base, 0);
536 536
537 /* 537 /*
538 * Enable synchronisation. 538 * Enable synchronisation.
539 */ 539 */
540 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 540 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
541 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1); 541 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
542 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync); 542 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
543 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1); 543 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
544 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 544 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
545 } 545 }
546 546
547 if (flags & CONFIG_UPDATE_MAC) { 547 if (flags & CONFIG_UPDATE_MAC) {
@@ -569,43 +569,43 @@ static void rt2800usb_config_erp(struct rt2x00_dev *rt2x00dev,
569{ 569{
570 u32 reg; 570 u32 reg;
571 571
572 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg); 572 rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
573 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20); 573 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
574 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg); 574 rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
575 575
576 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg); 576 rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
577 rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY, 577 rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
578 !!erp->short_preamble); 578 !!erp->short_preamble);
579 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE, 579 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
580 !!erp->short_preamble); 580 !!erp->short_preamble);
581 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg); 581 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
582 582
583 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg); 583 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
584 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 584 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
585 erp->cts_protection ? 2 : 0); 585 erp->cts_protection ? 2 : 0);
586 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg); 586 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
587 587
588 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 588 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
589 erp->basic_rates); 589 erp->basic_rates);
590 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003); 590 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
591 591
592 rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg); 592 rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
593 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time); 593 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
594 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2); 594 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
595 rt2x00usb_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg); 595 rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
596 596
597 rt2x00usb_register_read(rt2x00dev, XIFS_TIME_CFG, &reg); 597 rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
598 rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs); 598 rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
599 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs); 599 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
600 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4); 600 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
601 rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs); 601 rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
602 rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1); 602 rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
603 rt2x00usb_register_write(rt2x00dev, XIFS_TIME_CFG, reg); 603 rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
604 604
605 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 605 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
606 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 606 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
607 erp->beacon_int * 16); 607 erp->beacon_int * 16);
608 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 608 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
609} 609}
610 610
611static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev, 611static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev,
@@ -813,11 +813,11 @@ static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
813 rt2800usb_bbp_write(rt2x00dev, 75, 0x50); 813 rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
814 } 814 }
815 815
816 rt2x00usb_register_read(rt2x00dev, TX_BAND_CFG, &reg); 816 rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg);
817 rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf)); 817 rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
818 rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14); 818 rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
819 rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14); 819 rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
820 rt2x00usb_register_write(rt2x00dev, TX_BAND_CFG, reg); 820 rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg);
821 821
822 tx_pin = 0; 822 tx_pin = 0;
823 823
@@ -840,7 +840,7 @@ static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
840 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14); 840 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
841 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14); 841 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
842 842
843 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); 843 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
844 844
845 rt2800usb_bbp_read(rt2x00dev, 4, &bbp); 845 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
846 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf)); 846 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
@@ -876,7 +876,7 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
876 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0); 876 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
877 rt2800usb_bbp_write(rt2x00dev, 1, r1); 877 rt2800usb_bbp_write(rt2x00dev, 1, r1);
878 878
879 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_0, &reg); 879 rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
880 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value); 880 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
881 rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value); 881 rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
882 rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value); 882 rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
@@ -885,9 +885,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
885 rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value); 885 rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
886 rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value); 886 rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
887 rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value); 887 rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
888 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_0, reg); 888 rt2800_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
889 889
890 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_1, &reg); 890 rt2800_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
891 rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value); 891 rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
892 rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value); 892 rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
893 rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value); 893 rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
@@ -896,9 +896,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
896 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value); 896 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
897 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value); 897 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
898 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value); 898 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
899 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_1, reg); 899 rt2800_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
900 900
901 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_2, &reg); 901 rt2800_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
902 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value); 902 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
903 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value); 903 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
904 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value); 904 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
@@ -907,9 +907,9 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
907 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value); 907 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
908 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value); 908 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
909 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value); 909 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
910 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_2, reg); 910 rt2800_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
911 911
912 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_3, &reg); 912 rt2800_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
913 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value); 913 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
914 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value); 914 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
915 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value); 915 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
@@ -918,14 +918,14 @@ static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
918 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value); 918 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
919 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value); 919 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
920 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value); 920 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
921 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_3, reg); 921 rt2800_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
922 922
923 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_4, &reg); 923 rt2800_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
924 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value); 924 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
925 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value); 925 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
926 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value); 926 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
927 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value); 927 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
928 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_4, reg); 928 rt2800_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
929} 929}
930 930
931static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev, 931static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
@@ -933,7 +933,7 @@ static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
933{ 933{
934 u32 reg; 934 u32 reg;
935 935
936 rt2x00usb_register_read(rt2x00dev, TX_RTY_CFG, &reg); 936 rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
937 rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT, 937 rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
938 libconf->conf->short_frame_max_tx_count); 938 libconf->conf->short_frame_max_tx_count);
939 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT, 939 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
@@ -942,7 +942,7 @@ static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
942 rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0); 942 rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
943 rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0); 943 rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
944 rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1); 944 rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
945 rt2x00usb_register_write(rt2x00dev, TX_RTY_CFG, reg); 945 rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
946} 946}
947 947
948static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev, 948static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
@@ -954,24 +954,24 @@ static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
954 u32 reg; 954 u32 reg;
955 955
956 if (state == STATE_SLEEP) { 956 if (state == STATE_SLEEP) {
957 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0); 957 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
958 958
959 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg); 959 rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
960 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5); 960 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
961 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 961 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
962 libconf->conf->listen_interval - 1); 962 libconf->conf->listen_interval - 1);
963 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1); 963 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
964 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg); 964 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
965 965
966 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 966 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
967 } else { 967 } else {
968 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state); 968 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
969 969
970 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg); 970 rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
971 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0); 971 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
972 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0); 972 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
973 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0); 973 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
974 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg); 974 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
975 } 975 }
976} 976}
977 977
@@ -1004,7 +1004,7 @@ static void rt2800usb_link_stats(struct rt2x00_dev *rt2x00dev,
1004 /* 1004 /*
1005 * Update FCS error count from register. 1005 * Update FCS error count from register.
1006 */ 1006 */
1007 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg); 1007 rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1008 qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR); 1008 qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
1009} 1009}
1010 1010
@@ -1162,7 +1162,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1162 * Wait for stable hardware. 1162 * Wait for stable hardware.
1163 */ 1163 */
1164 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1164 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1165 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1165 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1166 if (reg && reg != ~0) 1166 if (reg && reg != ~0)
1167 break; 1167 break;
1168 msleep(1); 1168 msleep(1);
@@ -1182,8 +1182,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1182 data + offset, length, 1182 data + offset, length,
1183 REGISTER_TIMEOUT32(length)); 1183 REGISTER_TIMEOUT32(length));
1184 1184
1185 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); 1185 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
1186 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); 1186 rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
1187 1187
1188 /* 1188 /*
1189 * Send firmware request to device to load firmware, 1189 * Send firmware request to device to load firmware,
@@ -1198,7 +1198,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1198 } 1198 }
1199 1199
1200 msleep(10); 1200 msleep(10);
1201 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 1201 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1202 1202
1203 /* 1203 /*
1204 * Send signal to firmware during boot time. 1204 * Send signal to firmware during boot time.
@@ -1217,7 +1217,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1217 * Wait for device to stabilize. 1217 * Wait for device to stabilize.
1218 */ 1218 */
1219 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1219 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1220 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg); 1220 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1221 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY)) 1221 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
1222 break; 1222 break;
1223 msleep(1); 1223 msleep(1);
@@ -1231,8 +1231,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1231 /* 1231 /*
1232 * Initialize firmware. 1232 * Initialize firmware.
1233 */ 1233 */
1234 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0); 1234 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1235 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 1235 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1236 msleep(1); 1236 msleep(1);
1237 1237
1238 return 0; 1238 return 0;
@@ -1250,7 +1250,7 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1250 * Wait untill BBP and RF are ready. 1250 * Wait untill BBP and RF are ready.
1251 */ 1251 */
1252 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1252 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1253 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1253 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1254 if (reg && reg != ~0) 1254 if (reg && reg != ~0)
1255 break; 1255 break;
1256 msleep(1); 1256 msleep(1);
@@ -1261,59 +1261,59 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1261 return -EBUSY; 1261 return -EBUSY;
1262 } 1262 }
1263 1263
1264 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg); 1264 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1265 rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000); 1265 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
1266 1266
1267 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 1267 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1268 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1); 1268 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
1269 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1); 1269 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
1270 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 1270 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1271 1271
1272 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); 1272 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1273 1273
1274 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, 1274 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1275 USB_MODE_RESET, REGISTER_TIMEOUT); 1275 USB_MODE_RESET, REGISTER_TIMEOUT);
1276 1276
1277 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); 1277 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1278 1278
1279 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET0, &reg); 1279 rt2800_register_read(rt2x00dev, BCN_OFFSET0, &reg);
1280 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */ 1280 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
1281 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */ 1281 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
1282 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */ 1282 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
1283 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */ 1283 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
1284 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET0, reg); 1284 rt2800_register_write(rt2x00dev, BCN_OFFSET0, reg);
1285 1285
1286 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET1, &reg); 1286 rt2800_register_read(rt2x00dev, BCN_OFFSET1, &reg);
1287 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */ 1287 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
1288 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */ 1288 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
1289 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */ 1289 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
1290 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */ 1290 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
1291 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET1, reg); 1291 rt2800_register_write(rt2x00dev, BCN_OFFSET1, reg);
1292 1292
1293 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f); 1293 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
1294 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003); 1294 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
1295 1295
1296 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); 1296 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1297 1297
1298 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 1298 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
1299 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0); 1299 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
1300 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0); 1300 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
1301 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0); 1301 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
1302 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0); 1302 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
1303 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0); 1303 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
1304 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0); 1304 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
1305 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 1305 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
1306 1306
1307 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) { 1307 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
1308 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 1308 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
1309 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); 1309 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
1310 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); 1310 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
1311 } else { 1311 } else {
1312 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000); 1312 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
1313 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 1313 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
1314 } 1314 }
1315 1315
1316 rt2x00usb_register_read(rt2x00dev, TX_LINK_CFG, &reg); 1316 rt2800_register_read(rt2x00dev, TX_LINK_CFG, &reg);
1317 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32); 1317 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
1318 rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0); 1318 rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
1319 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0); 1319 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
@@ -1322,14 +1322,14 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1322 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1); 1322 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
1323 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0); 1323 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
1324 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0); 1324 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
1325 rt2x00usb_register_write(rt2x00dev, TX_LINK_CFG, reg); 1325 rt2800_register_write(rt2x00dev, TX_LINK_CFG, reg);
1326 1326
1327 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg); 1327 rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
1328 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9); 1328 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
1329 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10); 1329 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
1330 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg); 1330 rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
1331 1331
1332 rt2x00usb_register_read(rt2x00dev, MAX_LEN_CFG, &reg); 1332 rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
1333 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE); 1333 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
1334 if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION && 1334 if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
1335 rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION) 1335 rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
@@ -1338,19 +1338,19 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1338 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1); 1338 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
1339 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0); 1339 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
1340 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0); 1340 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
1341 rt2x00usb_register_write(rt2x00dev, MAX_LEN_CFG, reg); 1341 rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
1342 1342
1343 rt2x00usb_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f); 1343 rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
1344 1344
1345 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg); 1345 rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
1346 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1); 1346 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
1347 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0); 1347 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
1348 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0); 1348 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
1349 rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0); 1349 rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
1350 rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0); 1350 rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
1351 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg); 1351 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
1352 1352
1353 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg); 1353 rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
1354 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8); 1354 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
1355 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0); 1355 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
1356 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1); 1356 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
@@ -1360,9 +1360,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1360 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1); 1360 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1361 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1361 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1362 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1); 1362 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1363 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg); 1363 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
1364 1364
1365 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg); 1365 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
1366 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8); 1366 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
1367 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0); 1367 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
1368 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1); 1368 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
@@ -1372,9 +1372,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1372 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1); 1372 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1373 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1373 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1374 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1); 1374 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1375 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg); 1375 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
1376 1376
1377 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg); 1377 rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
1378 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004); 1378 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
1379 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0); 1379 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
1380 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1); 1380 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
@@ -1384,9 +1384,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1384 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0); 1384 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1385 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1385 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1386 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0); 1386 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1387 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg); 1387 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
1388 1388
1389 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg); 1389 rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
1390 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084); 1390 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
1391 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0); 1391 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
1392 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1); 1392 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
@@ -1396,9 +1396,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1396 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1); 1396 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1397 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1397 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1398 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1); 1398 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1399 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg); 1399 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
1400 1400
1401 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg); 1401 rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
1402 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004); 1402 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
1403 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0); 1403 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
1404 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1); 1404 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
@@ -1408,9 +1408,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1408 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0); 1408 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1409 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1409 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1410 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0); 1410 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1411 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg); 1411 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
1412 1412
1413 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg); 1413 rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
1414 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084); 1414 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
1415 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0); 1415 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
1416 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1); 1416 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
@@ -1420,11 +1420,11 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1420 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1); 1420 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1421 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1); 1421 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1422 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1); 1422 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1423 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg); 1423 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
1424 1424
1425 rt2x00usb_register_write(rt2x00dev, PBF_CFG, 0xf40006); 1425 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006);
1426 1426
1427 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 1427 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1428 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0); 1428 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1429 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0); 1429 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
1430 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0); 1430 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
@@ -1434,26 +1434,26 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1434 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0); 1434 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
1435 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0); 1435 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
1436 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0); 1436 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
1437 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); 1437 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1438 1438
1439 rt2x00usb_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f); 1439 rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
1440 rt2x00usb_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002); 1440 rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
1441 1441
1442 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg); 1442 rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
1443 rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32); 1443 rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
1444 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, 1444 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
1445 IEEE80211_MAX_RTS_THRESHOLD); 1445 IEEE80211_MAX_RTS_THRESHOLD);
1446 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0); 1446 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
1447 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg); 1447 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
1448 1448
1449 rt2x00usb_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca); 1449 rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
1450 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); 1450 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1451 1451
1452 /* 1452 /*
1453 * ASIC will keep garbage value after boot, clear encryption keys. 1453 * ASIC will keep garbage value after boot, clear encryption keys.
1454 */ 1454 */
1455 for (i = 0; i < 4; i++) 1455 for (i = 0; i < 4; i++)
1456 rt2x00usb_register_write(rt2x00dev, 1456 rt2800_register_write(rt2x00dev,
1457 SHARED_KEY_MODE_ENTRY(i), 0); 1457 SHARED_KEY_MODE_ENTRY(i), 0);
1458 1458
1459 for (i = 0; i < 256; i++) { 1459 for (i = 0; i < 256; i++) {
@@ -1461,8 +1461,8 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1461 rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), 1461 rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
1462 wcid, sizeof(wcid)); 1462 wcid, sizeof(wcid));
1463 1463
1464 rt2x00usb_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1); 1464 rt2800_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
1465 rt2x00usb_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0); 1465 rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
1466 } 1466 }
1467 1467
1468 /* 1468 /*
@@ -1471,20 +1471,20 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1471 * the first byte since that byte contains the VALID and OWNER 1471 * the first byte since that byte contains the VALID and OWNER
1472 * bits which (when set to 0) will invalidate the entire beacon. 1472 * bits which (when set to 0) will invalidate the entire beacon.
1473 */ 1473 */
1474 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0); 1474 rt2800_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1475 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0); 1475 rt2800_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1476 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0); 1476 rt2800_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1477 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0); 1477 rt2800_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1478 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE4, 0); 1478 rt2800_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
1479 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE5, 0); 1479 rt2800_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
1480 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE6, 0); 1480 rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
1481 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE7, 0); 1481 rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
1482 1482
1483 rt2x00usb_register_read(rt2x00dev, USB_CYC_CFG, &reg); 1483 rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg);
1484 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30); 1484 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
1485 rt2x00usb_register_write(rt2x00dev, USB_CYC_CFG, reg); 1485 rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
1486 1486
1487 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG0, &reg); 1487 rt2800_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
1488 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0); 1488 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
1489 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0); 1489 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
1490 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1); 1490 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
@@ -1493,9 +1493,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1493 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4); 1493 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
1494 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5); 1494 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
1495 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6); 1495 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
1496 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG0, reg); 1496 rt2800_register_write(rt2x00dev, HT_FBK_CFG0, reg);
1497 1497
1498 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG1, &reg); 1498 rt2800_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
1499 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8); 1499 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
1500 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8); 1500 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
1501 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9); 1501 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
@@ -1504,9 +1504,9 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1504 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12); 1504 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
1505 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13); 1505 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
1506 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14); 1506 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
1507 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG1, reg); 1507 rt2800_register_write(rt2x00dev, HT_FBK_CFG1, reg);
1508 1508
1509 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, &reg); 1509 rt2800_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
1510 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8); 1510 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
1511 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8); 1511 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
1512 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9); 1512 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
@@ -1515,26 +1515,26 @@ static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1515 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12); 1515 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
1516 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13); 1516 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
1517 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14); 1517 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
1518 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg); 1518 rt2800_register_write(rt2x00dev, LG_FBK_CFG0, reg);
1519 1519
1520 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, &reg); 1520 rt2800_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
1521 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0); 1521 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
1522 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0); 1522 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
1523 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1); 1523 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
1524 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2); 1524 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
1525 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG1, reg); 1525 rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg);
1526 1526
1527 /* 1527 /*
1528 * We must clear the error counters. 1528 * We must clear the error counters.
1529 * These registers are cleared on read, 1529 * These registers are cleared on read,
1530 * so we may pass a useless variable to store the value. 1530 * so we may pass a useless variable to store the value.
1531 */ 1531 */
1532 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg); 1532 rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1533 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, &reg); 1533 rt2800_register_read(rt2x00dev, RX_STA_CNT1, &reg);
1534 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT2, &reg); 1534 rt2800_register_read(rt2x00dev, RX_STA_CNT2, &reg);
1535 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT0, &reg); 1535 rt2800_register_read(rt2x00dev, TX_STA_CNT0, &reg);
1536 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT1, &reg); 1536 rt2800_register_read(rt2x00dev, TX_STA_CNT1, &reg);
1537 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT2, &reg); 1537 rt2800_register_read(rt2x00dev, TX_STA_CNT2, &reg);
1538 1538
1539 return 0; 1539 return 0;
1540} 1540}
@@ -1545,7 +1545,7 @@ static int rt2800usb_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
1545 u32 reg; 1545 u32 reg;
1546 1546
1547 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1547 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1548 rt2x00usb_register_read(rt2x00dev, MAC_STATUS_CFG, &reg); 1548 rt2800_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
1549 if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY)) 1549 if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
1550 return 0; 1550 return 0;
1551 1551
@@ -1565,8 +1565,8 @@ static int rt2800usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1565 * BBP was enabled after firmware was loaded, 1565 * BBP was enabled after firmware was loaded,
1566 * but we need to reactivate it now. 1566 * but we need to reactivate it now.
1567 */ 1567 */
1568 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0); 1568 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1569 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 1569 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1570 msleep(1); 1570 msleep(1);
1571 1571
1572 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1572 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
@@ -1768,11 +1768,11 @@ static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1768{ 1768{
1769 u32 reg; 1769 u32 reg;
1770 1770
1771 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 1771 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1772 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1772 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
1773 (state == STATE_RADIO_RX_ON) || 1773 (state == STATE_RADIO_RX_ON) ||
1774 (state == STATE_RADIO_RX_ON_LINK)); 1774 (state == STATE_RADIO_RX_ON_LINK));
1775 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 1775 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1776} 1776}
1777 1777
1778static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev) 1778static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
@@ -1781,7 +1781,7 @@ static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
1781 u32 reg; 1781 u32 reg;
1782 1782
1783 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1783 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1784 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 1784 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1785 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) && 1785 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
1786 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY)) 1786 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
1787 return 0; 1787 return 0;
@@ -1807,20 +1807,20 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1807 rt2800usb_init_rfcsr(rt2x00dev))) 1807 rt2800usb_init_rfcsr(rt2x00dev)))
1808 return -EIO; 1808 return -EIO;
1809 1809
1810 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 1810 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1811 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1); 1811 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1812 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 1812 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1813 1813
1814 udelay(50); 1814 udelay(50);
1815 1815
1816 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 1816 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1817 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1); 1817 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
1818 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1); 1818 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
1819 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1); 1819 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
1820 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); 1820 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1821 1821
1822 1822
1823 rt2x00usb_register_read(rt2x00dev, USB_DMA_CFG, &reg); 1823 rt2800_register_read(rt2x00dev, USB_DMA_CFG, &reg);
1824 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0); 1824 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0);
1825 /* Don't use bulk in aggregation when working with USB 1.1 */ 1825 /* Don't use bulk in aggregation when working with USB 1.1 */
1826 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN, 1826 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN,
@@ -1834,12 +1834,12 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1834 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3); 1834 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
1835 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1); 1835 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1);
1836 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1); 1836 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1);
1837 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, reg); 1837 rt2800_register_write(rt2x00dev, USB_DMA_CFG, reg);
1838 1838
1839 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 1839 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1840 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1); 1840 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1841 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1); 1841 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
1842 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 1842 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1843 1843
1844 /* 1844 /*
1845 * Initialize LED control 1845 * Initialize LED control
@@ -1863,14 +1863,14 @@ static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1863{ 1863{
1864 u32 reg; 1864 u32 reg;
1865 1865
1866 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 1866 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1867 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0); 1867 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1868 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0); 1868 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1869 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); 1869 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1870 1870
1871 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0); 1871 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
1872 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0); 1872 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
1873 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, 0); 1873 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
1874 1874
1875 /* Wait for DMA, ignore error */ 1875 /* Wait for DMA, ignore error */
1876 rt2800usb_wait_wpdma_ready(rt2x00dev); 1876 rt2800usb_wait_wpdma_ready(rt2x00dev);
@@ -2038,9 +2038,9 @@ static void rt2800usb_write_beacon(struct queue_entry *entry)
2038 * Disable beaconing while we are reloading the beacon data, 2038 * Disable beaconing while we are reloading the beacon data,
2039 * otherwise we might be sending out invalid data. 2039 * otherwise we might be sending out invalid data.
2040 */ 2040 */
2041 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 2041 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2042 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0); 2042 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
2043 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 2043 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2044 2044
2045 /* 2045 /*
2046 * Write entire beacon with descriptor to register. 2046 * Write entire beacon with descriptor to register.
@@ -2083,12 +2083,12 @@ static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
2083 return; 2083 return;
2084 } 2084 }
2085 2085
2086 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 2086 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2087 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) { 2087 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
2088 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1); 2088 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
2089 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1); 2089 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
2090 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1); 2090 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
2091 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 2091 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2092 } 2092 }
2093} 2093}
2094 2094
@@ -2316,7 +2316,7 @@ static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
2316 * Identify RF chipset. 2316 * Identify RF chipset.
2317 */ 2317 */
2318 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 2318 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2319 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 2319 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
2320 rt2x00_set_chip(rt2x00dev, RT2870, value, reg); 2320 rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
2321 2321
2322 /* 2322 /*
@@ -2659,33 +2659,33 @@ static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2659 u32 reg; 2659 u32 reg;
2660 bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD); 2660 bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
2661 2661
2662 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg); 2662 rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
2663 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value); 2663 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
2664 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg); 2664 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
2665 2665
2666 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg); 2666 rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
2667 rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled); 2667 rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
2668 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg); 2668 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
2669 2669
2670 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg); 2670 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
2671 rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled); 2671 rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
2672 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg); 2672 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
2673 2673
2674 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg); 2674 rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
2675 rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled); 2675 rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
2676 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg); 2676 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
2677 2677
2678 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg); 2678 rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
2679 rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled); 2679 rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
2680 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg); 2680 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
2681 2681
2682 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg); 2682 rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
2683 rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled); 2683 rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
2684 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg); 2684 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
2685 2685
2686 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg); 2686 rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
2687 rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled); 2687 rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
2688 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg); 2688 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
2689 2689
2690 return 0; 2690 return 0;
2691} 2691}
@@ -2724,35 +2724,35 @@ static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2724 field.bit_offset = (queue_idx & 1) * 16; 2724 field.bit_offset = (queue_idx & 1) * 16;
2725 field.bit_mask = 0xffff << field.bit_offset; 2725 field.bit_mask = 0xffff << field.bit_offset;
2726 2726
2727 rt2x00usb_register_read(rt2x00dev, offset, &reg); 2727 rt2800_register_read(rt2x00dev, offset, &reg);
2728 rt2x00_set_field32(&reg, field, queue->txop); 2728 rt2x00_set_field32(&reg, field, queue->txop);
2729 rt2x00usb_register_write(rt2x00dev, offset, reg); 2729 rt2800_register_write(rt2x00dev, offset, reg);
2730 2730
2731 /* Update WMM registers */ 2731 /* Update WMM registers */
2732 field.bit_offset = queue_idx * 4; 2732 field.bit_offset = queue_idx * 4;
2733 field.bit_mask = 0xf << field.bit_offset; 2733 field.bit_mask = 0xf << field.bit_offset;
2734 2734
2735 rt2x00usb_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg); 2735 rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
2736 rt2x00_set_field32(&reg, field, queue->aifs); 2736 rt2x00_set_field32(&reg, field, queue->aifs);
2737 rt2x00usb_register_write(rt2x00dev, WMM_AIFSN_CFG, reg); 2737 rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
2738 2738
2739 rt2x00usb_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg); 2739 rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
2740 rt2x00_set_field32(&reg, field, queue->cw_min); 2740 rt2x00_set_field32(&reg, field, queue->cw_min);
2741 rt2x00usb_register_write(rt2x00dev, WMM_CWMIN_CFG, reg); 2741 rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
2742 2742
2743 rt2x00usb_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg); 2743 rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
2744 rt2x00_set_field32(&reg, field, queue->cw_max); 2744 rt2x00_set_field32(&reg, field, queue->cw_max);
2745 rt2x00usb_register_write(rt2x00dev, WMM_CWMAX_CFG, reg); 2745 rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
2746 2746
2747 /* Update EDCA registers */ 2747 /* Update EDCA registers */
2748 offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx); 2748 offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
2749 2749
2750 rt2x00usb_register_read(rt2x00dev, offset, &reg); 2750 rt2800_register_read(rt2x00dev, offset, &reg);
2751 rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop); 2751 rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
2752 rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs); 2752 rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
2753 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min); 2753 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
2754 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max); 2754 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
2755 rt2x00usb_register_write(rt2x00dev, offset, reg); 2755 rt2800_register_write(rt2x00dev, offset, reg);
2756 2756
2757 return 0; 2757 return 0;
2758} 2758}
@@ -2763,9 +2763,9 @@ static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
2763 u64 tsf; 2763 u64 tsf;
2764 u32 reg; 2764 u32 reg;
2765 2765
2766 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW1, &reg); 2766 rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
2767 tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32; 2767 tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
2768 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW0, &reg); 2768 rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
2769 tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD); 2769 tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
2770 2770
2771 return tsf; 2771 return tsf;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 00:15:52 -0500