diff options
author | Igor Perminov <igor.perminov@inbox.ru> | 2009-08-09 18:58:54 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-08-14 09:13:55 -0400 |
commit | d6756d0dc220c3d12e2c4c06ca97d1dbcb5edf4e (patch) | |
tree | aaa10e86a291624fa71cde855860a7787bb49d2e /drivers/net/wireless/rt2x00/rt2500pci.c | |
parent | 3281d95d0535909e28ff16c38a678102e10f0312 (diff) |
rt2x00: Fix beacon de-synchronization while update beacon
When beacon is being updated to refresh TIM (AP mode), beacon frames are
de-synchronizing (i.e. two neighbor beacon frames - before and after
update - are being transmitted with a wrong time interval).
That is because xxx_write_beacon should disable beacon generation only
while beacon data are being uploaded to the device, but it should not
disable the beacon clock.
Signed-off-by: Igor Perminov <igor.perminov@inbox.ru>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2500pci.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2500pci.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c index 3b3171578b14..4186582f2770 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.c +++ b/drivers/net/wireless/rt2x00/rt2500pci.c | |||
@@ -1227,8 +1227,6 @@ static void rt2500pci_write_beacon(struct queue_entry *entry) | |||
1227 | * otherwise we might be sending out invalid data. | 1227 | * otherwise we might be sending out invalid data. |
1228 | */ | 1228 | */ |
1229 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | 1229 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); |
1230 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 0); | ||
1231 | rt2x00_set_field32(®, CSR14_TBCN, 0); | ||
1232 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); | 1230 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); |
1233 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); | 1231 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); |
1234 | 1232 | ||