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authorIvo van Doorn <ivdoorn@gmail.com>2008-02-17 11:33:24 -0500
committerJohn W. Linville <linville@tuxdriver.com>2008-02-29 15:37:22 -0500
commit30b3a23c2594e122e7086f97b5252a87eaf8a817 (patch)
tree6c97b928fce785471236543fe71bce3b6d0324cb /drivers/net/wireless/rt2x00/rt2500pci.c
parente542239f639fa4e7b13a949d39d44ff1eccf7e3a (diff)
rt2x00: Fix Descriptor DMA initialization
As Adam Baker reported the DMA address for the descriptor base was incorrectly initialized in the PCI drivers. Instead of the DMA base for the descriptor, the DMA base for the data was passed resulting in a broken TX/RX state for PCI drivers. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2500pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 3bf85604ca69..ec7300e4fc56 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -691,7 +691,7 @@ static void rt2500pci_init_rxentry(struct rt2x00_dev *rt2x00dev,
691 u32 word; 691 u32 word;
692 692
693 rt2x00_desc_read(priv_rx->desc, 1, &word); 693 rt2x00_desc_read(priv_rx->desc, 1, &word);
694 rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->dma); 694 rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->data_dma);
695 rt2x00_desc_write(priv_rx->desc, 1, word); 695 rt2x00_desc_write(priv_rx->desc, 1, word);
696 696
697 rt2x00_desc_read(priv_rx->desc, 0, &word); 697 rt2x00_desc_read(priv_rx->desc, 0, &word);
@@ -706,7 +706,7 @@ static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev,
706 u32 word; 706 u32 word;
707 707
708 rt2x00_desc_read(priv_tx->desc, 1, &word); 708 rt2x00_desc_read(priv_tx->desc, 1, &word);
709 rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->dma); 709 rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma);
710 rt2x00_desc_write(priv_tx->desc, 1, word); 710 rt2x00_desc_write(priv_tx->desc, 1, word);
711 711
712 rt2x00_desc_read(priv_tx->desc, 0, &word); 712 rt2x00_desc_read(priv_tx->desc, 0, &word);
@@ -733,22 +733,26 @@ static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev)
733 733
734 priv_tx = rt2x00dev->tx[1].entries[0].priv_data; 734 priv_tx = rt2x00dev->tx[1].entries[0].priv_data;
735 rt2x00pci_register_read(rt2x00dev, TXCSR3, &reg); 735 rt2x00pci_register_read(rt2x00dev, TXCSR3, &reg);
736 rt2x00_set_field32(&reg, TXCSR3_TX_RING_REGISTER, priv_tx->dma); 736 rt2x00_set_field32(&reg, TXCSR3_TX_RING_REGISTER,
737 priv_tx->desc_dma);
737 rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); 738 rt2x00pci_register_write(rt2x00dev, TXCSR3, reg);
738 739
739 priv_tx = rt2x00dev->tx[0].entries[0].priv_data; 740 priv_tx = rt2x00dev->tx[0].entries[0].priv_data;
740 rt2x00pci_register_read(rt2x00dev, TXCSR5, &reg); 741 rt2x00pci_register_read(rt2x00dev, TXCSR5, &reg);
741 rt2x00_set_field32(&reg, TXCSR5_PRIO_RING_REGISTER, priv_tx->dma); 742 rt2x00_set_field32(&reg, TXCSR5_PRIO_RING_REGISTER,
743 priv_tx->desc_dma);
742 rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); 744 rt2x00pci_register_write(rt2x00dev, TXCSR5, reg);
743 745
744 priv_tx = rt2x00dev->bcn[1].entries[0].priv_data; 746 priv_tx = rt2x00dev->bcn[1].entries[0].priv_data;
745 rt2x00pci_register_read(rt2x00dev, TXCSR4, &reg); 747 rt2x00pci_register_read(rt2x00dev, TXCSR4, &reg);
746 rt2x00_set_field32(&reg, TXCSR4_ATIM_RING_REGISTER, priv_tx->dma); 748 rt2x00_set_field32(&reg, TXCSR4_ATIM_RING_REGISTER,
749 priv_tx->desc_dma);
747 rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); 750 rt2x00pci_register_write(rt2x00dev, TXCSR4, reg);
748 751
749 priv_tx = rt2x00dev->bcn[0].entries[0].priv_data; 752 priv_tx = rt2x00dev->bcn[0].entries[0].priv_data;
750 rt2x00pci_register_read(rt2x00dev, TXCSR6, &reg); 753 rt2x00pci_register_read(rt2x00dev, TXCSR6, &reg);
751 rt2x00_set_field32(&reg, TXCSR6_BEACON_RING_REGISTER, priv_tx->dma); 754 rt2x00_set_field32(&reg, TXCSR6_BEACON_RING_REGISTER,
755 priv_tx->desc_dma);
752 rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); 756 rt2x00pci_register_write(rt2x00dev, TXCSR6, reg);
753 757
754 rt2x00pci_register_read(rt2x00dev, RXCSR1, &reg); 758 rt2x00pci_register_read(rt2x00dev, RXCSR1, &reg);
@@ -758,7 +762,7 @@ static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev)
758 762
759 priv_rx = rt2x00dev->rx->entries[0].priv_data; 763 priv_rx = rt2x00dev->rx->entries[0].priv_data;
760 rt2x00pci_register_read(rt2x00dev, RXCSR2, &reg); 764 rt2x00pci_register_read(rt2x00dev, RXCSR2, &reg);
761 rt2x00_set_field32(&reg, RXCSR2_RX_RING_REGISTER, priv_tx->dma); 765 rt2x00_set_field32(&reg, RXCSR2_RX_RING_REGISTER, priv_tx->desc_dma);
762 rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); 766 rt2x00pci_register_write(rt2x00dev, RXCSR2, reg);
763 767
764 return 0; 768 return 0;