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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/wireless/prism54/oid_mgt.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/net/wireless/prism54/oid_mgt.c')
-rw-r--r--drivers/net/wireless/prism54/oid_mgt.c907
1 files changed, 907 insertions, 0 deletions
diff --git a/drivers/net/wireless/prism54/oid_mgt.c b/drivers/net/wireless/prism54/oid_mgt.c
new file mode 100644
index 000000000000..12123e24b113
--- /dev/null
+++ b/drivers/net/wireless/prism54/oid_mgt.c
@@ -0,0 +1,907 @@
1/*
2 * Copyright (C) 2003,2004 Aurelien Alleaume <slts@free.fr>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 *
17 */
18
19#include "prismcompat.h"
20#include "islpci_dev.h"
21#include "islpci_mgt.h"
22#include "isl_oid.h"
23#include "oid_mgt.h"
24#include "isl_ioctl.h"
25
26/* to convert between channel and freq */
27static const int frequency_list_bg[] = { 2412, 2417, 2422, 2427, 2432,
28 2437, 2442, 2447, 2452, 2457, 2462, 2467, 2472, 2484
29};
30
31int
32channel_of_freq(int f)
33{
34 int c = 0;
35
36 if ((f >= 2412) && (f <= 2484)) {
37 while ((c < 14) && (f != frequency_list_bg[c]))
38 c++;
39 return (c >= 14) ? 0 : ++c;
40 } else if ((f >= (int) 5000) && (f <= (int) 6000)) {
41 return ( (f - 5000) / 5 );
42 } else
43 return 0;
44}
45
46#define OID_STRUCT(name,oid,s,t) [name] = {oid, 0, sizeof(s), t}
47#define OID_STRUCT_C(name,oid,s,t) OID_STRUCT(name,oid,s,t | OID_FLAG_CACHED)
48#define OID_U32(name,oid) OID_STRUCT(name,oid,u32,OID_TYPE_U32)
49#define OID_U32_C(name,oid) OID_STRUCT_C(name,oid,u32,OID_TYPE_U32)
50#define OID_STRUCT_MLME(name,oid) OID_STRUCT(name,oid,struct obj_mlme,OID_TYPE_MLME)
51#define OID_STRUCT_MLMEEX(name,oid) OID_STRUCT(name,oid,struct obj_mlmeex,OID_TYPE_MLMEEX)
52
53#define OID_UNKNOWN(name,oid) OID_STRUCT(name,oid,0,0)
54
55struct oid_t isl_oid[] = {
56 OID_STRUCT(GEN_OID_MACADDRESS, 0x00000000, u8[6], OID_TYPE_ADDR),
57 OID_U32(GEN_OID_LINKSTATE, 0x00000001),
58 OID_UNKNOWN(GEN_OID_WATCHDOG, 0x00000002),
59 OID_UNKNOWN(GEN_OID_MIBOP, 0x00000003),
60 OID_UNKNOWN(GEN_OID_OPTIONS, 0x00000004),
61 OID_UNKNOWN(GEN_OID_LEDCONFIG, 0x00000005),
62
63 /* 802.11 */
64 OID_U32_C(DOT11_OID_BSSTYPE, 0x10000000),
65 OID_STRUCT_C(DOT11_OID_BSSID, 0x10000001, u8[6], OID_TYPE_RAW),
66 OID_STRUCT_C(DOT11_OID_SSID, 0x10000002, struct obj_ssid,
67 OID_TYPE_SSID),
68 OID_U32(DOT11_OID_STATE, 0x10000003),
69 OID_U32(DOT11_OID_AID, 0x10000004),
70 OID_STRUCT(DOT11_OID_COUNTRYSTRING, 0x10000005, u8[4], OID_TYPE_RAW),
71 OID_STRUCT_C(DOT11_OID_SSIDOVERRIDE, 0x10000006, struct obj_ssid,
72 OID_TYPE_SSID),
73
74 OID_U32(DOT11_OID_MEDIUMLIMIT, 0x11000000),
75 OID_U32_C(DOT11_OID_BEACONPERIOD, 0x11000001),
76 OID_U32(DOT11_OID_DTIMPERIOD, 0x11000002),
77 OID_U32(DOT11_OID_ATIMWINDOW, 0x11000003),
78 OID_U32(DOT11_OID_LISTENINTERVAL, 0x11000004),
79 OID_U32(DOT11_OID_CFPPERIOD, 0x11000005),
80 OID_U32(DOT11_OID_CFPDURATION, 0x11000006),
81
82 OID_U32_C(DOT11_OID_AUTHENABLE, 0x12000000),
83 OID_U32_C(DOT11_OID_PRIVACYINVOKED, 0x12000001),
84 OID_U32_C(DOT11_OID_EXUNENCRYPTED, 0x12000002),
85 OID_U32_C(DOT11_OID_DEFKEYID, 0x12000003),
86 [DOT11_OID_DEFKEYX] = {0x12000004, 3, sizeof (struct obj_key),
87 OID_FLAG_CACHED | OID_TYPE_KEY}, /* DOT11_OID_DEFKEY1,...DOT11_OID_DEFKEY4 */
88 OID_UNKNOWN(DOT11_OID_STAKEY, 0x12000008),
89 OID_U32(DOT11_OID_REKEYTHRESHOLD, 0x12000009),
90 OID_UNKNOWN(DOT11_OID_STASC, 0x1200000a),
91
92 OID_U32(DOT11_OID_PRIVTXREJECTED, 0x1a000000),
93 OID_U32(DOT11_OID_PRIVRXPLAIN, 0x1a000001),
94 OID_U32(DOT11_OID_PRIVRXFAILED, 0x1a000002),
95 OID_U32(DOT11_OID_PRIVRXNOKEY, 0x1a000003),
96
97 OID_U32_C(DOT11_OID_RTSTHRESH, 0x13000000),
98 OID_U32_C(DOT11_OID_FRAGTHRESH, 0x13000001),
99 OID_U32_C(DOT11_OID_SHORTRETRIES, 0x13000002),
100 OID_U32_C(DOT11_OID_LONGRETRIES, 0x13000003),
101 OID_U32_C(DOT11_OID_MAXTXLIFETIME, 0x13000004),
102 OID_U32(DOT11_OID_MAXRXLIFETIME, 0x13000005),
103 OID_U32(DOT11_OID_AUTHRESPTIMEOUT, 0x13000006),
104 OID_U32(DOT11_OID_ASSOCRESPTIMEOUT, 0x13000007),
105
106 OID_UNKNOWN(DOT11_OID_ALOFT_TABLE, 0x1d000000),
107 OID_UNKNOWN(DOT11_OID_ALOFT_CTRL_TABLE, 0x1d000001),
108 OID_UNKNOWN(DOT11_OID_ALOFT_RETREAT, 0x1d000002),
109 OID_UNKNOWN(DOT11_OID_ALOFT_PROGRESS, 0x1d000003),
110 OID_U32(DOT11_OID_ALOFT_FIXEDRATE, 0x1d000004),
111 OID_UNKNOWN(DOT11_OID_ALOFT_RSSIGRAPH, 0x1d000005),
112 OID_UNKNOWN(DOT11_OID_ALOFT_CONFIG, 0x1d000006),
113
114 [DOT11_OID_VDCFX] = {0x1b000000, 7, 0, 0},
115 OID_U32(DOT11_OID_MAXFRAMEBURST, 0x1b000008),
116
117 OID_U32(DOT11_OID_PSM, 0x14000000),
118 OID_U32(DOT11_OID_CAMTIMEOUT, 0x14000001),
119 OID_U32(DOT11_OID_RECEIVEDTIMS, 0x14000002),
120 OID_U32(DOT11_OID_ROAMPREFERENCE, 0x14000003),
121
122 OID_U32(DOT11_OID_BRIDGELOCAL, 0x15000000),
123 OID_U32(DOT11_OID_CLIENTS, 0x15000001),
124 OID_U32(DOT11_OID_CLIENTSASSOCIATED, 0x15000002),
125 [DOT11_OID_CLIENTX] = {0x15000003, 2006, 0, 0}, /* DOT11_OID_CLIENTX,...DOT11_OID_CLIENT2007 */
126
127 OID_STRUCT(DOT11_OID_CLIENTFIND, 0x150007DB, u8[6], OID_TYPE_ADDR),
128 OID_STRUCT(DOT11_OID_WDSLINKADD, 0x150007DC, u8[6], OID_TYPE_ADDR),
129 OID_STRUCT(DOT11_OID_WDSLINKREMOVE, 0x150007DD, u8[6], OID_TYPE_ADDR),
130 OID_STRUCT(DOT11_OID_EAPAUTHSTA, 0x150007DE, u8[6], OID_TYPE_ADDR),
131 OID_STRUCT(DOT11_OID_EAPUNAUTHSTA, 0x150007DF, u8[6], OID_TYPE_ADDR),
132 OID_U32_C(DOT11_OID_DOT1XENABLE, 0x150007E0),
133 OID_UNKNOWN(DOT11_OID_MICFAILURE, 0x150007E1),
134 OID_UNKNOWN(DOT11_OID_REKEYINDICATE, 0x150007E2),
135
136 OID_U32(DOT11_OID_MPDUTXSUCCESSFUL, 0x16000000),
137 OID_U32(DOT11_OID_MPDUTXONERETRY, 0x16000001),
138 OID_U32(DOT11_OID_MPDUTXMULTIPLERETRIES, 0x16000002),
139 OID_U32(DOT11_OID_MPDUTXFAILED, 0x16000003),
140 OID_U32(DOT11_OID_MPDURXSUCCESSFUL, 0x16000004),
141 OID_U32(DOT11_OID_MPDURXDUPS, 0x16000005),
142 OID_U32(DOT11_OID_RTSSUCCESSFUL, 0x16000006),
143 OID_U32(DOT11_OID_RTSFAILED, 0x16000007),
144 OID_U32(DOT11_OID_ACKFAILED, 0x16000008),
145 OID_U32(DOT11_OID_FRAMERECEIVES, 0x16000009),
146 OID_U32(DOT11_OID_FRAMEERRORS, 0x1600000A),
147 OID_U32(DOT11_OID_FRAMEABORTS, 0x1600000B),
148 OID_U32(DOT11_OID_FRAMEABORTSPHY, 0x1600000C),
149
150 OID_U32(DOT11_OID_SLOTTIME, 0x17000000),
151 OID_U32(DOT11_OID_CWMIN, 0x17000001),
152 OID_U32(DOT11_OID_CWMAX, 0x17000002),
153 OID_U32(DOT11_OID_ACKWINDOW, 0x17000003),
154 OID_U32(DOT11_OID_ANTENNARX, 0x17000004),
155 OID_U32(DOT11_OID_ANTENNATX, 0x17000005),
156 OID_U32(DOT11_OID_ANTENNADIVERSITY, 0x17000006),
157 OID_U32_C(DOT11_OID_CHANNEL, 0x17000007),
158 OID_U32_C(DOT11_OID_EDTHRESHOLD, 0x17000008),
159 OID_U32(DOT11_OID_PREAMBLESETTINGS, 0x17000009),
160 OID_STRUCT(DOT11_OID_RATES, 0x1700000A, u8[IWMAX_BITRATES + 1],
161 OID_TYPE_RAW),
162 OID_U32(DOT11_OID_CCAMODESUPPORTED, 0x1700000B),
163 OID_U32(DOT11_OID_CCAMODE, 0x1700000C),
164 OID_UNKNOWN(DOT11_OID_RSSIVECTOR, 0x1700000D),
165 OID_UNKNOWN(DOT11_OID_OUTPUTPOWERTABLE, 0x1700000E),
166 OID_U32(DOT11_OID_OUTPUTPOWER, 0x1700000F),
167 OID_STRUCT(DOT11_OID_SUPPORTEDRATES, 0x17000010,
168 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
169 OID_U32_C(DOT11_OID_FREQUENCY, 0x17000011),
170 [DOT11_OID_SUPPORTEDFREQUENCIES] =
171 {0x17000012, 0, sizeof (struct obj_frequencies)
172 + sizeof (u16) * IWMAX_FREQ, OID_TYPE_FREQUENCIES},
173
174 OID_U32(DOT11_OID_NOISEFLOOR, 0x17000013),
175 OID_STRUCT(DOT11_OID_FREQUENCYACTIVITY, 0x17000014, u8[IWMAX_FREQ + 1],
176 OID_TYPE_RAW),
177 OID_UNKNOWN(DOT11_OID_IQCALIBRATIONTABLE, 0x17000015),
178 OID_U32(DOT11_OID_NONERPPROTECTION, 0x17000016),
179 OID_U32(DOT11_OID_SLOTSETTINGS, 0x17000017),
180 OID_U32(DOT11_OID_NONERPTIMEOUT, 0x17000018),
181 OID_U32(DOT11_OID_PROFILES, 0x17000019),
182 OID_STRUCT(DOT11_OID_EXTENDEDRATES, 0x17000020,
183 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
184
185 OID_STRUCT_MLME(DOT11_OID_DEAUTHENTICATE, 0x18000000),
186 OID_STRUCT_MLME(DOT11_OID_AUTHENTICATE, 0x18000001),
187 OID_STRUCT_MLME(DOT11_OID_DISASSOCIATE, 0x18000002),
188 OID_STRUCT_MLME(DOT11_OID_ASSOCIATE, 0x18000003),
189 OID_UNKNOWN(DOT11_OID_SCAN, 0x18000004),
190 OID_STRUCT_MLMEEX(DOT11_OID_BEACON, 0x18000005),
191 OID_STRUCT_MLMEEX(DOT11_OID_PROBE, 0x18000006),
192 OID_STRUCT_MLMEEX(DOT11_OID_DEAUTHENTICATEEX, 0x18000007),
193 OID_STRUCT_MLMEEX(DOT11_OID_AUTHENTICATEEX, 0x18000008),
194 OID_STRUCT_MLMEEX(DOT11_OID_DISASSOCIATEEX, 0x18000009),
195 OID_STRUCT_MLMEEX(DOT11_OID_ASSOCIATEEX, 0x1800000A),
196 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATE, 0x1800000B),
197 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATEEX, 0x1800000C),
198
199 OID_U32(DOT11_OID_NONERPSTATUS, 0x1E000000),
200
201 OID_U32(DOT11_OID_STATIMEOUT, 0x19000000),
202 OID_U32_C(DOT11_OID_MLMEAUTOLEVEL, 0x19000001),
203 OID_U32(DOT11_OID_BSSTIMEOUT, 0x19000002),
204 [DOT11_OID_ATTACHMENT] = {0x19000003, 0,
205 sizeof(struct obj_attachment), OID_TYPE_ATTACH},
206 OID_STRUCT_C(DOT11_OID_PSMBUFFER, 0x19000004, struct obj_buffer,
207 OID_TYPE_BUFFER),
208
209 OID_U32(DOT11_OID_BSSS, 0x1C000000),
210 [DOT11_OID_BSSX] = {0x1C000001, 63, sizeof (struct obj_bss),
211 OID_TYPE_BSS}, /*DOT11_OID_BSS1,...,DOT11_OID_BSS64 */
212 OID_STRUCT(DOT11_OID_BSSFIND, 0x1C000042, struct obj_bss, OID_TYPE_BSS),
213 [DOT11_OID_BSSLIST] = {0x1C000043, 0, sizeof (struct
214 obj_bsslist) +
215 sizeof (struct obj_bss[IWMAX_BSS]),
216 OID_TYPE_BSSLIST},
217
218 OID_UNKNOWN(OID_INL_TUNNEL, 0xFF020000),
219 OID_UNKNOWN(OID_INL_MEMADDR, 0xFF020001),
220 OID_UNKNOWN(OID_INL_MEMORY, 0xFF020002),
221 OID_U32_C(OID_INL_MODE, 0xFF020003),
222 OID_UNKNOWN(OID_INL_COMPONENT_NR, 0xFF020004),
223 OID_STRUCT(OID_INL_VERSION, 0xFF020005, u8[8], OID_TYPE_RAW),
224 OID_UNKNOWN(OID_INL_INTERFACE_ID, 0xFF020006),
225 OID_UNKNOWN(OID_INL_COMPONENT_ID, 0xFF020007),
226 OID_U32_C(OID_INL_CONFIG, 0xFF020008),
227 OID_U32_C(OID_INL_DOT11D_CONFORMANCE, 0xFF02000C),
228 OID_U32(OID_INL_PHYCAPABILITIES, 0xFF02000D),
229 OID_U32_C(OID_INL_OUTPUTPOWER, 0xFF02000F),
230
231};
232
233int
234mgt_init(islpci_private *priv)
235{
236 int i;
237
238 priv->mib = kmalloc(OID_NUM_LAST * sizeof (void *), GFP_KERNEL);
239 if (!priv->mib)
240 return -ENOMEM;
241
242 memset(priv->mib, 0, OID_NUM_LAST * sizeof (void *));
243
244 /* Alloc the cache */
245 for (i = 0; i < OID_NUM_LAST; i++) {
246 if (isl_oid[i].flags & OID_FLAG_CACHED) {
247 priv->mib[i] = kmalloc(isl_oid[i].size *
248 (isl_oid[i].range + 1),
249 GFP_KERNEL);
250 if (!priv->mib[i])
251 return -ENOMEM;
252 memset(priv->mib[i], 0,
253 isl_oid[i].size * (isl_oid[i].range + 1));
254 } else
255 priv->mib[i] = NULL;
256 }
257
258 init_rwsem(&priv->mib_sem);
259 prism54_mib_init(priv);
260
261 return 0;
262}
263
264void
265mgt_clean(islpci_private *priv)
266{
267 int i;
268
269 if (!priv->mib)
270 return;
271 for (i = 0; i < OID_NUM_LAST; i++)
272 if (priv->mib[i]) {
273 kfree(priv->mib[i]);
274 priv->mib[i] = NULL;
275 }
276 kfree(priv->mib);
277 priv->mib = NULL;
278}
279
280void
281mgt_le_to_cpu(int type, void *data)
282{
283 switch (type) {
284 case OID_TYPE_U32:
285 *(u32 *) data = le32_to_cpu(*(u32 *) data);
286 break;
287 case OID_TYPE_BUFFER:{
288 struct obj_buffer *buff = data;
289 buff->size = le32_to_cpu(buff->size);
290 buff->addr = le32_to_cpu(buff->addr);
291 break;
292 }
293 case OID_TYPE_BSS:{
294 struct obj_bss *bss = data;
295 bss->age = le16_to_cpu(bss->age);
296 bss->channel = le16_to_cpu(bss->channel);
297 bss->capinfo = le16_to_cpu(bss->capinfo);
298 bss->rates = le16_to_cpu(bss->rates);
299 bss->basic_rates = le16_to_cpu(bss->basic_rates);
300 break;
301 }
302 case OID_TYPE_BSSLIST:{
303 struct obj_bsslist *list = data;
304 int i;
305 list->nr = le32_to_cpu(list->nr);
306 for (i = 0; i < list->nr; i++)
307 mgt_le_to_cpu(OID_TYPE_BSS, &list->bsslist[i]);
308 break;
309 }
310 case OID_TYPE_FREQUENCIES:{
311 struct obj_frequencies *freq = data;
312 int i;
313 freq->nr = le16_to_cpu(freq->nr);
314 for (i = 0; i < freq->nr; i++)
315 freq->mhz[i] = le16_to_cpu(freq->mhz[i]);
316 break;
317 }
318 case OID_TYPE_MLME:{
319 struct obj_mlme *mlme = data;
320 mlme->id = le16_to_cpu(mlme->id);
321 mlme->state = le16_to_cpu(mlme->state);
322 mlme->code = le16_to_cpu(mlme->code);
323 break;
324 }
325 case OID_TYPE_MLMEEX:{
326 struct obj_mlmeex *mlme = data;
327 mlme->id = le16_to_cpu(mlme->id);
328 mlme->state = le16_to_cpu(mlme->state);
329 mlme->code = le16_to_cpu(mlme->code);
330 mlme->size = le16_to_cpu(mlme->size);
331 break;
332 }
333 case OID_TYPE_ATTACH:{
334 struct obj_attachment *attach = data;
335 attach->id = le16_to_cpu(attach->id);
336 attach->size = le16_to_cpu(attach->size);;
337 break;
338 }
339 case OID_TYPE_SSID:
340 case OID_TYPE_KEY:
341 case OID_TYPE_ADDR:
342 case OID_TYPE_RAW:
343 break;
344 default:
345 BUG();
346 }
347}
348
349static void
350mgt_cpu_to_le(int type, void *data)
351{
352 switch (type) {
353 case OID_TYPE_U32:
354 *(u32 *) data = cpu_to_le32(*(u32 *) data);
355 break;
356 case OID_TYPE_BUFFER:{
357 struct obj_buffer *buff = data;
358 buff->size = cpu_to_le32(buff->size);
359 buff->addr = cpu_to_le32(buff->addr);
360 break;
361 }
362 case OID_TYPE_BSS:{
363 struct obj_bss *bss = data;
364 bss->age = cpu_to_le16(bss->age);
365 bss->channel = cpu_to_le16(bss->channel);
366 bss->capinfo = cpu_to_le16(bss->capinfo);
367 bss->rates = cpu_to_le16(bss->rates);
368 bss->basic_rates = cpu_to_le16(bss->basic_rates);
369 break;
370 }
371 case OID_TYPE_BSSLIST:{
372 struct obj_bsslist *list = data;
373 int i;
374 list->nr = cpu_to_le32(list->nr);
375 for (i = 0; i < list->nr; i++)
376 mgt_cpu_to_le(OID_TYPE_BSS, &list->bsslist[i]);
377 break;
378 }
379 case OID_TYPE_FREQUENCIES:{
380 struct obj_frequencies *freq = data;
381 int i;
382 freq->nr = cpu_to_le16(freq->nr);
383 for (i = 0; i < freq->nr; i++)
384 freq->mhz[i] = cpu_to_le16(freq->mhz[i]);
385 break;
386 }
387 case OID_TYPE_MLME:{
388 struct obj_mlme *mlme = data;
389 mlme->id = cpu_to_le16(mlme->id);
390 mlme->state = cpu_to_le16(mlme->state);
391 mlme->code = cpu_to_le16(mlme->code);
392 break;
393 }
394 case OID_TYPE_MLMEEX:{
395 struct obj_mlmeex *mlme = data;
396 mlme->id = cpu_to_le16(mlme->id);
397 mlme->state = cpu_to_le16(mlme->state);
398 mlme->code = cpu_to_le16(mlme->code);
399 mlme->size = cpu_to_le16(mlme->size);
400 break;
401 }
402 case OID_TYPE_ATTACH:{
403 struct obj_attachment *attach = data;
404 attach->id = cpu_to_le16(attach->id);
405 attach->size = cpu_to_le16(attach->size);;
406 break;
407 }
408 case OID_TYPE_SSID:
409 case OID_TYPE_KEY:
410 case OID_TYPE_ADDR:
411 case OID_TYPE_RAW:
412 break;
413 default:
414 BUG();
415 }
416}
417
418/* Note : data is modified during this function */
419
420int
421mgt_set_request(islpci_private *priv, enum oid_num_t n, int extra, void *data)
422{
423 int ret = 0;
424 struct islpci_mgmtframe *response = NULL;
425 int response_op = PIMFOR_OP_ERROR;
426 int dlen;
427 void *cache, *_data = data;
428 u32 oid;
429
430 BUG_ON(OID_NUM_LAST <= n);
431 BUG_ON(extra > isl_oid[n].range);
432
433 if (!priv->mib)
434 /* memory has been freed */
435 return -1;
436
437 dlen = isl_oid[n].size;
438 cache = priv->mib[n];
439 cache += (cache ? extra * dlen : 0);
440 oid = isl_oid[n].oid + extra;
441
442 if (_data == NULL)
443 /* we are requested to re-set a cached value */
444 _data = cache;
445 else
446 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, _data);
447 /* If we are going to write to the cache, we don't want anyone to read
448 * it -> acquire write lock.
449 * Else we could acquire a read lock to be sure we don't bother the
450 * commit process (which takes a write lock). But I'm not sure if it's
451 * needed.
452 */
453 if (cache)
454 down_write(&priv->mib_sem);
455
456 if (islpci_get_state(priv) >= PRV_STATE_READY) {
457 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
458 _data, dlen, &response);
459 if (!ret) {
460 response_op = response->header->operation;
461 islpci_mgt_release(response);
462 }
463 if (ret || response_op == PIMFOR_OP_ERROR)
464 ret = -EIO;
465 } else if (!cache)
466 ret = -EIO;
467
468 if (cache) {
469 if (!ret && data)
470 memcpy(cache, _data, dlen);
471 up_write(&priv->mib_sem);
472 }
473
474 /* re-set given data to what it was */
475 if (data)
476 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, data);
477
478 return ret;
479}
480
481/* None of these are cached */
482int
483mgt_set_varlen(islpci_private *priv, enum oid_num_t n, void *data, int extra_len)
484{
485 int ret = 0;
486 struct islpci_mgmtframe *response;
487 int response_op = PIMFOR_OP_ERROR;
488 int dlen;
489 u32 oid;
490
491 BUG_ON(OID_NUM_LAST <= n);
492
493 dlen = isl_oid[n].size;
494 oid = isl_oid[n].oid;
495
496 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, data);
497
498 if (islpci_get_state(priv) >= PRV_STATE_READY) {
499 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
500 data, dlen + extra_len, &response);
501 if (!ret) {
502 response_op = response->header->operation;
503 islpci_mgt_release(response);
504 }
505 if (ret || response_op == PIMFOR_OP_ERROR)
506 ret = -EIO;
507 } else
508 ret = -EIO;
509
510 /* re-set given data to what it was */
511 if (data)
512 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, data);
513
514 return ret;
515}
516
517int
518mgt_get_request(islpci_private *priv, enum oid_num_t n, int extra, void *data,
519 union oid_res_t *res)
520{
521
522 int ret = -EIO;
523 int reslen = 0;
524 struct islpci_mgmtframe *response = NULL;
525
526 int dlen;
527 void *cache, *_res = NULL;
528 u32 oid;
529
530 BUG_ON(OID_NUM_LAST <= n);
531 BUG_ON(extra > isl_oid[n].range);
532
533 res->ptr = NULL;
534
535 if (!priv->mib)
536 /* memory has been freed */
537 return -1;
538
539 dlen = isl_oid[n].size;
540 cache = priv->mib[n];
541 cache += cache ? extra * dlen : 0;
542 oid = isl_oid[n].oid + extra;
543 reslen = dlen;
544
545 if (cache)
546 down_read(&priv->mib_sem);
547
548 if (islpci_get_state(priv) >= PRV_STATE_READY) {
549 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
550 oid, data, dlen, &response);
551 if (ret || !response ||
552 response->header->operation == PIMFOR_OP_ERROR) {
553 if (response)
554 islpci_mgt_release(response);
555 ret = -EIO;
556 }
557 if (!ret) {
558 _res = response->data;
559 reslen = response->header->length;
560 }
561 } else if (cache) {
562 _res = cache;
563 ret = 0;
564 }
565 if ((isl_oid[n].flags & OID_FLAG_TYPE) == OID_TYPE_U32)
566 res->u = ret ? 0 : le32_to_cpu(*(u32 *) _res);
567 else {
568 res->ptr = kmalloc(reslen, GFP_KERNEL);
569 BUG_ON(res->ptr == NULL);
570 if (ret)
571 memset(res->ptr, 0, reslen);
572 else {
573 memcpy(res->ptr, _res, reslen);
574 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE,
575 res->ptr);
576 }
577 }
578 if (cache)
579 up_read(&priv->mib_sem);
580
581 if (response && !ret)
582 islpci_mgt_release(response);
583
584 if (reslen > isl_oid[n].size)
585 printk(KERN_DEBUG
586 "mgt_get_request(0x%x): received data length was bigger "
587 "than expected (%d > %d). Memory is probably corrupted...",
588 oid, reslen, isl_oid[n].size);
589
590 return ret;
591}
592
593/* lock outside */
594int
595mgt_commit_list(islpci_private *priv, enum oid_num_t *l, int n)
596{
597 int i, ret = 0;
598 struct islpci_mgmtframe *response;
599
600 for (i = 0; i < n; i++) {
601 struct oid_t *t = &(isl_oid[l[i]]);
602 void *data = priv->mib[l[i]];
603 int j = 0;
604 u32 oid = t->oid;
605 BUG_ON(data == NULL);
606 while (j <= t->range) {
607 int r = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET,
608 oid, data, t->size,
609 &response);
610 if (response) {
611 r |= (response->header->operation == PIMFOR_OP_ERROR);
612 islpci_mgt_release(response);
613 }
614 if (r)
615 printk(KERN_ERR "%s: mgt_commit_list: failure. "
616 "oid=%08x err=%d\n",
617 priv->ndev->name, oid, r);
618 ret |= r;
619 j++;
620 oid++;
621 data += t->size;
622 }
623 }
624 return ret;
625}
626
627/* Lock outside */
628
629void
630mgt_set(islpci_private *priv, enum oid_num_t n, void *data)
631{
632 BUG_ON(OID_NUM_LAST <= n);
633 BUG_ON(priv->mib[n] == NULL);
634
635 memcpy(priv->mib[n], data, isl_oid[n].size);
636 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, priv->mib[n]);
637}
638
639void
640mgt_get(islpci_private *priv, enum oid_num_t n, void *res)
641{
642 BUG_ON(OID_NUM_LAST <= n);
643 BUG_ON(priv->mib[n] == NULL);
644 BUG_ON(res == NULL);
645
646 memcpy(res, priv->mib[n], isl_oid[n].size);
647 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, res);
648}
649
650/* Commits the cache. Lock outside. */
651
652static enum oid_num_t commit_part1[] = {
653 OID_INL_CONFIG,
654 OID_INL_MODE,
655 DOT11_OID_BSSTYPE,
656 DOT11_OID_CHANNEL,
657 DOT11_OID_MLMEAUTOLEVEL
658};
659
660static enum oid_num_t commit_part2[] = {
661 DOT11_OID_SSID,
662 DOT11_OID_PSMBUFFER,
663 DOT11_OID_AUTHENABLE,
664 DOT11_OID_PRIVACYINVOKED,
665 DOT11_OID_EXUNENCRYPTED,
666 DOT11_OID_DEFKEYX, /* MULTIPLE */
667 DOT11_OID_DEFKEYID,
668 DOT11_OID_DOT1XENABLE,
669 OID_INL_DOT11D_CONFORMANCE,
670 /* Do not initialize this - fw < 1.0.4.3 rejects it
671 OID_INL_OUTPUTPOWER,
672 */
673};
674
675/* update the MAC addr. */
676static int
677mgt_update_addr(islpci_private *priv)
678{
679 struct islpci_mgmtframe *res;
680 int ret;
681
682 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
683 isl_oid[GEN_OID_MACADDRESS].oid, NULL,
684 isl_oid[GEN_OID_MACADDRESS].size, &res);
685
686 if ((ret == 0) && res && (res->header->operation != PIMFOR_OP_ERROR))
687 memcpy(priv->ndev->dev_addr, res->data, 6);
688 else
689 ret = -EIO;
690 if (res)
691 islpci_mgt_release(res);
692
693 if (ret)
694 printk(KERN_ERR "%s: mgt_update_addr: failure\n", priv->ndev->name);
695 return ret;
696}
697
698#define VEC_SIZE(a) (sizeof(a)/sizeof(a[0]))
699
700int
701mgt_commit(islpci_private *priv)
702{
703 int rvalue;
704 u32 u;
705
706 if (islpci_get_state(priv) < PRV_STATE_INIT)
707 return 0;
708
709 rvalue = mgt_commit_list(priv, commit_part1, VEC_SIZE(commit_part1));
710
711 if (priv->iw_mode != IW_MODE_MONITOR)
712 rvalue |= mgt_commit_list(priv, commit_part2, VEC_SIZE(commit_part2));
713
714 u = OID_INL_MODE;
715 rvalue |= mgt_commit_list(priv, &u, 1);
716 rvalue |= mgt_update_addr(priv);
717
718 if (rvalue) {
719 /* some request have failed. The device might be in an
720 incoherent state. We should reset it ! */
721 printk(KERN_DEBUG "%s: mgt_commit: failure\n", priv->ndev->name);
722 }
723 return rvalue;
724}
725
726/* The following OIDs need to be "unlatched":
727 *
728 * MEDIUMLIMIT,BEACONPERIOD,DTIMPERIOD,ATIMWINDOW,LISTENINTERVAL
729 * FREQUENCY,EXTENDEDRATES.
730 *
731 * The way to do this is to set ESSID. Note though that they may get
732 * unlatch before though by setting another OID. */
733#if 0
734void
735mgt_unlatch_all(islpci_private *priv)
736{
737 u32 u;
738 int rvalue = 0;
739
740 if (islpci_get_state(priv) < PRV_STATE_INIT)
741 return;
742
743 u = DOT11_OID_SSID;
744 rvalue = mgt_commit_list(priv, &u, 1);
745 /* Necessary if in MANUAL RUN mode? */
746#if 0
747 u = OID_INL_MODE;
748 rvalue |= mgt_commit_list(priv, &u, 1);
749
750 u = DOT11_OID_MLMEAUTOLEVEL;
751 rvalue |= mgt_commit_list(priv, &u, 1);
752
753 u = OID_INL_MODE;
754 rvalue |= mgt_commit_list(priv, &u, 1);
755#endif
756
757 if (rvalue)
758 printk(KERN_DEBUG "%s: Unlatching OIDs failed\n", priv->ndev->name);
759}
760#endif
761
762/* This will tell you if you are allowed to answer a mlme(ex) request .*/
763
764int
765mgt_mlme_answer(islpci_private *priv)
766{
767 u32 mlmeautolevel;
768 /* Acquire a read lock because if we are in a mode change, it's
769 * possible to answer true, while the card is leaving master to managed
770 * mode. Answering to a mlme in this situation could hang the card.
771 */
772 down_read(&priv->mib_sem);
773 mlmeautolevel =
774 le32_to_cpu(*(u32 *) priv->mib[DOT11_OID_MLMEAUTOLEVEL]);
775 up_read(&priv->mib_sem);
776
777 return ((priv->iw_mode == IW_MODE_MASTER) &&
778 (mlmeautolevel >= DOT11_MLME_INTERMEDIATE));
779}
780
781enum oid_num_t
782mgt_oidtonum(u32 oid)
783{
784 int i;
785
786 for (i = 0; i < OID_NUM_LAST; i++)
787 if (isl_oid[i].oid == oid)
788 return i;
789
790 printk(KERN_DEBUG "looking for an unknown oid 0x%x", oid);
791
792 return OID_NUM_LAST;
793}
794
795int
796mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
797{
798 switch (isl_oid[n].flags & OID_FLAG_TYPE) {
799 case OID_TYPE_U32:
800 return snprintf(str, PRIV_STR_SIZE, "%u\n", r->u);
801 break;
802 case OID_TYPE_BUFFER:{
803 struct obj_buffer *buff = r->ptr;
804 return snprintf(str, PRIV_STR_SIZE,
805 "size=%u\naddr=0x%X\n", buff->size,
806 buff->addr);
807 }
808 break;
809 case OID_TYPE_BSS:{
810 struct obj_bss *bss = r->ptr;
811 return snprintf(str, PRIV_STR_SIZE,
812 "age=%u\nchannel=%u\n"
813 "capinfo=0x%X\nrates=0x%X\n"
814 "basic_rates=0x%X\n", bss->age,
815 bss->channel, bss->capinfo,
816 bss->rates, bss->basic_rates);
817 }
818 break;
819 case OID_TYPE_BSSLIST:{
820 struct obj_bsslist *list = r->ptr;
821 int i, k;
822 k = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr);
823 for (i = 0; i < list->nr; i++)
824 k += snprintf(str + k, PRIV_STR_SIZE - k,
825 "bss[%u] : \nage=%u\nchannel=%u\n"
826 "capinfo=0x%X\nrates=0x%X\n"
827 "basic_rates=0x%X\n",
828 i, list->bsslist[i].age,
829 list->bsslist[i].channel,
830 list->bsslist[i].capinfo,
831 list->bsslist[i].rates,
832 list->bsslist[i].basic_rates);
833 return k;
834 }
835 break;
836 case OID_TYPE_FREQUENCIES:{
837 struct obj_frequencies *freq = r->ptr;
838 int i, t;
839 printk("nr : %u\n", freq->nr);
840 t = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr);
841 for (i = 0; i < freq->nr; i++)
842 t += snprintf(str + t, PRIV_STR_SIZE - t,
843 "mhz[%u]=%u\n", i, freq->mhz[i]);
844 return t;
845 }
846 break;
847 case OID_TYPE_MLME:{
848 struct obj_mlme *mlme = r->ptr;
849 return snprintf(str, PRIV_STR_SIZE,
850 "id=0x%X\nstate=0x%X\ncode=0x%X\n",
851 mlme->id, mlme->state, mlme->code);
852 }
853 break;
854 case OID_TYPE_MLMEEX:{
855 struct obj_mlmeex *mlme = r->ptr;
856 return snprintf(str, PRIV_STR_SIZE,
857 "id=0x%X\nstate=0x%X\n"
858 "code=0x%X\nsize=0x%X\n", mlme->id,
859 mlme->state, mlme->code, mlme->size);
860 }
861 break;
862 case OID_TYPE_ATTACH:{
863 struct obj_attachment *attach = r->ptr;
864 return snprintf(str, PRIV_STR_SIZE,
865 "id=%d\nsize=%d\n",
866 attach->id,
867 attach->size);
868 }
869 break;
870 case OID_TYPE_SSID:{
871 struct obj_ssid *ssid = r->ptr;
872 return snprintf(str, PRIV_STR_SIZE,
873 "length=%u\noctets=%.*s\n",
874 ssid->length, ssid->length,
875 ssid->octets);
876 }
877 break;
878 case OID_TYPE_KEY:{
879 struct obj_key *key = r->ptr;
880 int t, i;
881 t = snprintf(str, PRIV_STR_SIZE,
882 "type=0x%X\nlength=0x%X\nkey=0x",
883 key->type, key->length);
884 for (i = 0; i < key->length; i++)
885 t += snprintf(str + t, PRIV_STR_SIZE - t,
886 "%02X:", key->key[i]);
887 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
888 return t;
889 }
890 break;
891 case OID_TYPE_RAW:
892 case OID_TYPE_ADDR:{
893 unsigned char *buff = r->ptr;
894 int t, i;
895 t = snprintf(str, PRIV_STR_SIZE, "hex data=");
896 for (i = 0; i < isl_oid[n].size; i++)
897 t += snprintf(str + t, PRIV_STR_SIZE - t,
898 "%02X:", buff[i]);
899 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
900 return t;
901 }
902 break;
903 default:
904 BUG();
905 }
906 return 0;
907}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 18:38:38 -0500