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authorChristian Lamparter <chunkeey@web.de>2009-06-23 11:39:45 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-07-10 15:02:24 -0400
commitd8c9210757605c5191d2d9f4e09be5e59ceac824 (patch)
tree45f0b0c76771c40e14ec49807247ea5ec27439f7 /drivers/net/wireless/p54
parent0a5fb84f6b62bca8352f0aad045118e47340b096 (diff)
p54: Modify p54 files for new organization
Modify the remaining p54 files to account for the new file organization. Signed-off-by: Christian Lamparter <chunkeey@web.de> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/p54')
-rw-r--r--drivers/net/wireless/p54/Makefile3
-rw-r--r--drivers/net/wireless/p54/p54.h148
-rw-r--r--drivers/net/wireless/p54/p54common.c2687
-rw-r--r--drivers/net/wireless/p54/p54common.h644
-rw-r--r--drivers/net/wireless/p54/p54pci.c9
-rw-r--r--drivers/net/wireless/p54/p54spi.c5
-rw-r--r--drivers/net/wireless/p54/p54usb.c6
7 files changed, 102 insertions, 3400 deletions
diff --git a/drivers/net/wireless/p54/Makefile b/drivers/net/wireless/p54/Makefile
index c2050dee6293..b542e68f1781 100644
--- a/drivers/net/wireless/p54/Makefile
+++ b/drivers/net/wireless/p54/Makefile
@@ -1,3 +1,6 @@
1p54common-objs := eeprom.o fwio.o txrx.o main.o
2p54common-$(CONFIG_P54_LEDS) += led.o
3
1obj-$(CONFIG_P54_COMMON) += p54common.o 4obj-$(CONFIG_P54_COMMON) += p54common.o
2obj-$(CONFIG_P54_USB) += p54usb.o 5obj-$(CONFIG_P54_USB) += p54usb.o
3obj-$(CONFIG_P54_PCI) += p54pci.o 6obj-$(CONFIG_P54_PCI) += p54pci.o
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h
index db3df947d8ed..19d085c73d7d 100644
--- a/drivers/net/wireless/p54/p54.h
+++ b/drivers/net/wireless/p54/p54.h
@@ -1,6 +1,3 @@
1#ifndef P54_H
2#define P54_H
3
4/* 1/*
5 * Shared defines for all mac80211 Prism54 code 2 * Shared defines for all mac80211 Prism54 code
6 * 3 *
@@ -14,39 +11,78 @@
14 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
15 */ 12 */
16 13
14#ifndef P54_H
15#define P54_H
16
17#ifdef CONFIG_P54_LEDS 17#ifdef CONFIG_P54_LEDS
18#include <linux/leds.h> 18#include <linux/leds.h>
19#endif /* CONFIG_P54_LEDS */ 19#endif /* CONFIG_P54_LEDS */
20 20
21enum p54_control_frame_types { 21#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
22 P54_CONTROL_TYPE_SETUP = 0, 22
23 P54_CONTROL_TYPE_SCAN, 23#define BR_CODE_MIN 0x80000000
24 P54_CONTROL_TYPE_TRAP, 24#define BR_CODE_COMPONENT_ID 0x80000001
25 P54_CONTROL_TYPE_DCFINIT, 25#define BR_CODE_COMPONENT_VERSION 0x80000002
26 P54_CONTROL_TYPE_RX_KEYCACHE, 26#define BR_CODE_DEPENDENT_IF 0x80000003
27 P54_CONTROL_TYPE_TIM, 27#define BR_CODE_EXPOSED_IF 0x80000004
28 P54_CONTROL_TYPE_PSM, 28#define BR_CODE_DESCR 0x80000101
29 P54_CONTROL_TYPE_TXCANCEL, 29#define BR_CODE_MAX 0x8FFFFFFF
30 P54_CONTROL_TYPE_TXDONE, 30#define BR_CODE_END_OF_BRA 0xFF0000FF
31 P54_CONTROL_TYPE_BURST, 31#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
32 P54_CONTROL_TYPE_STAT_READBACK, 32
33 P54_CONTROL_TYPE_BBP, 33struct bootrec {
34 P54_CONTROL_TYPE_EEPROM_READBACK, 34 __le32 code;
35 P54_CONTROL_TYPE_LED, 35 __le32 len;
36 P54_CONTROL_TYPE_GPIO, 36 u32 data[10];
37 P54_CONTROL_TYPE_TIMER, 37} __packed;
38 P54_CONTROL_TYPE_MODULATION, 38
39 P54_CONTROL_TYPE_SYNTH_CONFIG, 39/* Interface role definitions */
40 P54_CONTROL_TYPE_DETECTOR_VALUE, 40#define BR_INTERFACE_ROLE_SERVER 0x0000
41 P54_CONTROL_TYPE_XBOW_SYNTH_CFG, 41#define BR_INTERFACE_ROLE_CLIENT 0x8000
42 P54_CONTROL_TYPE_CCE_QUIET, 42
43 P54_CONTROL_TYPE_PSM_STA_UNLOCK, 43#define BR_DESC_PRIV_CAP_WEP BIT(0)
44 P54_CONTROL_TYPE_PCS, 44#define BR_DESC_PRIV_CAP_TKIP BIT(1)
45 P54_CONTROL_TYPE_BT_BALANCER = 28, 45#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
46 P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30, 46#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
47 P54_CONTROL_TYPE_ARPTABLE = 31, 47#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
48 P54_CONTROL_TYPE_BT_OPTIONS = 35 48#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
49}; 49
50struct bootrec_desc {
51 __le16 modes;
52 __le16 flags;
53 __le32 rx_start;
54 __le32 rx_end;
55 u8 headroom;
56 u8 tailroom;
57 u8 tx_queues;
58 u8 tx_depth;
59 u8 privacy_caps;
60 u8 rx_keycache_size;
61 u8 time_size;
62 u8 padding;
63 u8 rates[16];
64 u8 padding2[4];
65 __le16 rx_mtu;
66} __packed;
67
68#define FW_FMAC 0x464d4143
69#define FW_LM86 0x4c4d3836
70#define FW_LM87 0x4c4d3837
71#define FW_LM20 0x4c4d3230
72
73struct bootrec_comp_id {
74 __le32 fw_variant;
75} __packed;
76
77struct bootrec_comp_ver {
78 char fw_version[24];
79} __packed;
80
81struct bootrec_end {
82 __le16 crc;
83 u8 padding[2];
84 u8 md5[16];
85} __packed;
50 86
51/* provide 16 bytes for the transport back-end */ 87/* provide 16 bytes for the transport back-end */
52#define P54_TX_INFO_DATA_SIZE 16 88#define P54_TX_INFO_DATA_SIZE 16
@@ -55,34 +91,30 @@ enum p54_control_frame_types {
55struct p54_tx_info { 91struct p54_tx_info {
56 u32 start_addr; 92 u32 start_addr;
57 u32 end_addr; 93 u32 end_addr;
58 void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)]; 94 union {
95 void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
96 struct {
97 u32 extra_len;
98 };
99 };
59}; 100};
60 101
61#define P54_MAX_CTRL_FRAME_LEN 0x1000 102#define P54_MAX_CTRL_FRAME_LEN 0x1000
62 103
63#define P54_HDR_FLAG_CONTROL BIT(15) 104#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
64#define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0)) 105do { \
65 106 queue.aifs = cpu_to_le16(ai_fs); \
66struct p54_hdr { 107 queue.cwmin = cpu_to_le16(cw_min); \
67 __le16 flags; 108 queue.cwmax = cpu_to_le16(cw_max); \
68 __le16 len; 109 queue.txop = cpu_to_le16(_txop); \
69 __le32 req_id; 110} while (0)
70 __le16 type; /* enum p54_control_frame_types */
71 u8 rts_tries;
72 u8 tries;
73 u8 data[0];
74} __attribute__ ((packed));
75
76#define FREE_AFTER_TX(skb) \
77 ((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \
78 flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET))
79 111
80struct p54_edcf_queue_param { 112struct p54_edcf_queue_param {
81 __le16 aifs; 113 __le16 aifs;
82 __le16 cwmin; 114 __le16 cwmin;
83 __le16 cwmax; 115 __le16 cwmax;
84 __le16 txop; 116 __le16 txop;
85} __attribute__ ((packed)); 117} __packed;
86 118
87struct p54_rssi_linear_approximation { 119struct p54_rssi_linear_approximation {
88 s16 mul; 120 s16 mul;
@@ -101,13 +133,6 @@ struct p54_cal_database {
101 133
102#define EEPROM_READBACK_LEN 0x3fc 134#define EEPROM_READBACK_LEN 0x3fc
103 135
104#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
105
106#define FW_FMAC 0x464d4143
107#define FW_LM86 0x4c4d3836
108#define FW_LM87 0x4c4d3837
109#define FW_LM20 0x4c4d3230
110
111enum fw_state { 136enum fw_state {
112 FW_STATE_OFF, 137 FW_STATE_OFF,
113 FW_STATE_BOOTING, 138 FW_STATE_BOOTING,
@@ -138,6 +163,7 @@ struct p54_common {
138 void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); 163 void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
139 int (*open)(struct ieee80211_hw *dev); 164 int (*open)(struct ieee80211_hw *dev);
140 void (*stop)(struct ieee80211_hw *dev); 165 void (*stop)(struct ieee80211_hw *dev);
166 struct sk_buff_head tx_pending;
141 struct sk_buff_head tx_queue; 167 struct sk_buff_head tx_queue;
142 struct mutex conf_mutex; 168 struct mutex conf_mutex;
143 169
@@ -156,6 +182,7 @@ struct p54_common {
156 182
157 /* (e)DCF / QOS state */ 183 /* (e)DCF / QOS state */
158 bool use_short_slot; 184 bool use_short_slot;
185 spinlock_t tx_stats_lock;
159 struct ieee80211_tx_queue_stats tx_stats[8]; 186 struct ieee80211_tx_queue_stats tx_stats[8];
160 struct p54_edcf_queue_param qos_params[8]; 187 struct p54_edcf_queue_param qos_params[8];
161 188
@@ -181,7 +208,7 @@ struct p54_common {
181 u32 tsf_low32, tsf_high32; 208 u32 tsf_low32, tsf_high32;
182 u32 basic_rate_mask; 209 u32 basic_rate_mask;
183 u16 aid; 210 u16 aid;
184 struct sk_buff *cached_beacon; 211 __le32 beacon_req_id;
185 212
186 /* cryptographic engine information */ 213 /* cryptographic engine information */
187 u8 privacy_caps; 214 u8 privacy_caps;
@@ -202,15 +229,20 @@ struct p54_common {
202 /* eeprom handling */ 229 /* eeprom handling */
203 void *eeprom; 230 void *eeprom;
204 struct completion eeprom_comp; 231 struct completion eeprom_comp;
232 struct mutex eeprom_mutex;
205}; 233};
206 234
235/* interfaces for the drivers */
207int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); 236int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
208void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb); 237void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb);
209int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw); 238int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw);
210int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len); 239int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len);
211int p54_read_eeprom(struct ieee80211_hw *dev); 240int p54_read_eeprom(struct ieee80211_hw *dev);
241
212struct ieee80211_hw *p54_init_common(size_t priv_data_len); 242struct ieee80211_hw *p54_init_common(size_t priv_data_len);
213int p54_register_common(struct ieee80211_hw *dev, struct device *pdev); 243int p54_register_common(struct ieee80211_hw *dev, struct device *pdev);
214void p54_free_common(struct ieee80211_hw *dev); 244void p54_free_common(struct ieee80211_hw *dev);
215 245
246void p54_unregister_common(struct ieee80211_hw *dev);
247
216#endif /* P54_H */ 248#endif /* P54_H */
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c
deleted file mode 100644
index d1ea609a6905..000000000000
--- a/drivers/net/wireless/p54/p54common.c
+++ /dev/null
@@ -1,2687 +0,0 @@
1/*
2 * Common code for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
6 * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7 *
8 * Based on:
9 * - the islsm (softmac prism54) driver, which is:
10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * - stlc45xx driver
12 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/init.h>
20#include <linux/firmware.h>
21#include <linux/etherdevice.h>
22
23#include <net/mac80211.h>
24#ifdef CONFIG_P54_LEDS
25#include <linux/leds.h>
26#endif /* CONFIG_P54_LEDS */
27
28#include "p54.h"
29#include "p54common.h"
30
31static int modparam_nohwcrypt;
32module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
33MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
34MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
35MODULE_DESCRIPTION("Softmac Prism54 common code");
36MODULE_LICENSE("GPL");
37MODULE_ALIAS("prism54common");
38
39static struct ieee80211_rate p54_bgrates[] = {
40 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
41 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
42 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
43 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
44 { .bitrate = 60, .hw_value = 4, },
45 { .bitrate = 90, .hw_value = 5, },
46 { .bitrate = 120, .hw_value = 6, },
47 { .bitrate = 180, .hw_value = 7, },
48 { .bitrate = 240, .hw_value = 8, },
49 { .bitrate = 360, .hw_value = 9, },
50 { .bitrate = 480, .hw_value = 10, },
51 { .bitrate = 540, .hw_value = 11, },
52};
53
54static struct ieee80211_channel p54_bgchannels[] = {
55 { .center_freq = 2412, .hw_value = 1, },
56 { .center_freq = 2417, .hw_value = 2, },
57 { .center_freq = 2422, .hw_value = 3, },
58 { .center_freq = 2427, .hw_value = 4, },
59 { .center_freq = 2432, .hw_value = 5, },
60 { .center_freq = 2437, .hw_value = 6, },
61 { .center_freq = 2442, .hw_value = 7, },
62 { .center_freq = 2447, .hw_value = 8, },
63 { .center_freq = 2452, .hw_value = 9, },
64 { .center_freq = 2457, .hw_value = 10, },
65 { .center_freq = 2462, .hw_value = 11, },
66 { .center_freq = 2467, .hw_value = 12, },
67 { .center_freq = 2472, .hw_value = 13, },
68 { .center_freq = 2484, .hw_value = 14, },
69};
70
71static struct ieee80211_supported_band band_2GHz = {
72 .channels = p54_bgchannels,
73 .n_channels = ARRAY_SIZE(p54_bgchannels),
74 .bitrates = p54_bgrates,
75 .n_bitrates = ARRAY_SIZE(p54_bgrates),
76};
77
78static struct ieee80211_rate p54_arates[] = {
79 { .bitrate = 60, .hw_value = 4, },
80 { .bitrate = 90, .hw_value = 5, },
81 { .bitrate = 120, .hw_value = 6, },
82 { .bitrate = 180, .hw_value = 7, },
83 { .bitrate = 240, .hw_value = 8, },
84 { .bitrate = 360, .hw_value = 9, },
85 { .bitrate = 480, .hw_value = 10, },
86 { .bitrate = 540, .hw_value = 11, },
87};
88
89static struct ieee80211_channel p54_achannels[] = {
90 { .center_freq = 4920 },
91 { .center_freq = 4940 },
92 { .center_freq = 4960 },
93 { .center_freq = 4980 },
94 { .center_freq = 5040 },
95 { .center_freq = 5060 },
96 { .center_freq = 5080 },
97 { .center_freq = 5170 },
98 { .center_freq = 5180 },
99 { .center_freq = 5190 },
100 { .center_freq = 5200 },
101 { .center_freq = 5210 },
102 { .center_freq = 5220 },
103 { .center_freq = 5230 },
104 { .center_freq = 5240 },
105 { .center_freq = 5260 },
106 { .center_freq = 5280 },
107 { .center_freq = 5300 },
108 { .center_freq = 5320 },
109 { .center_freq = 5500 },
110 { .center_freq = 5520 },
111 { .center_freq = 5540 },
112 { .center_freq = 5560 },
113 { .center_freq = 5580 },
114 { .center_freq = 5600 },
115 { .center_freq = 5620 },
116 { .center_freq = 5640 },
117 { .center_freq = 5660 },
118 { .center_freq = 5680 },
119 { .center_freq = 5700 },
120 { .center_freq = 5745 },
121 { .center_freq = 5765 },
122 { .center_freq = 5785 },
123 { .center_freq = 5805 },
124 { .center_freq = 5825 },
125};
126
127static struct ieee80211_supported_band band_5GHz = {
128 .channels = p54_achannels,
129 .n_channels = ARRAY_SIZE(p54_achannels),
130 .bitrates = p54_arates,
131 .n_bitrates = ARRAY_SIZE(p54_arates),
132};
133
134int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
135{
136 struct p54_common *priv = dev->priv;
137 struct bootrec_exp_if *exp_if;
138 struct bootrec *bootrec;
139 u32 *data = (u32 *)fw->data;
140 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
141 u8 *fw_version = NULL;
142 size_t len;
143 int i;
144 int maxlen;
145
146 if (priv->rx_start)
147 return 0;
148
149 while (data < end_data && *data)
150 data++;
151
152 while (data < end_data && !*data)
153 data++;
154
155 bootrec = (struct bootrec *) data;
156
157 while (bootrec->data <= end_data &&
158 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
159 u32 code = le32_to_cpu(bootrec->code);
160 switch (code) {
161 case BR_CODE_COMPONENT_ID:
162 priv->fw_interface = be32_to_cpup((__be32 *)
163 bootrec->data);
164 switch (priv->fw_interface) {
165 case FW_LM86:
166 case FW_LM20:
167 case FW_LM87: {
168 char *iftype = (char *)bootrec->data;
169 printk(KERN_INFO "%s: p54 detected a LM%c%c "
170 "firmware\n",
171 wiphy_name(dev->wiphy),
172 iftype[2], iftype[3]);
173 break;
174 }
175 case FW_FMAC:
176 default:
177 printk(KERN_ERR "%s: unsupported firmware\n",
178 wiphy_name(dev->wiphy));
179 return -ENODEV;
180 }
181 break;
182 case BR_CODE_COMPONENT_VERSION:
183 /* 24 bytes should be enough for all firmwares */
184 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
185 fw_version = (unsigned char*)bootrec->data;
186 break;
187 case BR_CODE_DESCR: {
188 struct bootrec_desc *desc =
189 (struct bootrec_desc *)bootrec->data;
190 priv->rx_start = le32_to_cpu(desc->rx_start);
191 /* FIXME add sanity checking */
192 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
193 priv->headroom = desc->headroom;
194 priv->tailroom = desc->tailroom;
195 priv->privacy_caps = desc->privacy_caps;
196 priv->rx_keycache_size = desc->rx_keycache_size;
197 if (le32_to_cpu(bootrec->len) == 11)
198 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
199 else
200 priv->rx_mtu = (size_t)
201 0x620 - priv->tx_hdr_len;
202 maxlen = priv->tx_hdr_len + /* USB devices */
203 sizeof(struct p54_rx_data) +
204 4 + /* rx alignment */
205 IEEE80211_MAX_FRAG_THRESHOLD;
206 if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
207 printk(KERN_INFO "p54: rx_mtu reduced from %d "
208 "to %d\n", priv->rx_mtu,
209 maxlen);
210 priv->rx_mtu = maxlen;
211 }
212 break;
213 }
214 case BR_CODE_EXPOSED_IF:
215 exp_if = (struct bootrec_exp_if *) bootrec->data;
216 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
217 if (exp_if[i].if_id == cpu_to_le16(0x1a))
218 priv->fw_var = le16_to_cpu(exp_if[i].variant);
219 break;
220 case BR_CODE_DEPENDENT_IF:
221 break;
222 case BR_CODE_END_OF_BRA:
223 case LEGACY_BR_CODE_END_OF_BRA:
224 end_data = NULL;
225 break;
226 default:
227 break;
228 }
229 bootrec = (struct bootrec *)&bootrec->data[len];
230 }
231
232 if (fw_version)
233 printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
234 wiphy_name(dev->wiphy), fw_version,
235 priv->fw_var >> 8, priv->fw_var & 0xff);
236
237 if (priv->fw_var < 0x500)
238 printk(KERN_INFO "%s: you are using an obsolete firmware. "
239 "visit http://wireless.kernel.org/en/users/Drivers/p54 "
240 "and grab one for \"kernel >= 2.6.28\"!\n",
241 wiphy_name(dev->wiphy));
242
243 if (priv->fw_var >= 0x300) {
244 /* Firmware supports QoS, use it! */
245 priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
246 priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
247 priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
248 priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
249 dev->queues = P54_QUEUE_AC_NUM;
250 }
251
252 if (!modparam_nohwcrypt) {
253 printk(KERN_INFO "%s: cryptographic accelerator "
254 "WEP:%s, TKIP:%s, CCMP:%s\n",
255 wiphy_name(dev->wiphy),
256 (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
257 "no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
258 BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
259 (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
260 "YES" : "no");
261
262 if (priv->rx_keycache_size) {
263 /*
264 * NOTE:
265 *
266 * The firmware provides at most 255 (0 - 254) slots
267 * for keys which are then used to offload decryption.
268 * As a result the 255 entry (aka 0xff) can be used
269 * safely by the driver to mark keys that didn't fit
270 * into the full cache. This trick saves us from
271 * keeping a extra list for uploaded keys.
272 */
273
274 priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
275 priv->rx_keycache_size), GFP_KERNEL);
276
277 if (!priv->used_rxkeys)
278 return -ENOMEM;
279 }
280 }
281
282 return 0;
283}
284EXPORT_SYMBOL_GPL(p54_parse_firmware);
285
286static int p54_convert_rev0(struct ieee80211_hw *dev,
287 struct pda_pa_curve_data *curve_data)
288{
289 struct p54_common *priv = dev->priv;
290 struct p54_pa_curve_data_sample *dst;
291 struct pda_pa_curve_data_sample_rev0 *src;
292 size_t cd_len = sizeof(*curve_data) +
293 (curve_data->points_per_channel*sizeof(*dst) + 2) *
294 curve_data->channels;
295 unsigned int i, j;
296 void *source, *target;
297
298 priv->curve_data = kmalloc(sizeof(*priv->curve_data) + cd_len,
299 GFP_KERNEL);
300 if (!priv->curve_data)
301 return -ENOMEM;
302
303 priv->curve_data->entries = curve_data->channels;
304 priv->curve_data->entry_size = sizeof(__le16) +
305 sizeof(*dst) * curve_data->points_per_channel;
306 priv->curve_data->offset = offsetof(struct pda_pa_curve_data, data);
307 priv->curve_data->len = cd_len;
308 memcpy(priv->curve_data->data, curve_data, sizeof(*curve_data));
309 source = curve_data->data;
310 target = ((struct pda_pa_curve_data *) priv->curve_data->data)->data;
311 for (i = 0; i < curve_data->channels; i++) {
312 __le16 *freq = source;
313 source += sizeof(__le16);
314 *((__le16 *)target) = *freq;
315 target += sizeof(__le16);
316 for (j = 0; j < curve_data->points_per_channel; j++) {
317 dst = target;
318 src = source;
319
320 dst->rf_power = src->rf_power;
321 dst->pa_detector = src->pa_detector;
322 dst->data_64qam = src->pcv;
323 /* "invent" the points for the other modulations */
324#define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
325 dst->data_16qam = SUB(src->pcv, 12);
326 dst->data_qpsk = SUB(dst->data_16qam, 12);
327 dst->data_bpsk = SUB(dst->data_qpsk, 12);
328 dst->data_barker = SUB(dst->data_bpsk, 14);
329#undef SUB
330 target += sizeof(*dst);
331 source += sizeof(*src);
332 }
333 }
334
335 return 0;
336}
337
338static int p54_convert_rev1(struct ieee80211_hw *dev,
339 struct pda_pa_curve_data *curve_data)
340{
341 struct p54_common *priv = dev->priv;
342 struct p54_pa_curve_data_sample *dst;
343 struct pda_pa_curve_data_sample_rev1 *src;
344 size_t cd_len = sizeof(*curve_data) +
345 (curve_data->points_per_channel*sizeof(*dst) + 2) *
346 curve_data->channels;
347 unsigned int i, j;
348 void *source, *target;
349
350 priv->curve_data = kzalloc(cd_len + sizeof(*priv->curve_data),
351 GFP_KERNEL);
352 if (!priv->curve_data)
353 return -ENOMEM;
354
355 priv->curve_data->entries = curve_data->channels;
356 priv->curve_data->entry_size = sizeof(__le16) +
357 sizeof(*dst) * curve_data->points_per_channel;
358 priv->curve_data->offset = offsetof(struct pda_pa_curve_data, data);
359 priv->curve_data->len = cd_len;
360 memcpy(priv->curve_data->data, curve_data, sizeof(*curve_data));
361 source = curve_data->data;
362 target = ((struct pda_pa_curve_data *) priv->curve_data->data)->data;
363 for (i = 0; i < curve_data->channels; i++) {
364 __le16 *freq = source;
365 source += sizeof(__le16);
366 *((__le16 *)target) = *freq;
367 target += sizeof(__le16);
368 for (j = 0; j < curve_data->points_per_channel; j++) {
369 memcpy(target, source, sizeof(*src));
370
371 target += sizeof(*dst);
372 source += sizeof(*src);
373 }
374 source++;
375 }
376
377 return 0;
378}
379
380static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
381 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
382static int p54_init_xbow_synth(struct ieee80211_hw *dev);
383
384static void p54_parse_rssical(struct ieee80211_hw *dev, void *data, int len,
385 u16 type)
386{
387 struct p54_common *priv = dev->priv;
388 int offset = (type == PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED) ? 2 : 0;
389 int entry_size = sizeof(struct pda_rssi_cal_entry) + offset;
390 int num_entries = (type == PDR_RSSI_LINEAR_APPROXIMATION) ? 1 : 2;
391 int i;
392
393 if (len != (entry_size * num_entries)) {
394 printk(KERN_ERR "%s: unknown rssi calibration data packing "
395 " type:(%x) len:%d.\n",
396 wiphy_name(dev->wiphy), type, len);
397
398 print_hex_dump_bytes("rssical:", DUMP_PREFIX_NONE,
399 data, len);
400
401 printk(KERN_ERR "%s: please report this issue.\n",
402 wiphy_name(dev->wiphy));
403 return;
404 }
405
406 for (i = 0; i < num_entries; i++) {
407 struct pda_rssi_cal_entry *cal = data +
408 (offset + i * entry_size);
409 priv->rssical_db[i].mul = (s16) le16_to_cpu(cal->mul);
410 priv->rssical_db[i].add = (s16) le16_to_cpu(cal->add);
411 }
412}
413
414static void p54_parse_default_country(struct ieee80211_hw *dev,
415 void *data, int len)
416{
417 struct pda_country *country;
418
419 if (len != sizeof(*country)) {
420 printk(KERN_ERR "%s: found possible invalid default country "
421 "eeprom entry. (entry size: %d)\n",
422 wiphy_name(dev->wiphy), len);
423
424 print_hex_dump_bytes("country:", DUMP_PREFIX_NONE,
425 data, len);
426
427 printk(KERN_ERR "%s: please report this issue.\n",
428 wiphy_name(dev->wiphy));
429 return;
430 }
431
432 country = (struct pda_country *) data;
433 if (country->flags == PDR_COUNTRY_CERT_CODE_PSEUDO)
434 regulatory_hint(dev->wiphy, country->alpha2);
435 else {
436 /* TODO:
437 * write a shared/common function that converts
438 * "Regulatory domain codes" (802.11-2007 14.8.2.2)
439 * into ISO/IEC 3166-1 alpha2 for regulatory_hint.
440 */
441 }
442}
443
444static int p54_convert_output_limits(struct ieee80211_hw *dev,
445 u8 *data, size_t len)
446{
447 struct p54_common *priv = dev->priv;
448
449 if (len < 2)
450 return -EINVAL;
451
452 if (data[0] != 0) {
453 printk(KERN_ERR "%s: unknown output power db revision:%x\n",
454 wiphy_name(dev->wiphy), data[0]);
455 return -EINVAL;
456 }
457
458 if (2 + data[1] * sizeof(struct pda_channel_output_limit) > len)
459 return -EINVAL;
460
461 priv->output_limit = kmalloc(data[1] *
462 sizeof(struct pda_channel_output_limit) +
463 sizeof(*priv->output_limit), GFP_KERNEL);
464
465 if (!priv->output_limit)
466 return -ENOMEM;
467
468 priv->output_limit->offset = 0;
469 priv->output_limit->entries = data[1];
470 priv->output_limit->entry_size =
471 sizeof(struct pda_channel_output_limit);
472 priv->output_limit->len = priv->output_limit->entry_size *
473 priv->output_limit->entries +
474 priv->output_limit->offset;
475
476 memcpy(priv->output_limit->data, &data[2],
477 data[1] * sizeof(struct pda_channel_output_limit));
478
479 return 0;
480}
481
482static struct p54_cal_database *p54_convert_db(struct pda_custom_wrapper *src,
483 size_t total_len)
484{
485 struct p54_cal_database *dst;
486 size_t payload_len, entries, entry_size, offset;
487
488 payload_len = le16_to_cpu(src->len);
489 entries = le16_to_cpu(src->entries);
490 entry_size = le16_to_cpu(src->entry_size);
491 offset = le16_to_cpu(src->offset);
492 if (((entries * entry_size + offset) != payload_len) ||
493 (payload_len + sizeof(*src) != total_len))
494 return NULL;
495
496 dst = kmalloc(sizeof(*dst) + payload_len, GFP_KERNEL);
497 if (!dst)
498 return NULL;
499
500 dst->entries = entries;
501 dst->entry_size = entry_size;
502 dst->offset = offset;
503 dst->len = payload_len;
504
505 memcpy(dst->data, src->data, payload_len);
506 return dst;
507}
508
509int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
510{
511 struct p54_common *priv = dev->priv;
512 struct eeprom_pda_wrap *wrap = NULL;
513 struct pda_entry *entry;
514 unsigned int data_len, entry_len;
515 void *tmp;
516 int err;
517 u8 *end = (u8 *)eeprom + len;
518 u16 synth = 0;
519
520 wrap = (struct eeprom_pda_wrap *) eeprom;
521 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
522
523 /* verify that at least the entry length/code fits */
524 while ((u8 *)entry <= end - sizeof(*entry)) {
525 entry_len = le16_to_cpu(entry->len);
526 data_len = ((entry_len - 1) << 1);
527
528 /* abort if entry exceeds whole structure */
529 if ((u8 *)entry + sizeof(*entry) + data_len > end)
530 break;
531
532 switch (le16_to_cpu(entry->code)) {
533 case PDR_MAC_ADDRESS:
534 if (data_len != ETH_ALEN)
535 break;
536 SET_IEEE80211_PERM_ADDR(dev, entry->data);
537 break;
538 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
539 if (priv->output_limit)
540 break;
541 err = p54_convert_output_limits(dev, entry->data,
542 data_len);
543 if (err)
544 goto err;
545 break;
546 case PDR_PRISM_PA_CAL_CURVE_DATA: {
547 struct pda_pa_curve_data *curve_data =
548 (struct pda_pa_curve_data *)entry->data;
549 if (data_len < sizeof(*curve_data)) {
550 err = -EINVAL;
551 goto err;
552 }
553
554 switch (curve_data->cal_method_rev) {
555 case 0:
556 err = p54_convert_rev0(dev, curve_data);
557 break;
558 case 1:
559 err = p54_convert_rev1(dev, curve_data);
560 break;
561 default:
562 printk(KERN_ERR "%s: unknown curve data "
563 "revision %d\n",
564 wiphy_name(dev->wiphy),
565 curve_data->cal_method_rev);
566 err = -ENODEV;
567 break;
568 }
569 if (err)
570 goto err;
571 }
572 break;
573 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
574 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
575 if (!priv->iq_autocal) {
576 err = -ENOMEM;
577 goto err;
578 }
579
580 memcpy(priv->iq_autocal, entry->data, data_len);
581 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
582 break;
583 case PDR_DEFAULT_COUNTRY:
584 p54_parse_default_country(dev, entry->data, data_len);
585 break;
586 case PDR_INTERFACE_LIST:
587 tmp = entry->data;
588 while ((u8 *)tmp < entry->data + data_len) {
589 struct bootrec_exp_if *exp_if = tmp;
590 if (le16_to_cpu(exp_if->if_id) == 0xf)
591 synth = le16_to_cpu(exp_if->variant);
592 tmp += sizeof(struct bootrec_exp_if);
593 }
594 break;
595 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
596 if (data_len < 2)
597 break;
598 priv->version = *(u8 *)(entry->data + 1);
599 break;
600 case PDR_RSSI_LINEAR_APPROXIMATION:
601 case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
602 case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
603 p54_parse_rssical(dev, entry->data, data_len,
604 le16_to_cpu(entry->code));
605 break;
606 case PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM: {
607 __le16 *src = (void *) entry->data;
608 s16 *dst = (void *) &priv->rssical_db;
609 int i;
610
611 if (data_len != sizeof(priv->rssical_db)) {
612 err = -EINVAL;
613 goto err;
614 }
615 for (i = 0; i < sizeof(priv->rssical_db) /
616 sizeof(*src); i++)
617 *(dst++) = (s16) le16_to_cpu(*(src++));
618 }
619 break;
620 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM: {
621 struct pda_custom_wrapper *pda = (void *) entry->data;
622 if (priv->output_limit || data_len < sizeof(*pda))
623 break;
624 priv->output_limit = p54_convert_db(pda, data_len);
625 }
626 break;
627 case PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM: {
628 struct pda_custom_wrapper *pda = (void *) entry->data;
629 if (priv->curve_data || data_len < sizeof(*pda))
630 break;
631 priv->curve_data = p54_convert_db(pda, data_len);
632 }
633 break;
634 case PDR_END:
635 /* make it overrun */
636 entry_len = len;
637 break;
638 case PDR_MANUFACTURING_PART_NUMBER:
639 case PDR_PDA_VERSION:
640 case PDR_NIC_SERIAL_NUMBER:
641 case PDR_REGULATORY_DOMAIN_LIST:
642 case PDR_TEMPERATURE_TYPE:
643 case PDR_PRISM_PCI_IDENTIFIER:
644 case PDR_COUNTRY_INFORMATION:
645 case PDR_OEM_NAME:
646 case PDR_PRODUCT_NAME:
647 case PDR_UTF8_OEM_NAME:
648 case PDR_UTF8_PRODUCT_NAME:
649 case PDR_COUNTRY_LIST:
650 case PDR_ANTENNA_GAIN:
651 case PDR_PRISM_INDIGO_PA_CALIBRATION_DATA:
652 case PDR_REGULATORY_POWER_LIMITS:
653 case PDR_RADIATED_TRANSMISSION_CORRECTION:
654 case PDR_PRISM_TX_IQ_CALIBRATION:
655 case PDR_BASEBAND_REGISTERS:
656 case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
657 break;
658 default:
659 printk(KERN_INFO "%s: unknown eeprom code : 0x%x\n",
660 wiphy_name(dev->wiphy),
661 le16_to_cpu(entry->code));
662 break;
663 }
664
665 entry = (void *)entry + (entry_len + 1)*2;
666 }
667
668 if (!synth || !priv->iq_autocal || !priv->output_limit ||
669 !priv->curve_data) {
670 printk(KERN_ERR "%s: not all required entries found in eeprom!\n",
671 wiphy_name(dev->wiphy));
672 err = -EINVAL;
673 goto err;
674 }
675
676 priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
677 if (priv->rxhw == PDR_SYNTH_FRONTEND_XBOW)
678 p54_init_xbow_synth(dev);
679 if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
680 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
681 if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
682 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
683 if ((synth & PDR_SYNTH_RX_DIV_MASK) == PDR_SYNTH_RX_DIV_SUPPORTED)
684 priv->rx_diversity_mask = 3;
685 if ((synth & PDR_SYNTH_TX_DIV_MASK) == PDR_SYNTH_TX_DIV_SUPPORTED)
686 priv->tx_diversity_mask = 3;
687
688 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
689 u8 perm_addr[ETH_ALEN];
690
691 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
692 wiphy_name(dev->wiphy));
693 random_ether_addr(perm_addr);
694 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
695 }
696
697 printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
698 wiphy_name(dev->wiphy),
699 dev->wiphy->perm_addr,
700 priv->version, p54_rf_chips[priv->rxhw]);
701
702 return 0;
703
704 err:
705 if (priv->iq_autocal) {
706 kfree(priv->iq_autocal);
707 priv->iq_autocal = NULL;
708 }
709
710 if (priv->output_limit) {
711 kfree(priv->output_limit);
712 priv->output_limit = NULL;
713 }
714
715 if (priv->curve_data) {
716 kfree(priv->curve_data);
717 priv->curve_data = NULL;
718 }
719
720 printk(KERN_ERR "%s: eeprom parse failed!\n",
721 wiphy_name(dev->wiphy));
722 return err;
723}
724EXPORT_SYMBOL_GPL(p54_parse_eeprom);
725
726static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
727{
728 struct p54_common *priv = dev->priv;
729 int band = dev->conf.channel->band;
730
731 if (priv->rxhw != PDR_SYNTH_FRONTEND_LONGBOW)
732 return ((rssi * priv->rssical_db[band].mul) / 64 +
733 priv->rssical_db[band].add) / 4;
734 else
735 /*
736 * TODO: find the correct formula
737 */
738 return ((rssi * priv->rssical_db[band].mul) / 64 +
739 priv->rssical_db[band].add) / 4;
740}
741
742static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
743{
744 struct p54_common *priv = dev->priv;
745 struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
746 struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
747 u16 freq = le16_to_cpu(hdr->freq);
748 size_t header_len = sizeof(*hdr);
749 u32 tsf32;
750 u8 rate = hdr->rate & 0xf;
751
752 /*
753 * If the device is in a unspecified state we have to
754 * ignore all data frames. Else we could end up with a
755 * nasty crash.
756 */
757 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
758 return 0;
759
760 if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
761 return 0;
762 }
763
764 if (hdr->decrypt_status == P54_DECRYPT_OK)
765 rx_status->flag |= RX_FLAG_DECRYPTED;
766 if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
767 (hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
768 rx_status->flag |= RX_FLAG_MMIC_ERROR;
769
770 rx_status->signal = p54_rssi_to_dbm(dev, hdr->rssi);
771 rx_status->noise = priv->noise;
772 if (hdr->rate & 0x10)
773 rx_status->flag |= RX_FLAG_SHORTPRE;
774 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
775 rx_status->rate_idx = (rate < 4) ? 0 : rate - 4;
776 else
777 rx_status->rate_idx = rate;
778
779 rx_status->freq = freq;
780 rx_status->band = dev->conf.channel->band;
781 rx_status->antenna = hdr->antenna;
782
783 tsf32 = le32_to_cpu(hdr->tsf32);
784 if (tsf32 < priv->tsf_low32)
785 priv->tsf_high32++;
786 rx_status->mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
787 priv->tsf_low32 = tsf32;
788
789 rx_status->flag |= RX_FLAG_TSFT;
790
791 if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
792 header_len += hdr->align[0];
793
794 skb_pull(skb, header_len);
795 skb_trim(skb, le16_to_cpu(hdr->len));
796 ieee80211_rx_irqsafe(dev, skb);
797
798 queue_delayed_work(dev->workqueue, &priv->work,
799 msecs_to_jiffies(P54_STATISTICS_UPDATE));
800
801 return -1;
802}
803
804static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
805{
806 struct p54_common *priv = dev->priv;
807 int i;
808
809 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
810 return ;
811
812 for (i = 0; i < dev->queues; i++)
813 if (priv->tx_stats[i + P54_QUEUE_DATA].len <
814 priv->tx_stats[i + P54_QUEUE_DATA].limit)
815 ieee80211_wake_queue(dev, i);
816}
817
818void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
819{
820 struct p54_common *priv = dev->priv;
821 struct ieee80211_tx_info *info;
822 struct p54_tx_info *range;
823 unsigned long flags;
824
825 if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue)))
826 return;
827
828 /*
829 * don't try to free an already unlinked skb
830 */
831 if (unlikely((!skb->next) || (!skb->prev)))
832 return;
833
834 spin_lock_irqsave(&priv->tx_queue.lock, flags);
835 info = IEEE80211_SKB_CB(skb);
836 range = (void *)info->rate_driver_data;
837 if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
838 struct ieee80211_tx_info *ni;
839 struct p54_tx_info *mr;
840
841 ni = IEEE80211_SKB_CB(skb->prev);
842 mr = (struct p54_tx_info *)ni->rate_driver_data;
843 }
844 if (skb->next != (struct sk_buff *)&priv->tx_queue) {
845 struct ieee80211_tx_info *ni;
846 struct p54_tx_info *mr;
847
848 ni = IEEE80211_SKB_CB(skb->next);
849 mr = (struct p54_tx_info *)ni->rate_driver_data;
850 }
851 __skb_unlink(skb, &priv->tx_queue);
852 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
853 dev_kfree_skb_any(skb);
854 p54_wake_free_queues(dev);
855}
856EXPORT_SYMBOL_GPL(p54_free_skb);
857
858static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
859 __le32 req_id)
860{
861 struct p54_common *priv = dev->priv;
862 struct sk_buff *entry;
863 unsigned long flags;
864
865 spin_lock_irqsave(&priv->tx_queue.lock, flags);
866 entry = priv->tx_queue.next;
867 while (entry != (struct sk_buff *)&priv->tx_queue) {
868 struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
869
870 if (hdr->req_id == req_id) {
871 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
872 return entry;
873 }
874 entry = entry->next;
875 }
876 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
877 return NULL;
878}
879
880static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
881{
882 struct p54_common *priv = dev->priv;
883 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
884 struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
885 struct sk_buff *entry;
886 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
887 struct p54_tx_info *range = NULL;
888 unsigned long flags;
889 int count, idx;
890
891 spin_lock_irqsave(&priv->tx_queue.lock, flags);
892 entry = (struct sk_buff *) priv->tx_queue.next;
893 while (entry != (struct sk_buff *)&priv->tx_queue) {
894 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
895 struct p54_hdr *entry_hdr;
896 struct p54_tx_data *entry_data;
897 unsigned int pad = 0, frame_len;
898
899 range = (void *)info->rate_driver_data;
900 if (range->start_addr != addr) {
901 entry = entry->next;
902 continue;
903 }
904
905 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
906 struct ieee80211_tx_info *ni;
907 struct p54_tx_info *mr;
908
909 ni = IEEE80211_SKB_CB(entry->next);
910 mr = (struct p54_tx_info *)ni->rate_driver_data;
911 }
912
913 __skb_unlink(entry, &priv->tx_queue);
914
915 frame_len = entry->len;
916 entry_hdr = (struct p54_hdr *) entry->data;
917 entry_data = (struct p54_tx_data *) entry_hdr->data;
918 if (priv->tx_stats[entry_data->hw_queue].len)
919 priv->tx_stats[entry_data->hw_queue].len--;
920 priv->stats.dot11ACKFailureCount += payload->tries - 1;
921 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
922
923 /*
924 * Frames in P54_QUEUE_FWSCAN and P54_QUEUE_BEACON are
925 * generated by the driver. Therefore tx_status is bogus
926 * and we don't want to confuse the mac80211 stack.
927 */
928 if (unlikely(entry_data->hw_queue < P54_QUEUE_FWSCAN)) {
929 if (entry_data->hw_queue == P54_QUEUE_BEACON)
930 priv->cached_beacon = NULL;
931
932 kfree_skb(entry);
933 goto out;
934 }
935
936 /*
937 * Clear manually, ieee80211_tx_info_clear_status would
938 * clear the counts too and we need them.
939 */
940 memset(&info->status.ampdu_ack_len, 0,
941 sizeof(struct ieee80211_tx_info) -
942 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
943 BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
944 status.ampdu_ack_len) != 23);
945
946 if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
947 pad = entry_data->align[0];
948
949 /* walk through the rates array and adjust the counts */
950 count = payload->tries;
951 for (idx = 0; idx < 4; idx++) {
952 if (count >= info->status.rates[idx].count) {
953 count -= info->status.rates[idx].count;
954 } else if (count > 0) {
955 info->status.rates[idx].count = count;
956 count = 0;
957 } else {
958 info->status.rates[idx].idx = -1;
959 info->status.rates[idx].count = 0;
960 }
961 }
962
963 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
964 (!payload->status))
965 info->flags |= IEEE80211_TX_STAT_ACK;
966 if (payload->status & P54_TX_PSM_CANCELLED)
967 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
968 info->status.ack_signal = p54_rssi_to_dbm(dev,
969 (int)payload->ack_rssi);
970
971 /* Undo all changes to the frame. */
972 switch (entry_data->key_type) {
973 case P54_CRYPTO_TKIPMICHAEL: {
974 u8 *iv = (u8 *)(entry_data->align + pad +
975 entry_data->crypt_offset);
976
977 /* Restore the original TKIP IV. */
978 iv[2] = iv[0];
979 iv[0] = iv[1];
980 iv[1] = (iv[0] | 0x20) & 0x7f; /* WEPSeed - 8.3.2.2 */
981
982 frame_len -= 12; /* remove TKIP_MMIC + TKIP_ICV */
983 break;
984 }
985 case P54_CRYPTO_AESCCMP:
986 frame_len -= 8; /* remove CCMP_MIC */
987 break;
988 case P54_CRYPTO_WEP:
989 frame_len -= 4; /* remove WEP_ICV */
990 break;
991 }
992 skb_trim(entry, frame_len);
993 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
994 ieee80211_tx_status_irqsafe(dev, entry);
995 goto out;
996 }
997 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
998
999out:
1000 p54_wake_free_queues(dev);
1001}
1002
1003static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
1004 struct sk_buff *skb)
1005{
1006 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
1007 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
1008 struct p54_common *priv = dev->priv;
1009
1010 if (!priv->eeprom)
1011 return ;
1012
1013 if (priv->fw_var >= 0x509) {
1014 memcpy(priv->eeprom, eeprom->v2.data,
1015 le16_to_cpu(eeprom->v2.len));
1016 } else {
1017 memcpy(priv->eeprom, eeprom->v1.data,
1018 le16_to_cpu(eeprom->v1.len));
1019 }
1020
1021 complete(&priv->eeprom_comp);
1022}
1023
1024static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
1025{
1026 struct p54_common *priv = dev->priv;
1027 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
1028 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
1029 u32 tsf32;
1030
1031 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
1032 return ;
1033
1034 tsf32 = le32_to_cpu(stats->tsf32);
1035 if (tsf32 < priv->tsf_low32)
1036 priv->tsf_high32++;
1037 priv->tsf_low32 = tsf32;
1038
1039 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
1040 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
1041 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
1042
1043 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
1044
1045 p54_free_skb(dev, p54_find_tx_entry(dev, hdr->req_id));
1046}
1047
1048static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
1049{
1050 struct p54_common *priv = dev->priv;
1051 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
1052 struct p54_trap *trap = (struct p54_trap *) hdr->data;
1053 u16 event = le16_to_cpu(trap->event);
1054 u16 freq = le16_to_cpu(trap->frequency);
1055
1056 switch (event) {
1057 case P54_TRAP_BEACON_TX:
1058 break;
1059 case P54_TRAP_RADAR:
1060 printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
1061 wiphy_name(dev->wiphy), freq);
1062 break;
1063 case P54_TRAP_NO_BEACON:
1064 if (priv->vif)
1065 ieee80211_beacon_loss(priv->vif);
1066 break;
1067 case P54_TRAP_SCAN:
1068 break;
1069 case P54_TRAP_TBTT:
1070 break;
1071 case P54_TRAP_TIMER:
1072 break;
1073 default:
1074 printk(KERN_INFO "%s: received event:%x freq:%d\n",
1075 wiphy_name(dev->wiphy), event, freq);
1076 break;
1077 }
1078}
1079
1080static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
1081{
1082 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
1083
1084 switch (le16_to_cpu(hdr->type)) {
1085 case P54_CONTROL_TYPE_TXDONE:
1086 p54_rx_frame_sent(dev, skb);
1087 break;
1088 case P54_CONTROL_TYPE_TRAP:
1089 p54_rx_trap(dev, skb);
1090 break;
1091 case P54_CONTROL_TYPE_BBP:
1092 break;
1093 case P54_CONTROL_TYPE_STAT_READBACK:
1094 p54_rx_stats(dev, skb);
1095 break;
1096 case P54_CONTROL_TYPE_EEPROM_READBACK:
1097 p54_rx_eeprom_readback(dev, skb);
1098 break;
1099 default:
1100 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
1101 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
1102 break;
1103 }
1104
1105 return 0;
1106}
1107
1108/* returns zero if skb can be reused */
1109int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
1110{
1111 u16 type = le16_to_cpu(*((__le16 *)skb->data));
1112
1113 if (type & P54_HDR_FLAG_CONTROL)
1114 return p54_rx_control(dev, skb);
1115 else
1116 return p54_rx_data(dev, skb);
1117}
1118EXPORT_SYMBOL_GPL(p54_rx);
1119
1120/*
1121 * So, the firmware is somewhat stupid and doesn't know what places in its
1122 * memory incoming data should go to. By poking around in the firmware, we
1123 * can find some unused memory to upload our packets to. However, data that we
1124 * want the card to TX needs to stay intact until the card has told us that
1125 * it is done with it. This function finds empty places we can upload to and
1126 * marks allocated areas as reserved if necessary. p54_rx_frame_sent or
1127 * p54_free_skb frees allocated areas.
1128 */
1129static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
1130 struct p54_hdr *data, u32 len)
1131{
1132 struct p54_common *priv = dev->priv;
1133 struct sk_buff *entry;
1134 struct sk_buff *target_skb = NULL;
1135 struct ieee80211_tx_info *info;
1136 struct p54_tx_info *range;
1137 u32 last_addr = priv->rx_start;
1138 u32 largest_hole = 0;
1139 u32 target_addr = priv->rx_start;
1140 unsigned long flags;
1141 unsigned int left;
1142 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
1143
1144 if (!skb)
1145 return -EINVAL;
1146
1147 spin_lock_irqsave(&priv->tx_queue.lock, flags);
1148
1149 left = skb_queue_len(&priv->tx_queue);
1150 if (unlikely(left >= 28)) {
1151 /*
1152 * The tx_queue is nearly full!
1153 * We have throttle normal data traffic, because we must
1154 * have a few spare slots for control frames left.
1155 */
1156 ieee80211_stop_queues(dev);
1157 queue_delayed_work(dev->workqueue, &priv->work,
1158 msecs_to_jiffies(P54_TX_TIMEOUT));
1159
1160 if (unlikely(left == 32)) {
1161 /*
1162 * The tx_queue is now really full.
1163 *
1164 * TODO: check if the device has crashed and reset it.
1165 */
1166 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1167 return -ENOSPC;
1168 }
1169 }
1170
1171 entry = priv->tx_queue.next;
1172 while (left--) {
1173 u32 hole_size;
1174 info = IEEE80211_SKB_CB(entry);
1175 range = (void *)info->rate_driver_data;
1176 hole_size = range->start_addr - last_addr;
1177 if (!target_skb && hole_size >= len) {
1178 target_skb = entry->prev;
1179 hole_size -= len;
1180 target_addr = last_addr;
1181 }
1182 largest_hole = max(largest_hole, hole_size);
1183 last_addr = range->end_addr;
1184 entry = entry->next;
1185 }
1186 if (!target_skb && priv->rx_end - last_addr >= len) {
1187 target_skb = priv->tx_queue.prev;
1188 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
1189 if (!skb_queue_empty(&priv->tx_queue)) {
1190 info = IEEE80211_SKB_CB(target_skb);
1191 range = (void *)info->rate_driver_data;
1192 target_addr = range->end_addr;
1193 }
1194 } else
1195 largest_hole = max(largest_hole, priv->rx_end - last_addr);
1196
1197 if (!target_skb) {
1198 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1199 ieee80211_stop_queues(dev);
1200 return -ENOSPC;
1201 }
1202
1203 info = IEEE80211_SKB_CB(skb);
1204 range = (void *)info->rate_driver_data;
1205 range->start_addr = target_addr;
1206 range->end_addr = target_addr + len;
1207 __skb_queue_after(&priv->tx_queue, target_skb, skb);
1208 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
1209
1210 if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
1211 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
1212 ieee80211_stop_queues(dev);
1213
1214 data->req_id = cpu_to_le32(target_addr + priv->headroom);
1215 return 0;
1216}
1217
1218static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev, u16 hdr_flags,
1219 u16 payload_len, u16 type, gfp_t memflags)
1220{
1221 struct p54_common *priv = dev->priv;
1222 struct p54_hdr *hdr;
1223 struct sk_buff *skb;
1224 size_t frame_len = sizeof(*hdr) + payload_len;
1225
1226 if (frame_len > P54_MAX_CTRL_FRAME_LEN)
1227 return NULL;
1228
1229 skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags);
1230 if (!skb)
1231 return NULL;
1232 skb_reserve(skb, priv->tx_hdr_len);
1233
1234 hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
1235 hdr->flags = cpu_to_le16(hdr_flags);
1236 hdr->len = cpu_to_le16(payload_len);
1237 hdr->type = cpu_to_le16(type);
1238 hdr->tries = hdr->rts_tries = 0;
1239
1240 if (p54_assign_address(dev, skb, hdr, frame_len)) {
1241 kfree_skb(skb);
1242 return NULL;
1243 }
1244 return skb;
1245}
1246
1247int p54_read_eeprom(struct ieee80211_hw *dev)
1248{
1249 struct p54_common *priv = dev->priv;
1250 struct p54_eeprom_lm86 *eeprom_hdr;
1251 struct sk_buff *skb;
1252 size_t eeprom_size = 0x2020, offset = 0, blocksize, maxblocksize;
1253 int ret = -ENOMEM;
1254 void *eeprom = NULL;
1255
1256 maxblocksize = EEPROM_READBACK_LEN;
1257 if (priv->fw_var >= 0x509)
1258 maxblocksize -= 0xc;
1259 else
1260 maxblocksize -= 0x4;
1261
1262 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(*eeprom_hdr) +
1263 maxblocksize, P54_CONTROL_TYPE_EEPROM_READBACK,
1264 GFP_KERNEL);
1265 if (!skb)
1266 goto free;
1267 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
1268 if (!priv->eeprom)
1269 goto free;
1270 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
1271 if (!eeprom)
1272 goto free;
1273
1274 eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
1275 sizeof(*eeprom_hdr) + maxblocksize);
1276
1277 while (eeprom_size) {
1278 blocksize = min(eeprom_size, maxblocksize);
1279 if (priv->fw_var < 0x509) {
1280 eeprom_hdr->v1.offset = cpu_to_le16(offset);
1281 eeprom_hdr->v1.len = cpu_to_le16(blocksize);
1282 } else {
1283 eeprom_hdr->v2.offset = cpu_to_le32(offset);
1284 eeprom_hdr->v2.len = cpu_to_le16(blocksize);
1285 eeprom_hdr->v2.magic2 = 0xf;
1286 memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
1287 }
1288 priv->tx(dev, skb);
1289
1290 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
1291 printk(KERN_ERR "%s: device does not respond!\n",
1292 wiphy_name(dev->wiphy));
1293 ret = -EBUSY;
1294 goto free;
1295 }
1296
1297 memcpy(eeprom + offset, priv->eeprom, blocksize);
1298 offset += blocksize;
1299 eeprom_size -= blocksize;
1300 }
1301
1302 ret = p54_parse_eeprom(dev, eeprom, offset);
1303free:
1304 kfree(priv->eeprom);
1305 priv->eeprom = NULL;
1306 p54_free_skb(dev, skb);
1307 kfree(eeprom);
1308
1309 return ret;
1310}
1311EXPORT_SYMBOL_GPL(p54_read_eeprom);
1312
1313static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
1314 bool set)
1315{
1316 struct p54_common *priv = dev->priv;
1317 struct sk_buff *skb;
1318 struct p54_tim *tim;
1319
1320 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim),
1321 P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
1322 if (!skb)
1323 return -ENOMEM;
1324
1325 tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
1326 tim->count = 1;
1327 tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
1328 priv->tx(dev, skb);
1329 return 0;
1330}
1331
1332static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
1333{
1334 struct p54_common *priv = dev->priv;
1335 struct sk_buff *skb;
1336 struct p54_sta_unlock *sta;
1337
1338 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta),
1339 P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
1340 if (!skb)
1341 return -ENOMEM;
1342
1343 sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
1344 memcpy(sta->addr, addr, ETH_ALEN);
1345 priv->tx(dev, skb);
1346 return 0;
1347}
1348
1349static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
1350 enum sta_notify_cmd notify_cmd,
1351 struct ieee80211_sta *sta)
1352{
1353 switch (notify_cmd) {
1354 case STA_NOTIFY_ADD:
1355 case STA_NOTIFY_REMOVE:
1356 /*
1357 * Notify the firmware that we don't want or we don't
1358 * need to buffer frames for this station anymore.
1359 */
1360
1361 p54_sta_unlock(dev, sta->addr);
1362 break;
1363 case STA_NOTIFY_AWAKE:
1364 /* update the firmware's filter table */
1365 p54_sta_unlock(dev, sta->addr);
1366 break;
1367 default:
1368 break;
1369 }
1370}
1371
1372static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
1373{
1374 struct p54_common *priv = dev->priv;
1375 struct sk_buff *skb;
1376 struct p54_hdr *hdr;
1377 struct p54_txcancel *cancel;
1378
1379 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel),
1380 P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
1381 if (!skb)
1382 return -ENOMEM;
1383
1384 hdr = (void *)entry->data;
1385 cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
1386 cancel->req_id = hdr->req_id;
1387 priv->tx(dev, skb);
1388 return 0;
1389}
1390
1391static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
1392 struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
1393 u16 *flags, u16 *aid)
1394{
1395 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1396 struct p54_common *priv = dev->priv;
1397 int ret = 1;
1398
1399 switch (priv->mode) {
1400 case NL80211_IFTYPE_MONITOR:
1401 /*
1402 * We have to set P54_HDR_FLAG_DATA_OUT_PROMISC for
1403 * every frame in promiscuous/monitor mode.
1404 * see STSW45x0C LMAC API - page 12.
1405 */
1406 *aid = 0;
1407 *flags = P54_HDR_FLAG_DATA_OUT_PROMISC;
1408 *queue += P54_QUEUE_DATA;
1409 break;
1410 case NL80211_IFTYPE_STATION:
1411 *aid = 1;
1412 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1413 *queue = P54_QUEUE_MGMT;
1414 ret = 0;
1415 } else
1416 *queue += P54_QUEUE_DATA;
1417 break;
1418 case NL80211_IFTYPE_AP:
1419 case NL80211_IFTYPE_ADHOC:
1420 case NL80211_IFTYPE_MESH_POINT:
1421 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1422 *aid = 0;
1423 *queue = P54_QUEUE_CAB;
1424 return 0;
1425 }
1426
1427 if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
1428 if (ieee80211_is_probe_resp(hdr->frame_control)) {
1429 *aid = 0;
1430 *queue = P54_QUEUE_MGMT;
1431 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
1432 P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1433 return 0;
1434 } else if (ieee80211_is_beacon(hdr->frame_control)) {
1435 *aid = 0;
1436
1437 if (info->flags & IEEE80211_TX_CTL_INJECTED) {
1438 /*
1439 * Injecting beacons on top of a AP is
1440 * not a good idea... nevertheless,
1441 * it should be doable.
1442 */
1443
1444 *queue += P54_QUEUE_DATA;
1445 return 1;
1446 }
1447
1448 *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
1449 *queue = P54_QUEUE_BEACON;
1450 *extra_len = IEEE80211_MAX_TIM_LEN;
1451 return 0;
1452 } else {
1453 *queue = P54_QUEUE_MGMT;
1454 ret = 0;
1455 }
1456 } else
1457 *queue += P54_QUEUE_DATA;
1458
1459 if (info->control.sta)
1460 *aid = info->control.sta->aid;
1461
1462 if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
1463 *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
1464 break;
1465 }
1466 return ret;
1467}
1468
1469static u8 p54_convert_algo(enum ieee80211_key_alg alg)
1470{
1471 switch (alg) {
1472 case ALG_WEP:
1473 return P54_CRYPTO_WEP;
1474 case ALG_TKIP:
1475 return P54_CRYPTO_TKIPMICHAEL;
1476 case ALG_CCMP:
1477 return P54_CRYPTO_AESCCMP;
1478 default:
1479 return 0;
1480 }
1481}
1482
1483static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
1484{
1485 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1486 struct ieee80211_tx_queue_stats *current_queue;
1487 struct p54_common *priv = dev->priv;
1488 struct p54_hdr *hdr;
1489 struct p54_tx_data *txhdr;
1490 size_t padding, len, tim_len = 0;
1491 int i, j, ridx, ret;
1492 u16 hdr_flags = 0, aid = 0;
1493 u8 rate, queue, crypt_offset = 0;
1494 u8 cts_rate = 0x20;
1495 u8 rc_flags;
1496 u8 calculated_tries[4];
1497 u8 nrates = 0, nremaining = 8;
1498
1499 queue = skb_get_queue_mapping(skb);
1500
1501 ret = p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid);
1502 current_queue = &priv->tx_stats[queue];
1503 if (unlikely((current_queue->len > current_queue->limit) && ret))
1504 return NETDEV_TX_BUSY;
1505 current_queue->len++;
1506 current_queue->count++;
1507 if ((current_queue->len == current_queue->limit) && ret)
1508 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
1509
1510 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
1511 len = skb->len;
1512
1513 if (info->control.hw_key) {
1514 crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
1515 if (info->control.hw_key->alg == ALG_TKIP) {
1516 u8 *iv = (u8 *)(skb->data + crypt_offset);
1517 /*
1518 * The firmware excepts that the IV has to have
1519 * this special format
1520 */
1521 iv[1] = iv[0];
1522 iv[0] = iv[2];
1523 iv[2] = 0;
1524 }
1525 }
1526
1527 txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
1528 hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
1529
1530 if (padding)
1531 hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
1532 hdr->type = cpu_to_le16(aid);
1533 hdr->rts_tries = info->control.rates[0].count;
1534
1535 /*
1536 * we register the rates in perfect order, and
1537 * RTS/CTS won't happen on 5 GHz
1538 */
1539 cts_rate = info->control.rts_cts_rate_idx;
1540
1541 memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
1542
1543 /* see how many rates got used */
1544 for (i = 0; i < 4; i++) {
1545 if (info->control.rates[i].idx < 0)
1546 break;
1547 nrates++;
1548 }
1549
1550 /* limit tries to 8/nrates per rate */
1551 for (i = 0; i < nrates; i++) {
1552 /*
1553 * The magic expression here is equivalent to 8/nrates for
1554 * all values that matter, but avoids division and jumps.
1555 * Note that nrates can only take the values 1 through 4.
1556 */
1557 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
1558 info->control.rates[i].count);
1559 nremaining -= calculated_tries[i];
1560 }
1561
1562 /* if there are tries left, distribute from back to front */
1563 for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
1564 int tmp = info->control.rates[i].count - calculated_tries[i];
1565
1566 if (tmp <= 0)
1567 continue;
1568 /* RC requested more tries at this rate */
1569
1570 tmp = min_t(int, tmp, nremaining);
1571 calculated_tries[i] += tmp;
1572 nremaining -= tmp;
1573 }
1574
1575 ridx = 0;
1576 for (i = 0; i < nrates && ridx < 8; i++) {
1577 /* we register the rates in perfect order */
1578 rate = info->control.rates[i].idx;
1579 if (info->band == IEEE80211_BAND_5GHZ)
1580 rate += 4;
1581
1582 /* store the count we actually calculated for TX status */
1583 info->control.rates[i].count = calculated_tries[i];
1584
1585 rc_flags = info->control.rates[i].flags;
1586 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
1587 rate |= 0x10;
1588 cts_rate |= 0x10;
1589 }
1590 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
1591 rate |= 0x40;
1592 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
1593 rate |= 0x20;
1594 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
1595 txhdr->rateset[ridx] = rate;
1596 ridx++;
1597 }
1598 }
1599
1600 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
1601 hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
1602
1603 /* TODO: enable bursting */
1604 hdr->flags = cpu_to_le16(hdr_flags);
1605 hdr->tries = ridx;
1606 txhdr->rts_rate_idx = 0;
1607 if (info->control.hw_key) {
1608 txhdr->key_type = p54_convert_algo(info->control.hw_key->alg);
1609 txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
1610 memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
1611 if (info->control.hw_key->alg == ALG_TKIP) {
1612 if (unlikely(skb_tailroom(skb) < 12))
1613 goto err;
1614 /* reserve space for the MIC key */
1615 len += 8;
1616 memcpy(skb_put(skb, 8), &(info->control.hw_key->key
1617 [NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]), 8);
1618 }
1619 /* reserve some space for ICV */
1620 len += info->control.hw_key->icv_len;
1621 memset(skb_put(skb, info->control.hw_key->icv_len), 0,
1622 info->control.hw_key->icv_len);
1623 } else {
1624 txhdr->key_type = 0;
1625 txhdr->key_len = 0;
1626 }
1627 txhdr->crypt_offset = crypt_offset;
1628 txhdr->hw_queue = queue;
1629 txhdr->backlog = current_queue->len;
1630 memset(txhdr->durations, 0, sizeof(txhdr->durations));
1631 txhdr->tx_antenna = ((info->antenna_sel_tx == 0) ?
1632 2 : info->antenna_sel_tx - 1) & priv->tx_diversity_mask;
1633 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
1634 txhdr->longbow.cts_rate = cts_rate;
1635 txhdr->longbow.output_power = cpu_to_le16(priv->output_power);
1636 } else {
1637 txhdr->normal.output_power = priv->output_power;
1638 txhdr->normal.cts_rate = cts_rate;
1639 }
1640 if (padding)
1641 txhdr->align[0] = padding;
1642
1643 hdr->len = cpu_to_le16(len);
1644 /* modifies skb->cb and with it info, so must be last! */
1645 if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len)))
1646 goto err;
1647 priv->tx(dev, skb);
1648
1649 queue_delayed_work(dev->workqueue, &priv->work,
1650 msecs_to_jiffies(P54_TX_FRAME_LIFETIME));
1651
1652 return NETDEV_TX_OK;
1653
1654 err:
1655 skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
1656 current_queue->len--;
1657 current_queue->count--;
1658 return NETDEV_TX_BUSY;
1659}
1660
1661static int p54_setup_mac(struct ieee80211_hw *dev)
1662{
1663 struct p54_common *priv = dev->priv;
1664 struct sk_buff *skb;
1665 struct p54_setup_mac *setup;
1666 u16 mode;
1667
1668 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup),
1669 P54_CONTROL_TYPE_SETUP, GFP_ATOMIC);
1670 if (!skb)
1671 return -ENOMEM;
1672
1673 setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
1674 if (dev->conf.radio_enabled) {
1675 switch (priv->mode) {
1676 case NL80211_IFTYPE_STATION:
1677 mode = P54_FILTER_TYPE_STATION;
1678 break;
1679 case NL80211_IFTYPE_AP:
1680 mode = P54_FILTER_TYPE_AP;
1681 break;
1682 case NL80211_IFTYPE_ADHOC:
1683 case NL80211_IFTYPE_MESH_POINT:
1684 mode = P54_FILTER_TYPE_IBSS;
1685 break;
1686 case NL80211_IFTYPE_MONITOR:
1687 mode = P54_FILTER_TYPE_PROMISCUOUS;
1688 break;
1689 default:
1690 mode = P54_FILTER_TYPE_HIBERNATE;
1691 break;
1692 }
1693
1694 /*
1695 * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
1696 * STSW45X0C LMAC API - page 12
1697 */
1698 if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
1699 (priv->filter_flags & FIF_OTHER_BSS)) &&
1700 (mode != P54_FILTER_TYPE_PROMISCUOUS))
1701 mode |= P54_FILTER_TYPE_TRANSPARENT;
1702 } else
1703 mode = P54_FILTER_TYPE_HIBERNATE;
1704
1705 setup->mac_mode = cpu_to_le16(mode);
1706 memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
1707 memcpy(setup->bssid, priv->bssid, ETH_ALEN);
1708 setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
1709 setup->rx_align = 0;
1710 if (priv->fw_var < 0x500) {
1711 setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1712 memset(setup->v1.rts_rates, 0, 8);
1713 setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
1714 setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
1715 setup->v1.rxhw = cpu_to_le16(priv->rxhw);
1716 setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
1717 setup->v1.unalloc0 = cpu_to_le16(0);
1718 } else {
1719 setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
1720 setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
1721 setup->v2.rxhw = cpu_to_le16(priv->rxhw);
1722 setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
1723 setup->v2.truncate = cpu_to_le16(48896);
1724 setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1725 setup->v2.sbss_offset = 0;
1726 setup->v2.mcast_window = 0;
1727 setup->v2.rx_rssi_threshold = 0;
1728 setup->v2.rx_ed_threshold = 0;
1729 setup->v2.ref_clock = cpu_to_le32(644245094);
1730 setup->v2.lpf_bandwidth = cpu_to_le16(65535);
1731 setup->v2.osc_start_delay = cpu_to_le16(65535);
1732 }
1733 priv->tx(dev, skb);
1734 return 0;
1735}
1736
1737static int p54_scan(struct ieee80211_hw *dev, u16 mode, u16 dwell)
1738{
1739 struct p54_common *priv = dev->priv;
1740 struct sk_buff *skb;
1741 struct p54_hdr *hdr;
1742 struct p54_scan_head *head;
1743 struct p54_iq_autocal_entry *iq_autocal;
1744 union p54_scan_body_union *body;
1745 struct p54_scan_tail_rate *rate;
1746 struct pda_rssi_cal_entry *rssi;
1747 unsigned int i;
1748 void *entry;
1749 int band = dev->conf.channel->band;
1750 __le16 freq = cpu_to_le16(dev->conf.channel->center_freq);
1751
1752 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
1753 2 + sizeof(*iq_autocal) + sizeof(*body) +
1754 sizeof(*rate) + 2 * sizeof(*rssi),
1755 P54_CONTROL_TYPE_SCAN, GFP_ATOMIC);
1756 if (!skb)
1757 return -ENOMEM;
1758
1759 head = (struct p54_scan_head *) skb_put(skb, sizeof(*head));
1760 memset(head->scan_params, 0, sizeof(head->scan_params));
1761 head->mode = cpu_to_le16(mode);
1762 head->dwell = cpu_to_le16(dwell);
1763 head->freq = freq;
1764
1765 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
1766 __le16 *pa_power_points = (__le16 *) skb_put(skb, 2);
1767 *pa_power_points = cpu_to_le16(0x0c);
1768 }
1769
1770 iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal));
1771 for (i = 0; i < priv->iq_autocal_len; i++) {
1772 if (priv->iq_autocal[i].freq != freq)
1773 continue;
1774
1775 memcpy(iq_autocal, &priv->iq_autocal[i].params,
1776 sizeof(struct p54_iq_autocal_entry));
1777 break;
1778 }
1779 if (i == priv->iq_autocal_len)
1780 goto err;
1781
1782 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW)
1783 body = (void *) skb_put(skb, sizeof(body->longbow));
1784 else
1785 body = (void *) skb_put(skb, sizeof(body->normal));
1786
1787 for (i = 0; i < priv->output_limit->entries; i++) {
1788 __le16 *entry_freq = (void *) (priv->output_limit->data +
1789 priv->output_limit->entry_size * i);
1790
1791 if (*entry_freq != freq)
1792 continue;
1793
1794 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
1795 memcpy(&body->longbow.power_limits,
1796 (void *) entry_freq + sizeof(__le16),
1797 priv->output_limit->entry_size);
1798 } else {
1799 struct pda_channel_output_limit *limits =
1800 (void *) entry_freq;
1801
1802 body->normal.val_barker = 0x38;
1803 body->normal.val_bpsk = body->normal.dup_bpsk =
1804 limits->val_bpsk;
1805 body->normal.val_qpsk = body->normal.dup_qpsk =
1806 limits->val_qpsk;
1807 body->normal.val_16qam = body->normal.dup_16qam =
1808 limits->val_16qam;
1809 body->normal.val_64qam = body->normal.dup_64qam =
1810 limits->val_64qam;
1811 }
1812 break;
1813 }
1814 if (i == priv->output_limit->entries)
1815 goto err;
1816
1817 entry = (void *)(priv->curve_data->data + priv->curve_data->offset);
1818 for (i = 0; i < priv->curve_data->entries; i++) {
1819 if (*((__le16 *)entry) != freq) {
1820 entry += priv->curve_data->entry_size;
1821 continue;
1822 }
1823
1824 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
1825 memcpy(&body->longbow.curve_data,
1826 (void *) entry + sizeof(__le16),
1827 priv->curve_data->entry_size);
1828 } else {
1829 struct p54_scan_body *chan = &body->normal;
1830 struct pda_pa_curve_data *curve_data =
1831 (void *) priv->curve_data->data;
1832
1833 entry += sizeof(__le16);
1834 chan->pa_points_per_curve = 8;
1835 memset(chan->curve_data, 0, sizeof(*chan->curve_data));
1836 memcpy(chan->curve_data, entry,
1837 sizeof(struct p54_pa_curve_data_sample) *
1838 min((u8)8, curve_data->points_per_channel));
1839 }
1840 break;
1841 }
1842 if (i == priv->curve_data->entries)
1843 goto err;
1844
1845 if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) {
1846 rate = (void *) skb_put(skb, sizeof(*rate));
1847 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1848 for (i = 0; i < sizeof(rate->rts_rates); i++)
1849 rate->rts_rates[i] = i;
1850 }
1851
1852 rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
1853 rssi->mul = cpu_to_le16(priv->rssical_db[band].mul);
1854 rssi->add = cpu_to_le16(priv->rssical_db[band].add);
1855 if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
1856 /* Longbow frontend needs ever more */
1857 rssi = (void *) skb_put(skb, sizeof(*rssi));
1858 rssi->mul = cpu_to_le16(priv->rssical_db[band].longbow_unkn);
1859 rssi->add = cpu_to_le16(priv->rssical_db[band].longbow_unk2);
1860 }
1861
1862 if (priv->fw_var >= 0x509) {
1863 rate = (void *) skb_put(skb, sizeof(*rate));
1864 rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
1865 for (i = 0; i < sizeof(rate->rts_rates); i++)
1866 rate->rts_rates[i] = i;
1867 }
1868
1869 hdr = (struct p54_hdr *) skb->data;
1870 hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
1871
1872 priv->tx(dev, skb);
1873 return 0;
1874
1875 err:
1876 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1877 p54_free_skb(dev, skb);
1878 return -EINVAL;
1879}
1880
1881static int p54_set_leds(struct ieee80211_hw *dev)
1882{
1883 struct p54_common *priv = dev->priv;
1884 struct sk_buff *skb;
1885 struct p54_led *led;
1886
1887 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led),
1888 P54_CONTROL_TYPE_LED, GFP_ATOMIC);
1889 if (!skb)
1890 return -ENOMEM;
1891
1892 led = (struct p54_led *) skb_put(skb, sizeof(*led));
1893 led->flags = cpu_to_le16(0x0003);
1894 led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state);
1895 led->delay[0] = cpu_to_le16(1);
1896 led->delay[1] = cpu_to_le16(0);
1897 priv->tx(dev, skb);
1898 return 0;
1899}
1900
1901#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1902do { \
1903 queue.aifs = cpu_to_le16(ai_fs); \
1904 queue.cwmin = cpu_to_le16(cw_min); \
1905 queue.cwmax = cpu_to_le16(cw_max); \
1906 queue.txop = cpu_to_le16(_txop); \
1907} while(0)
1908
1909static int p54_set_edcf(struct ieee80211_hw *dev)
1910{
1911 struct p54_common *priv = dev->priv;
1912 struct sk_buff *skb;
1913 struct p54_edcf *edcf;
1914
1915 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf),
1916 P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
1917 if (!skb)
1918 return -ENOMEM;
1919
1920 edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
1921 if (priv->use_short_slot) {
1922 edcf->slottime = 9;
1923 edcf->sifs = 0x10;
1924 edcf->eofpad = 0x00;
1925 } else {
1926 edcf->slottime = 20;
1927 edcf->sifs = 0x0a;
1928 edcf->eofpad = 0x06;
1929 }
1930 /* (see prism54/isl_oid.h for further details) */
1931 edcf->frameburst = cpu_to_le16(0);
1932 edcf->round_trip_delay = cpu_to_le16(0);
1933 edcf->flags = 0;
1934 memset(edcf->mapping, 0, sizeof(edcf->mapping));
1935 memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
1936 priv->tx(dev, skb);
1937 return 0;
1938}
1939
1940static int p54_set_ps(struct ieee80211_hw *dev)
1941{
1942 struct p54_common *priv = dev->priv;
1943 struct sk_buff *skb;
1944 struct p54_psm *psm;
1945 u16 mode;
1946 int i;
1947
1948 if (dev->conf.flags & IEEE80211_CONF_PS)
1949 mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
1950 P54_PSM_CHECKSUM | P54_PSM_MCBC;
1951 else
1952 mode = P54_PSM_CAM;
1953
1954 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm),
1955 P54_CONTROL_TYPE_PSM, GFP_ATOMIC);
1956 if (!skb)
1957 return -ENOMEM;
1958
1959 psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
1960 psm->mode = cpu_to_le16(mode);
1961 psm->aid = cpu_to_le16(priv->aid);
1962 for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
1963 psm->intervals[i].interval =
1964 cpu_to_le16(dev->conf.listen_interval);
1965 psm->intervals[i].periods = cpu_to_le16(1);
1966 }
1967
1968 psm->beacon_rssi_skip_max = 200;
1969 psm->rssi_delta_threshold = 0;
1970 psm->nr = 10;
1971 psm->exclude[0] = 0;
1972
1973 priv->tx(dev, skb);
1974
1975 return 0;
1976}
1977
1978static int p54_beacon_tim(struct sk_buff *skb)
1979{
1980 /*
1981 * the good excuse for this mess is ... the firmware.
1982 * The dummy TIM MUST be at the end of the beacon frame,
1983 * because it'll be overwritten!
1984 */
1985
1986 struct ieee80211_mgmt *mgmt = (void *)skb->data;
1987 u8 *pos, *end;
1988
1989 if (skb->len <= sizeof(mgmt))
1990 return -EINVAL;
1991
1992 pos = (u8 *)mgmt->u.beacon.variable;
1993 end = skb->data + skb->len;
1994 while (pos < end) {
1995 if (pos + 2 + pos[1] > end)
1996 return -EINVAL;
1997
1998 if (pos[0] == WLAN_EID_TIM) {
1999 u8 dtim_len = pos[1];
2000 u8 dtim_period = pos[3];
2001 u8 *next = pos + 2 + dtim_len;
2002
2003 if (dtim_len < 3)
2004 return -EINVAL;
2005
2006 memmove(pos, next, end - next);
2007
2008 if (dtim_len > 3)
2009 skb_trim(skb, skb->len - (dtim_len - 3));
2010
2011 pos = end - (dtim_len + 2);
2012
2013 /* add the dummy at the end */
2014 pos[0] = WLAN_EID_TIM;
2015 pos[1] = 3;
2016 pos[2] = 0;
2017 pos[3] = dtim_period;
2018 pos[4] = 0;
2019 return 0;
2020 }
2021 pos += 2 + pos[1];
2022 }
2023 return 0;
2024}
2025
2026static int p54_beacon_update(struct ieee80211_hw *dev,
2027 struct ieee80211_vif *vif)
2028{
2029 struct p54_common *priv = dev->priv;
2030 struct sk_buff *beacon;
2031 int ret;
2032
2033 if (priv->cached_beacon) {
2034 p54_tx_cancel(dev, priv->cached_beacon);
2035 /* wait for the last beacon the be freed */
2036 msleep(10);
2037 }
2038
2039 beacon = ieee80211_beacon_get(dev, vif);
2040 if (!beacon)
2041 return -ENOMEM;
2042 ret = p54_beacon_tim(beacon);
2043 if (ret)
2044 return ret;
2045 ret = p54_tx(dev, beacon);
2046 if (ret)
2047 return ret;
2048 priv->cached_beacon = beacon;
2049 priv->tsf_high32 = 0;
2050 priv->tsf_low32 = 0;
2051
2052 return 0;
2053}
2054
2055static int p54_start(struct ieee80211_hw *dev)
2056{
2057 struct p54_common *priv = dev->priv;
2058 int err;
2059
2060 mutex_lock(&priv->conf_mutex);
2061 err = priv->open(dev);
2062 if (err)
2063 goto out;
2064 P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
2065 P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
2066 P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
2067 P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
2068 err = p54_set_edcf(dev);
2069 if (err)
2070 goto out;
2071
2072 memset(priv->bssid, ~0, ETH_ALEN);
2073 priv->mode = NL80211_IFTYPE_MONITOR;
2074 err = p54_setup_mac(dev);
2075 if (err) {
2076 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2077 goto out;
2078 }
2079
2080 queue_delayed_work(dev->workqueue, &priv->work, 0);
2081
2082 priv->softled_state = 0;
2083 err = p54_set_leds(dev);
2084
2085out:
2086 mutex_unlock(&priv->conf_mutex);
2087 return err;
2088}
2089
2090static void p54_stop(struct ieee80211_hw *dev)
2091{
2092 struct p54_common *priv = dev->priv;
2093 struct sk_buff *skb;
2094
2095 mutex_lock(&priv->conf_mutex);
2096 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2097 priv->softled_state = 0;
2098 p54_set_leds(dev);
2099
2100#ifdef CONFIG_P54_LEDS
2101 cancel_delayed_work_sync(&priv->led_work);
2102#endif /* CONFIG_P54_LEDS */
2103 cancel_delayed_work_sync(&priv->work);
2104 if (priv->cached_beacon)
2105 p54_tx_cancel(dev, priv->cached_beacon);
2106
2107 priv->stop(dev);
2108 while ((skb = skb_dequeue(&priv->tx_queue)))
2109 kfree_skb(skb);
2110 priv->cached_beacon = NULL;
2111 priv->tsf_high32 = priv->tsf_low32 = 0;
2112 mutex_unlock(&priv->conf_mutex);
2113}
2114
2115static int p54_add_interface(struct ieee80211_hw *dev,
2116 struct ieee80211_if_init_conf *conf)
2117{
2118 struct p54_common *priv = dev->priv;
2119
2120 mutex_lock(&priv->conf_mutex);
2121 if (priv->mode != NL80211_IFTYPE_MONITOR) {
2122 mutex_unlock(&priv->conf_mutex);
2123 return -EOPNOTSUPP;
2124 }
2125
2126 priv->vif = conf->vif;
2127
2128 switch (conf->type) {
2129 case NL80211_IFTYPE_STATION:
2130 case NL80211_IFTYPE_ADHOC:
2131 case NL80211_IFTYPE_AP:
2132 case NL80211_IFTYPE_MESH_POINT:
2133 priv->mode = conf->type;
2134 break;
2135 default:
2136 mutex_unlock(&priv->conf_mutex);
2137 return -EOPNOTSUPP;
2138 }
2139
2140 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2141 p54_setup_mac(dev);
2142 mutex_unlock(&priv->conf_mutex);
2143 return 0;
2144}
2145
2146static void p54_remove_interface(struct ieee80211_hw *dev,
2147 struct ieee80211_if_init_conf *conf)
2148{
2149 struct p54_common *priv = dev->priv;
2150
2151 mutex_lock(&priv->conf_mutex);
2152 priv->vif = NULL;
2153 if (priv->cached_beacon)
2154 p54_tx_cancel(dev, priv->cached_beacon);
2155 priv->mode = NL80211_IFTYPE_MONITOR;
2156 memset(priv->mac_addr, 0, ETH_ALEN);
2157 memset(priv->bssid, 0, ETH_ALEN);
2158 p54_setup_mac(dev);
2159 mutex_unlock(&priv->conf_mutex);
2160}
2161
2162static int p54_config(struct ieee80211_hw *dev, u32 changed)
2163{
2164 int ret = 0;
2165 struct p54_common *priv = dev->priv;
2166 struct ieee80211_conf *conf = &dev->conf;
2167
2168 mutex_lock(&priv->conf_mutex);
2169 if (changed & IEEE80211_CONF_CHANGE_POWER)
2170 priv->output_power = conf->power_level << 2;
2171 if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
2172 ret = p54_setup_mac(dev);
2173 if (ret)
2174 goto out;
2175 }
2176 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
2177 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
2178 if (ret)
2179 goto out;
2180 }
2181 if (changed & IEEE80211_CONF_CHANGE_PS) {
2182 ret = p54_set_ps(dev);
2183 if (ret)
2184 goto out;
2185 }
2186
2187out:
2188 mutex_unlock(&priv->conf_mutex);
2189 return ret;
2190}
2191
2192static void p54_configure_filter(struct ieee80211_hw *dev,
2193 unsigned int changed_flags,
2194 unsigned int *total_flags,
2195 int mc_count, struct dev_mc_list *mclist)
2196{
2197 struct p54_common *priv = dev->priv;
2198
2199 *total_flags &= FIF_PROMISC_IN_BSS |
2200 FIF_OTHER_BSS;
2201
2202 priv->filter_flags = *total_flags;
2203
2204 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
2205 p54_setup_mac(dev);
2206}
2207
2208static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
2209 const struct ieee80211_tx_queue_params *params)
2210{
2211 struct p54_common *priv = dev->priv;
2212 int ret;
2213
2214 mutex_lock(&priv->conf_mutex);
2215 if ((params) && !(queue > 4)) {
2216 P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
2217 params->cw_min, params->cw_max, params->txop);
2218 ret = p54_set_edcf(dev);
2219 } else
2220 ret = -EINVAL;
2221 mutex_unlock(&priv->conf_mutex);
2222 return ret;
2223}
2224
2225static int p54_init_xbow_synth(struct ieee80211_hw *dev)
2226{
2227 struct p54_common *priv = dev->priv;
2228 struct sk_buff *skb;
2229 struct p54_xbow_synth *xbow;
2230
2231 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow),
2232 P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL);
2233 if (!skb)
2234 return -ENOMEM;
2235
2236 xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
2237 xbow->magic1 = cpu_to_le16(0x1);
2238 xbow->magic2 = cpu_to_le16(0x2);
2239 xbow->freq = cpu_to_le16(5390);
2240 memset(xbow->padding, 0, sizeof(xbow->padding));
2241 priv->tx(dev, skb);
2242 return 0;
2243}
2244
2245static void p54_work(struct work_struct *work)
2246{
2247 struct p54_common *priv = container_of(work, struct p54_common,
2248 work.work);
2249 struct ieee80211_hw *dev = priv->hw;
2250 struct sk_buff *skb;
2251
2252 if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
2253 return ;
2254
2255 /*
2256 * TODO: walk through tx_queue and do the following tasks
2257 * 1. initiate bursts.
2258 * 2. cancel stuck frames / reset the device if necessary.
2259 */
2260
2261 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL,
2262 sizeof(struct p54_statistics),
2263 P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
2264 if (!skb)
2265 return ;
2266
2267 priv->tx(dev, skb);
2268}
2269
2270static int p54_get_stats(struct ieee80211_hw *dev,
2271 struct ieee80211_low_level_stats *stats)
2272{
2273 struct p54_common *priv = dev->priv;
2274
2275 memcpy(stats, &priv->stats, sizeof(*stats));
2276 return 0;
2277}
2278
2279static int p54_get_tx_stats(struct ieee80211_hw *dev,
2280 struct ieee80211_tx_queue_stats *stats)
2281{
2282 struct p54_common *priv = dev->priv;
2283
2284 memcpy(stats, &priv->tx_stats[P54_QUEUE_DATA],
2285 sizeof(stats[0]) * dev->queues);
2286 return 0;
2287}
2288
2289static void p54_bss_info_changed(struct ieee80211_hw *dev,
2290 struct ieee80211_vif *vif,
2291 struct ieee80211_bss_conf *info,
2292 u32 changed)
2293{
2294 struct p54_common *priv = dev->priv;
2295 int ret;
2296
2297 mutex_lock(&priv->conf_mutex);
2298 if (changed & BSS_CHANGED_BSSID) {
2299 memcpy(priv->bssid, info->bssid, ETH_ALEN);
2300 ret = p54_setup_mac(dev);
2301 if (ret)
2302 goto out;
2303 }
2304
2305 if (changed & BSS_CHANGED_BEACON) {
2306 ret = p54_scan(dev, P54_SCAN_EXIT, 0);
2307 if (ret)
2308 goto out;
2309 ret = p54_setup_mac(dev);
2310 if (ret)
2311 goto out;
2312 ret = p54_beacon_update(dev, vif);
2313 if (ret)
2314 goto out;
2315 }
2316 /* XXX: this mimics having two callbacks... clean up */
2317 out:
2318 mutex_unlock(&priv->conf_mutex);
2319
2320 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_BEACON)) {
2321 priv->use_short_slot = info->use_short_slot;
2322 p54_set_edcf(dev);
2323 }
2324 if (changed & BSS_CHANGED_BASIC_RATES) {
2325 if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
2326 priv->basic_rate_mask = (info->basic_rates << 4);
2327 else
2328 priv->basic_rate_mask = info->basic_rates;
2329 p54_setup_mac(dev);
2330 if (priv->fw_var >= 0x500)
2331 p54_scan(dev, P54_SCAN_EXIT, 0);
2332 }
2333 if (changed & BSS_CHANGED_ASSOC) {
2334 if (info->assoc) {
2335 priv->aid = info->aid;
2336 priv->wakeup_timer = info->beacon_int *
2337 info->dtim_period * 5;
2338 p54_setup_mac(dev);
2339 }
2340 }
2341}
2342
2343static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
2344 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2345 struct ieee80211_key_conf *key)
2346{
2347 struct p54_common *priv = dev->priv;
2348 struct sk_buff *skb;
2349 struct p54_keycache *rxkey;
2350 int slot, ret = 0;
2351 u8 algo = 0;
2352
2353 if (modparam_nohwcrypt)
2354 return -EOPNOTSUPP;
2355
2356 mutex_lock(&priv->conf_mutex);
2357 if (cmd == SET_KEY) {
2358 switch (key->alg) {
2359 case ALG_TKIP:
2360 if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
2361 BR_DESC_PRIV_CAP_TKIP))) {
2362 ret = -EOPNOTSUPP;
2363 goto out_unlock;
2364 }
2365 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2366 algo = P54_CRYPTO_TKIPMICHAEL;
2367 break;
2368 case ALG_WEP:
2369 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP)) {
2370 ret = -EOPNOTSUPP;
2371 goto out_unlock;
2372 }
2373 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2374 algo = P54_CRYPTO_WEP;
2375 break;
2376 case ALG_CCMP:
2377 if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)) {
2378 ret = -EOPNOTSUPP;
2379 goto out_unlock;
2380 }
2381 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
2382 algo = P54_CRYPTO_AESCCMP;
2383 break;
2384 default:
2385 ret = -EOPNOTSUPP;
2386 goto out_unlock;
2387 }
2388 slot = bitmap_find_free_region(priv->used_rxkeys,
2389 priv->rx_keycache_size, 0);
2390
2391 if (slot < 0) {
2392 /*
2393 * The device supports the choosen algorithm, but the
2394 * firmware does not provide enough key slots to store
2395 * all of them.
2396 * But encryption offload for outgoing frames is always
2397 * possible, so we just pretend that the upload was
2398 * successful and do the decryption in software.
2399 */
2400
2401 /* mark the key as invalid. */
2402 key->hw_key_idx = 0xff;
2403 goto out_unlock;
2404 }
2405 } else {
2406 slot = key->hw_key_idx;
2407
2408 if (slot == 0xff) {
2409 /* This key was not uploaded into the rx key cache. */
2410
2411 goto out_unlock;
2412 }
2413
2414 bitmap_release_region(priv->used_rxkeys, slot, 0);
2415 algo = 0;
2416 }
2417
2418 skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
2419 P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
2420 if (!skb) {
2421 bitmap_release_region(priv->used_rxkeys, slot, 0);
2422 ret = -ENOSPC;
2423 goto out_unlock;
2424 }
2425
2426 rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
2427 rxkey->entry = slot;
2428 rxkey->key_id = key->keyidx;
2429 rxkey->key_type = algo;
2430 if (sta)
2431 memcpy(rxkey->mac, sta->addr, ETH_ALEN);
2432 else
2433 memset(rxkey->mac, ~0, ETH_ALEN);
2434 if (key->alg != ALG_TKIP) {
2435 rxkey->key_len = min((u8)16, key->keylen);
2436 memcpy(rxkey->key, key->key, rxkey->key_len);
2437 } else {
2438 rxkey->key_len = 24;
2439 memcpy(rxkey->key, key->key, 16);
2440 memcpy(&(rxkey->key[16]), &(key->key
2441 [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
2442 }
2443
2444 priv->tx(dev, skb);
2445 key->hw_key_idx = slot;
2446
2447out_unlock:
2448 mutex_unlock(&priv->conf_mutex);
2449 return ret;
2450}
2451
2452#ifdef CONFIG_P54_LEDS
2453static void p54_update_leds(struct work_struct *work)
2454{
2455 struct p54_common *priv = container_of(work, struct p54_common,
2456 led_work.work);
2457 int err, i, tmp, blink_delay = 400;
2458 bool rerun = false;
2459
2460 /* Don't toggle the LED, when the device is down. */
2461 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
2462 return ;
2463
2464 for (i = 0; i < ARRAY_SIZE(priv->leds); i++)
2465 if (priv->leds[i].toggled) {
2466 priv->softled_state |= BIT(i);
2467
2468 tmp = 70 + 200 / (priv->leds[i].toggled);
2469 if (tmp < blink_delay)
2470 blink_delay = tmp;
2471
2472 if (priv->leds[i].led_dev.brightness == LED_OFF)
2473 rerun = true;
2474
2475 priv->leds[i].toggled =
2476 !!priv->leds[i].led_dev.brightness;
2477 } else
2478 priv->softled_state &= ~BIT(i);
2479
2480 err = p54_set_leds(priv->hw);
2481 if (err && net_ratelimit())
2482 printk(KERN_ERR "%s: failed to update LEDs.\n",
2483 wiphy_name(priv->hw->wiphy));
2484
2485 if (rerun)
2486 queue_delayed_work(priv->hw->workqueue, &priv->led_work,
2487 msecs_to_jiffies(blink_delay));
2488}
2489
2490static void p54_led_brightness_set(struct led_classdev *led_dev,
2491 enum led_brightness brightness)
2492{
2493 struct p54_led_dev *led = container_of(led_dev, struct p54_led_dev,
2494 led_dev);
2495 struct ieee80211_hw *dev = led->hw_dev;
2496 struct p54_common *priv = dev->priv;
2497
2498 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
2499 return ;
2500
2501 if (brightness) {
2502 led->toggled++;
2503 queue_delayed_work(priv->hw->workqueue, &priv->led_work,
2504 HZ/10);
2505 }
2506}
2507
2508static int p54_register_led(struct ieee80211_hw *dev,
2509 unsigned int led_index,
2510 char *name, char *trigger)
2511{
2512 struct p54_common *priv = dev->priv;
2513 struct p54_led_dev *led = &priv->leds[led_index];
2514 int err;
2515
2516 if (led->registered)
2517 return -EEXIST;
2518
2519 snprintf(led->name, sizeof(led->name), "p54-%s::%s",
2520 wiphy_name(dev->wiphy), name);
2521 led->hw_dev = dev;
2522 led->index = led_index;
2523 led->led_dev.name = led->name;
2524 led->led_dev.default_trigger = trigger;
2525 led->led_dev.brightness_set = p54_led_brightness_set;
2526
2527 err = led_classdev_register(wiphy_dev(dev->wiphy), &led->led_dev);
2528 if (err)
2529 printk(KERN_ERR "%s: Failed to register %s LED.\n",
2530 wiphy_name(dev->wiphy), name);
2531 else
2532 led->registered = 1;
2533
2534 return err;
2535}
2536
2537static int p54_init_leds(struct ieee80211_hw *dev)
2538{
2539 struct p54_common *priv = dev->priv;
2540 int err;
2541
2542 /*
2543 * TODO:
2544 * Figure out if the EEPROM contains some hints about the number
2545 * of available/programmable LEDs of the device.
2546 */
2547
2548 INIT_DELAYED_WORK(&priv->led_work, p54_update_leds);
2549
2550 err = p54_register_led(dev, 0, "assoc",
2551 ieee80211_get_assoc_led_name(dev));
2552 if (err)
2553 return err;
2554
2555 err = p54_register_led(dev, 1, "tx",
2556 ieee80211_get_tx_led_name(dev));
2557 if (err)
2558 return err;
2559
2560 err = p54_register_led(dev, 2, "rx",
2561 ieee80211_get_rx_led_name(dev));
2562 if (err)
2563 return err;
2564
2565 err = p54_register_led(dev, 3, "radio",
2566 ieee80211_get_radio_led_name(dev));
2567 if (err)
2568 return err;
2569
2570 err = p54_set_leds(dev);
2571 return err;
2572}
2573
2574static void p54_unregister_leds(struct ieee80211_hw *dev)
2575{
2576 struct p54_common *priv = dev->priv;
2577 int i;
2578
2579 for (i = 0; i < ARRAY_SIZE(priv->leds); i++)
2580 if (priv->leds[i].registered)
2581 led_classdev_unregister(&priv->leds[i].led_dev);
2582}
2583#endif /* CONFIG_P54_LEDS */
2584
2585static const struct ieee80211_ops p54_ops = {
2586 .tx = p54_tx,
2587 .start = p54_start,
2588 .stop = p54_stop,
2589 .add_interface = p54_add_interface,
2590 .remove_interface = p54_remove_interface,
2591 .set_tim = p54_set_tim,
2592 .sta_notify = p54_sta_notify,
2593 .set_key = p54_set_key,
2594 .config = p54_config,
2595 .bss_info_changed = p54_bss_info_changed,
2596 .configure_filter = p54_configure_filter,
2597 .conf_tx = p54_conf_tx,
2598 .get_stats = p54_get_stats,
2599 .get_tx_stats = p54_get_tx_stats
2600};
2601
2602struct ieee80211_hw *p54_init_common(size_t priv_data_len)
2603{
2604 struct ieee80211_hw *dev;
2605 struct p54_common *priv;
2606
2607 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
2608 if (!dev)
2609 return NULL;
2610
2611 priv = dev->priv;
2612 priv->hw = dev;
2613 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
2614 priv->basic_rate_mask = 0x15f;
2615 skb_queue_head_init(&priv->tx_queue);
2616 dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2617 IEEE80211_HW_SIGNAL_DBM |
2618 IEEE80211_HW_NOISE_DBM;
2619
2620 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2621 BIT(NL80211_IFTYPE_ADHOC) |
2622 BIT(NL80211_IFTYPE_AP) |
2623 BIT(NL80211_IFTYPE_MESH_POINT);
2624
2625 dev->channel_change_time = 1000; /* TODO: find actual value */
2626 priv->tx_stats[P54_QUEUE_BEACON].limit = 1;
2627 priv->tx_stats[P54_QUEUE_FWSCAN].limit = 1;
2628 priv->tx_stats[P54_QUEUE_MGMT].limit = 3;
2629 priv->tx_stats[P54_QUEUE_CAB].limit = 3;
2630 priv->tx_stats[P54_QUEUE_DATA].limit = 5;
2631 dev->queues = 1;
2632 priv->noise = -94;
2633 /*
2634 * We support at most 8 tries no matter which rate they're at,
2635 * we cannot support max_rates * max_rate_tries as we set it
2636 * here, but setting it correctly to 4/2 or so would limit us
2637 * artificially if the RC algorithm wants just two rates, so
2638 * let's say 4/7, we'll redistribute it at TX time, see the
2639 * comments there.
2640 */
2641 dev->max_rates = 4;
2642 dev->max_rate_tries = 7;
2643 dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
2644 sizeof(struct p54_tx_data);
2645
2646 mutex_init(&priv->conf_mutex);
2647 init_completion(&priv->eeprom_comp);
2648 INIT_DELAYED_WORK(&priv->work, p54_work);
2649
2650 return dev;
2651}
2652EXPORT_SYMBOL_GPL(p54_init_common);
2653
2654int p54_register_common(struct ieee80211_hw *dev, struct device *pdev)
2655{
2656 int err;
2657
2658 err = ieee80211_register_hw(dev);
2659 if (err) {
2660 dev_err(pdev, "Cannot register device (%d).\n", err);
2661 return err;
2662 }
2663
2664#ifdef CONFIG_P54_LEDS
2665 err = p54_init_leds(dev);
2666 if (err)
2667 return err;
2668#endif /* CONFIG_P54_LEDS */
2669
2670 dev_info(pdev, "is registered as '%s'\n", wiphy_name(dev->wiphy));
2671 return 0;
2672}
2673EXPORT_SYMBOL_GPL(p54_register_common);
2674
2675void p54_free_common(struct ieee80211_hw *dev)
2676{
2677 struct p54_common *priv = dev->priv;
2678 kfree(priv->iq_autocal);
2679 kfree(priv->output_limit);
2680 kfree(priv->curve_data);
2681 kfree(priv->used_rxkeys);
2682
2683#ifdef CONFIG_P54_LEDS
2684 p54_unregister_leds(dev);
2685#endif /* CONFIG_P54_LEDS */
2686}
2687EXPORT_SYMBOL_GPL(p54_free_common);
diff --git a/drivers/net/wireless/p54/p54common.h b/drivers/net/wireless/p54/p54common.h
deleted file mode 100644
index 75ead7a150fc..000000000000
--- a/drivers/net/wireless/p54/p54common.h
+++ /dev/null
@@ -1,644 +0,0 @@
1#ifndef P54COMMON_H
2#define P54COMMON_H
3
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on:
11 * - the islsm (softmac prism54) driver, which is:
12 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
13 *
14 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
15 * Copyright (C) 2007 Conexant Systems, Inc.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22struct bootrec {
23 __le32 code;
24 __le32 len;
25 u32 data[10];
26} __attribute__((packed));
27
28#define PDR_SYNTH_FRONTEND_MASK 0x0007
29#define PDR_SYNTH_FRONTEND_DUETTE3 0x0001
30#define PDR_SYNTH_FRONTEND_DUETTE2 0x0002
31#define PDR_SYNTH_FRONTEND_FRISBEE 0x0003
32#define PDR_SYNTH_FRONTEND_XBOW 0x0004
33#define PDR_SYNTH_FRONTEND_LONGBOW 0x0005
34#define PDR_SYNTH_IQ_CAL_MASK 0x0018
35#define PDR_SYNTH_IQ_CAL_PA_DETECTOR 0x0000
36#define PDR_SYNTH_IQ_CAL_DISABLED 0x0008
37#define PDR_SYNTH_IQ_CAL_ZIF 0x0010
38#define PDR_SYNTH_FAA_SWITCH_MASK 0x0020
39#define PDR_SYNTH_FAA_SWITCH_ENABLED 0x0020
40#define PDR_SYNTH_24_GHZ_MASK 0x0040
41#define PDR_SYNTH_24_GHZ_DISABLED 0x0040
42#define PDR_SYNTH_5_GHZ_MASK 0x0080
43#define PDR_SYNTH_5_GHZ_DISABLED 0x0080
44#define PDR_SYNTH_RX_DIV_MASK 0x0100
45#define PDR_SYNTH_RX_DIV_SUPPORTED 0x0100
46#define PDR_SYNTH_TX_DIV_MASK 0x0200
47#define PDR_SYNTH_TX_DIV_SUPPORTED 0x0200
48
49struct bootrec_exp_if {
50 __le16 role;
51 __le16 if_id;
52 __le16 variant;
53 __le16 btm_compat;
54 __le16 top_compat;
55} __attribute__((packed));
56
57#define BR_DESC_PRIV_CAP_WEP BIT(0)
58#define BR_DESC_PRIV_CAP_TKIP BIT(1)
59#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
60#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
61#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
62#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
63
64struct bootrec_desc {
65 __le16 modes;
66 __le16 flags;
67 __le32 rx_start;
68 __le32 rx_end;
69 u8 headroom;
70 u8 tailroom;
71 u8 tx_queues;
72 u8 tx_depth;
73 u8 privacy_caps;
74 u8 rx_keycache_size;
75 u8 time_size;
76 u8 padding;
77 u8 rates[16];
78 u8 padding2[4];
79 __le16 rx_mtu;
80} __attribute__((packed));
81
82#define BR_CODE_MIN 0x80000000
83#define BR_CODE_COMPONENT_ID 0x80000001
84#define BR_CODE_COMPONENT_VERSION 0x80000002
85#define BR_CODE_DEPENDENT_IF 0x80000003
86#define BR_CODE_EXPOSED_IF 0x80000004
87#define BR_CODE_DESCR 0x80000101
88#define BR_CODE_MAX 0x8FFFFFFF
89#define BR_CODE_END_OF_BRA 0xFF0000FF
90#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
91
92#define P54_HDR_FLAG_DATA_ALIGN BIT(14)
93#define P54_HDR_FLAG_DATA_OUT_PROMISC BIT(0)
94#define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
95#define P54_HDR_FLAG_DATA_OUT_SEQNR BIT(2)
96#define P54_HDR_FLAG_DATA_OUT_BIT3 BIT(3)
97#define P54_HDR_FLAG_DATA_OUT_BURST BIT(4)
98#define P54_HDR_FLAG_DATA_OUT_NOCANCEL BIT(5)
99#define P54_HDR_FLAG_DATA_OUT_CLEARTIM BIT(6)
100#define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
101#define P54_HDR_FLAG_DATA_OUT_COMPRESS BIT(8)
102#define P54_HDR_FLAG_DATA_OUT_CONCAT BIT(9)
103#define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
104#define P54_HDR_FLAG_DATA_OUT_WAITEOSP BIT(11)
105
106#define P54_HDR_FLAG_DATA_IN_FCS_GOOD BIT(0)
107#define P54_HDR_FLAG_DATA_IN_MATCH_MAC BIT(1)
108#define P54_HDR_FLAG_DATA_IN_MCBC BIT(2)
109#define P54_HDR_FLAG_DATA_IN_BEACON BIT(3)
110#define P54_HDR_FLAG_DATA_IN_MATCH_BSS BIT(4)
111#define P54_HDR_FLAG_DATA_IN_BCAST_BSS BIT(5)
112#define P54_HDR_FLAG_DATA_IN_DATA BIT(6)
113#define P54_HDR_FLAG_DATA_IN_TRUNCATED BIT(7)
114#define P54_HDR_FLAG_DATA_IN_BIT8 BIT(8)
115#define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
116
117/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
118
119struct pda_entry {
120 __le16 len; /* includes both code and data */
121 __le16 code;
122 u8 data[0];
123} __attribute__ ((packed));
124
125struct eeprom_pda_wrap {
126 __le32 magic;
127 __le16 pad;
128 __le16 len;
129 __le32 arm_opcode;
130 u8 data[0];
131} __attribute__ ((packed));
132
133struct p54_iq_autocal_entry {
134 __le16 iq_param[4];
135} __attribute__ ((packed));
136
137struct pda_iq_autocal_entry {
138 __le16 freq;
139 struct p54_iq_autocal_entry params;
140} __attribute__ ((packed));
141
142struct pda_channel_output_limit {
143 __le16 freq;
144 u8 val_bpsk;
145 u8 val_qpsk;
146 u8 val_16qam;
147 u8 val_64qam;
148 u8 rate_set_mask;
149 u8 rate_set_size;
150} __attribute__ ((packed));
151
152struct pda_pa_curve_data_sample_rev0 {
153 u8 rf_power;
154 u8 pa_detector;
155 u8 pcv;
156} __attribute__ ((packed));
157
158struct pda_pa_curve_data_sample_rev1 {
159 u8 rf_power;
160 u8 pa_detector;
161 u8 data_barker;
162 u8 data_bpsk;
163 u8 data_qpsk;
164 u8 data_16qam;
165 u8 data_64qam;
166} __attribute__ ((packed));
167
168struct p54_pa_curve_data_sample {
169 u8 rf_power;
170 u8 pa_detector;
171 u8 data_barker;
172 u8 data_bpsk;
173 u8 data_qpsk;
174 u8 data_16qam;
175 u8 data_64qam;
176 u8 padding;
177} __attribute__ ((packed));
178
179struct pda_pa_curve_data {
180 u8 cal_method_rev;
181 u8 channels;
182 u8 points_per_channel;
183 u8 padding;
184 u8 data[0];
185} __attribute__ ((packed));
186
187struct pda_rssi_cal_entry {
188 __le16 mul;
189 __le16 add;
190} __attribute__ ((packed));
191
192struct pda_country {
193 u8 regdomain;
194 u8 alpha2[2];
195 u8 flags;
196} __attribute__ ((packed));
197
198/*
199 * Warning: Longbow's structures are bogus.
200 */
201struct p54_channel_output_limit_longbow {
202 __le16 rf_power_points[12];
203} __attribute__ ((packed));
204
205struct p54_pa_curve_data_sample_longbow {
206 __le16 rf_power;
207 __le16 pa_detector;
208 struct {
209 __le16 data[4];
210 } points[3] __attribute__ ((packed));
211} __attribute__ ((packed));
212
213struct pda_custom_wrapper {
214 __le16 entries;
215 __le16 entry_size;
216 __le16 offset;
217 __le16 len;
218 u8 data[0];
219} __attribute__ ((packed));
220
221/*
222 * this defines the PDR codes used to build PDAs as defined in document
223 * number 553155. The current implementation mirrors version 1.1 of the
224 * document and lists only PDRs supported by the ARM platform.
225 */
226
227/* common and choice range (0x0000 - 0x0fff) */
228#define PDR_END 0x0000
229#define PDR_MANUFACTURING_PART_NUMBER 0x0001
230#define PDR_PDA_VERSION 0x0002
231#define PDR_NIC_SERIAL_NUMBER 0x0003
232
233#define PDR_MAC_ADDRESS 0x0101
234#define PDR_REGULATORY_DOMAIN_LIST 0x0103
235#define PDR_TEMPERATURE_TYPE 0x0107
236
237#define PDR_PRISM_PCI_IDENTIFIER 0x0402
238
239/* ARM range (0x1000 - 0x1fff) */
240#define PDR_COUNTRY_INFORMATION 0x1000
241#define PDR_INTERFACE_LIST 0x1001
242#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
243#define PDR_OEM_NAME 0x1003
244#define PDR_PRODUCT_NAME 0x1004
245#define PDR_UTF8_OEM_NAME 0x1005
246#define PDR_UTF8_PRODUCT_NAME 0x1006
247#define PDR_COUNTRY_LIST 0x1007
248#define PDR_DEFAULT_COUNTRY 0x1008
249
250#define PDR_ANTENNA_GAIN 0x1100
251
252#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
253#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
254#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
255#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
256#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
257#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
258#define PDR_REGULATORY_POWER_LIMITS 0x1907
259#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
260#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
261#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
262
263/* reserved range (0x2000 - 0x7fff) */
264
265/* customer range (0x8000 - 0xffff) */
266#define PDR_BASEBAND_REGISTERS 0x8000
267#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
268
269/* used by our modificated eeprom image */
270#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM 0xDEAD
271#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM 0xBEEF
272#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM 0xB05D
273
274/* PDR definitions for default country & country list */
275#define PDR_COUNTRY_CERT_CODE 0x80
276#define PDR_COUNTRY_CERT_CODE_REAL 0x00
277#define PDR_COUNTRY_CERT_CODE_PSEUDO 0x80
278#define PDR_COUNTRY_CERT_BAND 0x40
279#define PDR_COUNTRY_CERT_BAND_2GHZ 0x00
280#define PDR_COUNTRY_CERT_BAND_5GHZ 0x40
281#define PDR_COUNTRY_CERT_IODOOR 0x30
282#define PDR_COUNTRY_CERT_IODOOR_BOTH 0x00
283#define PDR_COUNTRY_CERT_IODOOR_INDOOR 0x20
284#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
285#define PDR_COUNTRY_CERT_INDEX 0x0F
286
287struct p54_eeprom_lm86 {
288 union {
289 struct {
290 __le16 offset;
291 __le16 len;
292 u8 data[0];
293 } v1;
294 struct {
295 __le32 offset;
296 __le16 len;
297 u8 magic2;
298 u8 pad;
299 u8 magic[4];
300 u8 data[0];
301 } v2;
302 } __attribute__ ((packed));
303} __attribute__ ((packed));
304
305enum p54_rx_decrypt_status {
306 P54_DECRYPT_NONE = 0,
307 P54_DECRYPT_OK,
308 P54_DECRYPT_NOKEY,
309 P54_DECRYPT_NOMICHAEL,
310 P54_DECRYPT_NOCKIPMIC,
311 P54_DECRYPT_FAIL_WEP,
312 P54_DECRYPT_FAIL_TKIP,
313 P54_DECRYPT_FAIL_MICHAEL,
314 P54_DECRYPT_FAIL_CKIPKP,
315 P54_DECRYPT_FAIL_CKIPMIC,
316 P54_DECRYPT_FAIL_AESCCMP
317};
318
319struct p54_rx_data {
320 __le16 flags;
321 __le16 len;
322 __le16 freq;
323 u8 antenna;
324 u8 rate;
325 u8 rssi;
326 u8 quality;
327 u8 decrypt_status;
328 u8 rssi_raw;
329 __le32 tsf32;
330 __le32 unalloc0;
331 u8 align[0];
332} __attribute__ ((packed));
333
334enum p54_trap_type {
335 P54_TRAP_SCAN = 0,
336 P54_TRAP_TIMER,
337 P54_TRAP_BEACON_TX,
338 P54_TRAP_FAA_RADIO_ON,
339 P54_TRAP_FAA_RADIO_OFF,
340 P54_TRAP_RADAR,
341 P54_TRAP_NO_BEACON,
342 P54_TRAP_TBTT,
343 P54_TRAP_SCO_ENTER,
344 P54_TRAP_SCO_EXIT
345};
346
347struct p54_trap {
348 __le16 event;
349 __le16 frequency;
350} __attribute__ ((packed));
351
352enum p54_frame_sent_status {
353 P54_TX_OK = 0,
354 P54_TX_FAILED,
355 P54_TX_PSM,
356 P54_TX_PSM_CANCELLED = 4
357};
358
359struct p54_frame_sent {
360 u8 status;
361 u8 tries;
362 u8 ack_rssi;
363 u8 quality;
364 __le16 seq;
365 u8 antenna;
366 u8 padding;
367} __attribute__ ((packed));
368
369enum p54_tx_data_crypt {
370 P54_CRYPTO_NONE = 0,
371 P54_CRYPTO_WEP,
372 P54_CRYPTO_TKIP,
373 P54_CRYPTO_TKIPMICHAEL,
374 P54_CRYPTO_CCX_WEPMIC,
375 P54_CRYPTO_CCX_KPMIC,
376 P54_CRYPTO_CCX_KP,
377 P54_CRYPTO_AESCCMP
378};
379
380enum p54_tx_data_queue {
381 P54_QUEUE_BEACON = 0,
382 P54_QUEUE_FWSCAN = 1,
383 P54_QUEUE_MGMT = 2,
384 P54_QUEUE_CAB = 3,
385 P54_QUEUE_DATA = 4,
386
387 P54_QUEUE_AC_NUM = 4,
388 P54_QUEUE_AC_VO = 4,
389 P54_QUEUE_AC_VI = 5,
390 P54_QUEUE_AC_BE = 6,
391 P54_QUEUE_AC_BK = 7,
392
393 /* keep last */
394 P54_QUEUE_NUM = 8,
395};
396
397struct p54_tx_data {
398 u8 rateset[8];
399 u8 rts_rate_idx;
400 u8 crypt_offset;
401 u8 key_type;
402 u8 key_len;
403 u8 key[16];
404 u8 hw_queue;
405 u8 backlog;
406 __le16 durations[4];
407 u8 tx_antenna;
408 union {
409 struct {
410 u8 cts_rate;
411 __le16 output_power;
412 } __attribute__((packed)) longbow;
413 struct {
414 u8 output_power;
415 u8 cts_rate;
416 u8 unalloc;
417 } __attribute__ ((packed)) normal;
418 } __attribute__ ((packed));
419 u8 unalloc2[2];
420 u8 align[0];
421} __attribute__ ((packed));
422
423/* unit is ms */
424#define P54_TX_FRAME_LIFETIME 2000
425#define P54_TX_TIMEOUT 4000
426#define P54_STATISTICS_UPDATE 5000
427
428#define P54_FILTER_TYPE_NONE 0
429#define P54_FILTER_TYPE_STATION BIT(0)
430#define P54_FILTER_TYPE_IBSS BIT(1)
431#define P54_FILTER_TYPE_AP BIT(2)
432#define P54_FILTER_TYPE_TRANSPARENT BIT(3)
433#define P54_FILTER_TYPE_PROMISCUOUS BIT(4)
434#define P54_FILTER_TYPE_HIBERNATE BIT(5)
435#define P54_FILTER_TYPE_NOACK BIT(6)
436#define P54_FILTER_TYPE_RX_DISABLED BIT(7)
437
438struct p54_setup_mac {
439 __le16 mac_mode;
440 u8 mac_addr[ETH_ALEN];
441 u8 bssid[ETH_ALEN];
442 u8 rx_antenna;
443 u8 rx_align;
444 union {
445 struct {
446 __le32 basic_rate_mask;
447 u8 rts_rates[8];
448 __le32 rx_addr;
449 __le16 max_rx;
450 __le16 rxhw;
451 __le16 wakeup_timer;
452 __le16 unalloc0;
453 } v1 __attribute__ ((packed));
454 struct {
455 __le32 rx_addr;
456 __le16 max_rx;
457 __le16 rxhw;
458 __le16 timer;
459 __le16 truncate;
460 __le32 basic_rate_mask;
461 u8 sbss_offset;
462 u8 mcast_window;
463 u8 rx_rssi_threshold;
464 u8 rx_ed_threshold;
465 __le32 ref_clock;
466 __le16 lpf_bandwidth;
467 __le16 osc_start_delay;
468 } v2 __attribute__ ((packed));
469 } __attribute__ ((packed));
470} __attribute__ ((packed));
471
472#define P54_SETUP_V1_LEN 40
473#define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
474
475#define P54_SCAN_EXIT BIT(0)
476#define P54_SCAN_TRAP BIT(1)
477#define P54_SCAN_ACTIVE BIT(2)
478#define P54_SCAN_FILTER BIT(3)
479
480struct p54_scan_head {
481 __le16 mode;
482 __le16 dwell;
483 u8 scan_params[20];
484 __le16 freq;
485} __attribute__ ((packed));
486
487struct p54_scan_body {
488 u8 pa_points_per_curve;
489 u8 val_barker;
490 u8 val_bpsk;
491 u8 val_qpsk;
492 u8 val_16qam;
493 u8 val_64qam;
494 struct p54_pa_curve_data_sample curve_data[8];
495 u8 dup_bpsk;
496 u8 dup_qpsk;
497 u8 dup_16qam;
498 u8 dup_64qam;
499} __attribute__ ((packed));
500
501struct p54_scan_body_longbow {
502 struct p54_channel_output_limit_longbow power_limits;
503 struct p54_pa_curve_data_sample_longbow curve_data[8];
504 __le16 unkn[6]; /* maybe more power_limits or rate_mask */
505} __attribute__ ((packed));
506
507union p54_scan_body_union {
508 struct p54_scan_body normal;
509 struct p54_scan_body_longbow longbow;
510} __attribute__ ((packed));
511
512struct p54_scan_tail_rate {
513 __le32 basic_rate_mask;
514 u8 rts_rates[8];
515} __attribute__ ((packed));
516
517struct p54_led {
518 __le16 flags;
519 __le16 mask[2];
520 __le16 delay[2];
521} __attribute__ ((packed));
522
523struct p54_edcf {
524 u8 flags;
525 u8 slottime;
526 u8 sifs;
527 u8 eofpad;
528 struct p54_edcf_queue_param queue[8];
529 u8 mapping[4];
530 __le16 frameburst;
531 __le16 round_trip_delay;
532} __attribute__ ((packed));
533
534struct p54_statistics {
535 __le32 rx_success;
536 __le32 rx_bad_fcs;
537 __le32 rx_abort;
538 __le32 rx_abort_phy;
539 __le32 rts_success;
540 __le32 rts_fail;
541 __le32 tsf32;
542 __le32 airtime;
543 __le32 noise;
544 __le32 sample_noise[8];
545 __le32 sample_cca;
546 __le32 sample_tx;
547} __attribute__ ((packed));
548
549struct p54_xbow_synth {
550 __le16 magic1;
551 __le16 magic2;
552 __le16 freq;
553 u32 padding[5];
554} __attribute__ ((packed));
555
556struct p54_timer {
557 __le32 interval;
558} __attribute__ ((packed));
559
560struct p54_keycache {
561 u8 entry;
562 u8 key_id;
563 u8 mac[ETH_ALEN];
564 u8 padding[2];
565 u8 key_type;
566 u8 key_len;
567 u8 key[24];
568} __attribute__ ((packed));
569
570struct p54_burst {
571 u8 flags;
572 u8 queue;
573 u8 backlog;
574 u8 pad;
575 __le16 durations[32];
576} __attribute__ ((packed));
577
578struct p54_psm_interval {
579 __le16 interval;
580 __le16 periods;
581} __attribute__ ((packed));
582
583#define P54_PSM_CAM 0
584#define P54_PSM BIT(0)
585#define P54_PSM_DTIM BIT(1)
586#define P54_PSM_MCBC BIT(2)
587#define P54_PSM_CHECKSUM BIT(3)
588#define P54_PSM_SKIP_MORE_DATA BIT(4)
589#define P54_PSM_BEACON_TIMEOUT BIT(5)
590#define P54_PSM_HFOSLEEP BIT(6)
591#define P54_PSM_AUTOSWITCH_SLEEP BIT(7)
592#define P54_PSM_LPIT BIT(8)
593#define P54_PSM_BF_UCAST_SKIP BIT(9)
594#define P54_PSM_BF_MCAST_SKIP BIT(10)
595
596struct p54_psm {
597 __le16 mode;
598 __le16 aid;
599 struct p54_psm_interval intervals[4];
600 u8 beacon_rssi_skip_max;
601 u8 rssi_delta_threshold;
602 u8 nr;
603 u8 exclude[1];
604} __attribute__ ((packed));
605
606#define MC_FILTER_ADDRESS_NUM 4
607
608struct p54_group_address_table {
609 __le16 filter_enable;
610 __le16 num_address;
611 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
612} __attribute__ ((packed));
613
614struct p54_txcancel {
615 __le32 req_id;
616} __attribute__ ((packed));
617
618struct p54_sta_unlock {
619 u8 addr[ETH_ALEN];
620 u16 padding;
621} __attribute__ ((packed));
622
623#define P54_TIM_CLEAR BIT(15)
624struct p54_tim {
625 u8 count;
626 u8 padding[3];
627 __le16 entry[8];
628} __attribute__ ((packed));
629
630struct p54_cce_quiet {
631 __le32 period;
632} __attribute__ ((packed));
633
634struct p54_bt_balancer {
635 __le16 prio_thresh;
636 __le16 acl_thresh;
637} __attribute__ ((packed));
638
639struct p54_arp_table {
640 __le16 filter_enable;
641 u8 ipv4_addr[4];
642} __attribute__ ((packed));
643
644#endif /* P54COMMON_H */
diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c
index b1610ea4bb3d..d348c265e867 100644
--- a/drivers/net/wireless/p54/p54pci.c
+++ b/drivers/net/wireless/p54/p54pci.c
@@ -22,6 +22,7 @@
22#include <net/mac80211.h> 22#include <net/mac80211.h>
23 23
24#include "p54.h" 24#include "p54.h"
25#include "lmac.h"
25#include "p54pci.h" 26#include "p54pci.h"
26 27
27MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 28MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
@@ -564,7 +565,6 @@ static int __devinit p54p_probe(struct pci_dev *pdev,
564 565
565 err_free_common: 566 err_free_common:
566 release_firmware(priv->firmware); 567 release_firmware(priv->firmware);
567 p54_free_common(dev);
568 pci_free_consistent(pdev, sizeof(*priv->ring_control), 568 pci_free_consistent(pdev, sizeof(*priv->ring_control),
569 priv->ring_control, priv->ring_control_dma); 569 priv->ring_control, priv->ring_control_dma);
570 570
@@ -573,7 +573,7 @@ static int __devinit p54p_probe(struct pci_dev *pdev,
573 573
574 err_free_dev: 574 err_free_dev:
575 pci_set_drvdata(pdev, NULL); 575 pci_set_drvdata(pdev, NULL);
576 ieee80211_free_hw(dev); 576 p54_free_common(dev);
577 577
578 err_free_reg: 578 err_free_reg:
579 pci_release_regions(pdev); 579 pci_release_regions(pdev);
@@ -590,16 +590,15 @@ static void __devexit p54p_remove(struct pci_dev *pdev)
590 if (!dev) 590 if (!dev)
591 return; 591 return;
592 592
593 ieee80211_unregister_hw(dev); 593 p54_unregister_common(dev);
594 priv = dev->priv; 594 priv = dev->priv;
595 release_firmware(priv->firmware); 595 release_firmware(priv->firmware);
596 pci_free_consistent(pdev, sizeof(*priv->ring_control), 596 pci_free_consistent(pdev, sizeof(*priv->ring_control),
597 priv->ring_control, priv->ring_control_dma); 597 priv->ring_control, priv->ring_control_dma);
598 p54_free_common(dev);
599 iounmap(priv->map); 598 iounmap(priv->map);
600 pci_release_regions(pdev); 599 pci_release_regions(pdev);
601 pci_disable_device(pdev); 600 pci_disable_device(pdev);
602 ieee80211_free_hw(dev); 601 p54_free_common(dev);
603} 602}
604 603
605#ifdef CONFIG_PM 604#ifdef CONFIG_PM
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c
index 83116baeb110..7ef191a9d792 100644
--- a/drivers/net/wireless/p54/p54spi.c
+++ b/drivers/net/wireless/p54/p54spi.c
@@ -34,7 +34,7 @@
34#include "p54spi_eeprom.h" 34#include "p54spi_eeprom.h"
35#include "p54.h" 35#include "p54.h"
36 36
37#include "p54common.h" 37#include "lmac.h"
38 38
39MODULE_FIRMWARE("3826.arm"); 39MODULE_FIRMWARE("3826.arm");
40MODULE_ALIAS("stlc45xx"); 40MODULE_ALIAS("stlc45xx");
@@ -713,7 +713,7 @@ static int __devexit p54spi_remove(struct spi_device *spi)
713{ 713{
714 struct p54s_priv *priv = dev_get_drvdata(&spi->dev); 714 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
715 715
716 ieee80211_unregister_hw(priv->hw); 716 p54_unregister_common(priv->hw);
717 717
718 free_irq(gpio_to_irq(p54spi_gpio_irq), spi); 718 free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
719 719
@@ -724,7 +724,6 @@ static int __devexit p54spi_remove(struct spi_device *spi)
724 mutex_destroy(&priv->mutex); 724 mutex_destroy(&priv->mutex);
725 725
726 p54_free_common(priv->hw); 726 p54_free_common(priv->hw);
727 ieee80211_free_hw(priv->hw);
728 727
729 return 0; 728 return 0;
730} 729}
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 0e877a104a89..461d88f5ceb7 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -22,6 +22,7 @@
22#include <net/mac80211.h> 22#include <net/mac80211.h>
23 23
24#include "p54.h" 24#include "p54.h"
25#include "lmac.h"
25#include "p54usb.h" 26#include "p54usb.h"
26 27
27MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 28MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
@@ -961,7 +962,7 @@ err_free_fw:
961 release_firmware(priv->fw); 962 release_firmware(priv->fw);
962 963
963err_free_dev: 964err_free_dev:
964 ieee80211_free_hw(dev); 965 p54_free_common(dev);
965 usb_set_intfdata(intf, NULL); 966 usb_set_intfdata(intf, NULL);
966 usb_put_dev(udev); 967 usb_put_dev(udev);
967 return err; 968 return err;
@@ -975,13 +976,12 @@ static void __devexit p54u_disconnect(struct usb_interface *intf)
975 if (!dev) 976 if (!dev)
976 return; 977 return;
977 978
978 ieee80211_unregister_hw(dev); 979 p54_unregister_common(dev);
979 980
980 priv = dev->priv; 981 priv = dev->priv;
981 usb_put_dev(interface_to_usbdev(intf)); 982 usb_put_dev(interface_to_usbdev(intf));
982 release_firmware(priv->fw); 983 release_firmware(priv->fw);
983 p54_free_common(dev); 984 p54_free_common(dev);
984 ieee80211_free_hw(dev);
985} 985}
986 986
987static int p54u_pre_reset(struct usb_interface *intf) 987static int p54u_pre_reset(struct usb_interface *intf)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 05:11:15 -0500