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authorAvinash Patil <patila@marvell.com>2013-01-04 00:21:30 -0500
committerJohn W. Linville <linville@tuxdriver.com>2013-01-07 15:18:30 -0500
commitfc3314609047daf472b3ffc49f9a1c5608068713 (patch)
tree8e5c9a01fb61337e7f7a996ff78d31f749d47112 /drivers/net/wireless/mwifiex/pcie.h
parentc6d1d87a10d1e5317701676c39bbec20e4651b91 (diff)
mwifiex: use pci_alloc/free_consistent APIs for PCIe
This patch uses pci_alloc_consistent and pci_free_consistent APIs for mwifiex_pcie driver. Consistent DMA memory is allocated for TX, RX and event rings. Command buffer and command response buffer also uses map/unmap memory APIs to download commands and get command responses. Signed-off-by: Avinash Patil <patila@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/mwifiex/pcie.h')
-rw-r--r--drivers/net/wireless/mwifiex/pcie.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/net/wireless/mwifiex/pcie.h b/drivers/net/wireless/mwifiex/pcie.h
index 2f218f9a3fd3..87201f554d2e 100644
--- a/drivers/net/wireless/mwifiex/pcie.h
+++ b/drivers/net/wireless/mwifiex/pcie.h
@@ -118,7 +118,7 @@ struct pcie_service_card {
118 u32 txbd_rdptr; 118 u32 txbd_rdptr;
119 u32 txbd_ring_size; 119 u32 txbd_ring_size;
120 u8 *txbd_ring_vbase; 120 u8 *txbd_ring_vbase;
121 phys_addr_t txbd_ring_pbase; 121 dma_addr_t txbd_ring_pbase;
122 struct mwifiex_pcie_buf_desc *txbd_ring[MWIFIEX_MAX_TXRX_BD]; 122 struct mwifiex_pcie_buf_desc *txbd_ring[MWIFIEX_MAX_TXRX_BD];
123 struct sk_buff *tx_buf_list[MWIFIEX_MAX_TXRX_BD]; 123 struct sk_buff *tx_buf_list[MWIFIEX_MAX_TXRX_BD];
124 124
@@ -126,7 +126,7 @@ struct pcie_service_card {
126 u32 rxbd_rdptr; 126 u32 rxbd_rdptr;
127 u32 rxbd_ring_size; 127 u32 rxbd_ring_size;
128 u8 *rxbd_ring_vbase; 128 u8 *rxbd_ring_vbase;
129 phys_addr_t rxbd_ring_pbase; 129 dma_addr_t rxbd_ring_pbase;
130 struct mwifiex_pcie_buf_desc *rxbd_ring[MWIFIEX_MAX_TXRX_BD]; 130 struct mwifiex_pcie_buf_desc *rxbd_ring[MWIFIEX_MAX_TXRX_BD];
131 struct sk_buff *rx_buf_list[MWIFIEX_MAX_TXRX_BD]; 131 struct sk_buff *rx_buf_list[MWIFIEX_MAX_TXRX_BD];
132 132
@@ -134,13 +134,14 @@ struct pcie_service_card {
134 u32 evtbd_rdptr; 134 u32 evtbd_rdptr;
135 u32 evtbd_ring_size; 135 u32 evtbd_ring_size;
136 u8 *evtbd_ring_vbase; 136 u8 *evtbd_ring_vbase;
137 phys_addr_t evtbd_ring_pbase; 137 dma_addr_t evtbd_ring_pbase;
138 struct mwifiex_pcie_buf_desc *evtbd_ring[MWIFIEX_MAX_EVT_BD]; 138 struct mwifiex_pcie_buf_desc *evtbd_ring[MWIFIEX_MAX_EVT_BD];
139 struct sk_buff *evt_buf_list[MWIFIEX_MAX_EVT_BD]; 139 struct sk_buff *evt_buf_list[MWIFIEX_MAX_EVT_BD];
140 140
141 struct sk_buff *cmd_buf; 141 struct sk_buff *cmd_buf;
142 struct sk_buff *cmdrsp_buf; 142 struct sk_buff *cmdrsp_buf;
143 struct sk_buff *sleep_cookie; 143 u8 *sleep_cookie_vbase;
144 dma_addr_t sleep_cookie_pbase;
144 void __iomem *pci_mmap; 145 void __iomem *pci_mmap;
145 void __iomem *pci_mmap1; 146 void __iomem *pci_mmap1;
146}; 147};