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authorAmitkumar Karwar <akarwar@marvell.com>2014-06-20 00:38:52 -0400
committerJohn W. Linville <linville@tuxdriver.com>2014-06-25 15:32:46 -0400
commit92c2538f55132d8e0e53945204cfb137e7d64b6b (patch)
treed9f22d8e73487b306740fa3653af85243235d8cc /drivers/net/wireless/mwifiex/pcie.h
parent5f4ef7197db98a40e43904806612a8ccf609c0a3 (diff)
mwifiex: add firmware dump feature for PCIe
Firmware dump feature is added for PCIe based chipsets which can be used with the help of ethtool commands. 1) Trigger firmware dump operation: ethtool --set-dump mlan0 0xff When the operation is completed, udev event will be sent to trigger external application. 2) Following udev rule can be used to get the data from ethtool: DRIVER=="mwifiex_pcie", ACTION=="change", RUN+="/sbin/mwifiex_pcie_fw_dump.sh" mwifiex_pcie_fw_dump.sh: #!/bin/bash ethtool --set-dump mlan0 0 ethtool --get-dump mlan0 ethtool --get-dump mlan0 data /tmp/ITCM.log ethtool --set-dump mlan0 1 ethtool --get-dump mlan0 ethtool --get-dump mlan0 data /tmp/DTCM.log ethtool --set-dump mlan0 2 ethtool --get-dump mlan0 ethtool --get-dump mlan0 data /tmp/SQRAM.log ethtool --set-dump mlan0 3 ethtool --get-dump mlan0 ethtool --get-dump mlan0 data /tmp/IRAM.log Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/mwifiex/pcie.h')
-rw-r--r--drivers/net/wireless/mwifiex/pcie.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/wireless/mwifiex/pcie.h b/drivers/net/wireless/mwifiex/pcie.h
index e8ec561f8a64..ee073f5c9f0d 100644
--- a/drivers/net/wireless/mwifiex/pcie.h
+++ b/drivers/net/wireless/mwifiex/pcie.h
@@ -129,6 +129,9 @@ struct mwifiex_pcie_card_reg {
129 u32 ring_tx_start_ptr; 129 u32 ring_tx_start_ptr;
130 u8 pfu_enabled; 130 u8 pfu_enabled;
131 u8 sleep_cookie; 131 u8 sleep_cookie;
132 u16 fw_dump_ctrl;
133 u16 fw_dump_start;
134 u16 fw_dump_end;
132}; 135};
133 136
134static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = { 137static const struct mwifiex_pcie_card_reg mwifiex_reg_8766 = {
@@ -191,6 +194,9 @@ static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
191 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR, 194 .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
192 .pfu_enabled = 1, 195 .pfu_enabled = 1,
193 .sleep_cookie = 0, 196 .sleep_cookie = 0,
197 .fw_dump_ctrl = 0xcf4,
198 .fw_dump_start = 0xcf8,
199 .fw_dump_end = 0xcff
194}; 200};
195 201
196struct mwifiex_pcie_device { 202struct mwifiex_pcie_device {
@@ -198,6 +204,7 @@ struct mwifiex_pcie_device {
198 const struct mwifiex_pcie_card_reg *reg; 204 const struct mwifiex_pcie_card_reg *reg;
199 u16 blksz_fw_dl; 205 u16 blksz_fw_dl;
200 u16 tx_buf_size; 206 u16 tx_buf_size;
207 bool supports_fw_dump;
201}; 208};
202 209
203static const struct mwifiex_pcie_device mwifiex_pcie8766 = { 210static const struct mwifiex_pcie_device mwifiex_pcie8766 = {
@@ -205,6 +212,7 @@ static const struct mwifiex_pcie_device mwifiex_pcie8766 = {
205 .reg = &mwifiex_reg_8766, 212 .reg = &mwifiex_reg_8766,
206 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, 213 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
207 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, 214 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
215 .supports_fw_dump = false,
208}; 216};
209 217
210static const struct mwifiex_pcie_device mwifiex_pcie8897 = { 218static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
@@ -212,6 +220,7 @@ static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
212 .reg = &mwifiex_reg_8897, 220 .reg = &mwifiex_reg_8897,
213 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD, 221 .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
214 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, 222 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
223 .supports_fw_dump = true,
215}; 224};
216 225
217struct mwifiex_evt_buf_desc { 226struct mwifiex_evt_buf_desc {
@@ -322,4 +331,5 @@ mwifiex_pcie_txbd_not_full(struct pcie_service_card *card)
322 331
323 return 0; 332 return 0;
324} 333}
334
325#endif /* _MWIFIEX_PCIE_H */ 335#endif /* _MWIFIEX_PCIE_H */